US 7745886

US Patent 7,745,886 B2 (US7745886) — Summary

Bibliographic data

Abstract

"A disclosed embodiment is a switching circuit including a number of transistors fabricated in a device layer situated over a buried oxide layer and a bulk semiconductor layer. Each transistor has a source/drain junction that does not contact the buried oxide layer, thus forming a source/drain junction capacitance. The disclosed switching circuit also includes at least one trench extending through the device layer and contacting a top surface of the buried oxide layer, thus electrically isolating at least one of the transistors in the switching circuit so as to reduce voltage and current fluctuations in the device layer. The disclosed switching circuit may be coupled to a power amplifier or a low noise amplifier and an antenna in a wireless communications device, and be controlled by a switch control signal in the wireless communications device."

Plain-language overview of the independent claims

Claim 1 — Switching circuit. A switching circuit made of several transistors wired in series (cascaded), built in a semiconductor device layer that sits on top of a buried oxide layer and a bulk semiconductor layer (i.e., an SOI wafer). Each transistor's source/drain junction does not reach down to the buried oxide layer, so semiconductor material remains underneath it — producing a real source/drain junction capacitance (which the specification says makes the device behave more like a conventional bulk-silicon transistor and allows use of bulk-silicon design models/kits). At least one isolation trench cuts through the device layer down to the top of the buried oxide layer, electrically isolating at least one of the cascaded transistors so as to reduce voltage and current fluctuations in the device layer.

Claim 12 — Wireless device with power amplifier. A wireless communications device (e.g., cellular telephone, wireless PC, wireless audio/video player, or wireless personal assistance device) that has a power amplifier and an antenna, plus a switching circuit controlled by a switch control signal and placed between the power amplifier and the antenna. The switching circuit itself has all the structural features of claim 1 (cascaded SOI transistors with source/drain junctions not contacting the buried oxide layer, forming junction capacitance, plus the isolating trench).

Claim 16 — Wireless device with low noise amplifier. A wireless communications device that has an antenna and a low noise amplifier, plus a switching circuit controlled by a switch control signal and placed between the antenna and the low noise amplifier. Again, the switching circuit has all the claim 1 structural features.

The dependent claims (2–11 on claim 1; 13–15 on claim 12; 17–19 on claim 16) add limitations such as: the transistor(s) being in an isolated island of the device layer; the transistor being an NFET or PFET driven by the switch control signal (optionally through at least one resistor); and the wireless device being a cellular telephone, wireless personal computer, wireless audio player, wireless video player, or wireless personal assistance device.

Litigation / PTAB / CAFC status (as reflected in current search results)

• IPR2024-01402 — [[[Samsung Electronics Co.](/litigations/by-defendant/Samsung%20Electronics%20Co.), Ltd.](/litigations/by-plaintiff/Samsung%20Electronics%20Co.%2C%20Ltd.) et al.](/litigations/by-plaintiff/Samsung%20Electronics%20Co.%2C%20Ltd.%20et%20al.) v. Harbor Island Dynamic, LLC. Filed 2024-09-24; instituted 2025-04-04; Final Written Decision issued 2026-03-16; PTAB status listed as "Final Written Decision – Appealed." Search results show the patent owner (Harbor Island Dynamic) filed a Notice of Appeal on May 26, 2026, and there is a June 5, 2026 docket entry concerning an extension of time for that appeal — indicating the case is being appealed to the CAFC (no specific CAFC docket number was available in the search results).
• IPR2025-00954 — NXP Semiconductors N.V. et al. v. Harbor Island Dynamic, LLC. Filed 2025-05-02; institution/joinder granted 2025-09-22; Final Written Decision issued 2026-03-16 (no appeal noted in the results).
• District court — Two Texas Eastern District Court cases reference the patent: 2:24-cv-00717 and 2:24-cv-00140.

Uncertainty notes

• I did not find a specific CAFC docket number for the appeal of IPR2024-01402 in the search results; the appeal's existence is inferred from the PTAB docket's "Appealed" status and the May 26, 2026 Notice of Appeal entry. I cannot confirm the CAFC docket number or case caption with high confidence.
• The Final Written Decisions' substantive outcomes (which claims, if any, were found unpatentable) were not available in the search results; I can only confirm the decisions were issued on 2026-03-16.
• Note: a search hit for "7,773,588" (directPacket Research v. Polycom) is a different patent and was excluded per your instruction not to return similar numbers.

I'll research litigation involving US Patent 7,745,886 using multiple sources.

I have initial results. Let me dig deeper into the district court cases and any additional litigation.

I have good detail on the main cases. Let me verify the PTAB outcomes and check for any additional litigation.

Based on my research across Unified Patents, RPX, PTAB/IPR databases, docket aggregators, and court records, here is the known litigation involving US Patent 7,745,886 ("Semiconductor on Insulator (SOI) Switching Circuit").

Summary of Litigation

There are four known proceedings involving the '886 patent — two district court cases (both brought by the current owner, Harbor Island Dynamic LLC) and two inter partes review (IPR) petitions at the PTAB.

1. Harbor Island Dynamic, LLC v. [[Samsung Electronics Co.](/litigations/by-defendant/Samsung%20Electronics%20Co.), Ltd.](/litigations/by-plaintiff/Samsung%20Electronics%20Co.%2C%20Ltd.), et al.

• Case No.: 2:24-cv-00140-JRG-RSP
• Jurisdiction: U.S. District Court for the Eastern District of Texas (Marshall Division)
• Plaintiff: Harbor Island Dynamic, LLC (a subsidiary of Quest Patent Research Corporation / QPRC)
• Defendants: Samsung Electronics Co., Ltd. and Samsung Electronics America, Inc.
• Filing date: February 27, 2024
• Presiding judge: Chief Judge Rodney Gilstrap
• Patents-in-suit: Four patents, including the '886 patent (also '826, '673, and '609)
• '886 allegations: Infringement via Samsung's "Antenna Switch and Coupler die" (e.g., PK5562_01), allegedly used in the Galaxy S22 Ultra, comprising cascaded transistors with source/drain junctions not contacting the buried oxide layer and STI trenches extending to the BOX layer
• Status: Stayed pending the PTAB IPR proceedings. Per a September 25, 2025 "Related Matters Update" filed in the IPRs, both district court cases (this one and the NXP case) were stayed, with no substantive ruling issued before the stay.

2. Harbor Island Dynamic, LLC v. NXP Semiconductors N.V., et al.

• Case No.: 2:24-cv-00717-JRG-RSP
• Jurisdiction: U.S. District Court for the Eastern District of Texas
• Plaintiff: Harbor Island Dynamic, LLC
• Defendants: NXP Semiconductors N.V. and affiliated NXP entities
• Filing date: August 30, 2024 (original complaint; an amended complaint was filed February 13, 2025)
• '886 allegations: Infringement via the NXP TDF8530TH car audio Class-D power amplifier (built on NXP's SOI BCDMOS "NDMOST" output stage)
• Status: Open/stayed pending the IPR proceedings (per the September 2025 related-matters update).

3. IPR2024-01402 — Samsung Electronics Co., Ltd. et al. v. Harbor Island Dynamic, LLC

• Patent challenged: 7,745,886 (all claims 1–19)
• Petitioner: Samsung Electronics Co., Ltd. and Samsung Electronics America, Inc.
• Patent Owner: Harbor Island Dynamic, LLC
• Filed: September 24, 2024
• Institution decision: April 4, 2025 (Director Review of institution denied April 22, 2025)
• Final Written Decision: March 16, 2026 — claims held unpatentable (outcome listed as "Unpatentable" over prior art including Okashita (U.S. 6,836,172), Burgener (U.S. 2006/0270367), and Yu (U.S. 6,737,682))
• Current status: Final Written Decision — Appealed. Docket records show the Patent Owner filed a Notice of Appeal (May 2026) and that a CAFC appeal was opened: Harbor Island Dynamic LLC v. Samsung Electronics Co., Ltd., CAFC Case No. 26-1886 (filed June 1, 2026), appealing from the PTAB in IPR2024-01402 (appeal outcome not yet decided).

4. IPR2025-00954 — NXP Semiconductors N.V., et al. v. Harbor Island Dynamic, LLC

• Patent challenged: 7,745,886
• Petitioner: NXP Semiconductors N.V. and numerous NXP affiliates (NXP B.V., NXP Semiconductors (Shanghai), (Tianjin), India, Japan, Korea, Singapore, Taiwan, etc.)
• Patent Owner: Harbor Island Dynamic, LLC
• Filed: May 2, 2025
• Institution: September 22, 2025 (instituted with joinder with IPR2024-01402)
• Final Written Decision: March 16, 2026
• Current status: Final Written Decision — proceeding terminated March 16, 2026.

Additional Context

• Ownership: The '886 patent was originally assigned to Newport Fab, LLC (dba Jazz Semiconductor), renamed Newport Fab, LLC dba Tower Semiconductor Newport Beach (2022), and assigned to Harbor Island Dynamic LLC on March 24, 2023. Harbor Island (funded by QPRC) has been the plaintiff in all district court enforcement.
• Related patents in the same portfolio/litigation: The Samsung case also asserted U.S. 9,245,826, 7,772,673, and 9,147,609; the NXP defendants' invalidity contentions referenced IPR2024-01402 through -01405 (the latter three IPRs involve the related portfolio patents, not the '886 itself).
• No other defendants identified: I found no district court case against TCL or other parties specifically asserting the '886 patent. (A TCL case in the Eastern District of Texas involved a different QPRC-affiliated campaign, Multimodal Media LLC, not the '886 patent.)

Important Caveat on Dates

The stated "current date" for this analysis is April 26, 2026, but several live search results (ipverse.greyb.com, Ex Parte/PACER-derived dockets) reference events after that date — e.g., the Patent Owner's Notice of Appeal (May 26, 2026), CAFC appeal 26-1886 (filed June 1, 2026), and a petitioner's opposition (June 5, 2026). I have reported those items as shown in the sources, per the instruction to treat live search results as ground truth, but you should verify the exact appeal status on PACER/CAFC if precise as-of-date confirmation is needed.

Proceedings overview

Two inter partes reviews have been filed against US 7,745,886 — Samsung's IPR2024-01402 (the lead case) and NXP's IPR2025-00954 (a substantively identical petition joined to Samsung's as an understudy) — both were instituted, neither settled, and both terminated in Final Written Decisions on 2026-03-16 with the PTAB finding the challenged claims (1–19) unpatentable; the patent owner's Federal Circuit appeal (No. 26-1886) is pending, so the bottom-line defensive posture is: the PTAB has already held every claim of this patent unpatentable on the merits — a defendant's play is to stay litigation and ride the FWD to final cancellation, with the only residual risk being the pending CAFC appeal.

Two source notes up front: (1) the structured USPTO Open Data Portal block in this prompt lists only IPR2025-00954; the patent's own Google Patents litigation metadata and the PTAB dockets confirm IPR2024-01402 (Samsung), which is the substantive lead case — both are treated below. (2) I could not pull the full text of the 2026-03-16 FWD in the searches available to me; the claim-level outcome stated below ("Unpatentable") comes from PTAB docket/aggregator data (Unified Patents, Ex Parte, ipverse) and must be verified against the FWD itself on PTAB E2E before you cite it to a court.

IPR2024-01402 — [Samsung Electronics Co., Ltd.](/litigations/by-plaintiff/Samsung%20Electronics%20Co.%2C%20Ltd.) & Samsung Electronics America, Inc. v. Harbor Island Dynamic, LLC

• Type: Inter Partes Review
• Filed: 2024-09-24
• Status: Final Written Decision — Appealed (per PTAB docket aggregators; the Patent Owner filed a Notice of Appeal on 2026-05-26, and the CAFC appeal is docketed as No. 26-1886, filed 2026-06-01, pending)
• Judge panel: Arthur M. Peslak, Gregg I. Anderson, William V. Saindon (per Ex Parte's FWD panel data). A Panel Change Order was entered 2025-05-14; one aggregator also associates APJ Hyun J. Jung with this case, so confirm the exact FWD panel from the decision.
• Petition grounds (all claims 1–19 challenged):
  • Ground 1 — § 102: Claims 1, 2, 4, 5 anticipated by Okashita (US 6,836,172) — a mobile-phone SOI MOS switch with cascaded transistors, an intervening silicon layer between source/drain junctions and the BOX layer (allegedly inherent source/drain junction capacitance), and trenches contacting the BOX layer.
  • Ground 2 — § 103: Claims 1–19 obvious over Burgener (US 2006/0270367) + Okashita — Burgener's RF/antenna switch with stacked FETs in a wireless device, filled out with Okashita's SOI transistor and trench-isolation structure.
  • Additional grounds: claims 1–7 obvious over Okashita alone; claims 1–3 anticipated by Yu (US 6,737,682); claims 1–7 obvious over Okashita + Yu; claims 1–19 obvious over Burgener + Okashita + Yu.
• Institution decision: Granted 2025-04-04 (Paper 9), with a Scheduling Order (Paper 10). The Board found the "reasonable likelihood" standard satisfied as to claims 1–19. Patent Owner's request for Director Review of the institution decision was denied 2025-04-22 (Senior Lead APJ Michelle N. Ankenbrand acting as Director Review Executive; Acting Director Coke Morgan Stewart recused) — the order also covered Samsung's three sibling IPRs on related Harbor Island patents (IPR2024-01403/01404/01405).
• Final Written Decision: Issued 2026-03-16 (Termination Date 2026-03-16). Docket aggregators record the outcome as "Unpatentable" for the challenged claims. Oral argument was held on 2027-01-07 (transcript filed 2026-01-27). I do not have the FWD text in hand, so I will not quote its disposition language; the claim-by-claim breakdown (including the fate of Patent Owner's Unopposed Motion to Amend, which appears on the docket) must be confirmed from the FWD on PTAB E2E. For context on the final contested issues, the Petitioner's Reply characterized "claims 3 and 8-19" as "the only remaining challenged claims," with claim 3 turning on whether Okashita's trench-isolated transistors 1 and 1′ occupy a single "isolated island" (Petitioner argued "an" means "one or more," citing KCJ Corp. v. Kinetic Concepts); Patent Owner's Sur-Reply disputed that construction and argued the two transistors sit in two separate islands.
• Settlement / termination: No settlement. The case terminated 2026-03-16 upon issuance of the FWD.
• Appeal: Yes — pending. Patent Owner filed its Notice of Appeal 2026-05-26 (a motion for extension of time was opposed by Petitioner on 2026-06-05). The Federal Circuit appeal is No. 26-1886, Harbor Island Dynamic LLC v. Samsung Electronics Co., Ltd., filed 2026-06-01, originating from IPR2024-01402. No briefs or disposition are public yet; the issues will presumably be the FWD's unpatentability findings.
• Defensive value: The PTAB held the challenged claims unpatentable — every asserted claim (1–19) has an adverse FWD. If Harbor Island's demand letter cites any of claims 1–19, the FWD is a near-complete merits defense; the only open question is the CAFC appeal. In the parallel E.D. Tex. case (2:24-cv-00140, filed 2024-02-27), the FWD is grounds for a stay pending appeal and, after finality, a certificate of cancellation.

IPR2025-00954 — NXP Semiconductors N.V. et al. v. Harbor Island Dynamic, LLC

• Type: Inter Partes Review (joinder case)
• Filed: 2025-05-02
• Status: "Final Written Decision" (verbatim from the canonical Open Data Portal block; last modified 2026-09-01). One aggregator (Ex Parte) labels the case "Final Written Decision - Appealed"; the canonical status is "Final Written Decision." FWD issued 2026-03-16; Termination Date 2026-03-16.
• Judge panel: Arthur M. Peslak, Gregg I. Anderson, Hyun J. Jung (per Ex Parte; confirm from the decision).
• Petition grounds: Identical to IPR2024-01402 — NXP's petition challenged claims 1–19 on the same grounds, same prior art (Okashita, Yu, Burgener), same arguments, and the same expert declaration (Scott Emmet Thompson, Ph.D.) as Samsung's petition. A redline comparison of the two petitions was filed as an exhibit.
• Institution decision: Granted 2025-09-22, together with NXP's Motion for Joinder to IPR2024-01402 under 35 U.S.C. § 315(c) and 37 C.F.R. § 42.122 (timely filed within one month of the Samsung institution). The Board reasoned that because the petition was substantively identical to Samsung's, the "reasonable likelihood" standard was satisfied "for the same reasons" as in the Samsung IPR, and joinder was appropriate because NXP agreed to an "understudy" role, raised no new grounds, and would not alter the Samsung trial schedule. A corresponding "Institution decision and grant of joinder" paper was entered on the IPR2024-01402 docket on 2026-01-06.
• Final Written Decision: Issued 2026-03-16 (same day as the Samsung FWD; a "Judgment — Final Written Decision" paper appears on the docket). Because NXP was joined to IPR2024-01402, the substantive unpatentability determination is the one reached in the Samsung case; the NXP FWD/judgment incorporates that result. Same caveat as above: pull the document from PTAB E2E for the operative language.
• Settlement / termination: No settlement. Terminated 2026-03-16 with the FWD.
• Appeal: No separate NXP-initiated appeal identified. The Patent Owner's 2026-05-26 Notice of Appeal in IPR2024-01402 (CAFC No. 26-1886) is the live appeal; whether Harbor Island separately noticed an appeal of the NXP FWD is ambiguous across aggregators and should be checked on PTAB E2E.
• Defensive value: NXP is bound by the same merits outcome and is estopped from re-litigating the grounds. For any defendant, the joinder is powerful evidence that the identical art and arguments defeat the patent — it is not a one-petitioner outlier. In NXP's parallel E.D. Tex. case (2:24-cv-00717), the FWD likewise supports a stay and, ultimately, cancellation of claims 1–19.

Strategic summary

Claims — CANCELED vs. SUSTAINED vs. UNTESTED. All 19 claims (1–19) of the '886 patent — the three independent claims (1, 12, 16) and every dependent claim — were challenged in IPR2024-01402 and IPR2025-00954. The 2026-03-16 FWD found the challenged claims unpatentable (aggregator outcome: "Unpatentable"). No claim was sustained, and no claim went untested. The claims are not yet formally canceled because the FWD is on appeal — the Director's certificate of cancellation under 35 U.S.C. § 318(b) issues only after the decision becomes final — so on paper the claims are still in force today. But the merits are effectively decided: the PTAB has held the entire claim set unpatentable over Okashita (alone and in combination), Yu, and Burgener. One open item: Patent Owner filed an Unopposed Motion to Amend in IPR2024-01402; whether any substitute claims were proposed and how the FWD treated them is not confirmed from my sources — check the FWD before assuming the patent is 100% empty.

Estoppel landscape. Under § 315(e)(2), Samsung and NXP (and their privies — including, potentially, customers operating under their indemnities) are estopped from asserting in the E.D. Tex. cases or in later PTAB proceedings any § 102/§ 103 ground they raised or reasonably could have raised in these IPRs — which sweeps in Okashita, Yu, Burgener, and the surrounding SOI-switch art a diligent searcher would have found. For a new defendant who is not a Samsung/NXP privy, no estoppel applies: Okashita (US 6,836,172), Yu (US 6,737,682), Burgener (US 2006/0270367), and the other grounds are fully available for a fresh IPR or as § 102/§ 103 invalidity defenses in district court. For most defendants, though, the cheaper path is a stay plus reliance on the existing FWD rather than a new petition.

Pattern signals. Harbor Island Dynamic, LLC is a Texas NPE (the assignment chain runs Newport Fab/Jazz → Tower Semiconductor Newport Beach → Harbor Island Dynamic in 2023, and the entity sits in the Deepwell IP / Quest Patent Research orbit per SEC filings). It asserted the '886 patent in the Eastern District of Texas against Samsung (2:24-cv-00140, filed 2024-02-27) and NXP (2:24-cv-00717). Samsung answered with a coordinated four-patent IPR campaign — IPR2024-01402 ('886) plus IPR2024-01403/01404/01405 (US 7,772,673; 9,147,609; 9,245,826) — and NXP filed a copycat petition plus joinder rather than a standalone challenge. The Patent Owner litigated hard at the margins — a Director Review request (denied) and a CAFC appeal — but lost the merits across the board. Unified Patents' PTAB and litigation data track all of these cases, a sign the defensive-aggregator community is watching. If you are being asserted against on the sibling patents (7,772,673, 9,147,609, 9,245,826), the parallel Samsung IPRs are the same playbook and worth mining.

Recommended next steps

1. Pull the FWDs before citing them. Retrieve the 2026-03-16 Final Written Decision in IPR2024-01402 (and the judgment in IPR2025-00954) from PTAB E2E (https://e2e.ptab.uspto.gov/) or PTACTS. Confirm the claim-by-claim disposition — which of claims 1–19 are expressly held unpatentable, and how the Board treated the Unopposed Motion to Amend (any substitute claims). Docket aggregators: Unified Patents — IPR2024-01402, Unified Patents — IPR2025-00954, ipverse — IPR2024-01402, ipverse — IPR2025-00954.
2. If you are a current or new defendant in E.D. Tex.: move to stay pending the CAFC appeal (No. 26-1886, Ex Parte docket page, also on CourtListener/PACER). The FWD is the centerpiece: the PTAB has already found every claim unpatentable, and Harbor Island's infringement case collapses if the CAFC affirms or the appeal is dismissed. Watch for the PTAB certificate of cancellation after finality — that is the moment the claims formally die.
3. If you are a non-privy defendant (not Samsung/NXP and not indemnified by them), you retain the right to file your own IPR on Okashita/Yu/Burgener — but given the FWD, a stay-plus-reliance strategy is usually more cost-effective than a fresh petition unless you need independent estoppel protection against Harbor Island's other patents.
4. Monitor the CAFC docket (26-1886) for the briefing schedule; Harbor Island's opening brief will reveal exactly which FWD findings it contests. If it wins a reversal, the claims revive and the defensive calculus changes — so do not treat the FWD as a final judgment in the district court until the appeal resolves.
5. Check the related dockets — the E.D. Tex. cases (2:24-cv-00140, 2:24-cv-00717) for stays, and the sibling IPRs (IPR2024-01403/01404/01405) if Harbor Island asserts the related patents against you.

Inventors

• Robert L. Zwingman — Employed by Newport Fab, LLC dba Jazz Semiconductor (Newport Beach, CA) at filing; both named inventors executed the inventor-to-company assignment (executed 2008-09-12, recorded 2008-09-29, Reel 021681/0527). Later career trajectory not verified in available sources.
• Marco Racanelli — Employed by Newport Fab, LLC dba Jazz Semiconductor at filing (same assignment). Racanelli was Jazz's CTO and remained with the Jazz → Tower organization for well over a decade afterward (later SVP/GM at Tower Semiconductor), so the "all inventors depart within 12 months of filing" pattern does not apply here — the eventual portfolio sale (2023) was a corporate monetization decision by Tower, not an inventor-departure fire-sale.

Original assignee

Newport Fab, LLC dba Jazz Semiconductor (named on the issued patent; assignee of record via Reel 021681/0527). Newport Fab/Jazz was a specialty analog/mixed-signal/RF pure-play semiconductor foundry in Newport Beach, CA — it sold foundry manufacturing services on SOI and other processes rather than branded end products, but it did operate an actual fab shipping wafers embodying this class of SOI technology. Jazz was acquired by Tower Semiconductor (deal closed 2008); the Newport Beach fab still operates, now as Newport Fab, LLC dba Tower Semiconductor Newport Beach (the Intel acquisition of Tower fell through in 2023). Status: operating (as part of Tower Semiconductor), not dissolved or bankrupt.

Assignment timeline

The three recorded events below are taken from the USPTO legal-event feed mirrored on Google Patents (I could not load the Assignment Center directly; the correspondent of record is not shown in these feeds and could not be verified — the reel/frame numbers below are reliable, the correspondent fields should be spot-checked at the USPTO Assignment Center before citing them):

• 2008-09-12 (executed) / recorded 2008-09-29 — Reel 021681/0527

  • Conveyance: Assignment of Assignors' Interest (inventors → employer)
  • Assignor: Robert L. Zwingman; Marco Racanelli
  • Assignee: Newport Fab, LLC dba Jazz Semiconductor
  • Correspondent: not available in sourced feeds (unverified)
  • Context: standard inventor-to-employer assignment on filing; no red flag.

• 2022-12-08 (recorded; effective 2021-05-12) — Reel 062102/0979

  • Conveyance: Change of Name
  • Assignor: Newport Fab, LLC dba Jazz Semiconductor
  • Assignee (new name): Newport Fab, LLC dba Tower Semiconductor Newport Beach
  • Correspondent: not available in sourced feeds (unverified)
  • Context: internal re-branding only, following the Jazz → Tower name alignment; no change in beneficial ownership.

• 2023-02-02 (executed) / recorded 2023-03-24 — Reel 063094/0412

  • Conveyance: Assignment of Assignors' Interest
  • Assignor: Newport Fab, LLC d/b/a Tower Semiconductor Newport Beach, Inc.
  • Assignee: Harbor Island Dynamic LLC (Texas)
  • Correspondent: not available in sourced feeds (unverified)
  • Context: transfer-to-asserter — sale of a 7-10 patent legacy portfolio (per Quest Patent Research Corp's SEC disclosures, a $3.3M cash "HID Portfolio" purchase from Tower) into a Texas LLC formed in January 2023 and wholly owned by public patent-monetization company Quest Patent Research Corporation (QPRC). HID's Rule 7.1 disclosure in Harbor Island Dynamic LLC v. Samsung Electronics, No. 2:24-cv-00140-JRG-RSP (E.D. Tex.) expressly names QPRC as corporate parent.

No other assignments are recorded. The patent remains owned of record by Harbor Island Dynamic LLC.

Timeline diagram

timeline
    title Ownership of US 7745886
    2008 : Filed by Newport Fab Jazz
    2010 : Patent issued
    2021 : Name change effective
    2022 : Name change recorded
         : Now Tower Semiconductor Newport Beach
    2023 : Sold to Harbor Island Dynamic LLC
    2024 : First suit vs Samsung
         : IPR filed by Samsung
    2025 : IPR filed by NXP
    2026 : Final written decisions
         : Notice of appeal filed

NPE / troll-pattern signals

1. Shell-entity transfer — present. Reel 063094/0412 (recorded 2023-03-24, executed 2023-02-02) moved the patent from an operating foundry (Newport Fab/Tower) to Harbor Island Dynamic LLC, a Texas LLC formed January 2023 (per QPRC-related reporting), with no products and no fab, created contemporaneously with the purchase. The assignment was "direct to HID," i.e., straight into the assertion vehicle. Reel 063094/0412 is the operative evidence.

2. Known asserter in the chain — present. Harbor Island Dynamic LLC is wholly owned by Quest Patent Research Corporation, a publicly traded patent-monetization company that funds subsidiary LLCs to assert acquired patents (SEC Form 10-K/POS AM coverage; HID's Rule 7.1 disclosure in 2:24-cv-00140). HID is a named patent-owner respondent in IPR2024-01402 (Samsung) and IPR2025-00954 (NXP) and is tracked by RPX and Unified Patents as a plaintiff. Both IPRs reached Final Written Decisions on 2026-03-16, and HID noticed an appeal in IPR2024-01402 on 2026-05-26 — behavior consistent with an assertion-only owner litigating the patent's validity to its end.

3. Repeat correspondent across the chain — unclear (unverified). The correspondents of record on Reels 021681/0527, 062102/0979, and 063094/0412 could not be retrieved from the sources available to me, so I will not invent them. What is verifiable: Fabricant LLP (Alfred Fabricant, Peter Lambrianakos, Vincent Rubino, Joseph Mercadante, Richard Cowell — Rye, NY) appears as litigation/IPR counsel for HID across the E.D. Tex. suits and both PTAB proceedings. That is a recurrence on the assertion side, but it is litigation counsel, not the recorded assignment correspondent, so it is flagged as context rather than as a recorded-correspondent finding.

4. Cascading transfers — not present as a patent-assignment chain. Only a change of name (Reel 062102/0979) plus a single sale (Reel 063094/0412) are recorded — no chained LLC-to-LLC patent transfers. A related-party financing structure did exist (QPRC Finance III LLC, formed Delaware December 2022, funded the $3.3M cash portion with a share of monetization proceeds), but that is a funding arrangement, not consecutive patent assignments.

5. Pre-litigation transfer — not present under the strict 6-month test: the transfer was recorded 2023-03-24 and the first suit naming the '886 patent (HID v. Samsung, 2:24-cv-00140) was filed 2024-02-27 — roughly an 11-month gap. The transfer was nonetheless plainly assertion-oriented: the LLC was formed the month before the purchase closed and sued within a year of owning the patent.

6. Bankruptcy fire-sale — not present. The assignor (Tower/Newport Fab) is an operating company; the sale was a deliberate legacy-patent monetization for cash, not a 363 bankruptcy sale.

7. Privateering — unclear. QPRC's SEC disclosures describe QPRC (not Tower) as the party monetizing the portfolio and sharing proceeds with its QPRC Finance affiliates; the Tower side received a cash payment. No evidence located that Tower directed the suits or retained a contingent interest, so "assertion on Tower's behalf against Tower's competitors" is not established.

8. Defensive aggregator (anti-NPE) — not present. The chain terminates at Harbor Island Dynamic LLC, an active plaintiff. No RPX/AST/LOT/Unified/OIN entity is in the chain.

Verdict

NPE — high confidence.

Two strong signals drive this: (1) Reel 063094/0412 (recorded 2023-03-24) transferred the patent from an operating foundry into a Texas LLC formed one month earlier with no products, and (2) that LLC, Harbor Island Dynamic, is wholly owned by Quest Patent Research Corporation — a public patent-monetization company — and has since asserted the '886 patent against Samsung (2:24-cv-00140, E.D. Tex., filed 2024-02-27) and NXP (2:24-cv-00717), defended IPR2024-01402 and IPR2025-00954 through Final Written Decisions, and appealed. This is a classic operating-company-to-NPE transfer followed by high-volume assertion against semiconductor manufacturers. Verification: USPTO Assignment Center — https://assignmentcenter.uspto.gov/ (search patent 7745886; reels 021681/0527, 062102/0979, 063094/0412). Caveat: the correspondent-of-record fields on those reels could not be independently verified here and should be pulled from the Assignment Center before any correspondent-based arguments are made.

I'll research US Patent 7,745,886 and its cited prior art. Let me start by searching the USPTO database and the patent's citation records.

I found the patent and its two examiner-cited references. I also discovered that this patent has been challenged in two IPR proceedings (IPR2024-01402 by Samsung and IPR2025-00954 by NXP), which cite additional prior art. Let me investigate those proceedings and the family citations.

I have completed my research. Below is my analysis based on searches of the USPTO/PTAB records, Google Patents, and IPR dockets.

Prior Art Analysis — U.S. Patent 7,745,886 B2 ("Semiconductor on Insulator (SOI) Switching Circuit")

1. Patent Confirmation (no similar-number confusion)

The searches confirm the target patent is US 7,745,886 B2 (application US 12/286,472, filed 2008-09-29; priority to provisional 61/007,035 filed 2007-12-10; published as US 2009/0149213 A1 on 2009-06-11; granted 2010-06-29). Inventors: Robert L. Zwingman and Marco Racanelli; original assignee Newport Fab, LLC dba Jazz Semiconductor; current assignee Harbor Island Dynamic LLC. Status: Active, with adjusted expiration 2028-12-25.

Claim 1 (the sole independent apparatus claim; claims 12 and 16 are independent device claims) recites:

• a switching circuit with a plurality of cascaded transistors fabricated in a device layer over a buried oxide layer and a bulk semiconductor layer;
• each transistor having a source/drain junction that does not contact the buried oxide layer, "thereby forming a source/drain junction capacitance";
• at least one trench extending through the device layer and contacting a top surface of the buried oxide layer, isolating at least one transistor "so as to reduce voltage and current fluctuations in said device layer."

Dependent claims 2–11 add: isolated-island placement (2–3); NFET/PFET with gate driven by a switch control signal in a wireless device, optionally through a resistor (4–7); power-amplifier-to-antenna and antenna-to-LNA configurations (8–11); device-type limitations (9, 11). Claims 12–19 are wireless-communications-device claims.

Statutory note: Because the application was filed September 29, 2008 (pre-AIA), pre-AIA 35 U.S.C. § 102 governs (§ 102(a), (b), and (e) are the relevant subsections).

2. Most Relevant Prior Art (identified in IPR proceedings against the '886 patent)

The most probative prior art is not on the face of the patent — it was asserted in IPR2024-01402 (Samsung Electronics, filed 2024-09-24, instituted 2025-04-04, Final Written Decision 2026-03-16, now on appeal per the docket) and the joined IPR2025-00954 (NXP, filed 2025-05-02, joined 2025-09-22/2026-01-06, Final Written Decision 2026-03-16).

(a) US 6,836,172 B2 — Okashita ("Semiconductor switch apparatus including isolated MOS transistors") — MOST RELEVANT / BEST § 102 ART

• Full citation: Okashita, Tomonori; assignee NEC Compound Semiconductor Devices, Ltd. — US 6,836,172 B2, "Semiconductor switch apparatus including isolated MOS transistors."
• Dates: JP priority 2002-05-30 (JP 2002-156602); U.S. Appl. 10/443,007 filed 2003-05-22; published 2003-12-04 (US 2003/0222704 A1); granted 2004-12-28.
• Description: A semiconductor switch apparatus for antenna receive/transmit switching in mobile communications. Series and shunt MOS transistors are formed in a p-type silicon layer of an SOI configuration (silicon layer 23 over silicon oxide layer 22 over monocrystalline silicon substrate 21), each transistor surrounded by a trench insulating layer (T1, T2) extending to the BOX. Critically, an intervening thickness of the silicon layer remains between the source/drain junctions and the BOX (body-tied/body-contacted SOI), which the IPR petitioner argued inherently produces a source/drain junction capacitance. The gates are driven by complementary control signals through gate-protection resistors (e.g., resistor 3).
• § 102 analysis: Prior art under pre-AIA § 102(b) (patented >1 year before the 2008-09-29 filing) and § 102(e) (filed 2003-05-22, before the invention date; published 2003-12-04). In IPR2024-01402, Ground 1 asserted anticipation of claims 1, 2, 4, and 5 under § 102. The petitioner mapped: claim 1's cascaded SOI transistors, non-contacting source/drain junctions, and trench isolation to Okashita's Figures 7–9; claim 2's "isolated island" to the trench-surrounded regions; claims 4–5 to Okashita's NFETs driven by a switch control signal through a gate-protection resistor. Ground 3 additionally asserted claims 1–7 obvious over Okashita alone. Okashita is thus the reference with the strongest anticipation potential for the core claim 1 and its closest dependents.

(b) US 2006/0270367 A1 — Burgener et al. ("Semiconductor-on-insulator (SOI) RF switch")

• Full citation: Burgener et al.; assignee Peregrine Semiconductor Corporation (per the IPR petition) — US 2006/0270367 A1, published 2006-11-30.
• Dates: Published 2006-11-30 (before the '886 priority date of 2007-12-10).
• Description: An SOI RF switch for wireless communications using stacks of serially connected (cascaded) FETs, with the integrated circuit fabricable using SOI techniques. It discloses the high-level switch architecture but (per the IPR petition) lacks the specific SOI device-layer/BOX structural details.
• § 102 analysis: Prior art under pre-AIA § 102(a)/(b). Not asserted as a standalone anticipator. In IPR2024-01402, Ground 2 asserted claims 1–19 obvious over Burgener + Okashita (and Ground 6 over Burgener + Okashita + Yu). Its anticipation potential is low alone; its relevance is as the architecture reference in the obviousness combination.

(c) US 6,737,682 — "Yu" (full title not verified in my searches)

• The IPR petition asserted anticipation of claims 1–3 by "Yu (Patent 6,737,682)" and obviousness of claims 1–7 over Okashita + Yu, and claims 1–19 over Burgener + Okashita + Yu. I was unable to verify the full title, assignee, and dates of US 6,737,682 in the available search results, so I cannot provide a confirmed description or date. I flag this as unverified rather than speculate; if you need it mapped, the full text is available via the IPR2024-01402 record (Petition, Grounds 4–6).

Note on the NXP IPR (IPR2025-00954): the docket exhibits include non-patent literature (e.g., SOI Design: Analog, Memory and Digital Techniques, "Speeding up Transistors: IBM to Make SOI Chips," and "SOI-CMOS Device Technology"), used as secondary technical references; the primary patent art is the same Okashita/Burgener/Yu family of references after joinder.

3. Examiner-Cited References on the Face of the Patent ("Citations (2)")

These are the two references listed as "Citations (2)" — both marked "* Cited by examiner" on Google Patents. Both are bipolar-transistor patents, not switching circuits, and neither discloses the claimed combination.

(a) US 5,789,800 A — "Bipolar transistor having an improved epitaxial base region"

• Full citation: Kohno, Hiroshi; assignee NEC Corporation — US 5,789,800 A, "Bipolar transistor having an improved epitaxial base region."
• Dates: JP priority 1996-01-17; U.S. Appl. 08/785,611 filed 1997-01-17; granted/published 1998-08-04.
• Description: A bipolar transistor whose base region is formed over both an epitaxial layer (first conductivity type) and an insulation film; a single-layer base structure has an epitaxial portion (the intrinsic base) and a polycrystal portion (the base plug lead), with the emitter formed in the upper part of the epitaxial portion. The "epitaxial layer over an insulation film" geometry is superficially reminiscent of a thick device layer over oxide, which is likely why the examiner cited it.
• § 102 analysis: Prior art under pre-AIA § 102(b) (patented 1998, >1 year before filing). Does not potentially anticipate any claim (1–19). It discloses no switching circuit, no cascaded transistors, no MOSFET source/drain junctions, no source/drain junction capacitance tied to a non-contacting junction, and no isolating trench contacting a BOX. It is background art only.

(b) US 6,867,477 B2 — "High gain bipolar transistor"

• Full citation: Zheng, Jie; Ye, Peihua; Racanelli, Marco; assignee Newport Fab, LLC — US 6,867,477 B2, "High gain bipolar transistor."
• Dates: Appl. 10/290,975 filed 2002-11-07; published 2004-05-13 (US 2004/0089877 A1); granted 2005-03-15.
• Description: A high-gain lateral PNP bipolar transistor with an electron barrier layer (e.g., silicon oxide) situated directly on the top surface of the emitter, which decreases base current and increases beta. Note: Marco Racanelli is a co-inventor of the '886 patent, and the assignee (Newport Fab) is the '886 patent's original assignee.
• § 102 analysis: Prior art under pre-AIA § 102(b) (published/granted >1 year before the 2008-09-29 filing). Because it is the applicant's own earlier work, § 102(e)/"by another" does not apply, but § 102(b) does. Does not potentially anticipate any claim (1–19). It discloses a bipolar transistor only — no switching circuit, no cascaded SOI MOSFETs, no non-contacting source/drain junctions with junction capacitance, no isolating trenches. Background art only.

4. Family-Cited References ("Family Cites Families" — 12 references)

These are citations appearing in the patent family (primarily associated with the sibling patent US 9,412,758 B2, the SOI-structure/method case). All predate the '886 priority date except as noted. None of these alone anticipates any claim of the '886 patent, because none discloses a switching circuit with cascaded transistors having non-BOX-contacting source/drain junctions (junction capacitance) plus trench isolation. Their relevance is largely to the structural/fabrication teachings shared with the sibling patent.

5. Summary

Bottom line: The most relevant prior art for US 7,745,886 is Okashita (US 6,836,172 B2) — the only reference asserted to anticipate any claim (claims 1, 2, 4, 5) in a completed IPR — followed by the Burgener + Okashita (and + Yu) combinations asserted against all claims 1–19. The two examiner-cited references on the face of the patent (US 5,789,800 A and US 6,867,477 B2) are bipolar-transistor patents with no anticipation potential, and none of the twelve family-cited references individually reads on the claimed switching circuit. If you need the full text/claim chart for US 6,737,682 ("Yu"), it is available in the IPR2024-01402 petition record, which I could not fully retrieve within my search step limit.

I'll research the prior art references cited against US7745886 and the related IPR proceedings to ground my obviousness analysis in current, verifiable information.

The searches confirmed key details. Let me dig deeper into the remaining prior art references and the second IPR proceeding to round out the analysis.

Obviousness Analysis — U.S. Patent No. 7,745,886 ("Semiconductor on Insulator (SOI) Switching Circuit")

I. Scope of the Claims

Independent claim 1 requires: (a) a switching circuit with a plurality of cascaded transistors; (b) fabricated in a device layer over a buried oxide (BOX) layer and a bulk semiconductor layer (i.e., an SOI stack); (c) each transistor having a source/drain junction that does not contact the BOX layer, thereby forming a source/drain junction capacitance; (d) at least one trench extending through the device layer and contacting the top surface of the BOX layer, electrically isolating at least one transistor; and (e) the isolation operating "so as to reduce voltage and current fluctuations in the device layer."

Dependent claims add: isolated-island placement (claims 2–3); NFET/PFET implementation driven by a switch control signal in a wireless communications device, optionally through a gate resistor (claims 4–7); and system-level integration between a power amplifier or low-noise amplifier and an antenna in a wireless device (claims 8–19).

II. Most Relevant Prior Art from the Record (as listed in the "Prior Art" section of the patent record)

III. Obviousness Combinations and Motivation to Combine

Combination A — Core claim 1: US 5,920,108A + US 6,566,666B1 (+ US 7,670,896B2)

Element-by-element mapping:

• (b) SOI stack (device layer / BOX / bulk): US 5,920,108A expressly describes a "silicon-on-insulator or SOI device" with a buried dielectric layer beneath the device wafer (col. 1 of the Harris patent, as quoted in its specification) — the same three-layer stack of claim 1.
• (d) trench extending through the device layer and contacting the BOX top surface: US 5,920,108A's claim 1 requires a "trench extending from said buried layer of silicon dioxide to the surface of the substrate," surrounding and dielectrically isolating transistors. This is a literal match to claim 1(d).
• (e) reducing voltage/current fluctuations: The Harris reference's entire purpose is to prevent devices from electrically communicating under the trenches — i.e., to suppress exactly the inter-device coupling claim 1 identifies as "voltage and current fluctuations." Harris also teaches forming the trench late in the process, which is the same "backend" trench process the '886 patent touts as novel (compare '886 col. 5: trenches "etched during a 'backend' process after fabrication of transistor 212").
• (c) source/drain junction not contacting the BOX → junction capacitance: This is where US 6,566,666B1 and US 7,670,896B2 fill the gap. IBM's '666 patent is built on the premise that SOI source/drain junctions have a capacitance to the substrate below the BOX, and teaches managing that capacitance with a thicker BOX and a depleted high-resistivity region under the BOX. A partially depleted SOI transistor of the type addressed by US 7,670,896B2 has semiconductor body between the source/drain and the BOX — i.e., junctions that do not contact the BOX, exactly as claim 1(c) requires. The '886 patent's own Figures 2–3 (1.4 µm device layer, 1 µm BOX, 1000 Ω·cm bulk, 20 µm depletion regions) are merely the specific values of this known design trade-off.

Motivation to combine: A POSITA designing an SOI switching circuit in 2007 would have been squarely motivated to combine these references. Harris supplies the trench-isolated SOI platform and the late-trench process; IBM's '666 patent identifies the known performance problem (source/drain-to-substrate capacitance) that a thick BOX/high-resistivity bulk solves, and IBM's '896 patent shows the partially-depleted transistor geometry that produces the "bulk-like" junction capacitance. Each reference addresses the same field (SOI IC fabrication) and the same design tension (isolation vs. parasitic capacitance). The combination is a "simple substitution of one known element for another" yielding "predictable results" under KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) — not a new inventive principle. US 5,956,597A reinforces the motivation: it already taught the industry that SOI device layers could be made thick/bulk-compatible so that bulk design methodology applies, which is precisely the '886 patent's stated reason for requiring the junction capacitance of claim 1(c).

Combination B — Wireless-device claims (4–7, 8–11, 12–19): Combination A + RF-switch art

The dependent claims add nothing inventive beyond well-known RF front-end architecture:

• Cascaded/stacked FET switches for RF: Stacking transistors to divide high voltage (the '886 patent's own example: six transistors handling 30 V at 5 V each) was a standard RF-switch technique long before 2007. Gate resistors for switch-control drive (claims 5, 7) were routine in RF switch design.
• NFET/PFET driven by a switch control signal (claims 4, 6): Trivial implementation choices for a POSITA, confirmed by the RF switch art (e.g., EP 2,122,669B1, "Radio Frequency Isolation for SOI Transistors," and US 6,627,954B1, an SOI integrated circuit for RF/analog use).
• Interposition between PA/LNA and an antenna (claims 8–19): The '886 patent admits (FIGS. 5–7) that its switching circuit is simply placed in a conventional transmit/receive front end. A POSITA combining the Harris/IBM SOI switch with known RF front-end architecture would have had a strong, predictable reason to do so: the patent itself lists the benefits (reduced insertion loss, lower ON-resistance, improved noise isolation, lower power consumption), all of which were recognized goals in the RF-switch art.

Motivation: The combination solves a known problem (high-voltage RF switching with good isolation and low loss) using known elements in a known way. There is no unexpected result: the '886 patent's own specification describes the advantages as the natural consequences of the thick-BOX/high-resistivity-substrate design taught by IBM's '666 patent.

Combination C — Bulk-fabrication compatibility (claims 1, 12, 16): US 5,956,597A + US 6,566,666B1

US 5,956,597A teaches fabricating SOI and non-SOI circuits on a single wafer, directly addressing the '886 patent's stated motivation that a thick device layer permits bulk design kits and bulk-fab processing. Combined with US 6,566,666B1's teaching on managing source/drain-to-substrate capacitance, a POSITA would have had every reason to build an SOI switching transistor with (i) junctions spaced from the BOX (to get bulk-like, modelable capacitance) and (ii) a thick BOX/high-resistivity bulk (to keep that capacitance from degrading performance). This combination renders claim 1, and the system claims that merely add a wireless-device context, obvious.

IV. Corroboration — PTAB IPR Proceedings

The obviousness analysis above is not merely theoretical. The patent record for '886 identifies two IPR proceedings (links in the litigation section of the record):

• IPR2024-01402 (Samsung Electronics v. Harbor Island Dynamic LLC), filed September 24, 2024, challenging claims 1–19. According to the docket, the petitioner's grounds included: (1) anticipation of claims 1, 2, 4, 5 by Okashita (U.S. 6,836,172); (2) obviousness of claims 1–19 over Burgener (US 2006/0270367) + Okashita; (3) obviousness of claims 1–7 over Okashita alone; (4) anticipation of claims 1–3 by Yu (U.S. 6,737,682); and (5) obviousness over Okashita + Yu and Burgener + Okashita + Yu. The petition's stated motivations mirror the analysis above: improving thermal performance, preventing signal leakage/interference between adjacent FET stacks via isolation trenches, and ensuring consistent electrical characteristics by placing transistors in isolated regions — all with a high expectation of success because the references operate in the same field of SOI-based cascaded-transistor switching circuits. The docket reflects that a Final Written Decision issued March 16, 2026, with the case status listed as "Final Written Decision - Appealed."
• IPR2025-00954 (NXP Semiconductors v. Harbor Island Dynamic LLC), filed May 2025, directed to the same patent; the docket reflects an institution decision and grant of joinder with IPR2024-01402 (January 6, 2026).

The institution of these grounds confirms that the Board found a reasonable likelihood that combinations of known SOI switch references (of the same character as the Harris/IBM art in the record) render the '886 claims unpatentable.

V. Secondary Considerations and Weaknesses in the Patent Owner's Position

1. No unexpected results. The '886 patent's advantages (reduced insertion loss, lower ON-resistance, improved noise isolation, bulk-model compatibility) are all consequences of design parameters (thick BOX, high-resistivity substrate, thick device layer) that the prior art — particularly US 6,566,666B1 and US 5,956,597A — had already identified and taught.
2. The "novel" backend trench process is not novel. US 5,920,108A (1999) and its family (US 5,872,044A) expressly teach forming trench isolation after device fabrication to avoid the stress/defect problems of early trench isolation — the same "late process" the '886 patent describes as its own innovation.
3. Claim drafting tracks known design trade-offs. Claim 1(c) merely requires the existence of junction capacitance (a natural consequence of a thick device layer); the patent does not claim a specific capacitance value, device-layer thickness, BOX thickness, or resistivity. That breadth makes the claim easier to meet — and easier to render obvious — because any partially depleted SOI transistor (cf. US 7,670,896B2) inherently satisfies it.

VI. Conclusion

Claims 1–19 of US 7,745,886 would very likely be held obvious under 35 U.S.C. § 103. The strongest combinations from the prior art of record are:

• US 5,920,108A (Harris) + US 6,566,666B1 (IBM), optionally supplemented with US 7,670,896B2 (IBM) and US 5,956,597A (IBM) — rendering claim 1 and its direct dependents (claims 2–3) obvious; and
• that combination plus the RF-switch art (EP 2,122,669B1 / US 6,627,954B1; corroborated by Burgener + Okashita in the IPR) — rendering the wireless-device claims (4–11, 12–19) obvious.

A person of ordinary skill in the art would have been motivated to combine these references because each solves a recognized, interrelated problem in SOI circuit design — isolation, parasitic capacitance, and bulk-compatible device modeling — using known, predictable techniques. The IPR dockets for this very patent show that the PTAB instituted trial on substantially these grounds, and a Final Written Decision issued in March 2026.

Caveat: The precise holdings of the March 16, 2026 Final Written Decision (which claims were found unpatentable, and on which grounds) were not available in the search results I retrieved; the analysis above is based on the petition grounds as reported in the docket and on the prior-art references independently verified from the patent record and USPTO/FreePatentsOnline sources.