US 8063462

Let me run additional targeted searches to check for any CAFC or litigation history and to confirm bibliographic details.

Summary — U.S. Patent No. 8,063,462 (US8063462B2)

Bibliographic data

• Title: Semiconductor device and method of manufacturing the same
• Assignee: Toshiba Corp. / Kabushiki Kaisha Toshiba (current assignee per USPTO/Google Patents records)
• Inventors: Kazumasa Tanida, Masahiro Sekiguchi, Susumu Harada
• Application No.: US 12/212,754
• Filing date: September 18, 2008
• Priority date: September 20, 2007 (Japanese Application JP 2007-243663)
• Issue date: November 22, 2011 (pre-grant publication US20090079020A1 on March 26, 2009)
• Current legal status: Expired — lapsed for failure to pay maintenance fees (expiration effective November 22, 2019). It is marked "Expired - Fee Related."
• Representative classification: H10F39/804 (constructional details of image sensors — containers/encapsulations); also classified in H10W through-semiconductor via and package interconnection groups.

Abstract (verbatim)

"A semiconductor device includes a semiconductor substrate having a first surface in which a light-receiving portion and electrodes are provided. The semiconductor substrate has a penetrating wiring layer connecting the first surface and the second surface. A light-transmissive protective member is disposed on the semiconductor substrate so as to cover the first surface. A gap is provided between the semiconductor substrate and the light-transmissive protective member. A protective film is formed at a surface of the light-transmissive protective member. The protective film has an opening provided at a region corresponding to the light-receiving portion."

Independent claims — plain-language overview

Claim 1 (apparatus). A semiconductor device (e.g., an image sensor chip-scale package) having:

• a semiconductor substrate with a front surface and a back surface;
• a light-receiving portion (e.g., photodiode) and an electrode on the front surface, electrically connected;
• a penetrating wiring layer (through-substrate via) joining the front and back surfaces and connected to the electrode;
• a light-transmissive protective substrate (e.g., glass) positioned immediately above the light-receiving portion with only a gap between them (no intervening adhesive over the light-receiving area), covering the front surface;
• a conductive protective film formed on the outer surface of the protective substrate, in contact with that surface, having an opening aligned with the light-receiving portion; and
• a light-transmissive nonmetallic protective film covering the protective substrate's outer surface including on top of the conductive protective film, this nonmetallic film being thinner than the conductive protective film.

In short: a backside-illuminated/TSV image sensor package whose glass cover carries a patterned conductive light-blocking film (with a window over the sensor) that is itself capped by a thin transparent nonmetallic layer — the conductive film protects the glass during wafer processing and blocks stray diagonal light, while the nonmetallic cap prevents metal contamination of process equipment.

Claim 11 (method). A manufacturing method that:

• prepares the semiconductor substrate (front surface has the light-receiving portion and electrode);
• prepares the light-transmissive protective substrate whose outer surface already carries a conductive protective film with an opening over the light-receiving portion;
• adheres the substrate and protective substrate using an adhesive layer at the outer peripheral portion of the substrate's front surface, creating only a gap above the light-receiving portion (no adhesive in the optical path);
• forms a through hole from the back surface to expose the electrode;
• forms the penetrating wiring layer connected to the exposed electrode; and
• forms the thin light-transmissive nonmetallic protective film over the protective film.

Claim 17 (method, alternative). Same core method as claim 11 (prepare substrate; prepare protective substrate with a conductive protective film having an opening; adhere at the periphery forming only a gap; form through hole; form penetrating wiring layer), without the nonmetallic capping-film step, but with the added requirement that the conductive protective film has a thickness in the range of 1 μm to 50 μm.

CAFC 2026 docket check

• I searched for "8063462" against CAFC/2026 docket and litigation sources. No Federal Circuit appeal, IPR appeal, or other CAFC 2026 proceeding involving U.S. Patent 8,063,462 was found. The only 2026 CAFC hit returned by the search was an unrelated Netlist v. Micron memory-module case (CAFC appeal No. 24-1312), which does not involve this patent.
• Given the patent expired in 2019 for non-payment of maintenance fees, active 2026 litigation would be unlikely, but absence of a docket hit is not conclusive proof that no proceeding exists.

Sources and confidence notes

• Bibliographic data, abstract, and claims are taken from the authoritative full patent text (Google Patents/USPTO record for US8063462B2) provided in the working materials and corroborated by freepatentsonline.com and patents.justia.com entries for patent 8,063,462.
• All identifier numbers are reproduced literally (e.g., "8063462", "US8063462B2", "12/212,754", "2007-243663") without correction.
• The patent has 17 claims total; claims 2–10 and 12–16 are dependent claims. Claims 1, 11, and 17 are the only independent claims.
• Uncertainty: I have no direct USPTO Patent Center screen capture, and no CAFC docket record was located for this patent; the legal-status "expired" language comes from the Google Patents/USPTO legal-event data.