Invalidity dossier

US 7323671

Method and apparatus for varying a CMOS sensor control voltage

Current assignee: Re Secured Networks LLC

Added 8/27/2026, 6:28:14 AM

IndustrySemiconductor (T)
At a glanceNo PTAB challengesNo litigation on fileSemiconductor (T)

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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US Patent 7,323,671 — Search Results & Summary

Search notes / scope

  • I searched for the exact number 7323671 (US utility patent, application 11/029,103). I excluded one hit for the unrelated French application FR7323671A (a 1973 thermoplastic-molding patent family), since it is a different jurisdiction/number, per your instruction not to return similar numbers.
  • CAFC 2026 dockets: My searches of CAFC 2026 appeal dockets for this patent returned no results (searches for 7323671 CAFC 2026 docket appeal, "Re Secured Networks" "7323671" appeal Federal Circuit, and the district-court case numbers returned empty). I found no evidence of a Federal Circuit appeal in 2026 involving this patent. I could not access the USPTO/CAFC docket systems directly in this session, so I cannot rule out an entry my search engine did not index — treat the "no CAFC 2026 docket" finding as low-confidence negative.

Core bibliographic data (verified against Google Patents and Justia)

Field Value
Patent number US 7,323,671 B1
Title Method and apparatus for varying a CMOS sensor control voltage
Inventors Zeynep Toros, Richard Mann, Selim Bencuya, Chi-Shao (Sergi) Lin, Jiafu Luo
Original assignee ESS Technology, Inc. (Fremont, CA)
Filing date December 30, 2004
Issue date January 29, 2008
Priority date December 30, 2004 (no earlier priority claim)
Legal status Expired – Lifetime (adjusted expiration June 6, 2025, per Google Patents)
Abstract "An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable descriptions of the circuit."

Assignment chain (per USPTO assignment records via Google Patents/Plainsite): ESS Technology, Inc. (Apr. 18, 2005) → Imperium (IP) Holdings (Jul. 21, 2008) → Pictos Technologies Inc. (name changes 2020/2021) → Re Secured Networks LLC (Jul. 21, 2022 — current listed assignee). The patent has been involved in district-court litigation (Texas Eastern Dist. Ct. 4:21-cv-00376; Delaware Dist. Ct. 1:24-cv-00187) and a PTAB IPR (IPR2021-00436, filed then settled), per the litigation links on the Google Patents page — but again, none of that is a 2026 CAFC matter.

Independent claims — plain-language overview

I confirmed two independent claims from the Justia copy of the patent (claims 1 and 14). The full claims set was not included in the source text provided, so I cannot verify whether additional independent claims (e.g., a fabrication-method claim, which the specification suggests exists) are present — noted as uncertainty.

  • Claim 1 — Image sensor integrated circuit (apparatus): A CMOS image-sensor IC comprising: photodetectors (e.g., pinned photodiodes); sense nodes (e.g., floating diffusions); transfer devices (e.g., transfer gates) that control electron transfer from each photodetector to its corresponding sense node; reset devices (reset transistors) for the sense nodes; row/column circuitry (decoders); signal devices (source-follower and row-select transistors); and variable voltage circuitry with a voltage selector (e.g., a register or fuse) that determines the control voltage of the control signal applied to the transfer gates. In plain terms: the transfer-gate drive voltage is made programmable/adjustable on-chip so the pixel can be tuned after manufacture to compensate for process variation — ensuring complete charge transfer (no image lag) while still blocking leakage when off.
  • Claim 14 — Computer-readable medium (article): A computer-readable medium (e.g., a layout, tapeout, or other design data) containing a description of the image sensor integrated circuit of claim 1's type, including the same variable-voltage circuitry with a voltage selector determining the transfer-device control voltage. In plain terms: the claim covers the design files/tapeout embodying the tunable-transfer-gate sensor, not the physical chip.

Dependent claims (verified fragments) add: voltage selector controlled by a fuse (claim 2) or register (claim 3); a second voltage selector for the reset-device control signal (claim 4); control signal generated off-chip (claim 5); an on-chip DAC generating the control signal (claim 6); and a waveform adjustor setting rise/fall times of the transfer-gate pulse (claims 7–8); with parallel dependent claims (15–21) for the computer-readable medium.

Sources

Confidence statement

High confidence on title, inventors, assignee chain, filing/issue dates, abstract, and the existence/content of independent claims 1 and 14. Medium confidence on the complete claim inventory (the full claims section was not in my source text, so a method claim may also be independent). Low confidence / no verified finding on any CAFC 2026 docket entry — I found none in web searches and could not query the CAFC docket database directly.

Generated 8/27/2026, 6:28:43 AM

Cases on file (0)

Specific litigation cases in our database that name US patent 7323671. The free-form analysis below may also discuss cases beyond this list.

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Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

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Proceedings on file (0)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

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Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

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Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

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Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

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Extensions

Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.

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Derivative works

Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.

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