US 5809336

I'll search for authoritative information on US 5809336, including any recent CAFC activity.

Let me look for the claim text and any 2026 CAFC activity.

Let me check for any 2026 Federal Circuit activity and the issued claim set.

Bottom line

I can give you an authoritative summary of the front‑matter, specification, and the controlling independent claim of US 5,809,336. Two caveats up front, per your instructions:

1. "CAFC 2026 dockets": I found no evidence of any 2026 Federal Circuit docket involving 5,809,336 (or its family). The patent's last recorded appellate activity is a 2019 Supreme Court cert petition (No. 19-324) and Federal Circuit appeals in the 16‑13xx and 18‑14xx series. I could not complete an exhaustive CAFC docket sweep within this session, so treat the "no 2026 activity found" statement as a search result, not a guarantee.
2. Claim numbering for claims 2–10: I can verify claim 1 verbatim from a court order. The issued patent has 10 claims / 19 drawing sheets, and the file history shows amendment of application claims 19, 65, 73 and 78, but I could not authoritatively map those to issued claim numbers 2–10 in this session. I flag the uncertainty rather than guess.

1. Identification (from the patent front page and Google Patents)

2. Abstract (verbatim)

"A high performance, low cost microprocessor system having a variable speed system clock is disclosed herein. The microprocessor system includes an integrated circuit having a central processing unit and a ring oscillator variable speed system clock for clocking the microprocessor. The central processing unit and ring oscillator variable speed system clock each include a plurality of electronic devices of like type, which allows the central processing unit to operate at a variable processing frequency dependent upon a variable speed of the ring oscillator variable speed system clock. The microprocessor system may also include an input/output interface connected to exchange coupling control signals, address and data with the central processing unit. The input/output interface is independently clocked by a second clock connected thereto."

3. Independent claim(s)

Claim 1 — independent apparatus claim (verbatim, as quoted in the Technology Properties Ltd. v. Matsushita Electric Industrial Co. Markman order, N.D. Cal., June 15, 2007)

"A microprocessor system, comprising a single integrated circuit including a central processing unit and an entire ring oscillator variable speed system clock in said single integrated circuit and connected to said central processing unit for clocking said central processing unit, said central processing unit and said ring oscillator variable speed system clock each including a plurality of electronic devices correspondingly constructed of the same process technology with corresponding manufacturing variations, a processing frequency capability of said central processing unit and a speed of said ring oscillator variable speed system clock varying together due to said manufacturing variations and due to at least operating voltage and temperature of said single integrated circuit; an on‑chip input/output interface connected to exchange coupling control signals, addresses and data with said central processing unit; and a second clock independent of said ring oscillator variable speed system clock connected to said input/output interface."

Plain language. Three things on one chip:

• (a) A CPU.
• (b) The whole clock oscillator for that CPU, built on the same die as a ring oscillator — an odd number of inverting stages in a loop. Because the oscillator and the CPU are made with the same process on the same die, they drift together: when the silicon is slow (process, voltage, temperature), the clock slows by a similar amount, and vice versa. That self‑matching lets the CPU run at whatever speed its own transistors can actually support, without an externally supplied clock determining that speed.
• (c) A separate on‑chip I/O interface (the block that talks to memory and peripherals) running off a second, independent clock — normally a fixed off‑chip crystal — so that the asynchronous outside world stays synchronized while the CPU core runs at its own adaptive rate.

The specification's FIG. 17 rings‑oscillator ("ring counter variable speed clock 430") is the described embodiment; the spec states the frequency is "in the neighborhood of 100 MHZ" at room temperature and 50 MHz at 70 °C, and "the CPU 70 will always execute at the maximum frequency possible, but never too fast."

Other independent-claim content (numbering uncertain)

The Markman order characterizes claim 1 as "an independent apparatus claim," which implies at least one non‑apparatus independent claim. The April 24, 1998 Supplemental Amendment in the '336 file history (quoted in the Supreme Court Appendix in No. 19‑324) shows a method claim and a second apparatus claim as amended, reading as follows:

Method claim (amended claim 65):

"In a microprocessor integrated circuit, a method for clocking the microprocessor within the integrated circuit, comprising the steps of: providing an entire ring oscillator system clock constructed of electronic devices within the integrated circuit, said electronic devices having operating characteristics which will, because said entire ring oscillator system clock and said microprocessor are located within the same integrated circuit, vary together with operating characteristics of electronic devices included within the microprocessor; using the ring oscillator system clock for clocking the microprocessor, said microprocessor operating at a variable processing frequency dependent upon a variable speed of said ring oscillator system clock; providing an on‑chip input/output interface for the microprocessor integrated circuit; and clocking the input/output interface with a second clock independent of the ring oscillator system clock."

Second apparatus claim (amended claim 73):

"A microprocessor system comprising: a central processing unit disposed upon an integrated circuit substrate, said central processing unit operating at a processing frequency and being constructed of a first plurality of electronic devices; an entire oscillator disposed upon said integrated circuit substrate and connected to said central processing unit, said oscillator clocking said central processing unit at a clock rate and being constructed of a second plurality of electronic devices, thus varying the processing frequency of said first plurality of electronic devices and the clock rate of said second plurality of electronic devices in the same way as a function of parameter variation in one or more fabrication or operational parameters associated with said integrated circuit substrate, thereby enabling said processing frequency to track said clock rate in response to said parameter variation; …"

⚠️ Uncertainty: The text above is the amended application text from the prosecution history. I could not confirm in this session which issued claim numbers these correspond to, nor the issued text of claims 2–10 or the fourth amended claim (78). Do not cite these as "issued claim N" without checking the printed patent.

4. Prosecution history points relevant to claim scope

• Claims were amended four times during 1997–1998 to overcome art including Magar and Sheets.
• The applicant told the examiner that the missing element relative to Magar was "the ring counter variable speed clock 430," and distinguished Magar as (i) fixed‑frequency (crystal‑based) and (ii) requiring an external crystal/frequency generator.
• Those arguments produced the "entire oscillator" limitation that later drove claim construction:
  • Judge Ward (E.D. Tex.): "entire ring oscillator" precludes reliance on an external crystal/clock generator or a control signal.
  • ITC Inv. No. 337‑TA‑853 (ALJ Gildea, affirmed by the Commission): same reading — the applicant "clearly and unambiguously disclaimed any oscillator that relies on a control signal or an external crystal or frequency generator."
  • N.D. Cal. (Judge Grewal): "entire oscillator" = "an oscillator located entirely on the same semiconductor substrate as the central processing unit that does not require a control signal and whose frequency is not fixed by any external crystal." The Federal Circuit affirmed these disclaimers on appeal (18‑14xx series, TPL v. HTC).
• An ex parte reexamination of the '336 patent was requested and prosecuted in the 2007–2010 timeframe. ⚠️ I am not confident of the final reexamination outcome (claims confirmed vs. amended); I did not verify this in a primary source here.

5. Litigation posture (from the Google Patents "family has litigation" data and secondary sources)

• N.D. Cal. (e.g., TPL v. Matsushita, 2007 Markman), E.D. Tex. (2:08‑cv‑00172, 2:08‑cv‑00177 and many later California cases), S.D.N.Y. (1:09‑cv‑04083), ITC Inv. No. 337‑TA‑853 (2012; respondents included Amazon, Samsung, Acer, Huawei, HTC, ZTE, Nintendo and others).
• Federal Circuit: Nos. 14‑1317; 16‑1306, 16‑1307, 16‑1309, 16‑1311; 18‑1439, 18‑1440, 18‑1441, 18‑1444, 18‑1445.
• Supreme Court: No. 19‑324 (petition; the 2019 appendix is the source of much of the prosecution‑history quote above). ⚠️ I did not confirm the disposition of that petition here.
• ARM's products were acknowledged by TPL/Patriot as not infringing the '336 and '148 patents in the Texas litigation (per SemiIP Hub reporting).
• Ownership/inventorship was itself contested: Patriot asserted that discovery indicated Russell Fish was the sole inventor of the '336 patent (EE Times, Nov. 23, 2004), while Technology Properties Ltd./Moore pursued competing ownership claims among the family including 5,809,336, 6,598,148, 5,440,749, 5,604,915, 5,530,890, 5,784,584 and 5,659,703.

6. Explicit uncertainty / do‑not‑assume list

• CAFC 2026: No 2026 Federal Circuit docket entry for 5,809,336 was found. This is a negative search result, not proof of absence.
• Claims 2–10: issued numbering and text not verified here.
• Reexamination outcome: not verified here.
• Inventorship: the printed patent names both Moore and Fish; the correct legal inventorship was disputed in litigation. I have not verified how (or whether) that was resolved.
• The patent is expired (Sept. 15, 2015 on the "17 years from issue" measure), so any 2026 appellate activity would necessarily concern past damages, licensing, ownership, or a collateral matter rather than prospective infringement.

Primary sources used: the full Google Patents text of US 5,809,336 (patents.google.com/patent/US5809336/en); the printed patent PDF (patentimages.storage.googleapis.com/…/US5809336.pdf); Technology Properties Ltd. v. Matsushita Electric Industrial Co., Markman order (ipmall.info); Appendix E to the petition in Technology Properties Ltd. v. HTC Corp., No. 19‑324 (supremecourt.gov); PUBPAT ex parte reexamination request papers (pubpat.org); EE Times, "Patriot says it 'appears' to be owner of disputed patent" (2004).

I'll research this. Let me search several sources for litigation involving US 5,809,336.

Let me dig into the specific cases identified.

Now let me research the earlier cases and the inventorship dispute.

Litigation Involving U.S. Patent No. 5,809,336

Scope note / data-quality caveat

My searches surfaced substantial litigation. However, note two things up front:

1. Several hits for "the '580 patent" (Modine condenser patent 4,998,580; Woodway/Samsara) are different patents and are not about U.S. 5,809,336. I have excluded them.
2. A number of docket entries appear in Google Patents' family litigation data (cited in the patent text you supplied) for which I could not independently verify the parties or outcome. I flag these explicitly rather than filling gaps.

Patent identification (per the authoritative text): U.S. 5,809,336, "High performance microprocessor having variable speed system clock," inventors Charles H. Moore and Russell H. Fish, III; application 08/484,918 filed June 7, 1995; a division of Ser. No. 07/389,334 (filed Aug. 3, 1989, now U.S. 5,440,749); issued Sept. 15, 1998; expired Sept. 15, 2015 ("Anticipated expiration," Google Patents). It was asserted as part of the "Moore Microprocessor Portfolio" (MMP) by Technology Properties Limited (TPL), Patriot Scientific Corp., Phoenix Digital Solutions LLC, and Alliacense Ltd.

1. HTC Corp. & HTC America, Inc. v. Technology Properties Ltd., Patriot Scientific Corp. & Alliacense Ltd.

• Court / No.: N.D. Cal., 5:08-cv-00882 (originally assigned to Judge Jeremy Fogel; later -PSG, Judge Paul S. Grewal)
• Filed: February 8, 2008 — HTC declaratory-judgment action of invalidity/non-infringement as to the '336, '584, '749 and '148 patents. TPL counterclaimed for infringement of the '336, '749, '148 and '890 patents on November 21, 2008.
• Outcome: This is the one case where the '336 patent was adjudicated to be infringed. After trial, the jury (final verdict form signed Oct. 1, 2013) found HTC's accused products literally infringed claims 6, 7, 9, 13, 14 and 15 of the '336 patent, with a one-time lump-sum reasonable royalty of $958,560, and found the infringement not willful. HTC's renewed JMOL of non-infringement was denied; final judgment entered for TPL. Other patents were dismissed or carved out along the way (the '584 by covenant-not-to-sue in 2010; the '148 and '749 by stipulation in 2013; the '890 by stipulation in 2013).
• Sources: https://cases.justia.com/federal/district-courts/california/candce/5:2008cv00882/[202901/585](https://assignmentcenter.uspto.gov/search/patent/reelFrameDetail?reelFrame=202901-0585)/0.pdf ; https://docs.justia.com/cases/federal/district-courts/california/candce/5:2008cv00882/[202901/650](https://assignmentcenter.uspto.gov/search/patent/reelFrameDetail?reelFrame=202901-0650) ; https://www.docketalarm.com/cases/California_Northern_District_Court/5--08-cv-00882/HTC_Corporation_et_al_v._Technology_Properties_Limited_et_al/docs/707.pdf ; https://case-law.vlex.com/vid/htc-corp-v-tech-884550939
• ⚠️ The later appellate history of this specific case (the Google Patents litigation list includes a Fed. Cir. case 14-1317) was not confirmed by my searches.

2. Related early N.D. Cal. declaratory-judgment actions (same MMP patents, incl. the '336)

• Acer, Inc., Acer America Corp. & Gateway, Inc. v. Technology Properties Ltd., et al. — N.D. Cal. 5:08-cv-00877 (DJ of non-infringement/invalidity of the '336, '584, '749, '890 and '148 patents).
• Barco N.V. v. Technology Properties Ltd., et al. — N.D. Cal. 5:08-cv-05398 (JF) (same family).
• Source: https://cases.justia.com/federal/district-courts/california/candce/5:2008cv00877/[200306/129](https://assignmentcenter.uspto.gov/search/patent/reelFrameDetail?reelFrame=200306-0129)/0.pdf

3. TPL's parallel E.D. Tex. infringement suits against HTC

• TPL filed two complaints in the E.D. Tex. against HTC on April 25, 2008 (asserting the '336, '749, '148 and '584 patents) and additional actions on June 4, 2008 (the '890 patent). Google Patents' family data lists E.D. Tex. 2:08-cv-00172 and 2:08-cv-00177.
• Outcome: Dismissed without prejudice on February 23, 2009, after Judge Fogel denied TPL's motion to dismiss/transfer venue in the California DJ action. (Same sources as #1.)

4. ITC Investigation No. 337-TA-853 — Certain Wireless Consumer Electronics Devices and Components Thereof

• Complainants: Technology Properties Limited LLC and Phoenix Digital Solutions LLC (Cupertino, CA) and Patriot Scientific Corporation (Carlsbad, CA)
• Complaint filed / instituted: July 24, 2012 / August 24, 2012 (77 Fed. Reg. 51572)
• Asserted claims: 1, 6, 7, 9–11 and 13–16 of the '336 patent
• Respondents (as instituted): Acer Inc./Acer America; Amazon.com; Barnes & Noble; Garmin Ltd./Garmin International/Garmin USA; HTC Corp./HTC America; [Huawei Technologies Co.](/litigations/by-plaintiff/Huawei%20Technologies%20Co.) (later substituted: Huawei Device Co., Huawei Device USA, Futurewei); Kyocera; LG Electronics/LG Electronics U.S.A.; Nintendo Co./Nintendo of America; Novatel Wireless; Samsung Electronics/Samsung Electronics America; Sierra Wireless; ZTE Corp./ZTE (USA).
• Outcome: ALJ E. James Gildea's final Initial Determination (Sept. 6, 2013) found no violation of Section 337 — none of the accused products infringed the asserted claims; the asserted claims were not proven invalid; the domestic-industry requirement was satisfied. The Commission reviewed in part, affirmed the ALJ's construction of "an entire oscillator disposed upon said integrated circuit substrate" (i.e., an oscillator that does not rely on an external crystal/clock generator or a control signal), and affirmed the no-infringement findings; final determination of no violation, investigation terminated (notice dated Feb. 19, 2014). Sierra, Kyocera, Amazon and Acer were separately terminated earlier on settlement.
• Sources: https://www.usitc.gov/publications/337/pub_4847.pdf ; https://www.usitc.gov/secretary/fed_reg_notices/337/337_853_notice02192014sgl.pdf ; https://www.usitc.gov/press_room/news_release/2012/er0821ll166.htm ; https://www.lexology.com/library/detail.aspx?g=da193f70-b80a-4cb1-843b-118b8473eda1
• ⚠️ I did not confirm a Federal Circuit appeal of the ITC's final determination.

5. N.D. Cal. infringement actions filed July 24, 2012 (parallel to the ITC complaint)

• Plaintiffs: TPL, Phoenix Digital Solutions, Patriot Scientific. District-court counterparts to the ITC case. The Supreme Court petition identifies five:
  • TPL v. Huawei Technologies Co., Ltd., et al. — N.D. Cal. 3:12-cv-03865
  • TPL v. ZTE Corp., et al. — 3:12-cv-03876
  • TPL v. Samsung Electronics Co., Ltd., et al. — 3:12-cv-03877
  • TPL v. LG Electronics, Inc., et al. — 3:12-cv-03880
  • TPL v. Nintendo Co., Ltd., et al. — 3:12-cv-03881
• Outcome (round 1): The district court's claim-construction order (Nov. 9, 2015) led the parties to stipulate to final judgment of non-infringement in each case, entered Nov. 13, 2015. Notices of appeal filed Dec. 13, 2015; docketed at the Federal Circuit as Nos. 16-1306 (lead), 16-1307, 16-1309, 16-1310 and 16-1311.
• *Federal Circuit (Mar. 13, 2017), Technology Properties Ltd. v. Huawei Technologies Co.:* The court affirmed in part and vacated in part. It upheld the district court's prosecution-history-disclaimer construction requiring an oscillator "whose frequency is not fixed by any external crystal" (based on statements distinguishing the Magar reference, U.S. 4,503,500), but held the district court erred in construing the term to require an oscillator "that does not require a control signal"; the proper construction, based on the Sheets reference (U.S. 4,670,837), is "does not require a command input to change the clock frequency." Judgment vacated and remanded.
• Sources: https://www.casemine.com/judgement/us/5914597eadd7b049341c7876 ; https://caselaw.findlaw.com/summary/opinion/us-federal-circuit/2017/03/03/[278763](/patent/278763).html ; https://www.knobbe.com/updates/federal-circuit-review-april-2017-... ; https://www.supremecourt.gov/DocketPDF/19/19-324/[114984](/patent/114984)/20190906142125051_TechnologyProperties%20Petition%20E%20FILE%20Sep%206%[202019](/patent/202019).pdf
• On remand: Proceedings resumed in N.D. Cal. before Judge Vince Chhabria (docket entry reflects a Nov. 30, 2017 hearing in 3:12-cv-03865). Notices of appeal were filed Feb. 1, 2018, docketed at the Federal Circuit as Nos. 18-1439, 18-1440, 18-1441, 18-1444 and 18-1445; the mandate in 18-1439 issued June 19, 2019. (CourtListener docket: https://www.courtlistener.com/docket/[4179474](/patent/4179474)/technology-properties-limited-llc-v-huawei-technologies-co-ltd/) ⚠️ I did not retrieve a copy of the 2018–19 Federal Circuit opinion, so I cannot state its precise holding; the docket pattern (mandate 2019) is consistent with the appeals being resolved before the cert petition below.

6. U.S. Supreme Court No. 19-324 — Technology Properties Limited LLC, et al. v. Huawei Technologies Co., Ltd., et al.

• Filed: Petition for a writ of certiorari, September 6, 2019, by TPL, Phoenix Digital Solutions and Patriot Scientific (counsel incl. Kenneth W. Starr).
• Question presented: "Whether the United States Court of Appeals for the Federal Circuit's development and application of the doctrine of 'prosecution history disclaimer' is consistent with fundamental principles of separation of powers, the Patent Act, and long-established Supreme Court precedent."
• Petition: https://www.supremecourt.gov/DocketPDF/19/19-324/114984/20190906142125051_TechnologyProperties%20Petition%20E%20FILE%20Sep%206%202019.pdf
• ⚠️ The disposition of the cert petition was not confirmed by my searches — I will not state whether it was granted or denied.

7. Inventorship/ownership dispute over the '336 patent

• In November 2004, Patriot Scientific publicly asserted it "appears" to be the sole owner of the '336 patent, claiming discovery "strongly suggests that Fish was the sole inventor of the '336 patent," and that Technology Properties Ltd. (associated with Daniel Leckrone and Charles Moore) was marketing interests in the patent with inaccurate ownership/inventorship claims (litigation with TPL revealed Nov. 13, 2004).
• Source: https://www.eetimes.com/patriot-says-it-appears-to-be-owner-of-disputed-patent/
• ⚠️ I could not confirm the caption, case number, court or outcome of this inventorship/ownership litigation. Google Patents' family data lists several early California cases that may relate (E.D. Cal. 4:04-cv-00439; E.D. Cal. 3:05-cv-04838 and 3:05-cv-04847; N.D. Cal. 3:05-cv-04837, 3:05-cv-04844, 3:05-cv-04845; N.D. Cal. 3:10-cv-00816), but I have no verified mapping of those numbers to this dispute. Treat them as leads, not findings.

8. Patriot Scientific's pre-2005 enforcement campaign (Intel and Japanese manufacturers)

• Contemporaneous reporting states Patriot Scientific filed patent suits in January 2004 against Intel, Sony, Fujitsu, Toshiba, NEC and Matsushita, and threatened ~150 more companies, with Intel responding by filing a declaratory-judgment action that its products and customers do not infringe patent No. 5,809,336.
• Source: https://www.cnews.ru/news/line/intel_i_eshch_150_kompanij_obvinyayutsya
• ⚠️ Case numbers, courts and outcomes were not verified. Also note a conflicting report that Patriot later stated the Pentium family did not infringe the patent (as relayed in that article).

Cross-case observations

• Overall record on the merits: The '336 patent was narrowed substantially by prosecution-history disclaimer. It produced a win at trial against HTC (N.D. Cal., $958,560) but was found not infringed in the ITC investigation (affirmed on appeal) and in the consolidated N.D. Cal. cases against Huawei, ZTE, Samsung, LG and Nintendo.
• Licensing/settlement activity: Acer, Amazon, Kyocera and Sierra Wireless exited the ITC investigation on settlement; Acer reportedly took a license. German coverage noted that the adverse ITC ruling concerning HTC's devices could undercut the district-court HTC verdict (https://www.heise.de/news/Patenttroll-Patriot-Scientific-unterliegt-vor-US-Handelskommission-[2120451](/patent/2120451).html).
• Termination: The patent expired September 15, 2015, which limits the practical significance of the later appeals, though the Federal Circuit and Supreme Court proceedings continued through 2019.

What I could not establish

• The disposition of Supreme Court No. 19-324.
• The exact holding of the 2018–19 Federal Circuit appeals (Nos. 18-1439 et al.) beyond the 2019 mandate.
• Any appeal outcome from HTC Corp. v. Technology Properties (possible Fed. Cir. 14-1317).
• The caption/case number/outcome of the 2004–05 Moore/Technology Properties v. Patriot inventorship litigation, and of the S.D.N.Y. case listed in the Google Patents family data as 1:09-cv-04083, and the 2004–05 Intel/Sony/Fujitsu/Toshiba/NEC/Matsushita suits.

If you need the unverified items nailed down, the highest-yield next steps would be the ITC EDIS docket for 337-TA-853, PACER for 5:08-cv-00882 (N.D. Cal.) and the 3:12-cv-0386x/0388x family, and the Federal Circuit docket for Nos. 14-1317, 18-1439 through 18-1445 and the 19-324 cert docket.

I'll start by checking the canonical structured data against the public record, then search for any PTAB activity the ODP may not have indexed.

Let me dig specifically into the Moore Microprocessor Patent portfolio history and any PTAB challenges.

Interesting — I found a reference to a CBM review involving a "'336 patent." Let me pin down the proceeding number and confirm it's US 5,809,336.

PTAB / AIA Trial Analysis — U.S. Patent No. 5,809,336

Patent: "High performance microprocessor having variable speed system clock" (Moore et al.)
Assignee of record: Charles H. Moore, TTE, UTD 03/21/2006 The Equinox Trust; Technology Properties Ltd.; Patriot Scientific Corp.
Priority date: 1989-08-03 · Filed (this division): 1995-06-07 · Granted: 1998-09-15 · Anticipated expiration: 2015-09-15
Legal status: Expired – Lifetime

Proceedings overview

Total AIA trial proceedings on file: 0 (zero). The canonical structured source supplied for this task — the USPTO Open Data Portal "PTAB proceedings on file" block — returns no IPR, no PGR, and no CBM proceeding for US 5,809,336: 0 active, 0 claims invalidated, 0 claims sustained, 0 settled, 0 institution denied.

Bottom line for a defendant: there is no PTAB Final Written Decision you can cite, and no § 315(e)(2) estoppel was ever created. That cuts both ways — the patent was never invalidated at the Board (so its claims were never canceled, and its 2012 ex parte reexamination confirmed them), but the patent expired on 2015-09-15 and has been dead for over eleven years. A demand letter citing the '336 patent today is not an infringement-collection threat; it is a historical-damages story that is almost certainly time-barred under 35 U.S.C. § 286 (see Defensive value notes below). The absence of any IPR is itself notable: this patent was asserted against a who's-who of the consumer-electronics industry from 2005 through 2013, yet no petitioner ever took it to the Board.

Method note: I searched for IPR/PGR/CBM petitions, decisions, and FWDs naming this patent, its patent number, and the "Moore Microprocessor Patent" portfolio. I could not confirm a single AIA trial docket naming US 5,809,336. I will not assign a proceeding number I cannot verify. One flagged, unconfirmed lead appears below.

Proceedings on file

None. There is no proceeding to summarize under the requested per-proceeding template (no {PROCEEDING_NUMBER} — {Petitioner} v. {Patent Owner} entries exist for this patent).

⚠️ Unconfirmed lead — do NOT cite without verification

A PTAB/PTACTS document-corpus snippet surfaced a Board decision text reading:

"Based on the facts of this particular case, we determine that the '336 patent is a 'covered business method patent' that is not excluded for being a 'technological invention' and, therefore, is eligible for a covered business method patent review." … "Petitioner contends that claim 1 of the '336 patent is unpatentable for same-invention type double patenting under 35 U.S.C. § 101 in view of claim 1 of U.S. Patent No. 7,590,997."
— Source snippet: https://ptacts.uspto.gov/ptacts/public-informations/petitions/1539503/download-documents?artifactId=XyMTzzlXM8m3e5qJpuCnD4krYsJLxfHD37SfQCnl2FEMGZD6xNDD7fI

Why I am flagging this and not reporting it as a proceeding:

• I could not confirm the proceeding number, the petitioner, the patent owner, or the filing/institution dates.
• The document appears to be part of a large multi-document PTACTS compilation; snippets from such compilations can cross-contaminate.
• The "'336 patent" in that passage is likely a different patent. US 5,809,336 claims a microprocessor clocking architecture — a ring-oscillator CPU clock with a separately clocked I/O interface. It is an exceptionally poor fit for the AIA § 18(d)(1) "financial product or service" definition, and the CBM program expired 2020-09-16. The cited authority (In re Cuozzo, Fed. Cir. 2015-02-04) shows the decision postdates February 2015.
• The cross-referenced reference patent, U.S. Pat. No. 7,590,997, is not a patent I can confirm as a member of the '336 family or as MMP portfolio property.

If you are a defendant: ask the patent owner directly, in writing, whether any AIA trial petition was ever filed against the '336 patent, and pull the PTAB E2E / Patent Trial and Appeal Board EndPoint record yourself (https://ptab.uspto.gov/) rather than relying on this snippet. Treat the lead as a research task, not as evidence.

Non-AIA validity and enforceability activity you SHOULD know about

Because there is no AIA trial history, the real defensive record on this patent lives in reexamination and the courts.

Ex parte reexamination (PubPat-requested)

• Public Patent Foundation (PUBPAT) filed an ex parte reexamination request against the '336 patent, arguing substantial new questions of patentability as to claims 1–10 over Ledzius in view of Mostek, plus patentee admissions. Request PDF: http://www.pubpat.org/assets/files/patriotscientific/PUBPATPatriotScientific336Request.pdf
• Reporting indicates the USPTO confirmed the '336 patent in early 2012 after extended examination. (Trade press: heise.de, "Patentverwerter legen sich mit 13 IT-Konzernen an.") I could not verify the reexamination control number, the certificate date, or whether any claims were amended — verify on USPTO Patent Center before relying on claim scope.

District court and ITC

• N.D. Cal. 5:08-cv-00882 — HTC Corp. v. Technology Properties Ltd. et al. (DJ action; TPL counterclaimed on the '336, '749, '148 and '890 patents). The court denied HTC's renewed JMOL of non-infringement directed at the asserted '336 claims. Order PDF: https://www.docketalarm.com/cases/California_Northern_District_Court/5--08-cv-00882/
• E.D. Tex. 2:08-cv-00172 and 2:08-cv-00177 — TPL/Patriot infringement actions; June 2007 Markman and January 2008 trial setting.
• ITC Inv. No. 337-TA-853, Certain Wireless Consumer Electronics Devices & Components Thereof — complaint filed 2012-07-24 asserting the '336 patent; investigation instituted 2012-08-21 (77 Fed. Reg. 51,572, Aug. 24, 2012). Respondents included Amazon, Acer, Barnes & Noble, Garmin, HTC, Huawei, Kyocera, LG, Nintendo, Novatel, Samsung, Sierra Wireless, and ZTE. Docket: https://portal.unifiedpatents.com/litigation/International%20Trade%20Commission/case/337-TA-853
• Fed. Cir. 2016-1306 — Technology Properties Ltd., LLC v. [Huawei Technologies Co., Ltd.](/litigations/by-plaintiff/Huawei%20Technologies%20Co.%2C%20Ltd.), 849 F.3d 1349 (Fed. Cir. 2017-03-03) (consolidated appeal of five infringement actions). This is the single most useful non-PTAB precedent on the '336 patent. The court held the prosecution history clearly and unmistakably disclaimed (a) oscillators whose frequency is fixed by an external crystal, and (b) oscillators requiring a command input to change frequency — but rejected the broader district-court limitation barring any input. Construction vacated in part and remanded; the parties' stipulation of non-infringement was set aside. Opinion: https://www.courtlistener.com/opinion/4372796/technology-properties-limited-v-huawei-technologies-co-ltd/ · Docket: https://portal.unifiedpatents.com/litigation/Court%20of%20Appeals%20for%20the%20Federal%20Circuit/case/16-1306 · FindLaw summary: https://caselaw.findlaw.com/summary/opinion/us-federal-circuit/2017/03/03/278763.html
• Additional CAFC dockets in the structured data: 14-1317, 16-1307, 16-1309, 16-1311, 18-1439, 18-1440, 18-1441, 18-1444, 18-1445. I could not confirm which of these concern the '336 patent specifically versus sister MMP patents (the '749, '890, '584, '148, '703) — do not assume.
• U.S. Supreme Court No. 19-324 appears in the structured litigation data with no disposition. I could not identify the parties, the issue, or the outcome. Flagged, unresolved.

Strategic summary

Claim status. No claim of US 5,809,336 has ever been canceled by the PTAB — there was no PTAB trial. That means the claims that survived the 2012 ex parte reexamination are the claims that stand today, subject to any amendments made during that reexamination (unverified). The Federal Circuit's TPL v. Huawei decision narrowed the scope of "entire oscillator" claim language through prosecution disclaimer, which is a judicially imposed narrowing that binds in any future infringement analysis, but it did not invalidate anything. So: no claims CANCELED, no claims adjudicated SUSTAINED by the Board, all claims UNTESTED at the Board. The patent's real vulnerability was never litigated to a validity judgment — the 2008 N.D. Cal. jury trial addressed the '336 patent, but the court's post-trial ruling was on infringement (JMOL denied), not validity.

Estoppel landscape. Because no IPR/PGR/CBM was ever instituted, § 315(e)(2) estoppel is a non-issue — no petitioner and no privy is barred from anything. Conversely, you gain no benefit from anyone else's failed petition. Any IPR you might theoretically have filed would have had to address § 315(b) (one year from service of a complaint) and § 325(a)/(b) bars; more practically, the patent expired 2015-09-15, and expired claims are construed under Phillips rather than the broadest reasonable interpretation. The prior-art grounds that remain available to a defendant are technically unlimited (no estoppel), but the practical prior art set is the same one PubPat used in reexamination (Ledzius/Mostek) plus whatever the district courts never reached, and the Federal Circuit already gave you a disclaimer-based non-infringement lever that no IPR could ever have delivered.

Pattern signals. No serial-petitioner pattern exists because no petitioner ever filed. The patent owner (Technology Properties / Patriot Scientific via Alliacense) did not appeal any IPR to the Federal Circuit — there was no IPR to appeal; its appellate activity was entirely infringement/claim-construction driven (TPL v. Huawei, 849 F.3d 1349). Unified Patents does not appear in the litigation chain as an IPR petitioner; its portal entries in the structured data are litigation-docket tracking records (e.g., N.D. Cal. 5:12-cv-03881, E.D. Tex. 2:08-cv-00177), not PTAB filings. There is no defensive aggregator standing between you and this patent.

Recommended next steps

1. Do not build a defense around a PTAB FWD — there isn't one. There is no claim-cancellation order to quote and no estoppel record to exploit. Any "the PTAB already killed claims X–Y" argument would be fabricated.
2. Run the expiration/time-bar math first — it is likely dispositive. The '336 patent expired 2015-09-15. Under 35 U.S.C. § 286(b), no damages may be recovered for infringement occurring more than six years before the complaint is filed. On 2026-09-30, the lookback reaches to 2020-09-30 — a window during which the patent was already expired. Absent some unusual tolling or a pre-2015 suit that is somehow still live, a complaint filed today should be § 286 time-barred on its face, and no injunctive relief is available for an expired patent. Confirm no live pre-2015 judgment or ongoing royalty obligation attaches to your products.
3. Verify the reexamination certificate on USPTO Patent Center (https://patentcenter.uspto.gov/) for the PubPat-requested ex parte reexamination of the '336 patent. You need to know (a) the control number, (b) the certificate date, and (c) whether any claim was amended. Claim scope asserted today must be the scope as it issued from that certificate.
4. Pull the TPL v. Huawei opinion and quote it directly. 849 F.3d 1349 (Fed. Cir. 2017-03-03) is your best non-infringement tool: an accused clock circuit whose frequency is set by an external crystal, or which requires a command input to change frequency, falls outside the "entire oscillator" limitation as construed on remand. Note the court rejected the broader "no inputs at all" construction — do not over-argue it.
5. Resolve the two open questions before you respond to any demand: (i) confirm on PTAB E2E (https://ptab.uspto.gov/) that no AIA trial petition naming US 5,809,336 exists — including any CBM filed before the program's 2020-09-16 sunset — and (ii) identify the parties and disposition of Supreme Court No. 19-324. I could not verify either.
6. If the patent owner refuses to confirm the absence of AIA proceedings, treat that as a discovery item in the demand-letter response — the burden of establishing the right to collect on an expired, reexamination-confirmed, prosecution-disclaimed patent sits with the patent owner, not with you.

I'll research the assignment record for US 5809336 before drafting. Let me pull from multiple sources.

Let me look for the actual USPTO assignment abstract of title and correspondent details.

Let me dig for reel/frame details and correspondent information specific to this patent.

Ownership & Assignment Analysis — US 5,809,336

Data-integrity caveat up front. I was able to reconstruct the assignment sequence reliably from the Google Patents legal-events record that is itself sourced from the USPTO Assignment Center, plus corroborating SEC/press/litigation records. I was not able to retrieve reel/frame numbers or correspondent-of-record fields for most entries from the sources available to me. I am therefore marking those fields "not verified" rather than inventing them. Per your own constraint, the honest move is to flag the gap. Reel/frame and correspondent should be confirmed by a direct lookup at USPTO Assignment Center before this is relied on.

Inventors

• Charles H. Moore — inventor of record. Moore founded FORTH, Inc. and is the originator of the FORTH language; at the relevant time he was associated with Nanotronics Corporation (Eagle Point, Oregon), the entity that developed the "ShBoom" microprocessor technology later branded by Patriot as IGNITE. This is strongly corroborated by the 1996-10-28 recorded assignment in which Nanotronics Corporation conveyed rights to Patriot Scientific Corporation (Google Patents legal events). Exact employer-at-filing (1989 priority application Ser. No. 07/389,334) is not conclusively documented in the sources I retrieved, but the Nanotronics link is the best-supported inference.
• Russell H. Fish, III — co-inventor of record. Patriot's own 2004 statements assert Fish's interests flowed "to the Fish Family Trust, then to Nanotronics Corp.; then to Patriot" (EE Times, 2004-11-23).

Unusual pattern — inventorship dispute. This is a notable red flag on the chain, not the employment pattern: Patriot Scientific asserted in 2004 that "strongly suggests" Fish was the sole inventor of the '336 patent, i.e., that Moore's post-2003 claim to an inventor interest was defective (EE Times, 2004-11-23). You asked me to flag inventors departing the original assignee as a fire-sale precursor; here the analogous pathology is contested inventorship + a bifurcated title chain, which is what later produced the co-ownership structure (Patriot + TPL) that underlies the 2012–2019 assertion campaign.

Original assignee

Patriot Scientific Corporation (Carlsbad, CA; Delaware corp.; OTC: PTSC) is the assignee printed on the issued patent and is Google Patents' "Original Assignee." Important nuance: the pre-1996 holder of the inventors' rights was Nanotronics Corporation, and Patriot's title arises from its 1994 asset purchase of Nanotronics (effective 1994-05-31) plus the 1996-10-28 recorded assignment. Note the patent's own Google Patents header also lists "Patriot Scientific Corp" as original assignee; the timeline below reconciles these.

• Primary line of business: originally a would-be semiconductor/microprocessor developer (IGNITE 32-bit RISC product line); it never achieved meaningful product revenue and re-characterized itself as an "intellectual property licensing company" by ~2004.
• Did it ship a product embodying the claims? Effectively no. Press and its own filings concede Patriot "was never successful in selling any of the technology or products it developed itself." Third-party product sheets (OnSpec xSil USB controllers, 2011) list the patent as covering their products, i.e., the covered products are third parties', not Patriot's.
• Current status: operating as a publicly traded IP-licensing shell/co-owner of the "Moore Microprocessor Patent (MMP) Portfolio"; not dissolved. It was financially distressed in 2001–2005 (multiple security interests and convertible debentures; a law firm even took a security interest).

Assignment timeline

Dates below are as indexed in the Google Patents legal-events record (sourced from USPTO assignment data) and are most likely recordation dates; execution dates were not separately exposed in my sources. Reel/frame and correspondent were not retrievable and are flagged as unverified.

1. Executed date not exposed / recorded 1996-10-28 — Reel not verified

   • Conveyance: Assignment of assignors' interest
   • Assignor: Nanotronics Corporation
   • Assignee: Patriot Scientific Corporation
   • Correspondent: not retrieved
   • Context: Internal reorganization / asset-purchase cleanup — memorializes Patriot's 1994 acquisition of Nanotronics' microprocessor patents.

2. Recorded 2001-11-20 — Reel not verified

   • Conveyance: Security Interest
   • Assignor: Patriot Scientific Corporation
   • Assignee: Swartz Private Equity, LLC
   • Correspondent: not retrieved
   • Context: Securitization / distressed financing — patent pledged as collateral.

3. Recorded 2002-05-23 — Reel not verified

   • Conveyance: Convertible Debenture (Note Article IV)
   • Assignor: Patriot Scientific Corporation
   • Assignee: Lincoln Ventures, LLC
   • Correspondent: not retrieved
   • Context: Securitization / distressed financing.

4. Recorded 2002-08-05 — Reel not verified

   • Conveyance: Convertible Debenture
   • Assignor: Patriot Scientific Corporation
   • Assignee: Lincoln Ventures, LLC
   • Correspondent: not retrieved
   • Context: Securitization — second Lincoln Ventures debenture.

5. Recorded 2002-09-03 — Reel not verified

   • Conveyance: Amended Secured Promissory Note and Addendum
   • Assignor: Patriot Scientific Corporation
   • Assignee: Swartz Private Equity, LLC
   • Correspondent: not retrieved
   • Context: Securitization — amendment/extension of the Swartz collateral position.

6. Recorded 2003-02-14 — Reel not verified

   • Conveyance: Security Interest
   • Assignor: Patriot Scientific Corporation
   • Assignee: Knobbe, Martens, Olson & Bear, LLP
   • Correspondent: not retrieved (note: Knobbe Martens is a major IP law firm; if it is also the recording correspondent on this or adjacent entries that would be significant, but I have no evidence for that and will not assert it.)
   • Context: Securitization for unpaid professional fees — a law firm taking a security interest signals acute cash distress.

7. Recorded 2003-12-08 — Reel not verified

   • Conveyance: Assignment of assignors' interest
   • Assignor: Charles H. Moore (individually, as inventor)
   • Assignee: Technology Properties Limited (TPL)
   • Correspondent: not retrieved
   • Context: Transfer-to-asserter / chain bifurcation — this is the single most consequential entry. It created the co-ownership split (Patriot via Nanotronics vs. TPL via Moore) that produced the "jointly owned MMP Portfolio" and the 2003–2005 Patriot-vs-TPL/Leckrone/Moore ownership litigation.

8. Recorded 2005-08-08 — Reel not verified

   • Conveyance: Termination of Security Interest
   • Assignor: Knobbe, Martens, Olson & Bear, LLP
   • Assignee: Patriot Scientific Corporation
   • Correspondent: not retrieved
   • Context: Lien release — consistent with the 2005 settlement of the ownership litigation.

9. Recorded 2009-03-24 — Reel not verified

   • Conveyance: Assignment of assignors' interest
   • Assignor: Charles H. Moore
   • Assignee: Moore, Charles H., TTE, UTD 03/21/2006 The Equinox Trust
   • Correspondent: not retrieved
   • Context: Estate/trust planning — Moore's retained interest moved into his revocable trust (date-of-trust 2006-03-21).

10. Recorded 2012-02-10 — Reel not verified

    • Conveyance: Release by Secured Party
    • Assignor: Lincoln Ventures, LLC
    • Assignee: Patriot Scientific Corporation
    • Correspondent: not retrieved
    • Context: Lien clearance — releases recorded ~5.5 months before the July 2012 assertion campaign (see signal 5).

11. Recorded 2012-02-10 — Reel not verified

    • Conveyance: Release by Secured Party
    • Assignor: Swartz Private Equity, LLC
    • Assignee: Patriot Scientific Corporation
    • Correspondent: not retrieved
    • Context: Lien clearance — clean-standing prerequisite to filing.

(No recorded post-2012 assignments appear in the sources I retrieved. Current co-owners per Google Patents: Patriot Scientific Corp; Technology Properties Ltd.; Moore, Charles H., TTE, UTD 03/21/2006 The Equinox Trust.)

Timeline diagram

timeline
    title Ownership of US 5809336
    1989 : Priority application filed
    1994 : Nanotronics assets bought by Patriot
    1996 : Nanotronics assigns rights to Patriot
    1998 : Patent issues
    2001 : Security interest to Swartz Private Equity
    2002 : Convertible debentures to Lincoln Ventures
    2003 : Moore assigns interest to Technology Properties
    2005 : First MMP infringement suits filed
    2009 : Moore interest moved to Equinox Trust
    2012 : Security interest releases recorded
         : ITC and District Court suits filed
    2015 : Patent expires
    2019 : Federal Circuit affirms non infringement

NPE / troll-pattern signals

1. Shell-entity transfer — Present. The 2003-12-08 assignment moved inventor Moore's interest into Technology Properties Limited, a licensing/monetization entity with no products, operating the "MMP Portfolio" through its Alliacense arm. Reinforced by Phoenix Digital Solutions LLC, a co-complainant in ITC 337-TA-853 with a bare Cupertino address (20883 Stevens Creek Blvd., Suite 100) shared with TPL (77 Fed. Reg. 51572; 2012-08-24). Caveat: the transfer was inventor→monetizer, not operating-co→shell, so I weight it as moderately strong rather than classic.

2. Known asserter in the chain — Present. Technology Properties Limited / Alliacense / Phoenix Digital Solutions ran a documented, multi-front campaign on this patent: E.D. Tex. (2:05-cv-0494, TPL v. Matsushita, 2005), N.D. Cal. cluster filed 2012-07-24 (3:12-cv-03865/03870/03876/03877/03880/03881, etc.), and ITC 337-TA-853. The Stanford NPE Litigation Database classifies the TPL matters as "Non Practicing Entity" (npe.law.stanford.edu/case/153010). TPL is not on the named lists in your prompt (Acacia/Marathon/IV/etc.), so I am citing the campaign conduct + Stanford classification rather than a list match. Note: Acacia and Monarch Networking Solutions surfaced in one search result, but that was a different patent family (App. 12/528,083) and must not be attributed to this chain.

3. Repeat correspondent across the chain — Unclear / not retrievable. I could not obtain the correspondent-of-record for any entry. Litigation counsel of record (Agility IP Law LLP — James C. Otteson, Menlo Park; Supreme Court counsel Kenneth W. Starr, The Lanier Law Firm) is appellate/trial counsel, not a recording correspondent, and should not be conflated with it. This signal genuinely cannot be scored without the Assignment Center correspondent fields.

4. Cascading transfers — Present. Six recorded events between 2001-11-20 and 2003-12-08 (~24 months): three security interests/debentures, one amended note, one law-firm lien, and the Moore→TPL assignment. These are securitization/distress rather than an NPE shell cascade, so I score the signal present but attribute it to financial engineering, not to LLC-laundering.

5. Pre-litigation transfer — Present (weak). The 2012-02-10 Lincoln Ventures and Swartz releases by secured party were recorded ~5.5 months before the 2012-07-24 N.D. Cal./ITC filings — inside the 6-month window and consistent with clearing title to establish standing before asserting. Against this, the first '336 suit (2005) was ~17 months after the 2003-12-08 Moore→TPL assignment, so the original assertion was not a 6-month pre-litigation transfer.

6. Bankruptcy fire-sale — Not present. Patriot was distressed (law-firm lien, convertible debentures) but I found no Chapter 7/11 filing or court-supervised patent sale. Distress ≠ bankruptcy sale.

7. Privateering — Unclear. No SEC filing or press item I retrieved shows an operating company funding TPL/Alliacense to assert against competitors. The Google/Stanford "acquired patents" tag on Patriot is assertable but insufficient to call privateering.

8. Defensive aggregator (anti-NPE) — Not present. The chain does not terminate at RPX, AST, LOT, Unified, or OIN. The patent was instead neutralized by adverse judgments (ITC 337-TA-853 initial determination 2013-09-06; N.D. Cal. claim construction → final non-infringement judgments 2015-11-13; Fed. Cir. Rule 36 affirmance 2019-02-06; cert. petition 19-324) and by expiration on 2015-09-15. Unenforceable-in-practice, but not a defensive-aggregation outcome.

Verdict

NPE — high confidence.

Two strong, independently corroborated signals drive this: (a) the 2003-12-08 assignment of inventor Moore's interest to Technology Properties Limited, a no-product licensing entity operating the MMP portfolio through Alliacense and Phoenix Digital Solutions, and (b) a documented multi-venue assertion campaign on this patent (E.D. Tex. 2005; N.D. Cal. cluster 2012-07-24; ITC 337-TA-853), for which the Stanford NPE Litigation Database classifies the TPL matters as non-practicing-entity litigation. The Original assignee (Patriot Scientific) never shipped a product embodying the claims and self-identified as an IP-licensing company, and the 2001–2003 recordings (reel unverified) show collateralization of the patent to Swartz Private Equity, Lincoln Ventures, and even a law firm — a distressed-monetization profile, not a product-company profile. Weak/uncertain signals (repeat correspondent, privateering) are explicitly not scored, because I could not retrieve the correspondent-of-record fields; that is the one item most worth confirming manually.

Verify via: USPTO Assignment Center — search patent 5,809,336 for reel/frame and correspondent fields; cross-check Google Patents legal events and Stanford NPE database case 153010.

I'll research the prior-art citations for US 5,809,336, starting with the patent's own front-page references and the references discussed in its specification.

Let me get the complete front-page reference list and the reexamination-added references.

Prior Art Analysis — U.S. Patent No. 5,809,336

"High performance microprocessor having variable speed system clock"
Moore et al. · Appl. No. 08/484,918 filed 1995-06-07 · issued 1998-09-15 · division of Ser. No. 07/389,334 (filed 1989-08-03, now U.S. 5,440,749) · expired 2015-09-15

0. Method note and confidence disclosure

I was able to retrieve the front-page "References Cited" list for the '336 patent and the reexamination-certificate references, plus the claim set. I was not able to open the full text of most individual cited references during this pass. Accordingly:

• I state what is verifiable from the patent's own front page, the reexamination certificate, the ITC Final Determination and the Federal Circuit opinion.
• Where I would have to infer a reference's disclosure from its title/number alone, I flag it as unverified rather than characterize it. This matters because §102 anticipation requires element-by-element correspondence, which I cannot assert for references I have not read.

One important caveat on the OCR: the front-page list below was recovered from the Google Patents PDF text layer. It contains at least one evident OCR artifact — U.S. 4,761,763 is listed with the date "8/1985," which is inconsistent with that patent number's issuance in 1988. I reproduce the string literally and flag it. Similarly, the primary reference is OCR'd as "Magan," but the litigation record (Federal Circuit, ITC, N.D. Cal.) uniformly identifies it as Magar. Per my operating rules I do not auto-correct identifiers; I note the discrepancy instead.

1. The claims the prior art must be mapped against

As issued (Espacenet, US5809336 A), the patent has claims 1–10:

Post-issuance claim set. Two ex parte reexamination certificates exist — C1 (7,235th), issued Dec. 15, 2009, and C2 (7,887th), issued Nov. 23, 2010 (Control No. 90/009,457, filed Aug. 24, 2009). The litigation record shows asserted claims 1, 6, 7, 9, 10, 11, 13, 14, 15, 16 (ITC 337-TA-853) and claims 6, 7, 9, 13, 14, 15 found infringed by the HTC jury. So the certificate-added claims run at least to 16. ⚠️ I did not retrieve the certificate claim text, so my §102 mapping below covers claims 1–10 with confidence and claims 11–16 only by inference.

The critical construction fact for all §102 analysis: the terms "entire ring oscillator" (claim 1) and "entire oscillator" (claims 6, 10) were narrowed by prosecution history disclaimer to mean an oscillator located entirely on the CPU's substrate that does not rely on a control signal or an external crystal/clock generator to generate a clock signal. This was affirmed (in relevant part, and vacated in part on the "control signal" prong) by the Federal Circuit in Technology Properties Ltd. v. [Huawei Technologies Co.](/litigations/by-plaintiff/Huawei%20Technologies%20Co.) (Mar. 2017) and by the Commission in ITC Inv. No. 337-TA-853. Almost every §102 question about this patent reduces to whether a given reference discloses a crystal-referenced or command-controlled clock.

2. Front-page U.S. patent references (the patent's own citation list)

These are the references cited on the face of US 5,809,336. Date shown is the front-page date literally as printed (issuance date). The right column is the classification printed on the patent — a literal, verifiable datum — plus my notes on relevance.

Caveat: because I could not open these references, I will not assert that any of the unattributed ones anticipates a specific claim. The right-hand notes are classification-derived inferences about technical field, not §102 findings.

3. The two references that actually decided this patent: Magar and Sheets

Everything about the scope of the '336 patent's clock claims was driven by these two references. This is the highest-value part of any prior-art analysis of the '336 patent.

3.1 U.S. 4,503,500 — Magar (Texas Instruments), issued March 1985

• Citation as printed: "4,503,500 3/1985 Magan ...... 395/800" (OCR of inventor name; the courts and USPTO use "Magar").
• Description (per the Federal Circuit and ITC record): a 1985 microprocessor patent assigned to Texas Instruments that discloses a basic microprocessor with an on-substrate CLOCK GEN block producing four phase signals Q1–Q4 (compare the '336 patent's PHASE 0–PHASE 3). Crucially, Magar's CLOCK GEN is driven by an off-chip, fixed-frequency crystal connected at terminals XI/X2. It is therefore not an oscillator in itself.
• What the examiner did: rejected the application over Magar. The applicant amended the claims to require that the oscillator be on-chip ("entire oscillator") and argued at length that Magar's clock is "both fixed-frequency (being crystal based) and requires an external crystal or external frequency generator."
• Claims it potentially anticipates — on the original, pre-amendment claim scope: claims 1, 6, and 10 (and the corresponding method claim 3) as originally drafted, which recited a variable-speed/ring-oscillator clock without the "entire oscillator" on-chip limitation. On that broader scope, Magar's CPU + on-chip CLOCK GEN + phase generation reads on the clocking element, and its buses/stack architecture reads on the remainder.
• Claims it does not anticipate as issued: claims 1, 3, 6, 9, 10 (and by dependency 2, 4, 5, 7, 8). The Federal Circuit held the patentee clearly and unmistakably disclaimed any oscillator whose frequency is fixed by an external crystal — this is binding prosecution-history disclaimer, not a mere argument.
• Why this matters: Magar is the reason the '336 patent's headline claims are narrow. The Federal Circuit (2017) affirmed the "not fixed by any external crystal" construction while vacating the district court's broader "does not require a control signal" gloss derived from Sheets.
• Sources: ITC Final Determination, Inv. No. 337-TA-853, at 78 (https://www.usitc.gov/publications/337/pub_4847.pdf) (quoting the '336 prosecution history); Technology Properties Ltd. v. Huawei Techs. Co. (Fed. Cir. Mar. 13, 2017) (https://caselaw.findlaw.com/summary/opinion/us-federal-circuit/2017/03/03/[278763](/patent/278763).html); TPL Appendix E to the cert petition, No. 19-324 (https://www.supremecourt.gov/DocketPDF/19/19-324/[114984](/patent/114984)/20190906142143710_TechnologyProperties%20Appendix%20E%20FILE%20Sep%206%[202019](/patent/202019).pdf).

3.2 U.S. 4,670,837 — Sheets, issued June 1987

• Citation as printed: "4,670,837 6/1987 Sheets ......" (classification truncated in the text layer).
• Description (per the same record): discloses a system that provides clock control signals to an external clock — i.e., it requires a command input / frequency-control information in order to change clock speed. The applicant characterized it as requiring a "command input... to change the clock speed," in contrast to the ring oscillator whose speed varies with device parameters automatically.
• Claims it potentially anticipates — under the district court's (now-vacated-in-part) construction: claims 1, 3, 6, 10. Under the district court's reading, a controlled-input clock met "entire oscillator"; under the Federal Circuit's reading it does not (the correct construction is "does not require a command input to change the clock frequency," which Sheets still cannot satisfy because it does require such an input).
• Net effect: Sheets functions as a §102 near-miss that generated the disclaimer, and as the reference on which the Federal Circuit vacated the district court's over-broad construction. It is not, as issued, an anticipating reference.
• Source: same as §3.1.

4. Pelgrom — U.S. 4,627,082 (Dec. 1986), class 377/63

• Printed citation: "4,627,082 12/1986 Pelgrom et al. ...... 377/63." Class 377/63 is in the pulse/counting art (frequency division/counting), consistent with an oscillator/counter-based clock generator.
• Role: cited jointly with Magar in at least one rejection of the clock claims ("Magar and Pelgrom"). A joint citation of this kind is normally a §103 combination rather than a §102 anticipation.
• Claims it might anticipate (if its disclosure is a self-contained on-substrate oscillator whose frequency varies with device parameters): claims 1, 6, 9, 10. ⚠️ I have not read Pelgrom's disclosure in this pass and cannot assert this independently. On the record as I found it, Pelgrom reads more like a §103 secondary reference (suggesting a ring-oscillator/counter clock source to combine with Magar) than a standalone anticipatory reference.
• Source: ITC pub. 4847 (referring to the "rejection over Magar and Pelgrom").

5. Reexamination-added references (US 5,809,336 C2, Nov. 23, 2010)

The C2 certificate lists these as "References Cited" — i.e., they were newly before the examiner during reexamination and are prior art only as to the reexamined claims:

Non-patent literature cited in C2: In re Recreative Technologies Corp., 83 F.3d 1394, 38 USPQ2d 1776 (Fed. Cir. 1996) — this is a reexamination/recapture procedure case, cited for legal reasons, not as technical prior art.

⚠️ I could not determine the outcome of the reexaminations beyond the fact that certificates C1 and C2 issued (i.e., the patent survived with claims confirmed/amended, not cancelled in bulk). A 51-page C1 certificate suggests substantial amendment. The full certificate text should be pulled from USPTO PatentCenter for any invalidity or mapping work on claims 11–16.

Source: US005809336C2, Ex Parte Reexamination Certificate (7,887th), Nov. 23, 2010 (https://patentimages.storage.googleapis.com/74/03/08/f8ef57046b7813/US5809336.pdf).

6. Prior art discussed in the specification but not cited on the front page

The "Description of the Prior Art" (§ column 1) and the detailed description discuss these, but they are not in the front-page citation list. They are background/§103 material, not §102 anticipatory references for the clock claims:

• Motorola 68000 and Intel 80X86 families — cited as the "brute force"/CISC approach.
• Sun SPARC and Intel 8960 microprocessors — cited as the "RISC" approach. The specification asserts SPARC has "three times the gates" and the Intel 8960 "20 times the gates" of the '336 microprocessor.
• INMOS transputer — cited in the multiprocessing discussion.
• PDP-8 and Data General NOVA — cited for single-instruction skip.
• "Hz" reference point: the patent states the ring oscillator runs ~100 MHz at room temperature and 50 MHz at 70 °C, and that clock frequency "may vary by a factor of four depending upon temperature, voltage, and process."

These matter because they show the applicant's own characterization of the state of the art, which supports the prosecution-history disclaimer that ultimately narrowed the claims.

7. Claim-by-claim §102 assessment (consolidated)

The critical point: after the disclaimer, no cited reference anticipates claims 1, 3, 6, 9 or 10, because each of Magar and Sheets is defeated by an express disclaimer, and the remaining references were cited as §103/background art.

8. What I could not establish (do not treat as gaps to be filled by inference)

1. The full text and disclosure of every cited reference except Magar and Sheets (whose disclosures I have only second-hand, from the ITC determination and the Federal Circuit opinion — not from the reference documents themselves).
2. The claim text of reexamination certificates C1 and C2, and therefore the precise §102 mapping for claims 11–16.
3. Whether the C2 references (notably McDermott, 6/1990) are prior art to any given claim — this turns on priority-date questions I did not resolve.
4. The front-page "Foreign Patent Documents" and "Other References" sections, if any — the text layer I retrieved contained only the U.S. patent documents, the primary examiner, and the attorney/agent. ⚠️ It is possible the patent has foreign citations that did not survive the text extraction.
5. The PUBPAT challenge reported in 2007 (a third-party prior-art submission against the MMP portfolio). I saw only a secondary reference to it; I could not retrieve the submission or its cited art.

Highest-yield next steps: (a) USPTO PatentCenter for the '336 reexamination file wrappers (Control Nos. 90/009,457 and the C2 control number) to obtain the certificate claim text and the examiner's §102/§103 rejections verbatim; (b) the actual PDFs of Magar '500, Sheets '837, Pelgrom '082, Suzuki '862 and the five C2 references; (c) the ITC 337-TA-853 Initial Determination's invalidity section, which analyzed Magar and Sheets in detail.

I'll ground this obviousness analysis in the actual prior-art references that appear in this patent's record. Let me pull authoritative details on the two references the applicant relied on and any others surfaced during reexamination.

Strong material. The reexamination request surfaced an entirely different prior-art set (Ledzius, Mostek, Guttag, Thaden, Boney, Hitachi, Brenig), and I can see a reexamination certificate ("US 5,809,336 C1") that appears to add claims. Let me pin those down.

Obviousness Analysis — U.S. 5,809,336 under 35 U.S.C. § 103

Analyst note on the prior-art inputs. This analysis uses the references that appear in this patent's own prior-art record: (a) the two references the examiner relied on — Magar, U.S. 4,503,500 and Sheets, U.S. 4,670,837; and (b) the far more damaging set raised in the ex parte reexamination request filed against the '336 patent — Ledzius U.S. 4,691,124, Guttag, "The TMS34010: An Embedded Microprocessor," IEEE Micro (May/June 1988), Thaden U.S. 4,660,155, Brenig U.S. 4,718,081, Hanamura U.S. 4,710,648, the Mostek 3870/F8 Data Book (Feb. 1981) with the EDN (Nov. 20, 1976) and IC Master (1980) corroborating publications, and the Hitachi 8-Bit Single-Chip Microcomputer Data Book (July 1985) with Boney U.S. 4,334,268. Sources: PUBPAT reexamination request, http://www.pubpat.org/assets/files/patriotscientific/PUBPATPatriotScientific336Request.pdf ; FTC/ITC record, https://www.usitc.gov/publications/337/pub_4847.pdf ; Fed. Cir. opinion, https://www.courtlistener.com/opinion/[4372796](/patent/4372796)/technology-properties-limited-v-huawei-technologies-co-ltd/ .

0. Corrections to the earlier generated sections (flagged per instructions)

Three items in the earlier sections are now superseded by the search results:

1. "Claims 2–10 … not verified" / "10 claims." The '336 patent now has more than 10 claims. A reexamination certificate exists — the patent text shows a header "US 5,809,336 C1" followed by claims 11, 12, 13, 14, 15 and 16, including independent claims 10, 13 and 16. This is corroborated by the ITC, which asserted claims 1, 6, 7, 9–11 and 13–16 of the '336 patent in Inv. No. 337-TA-853 — claim numbers that could not exist in the original 10-claim grant. (https://www.usitc.gov/publications/337/pub_4847.pdf ; https://patentimages.storage.googleapis.com/74/03/08/f8ef57046b7813/US5809336.pdf )
2. Reexamination outcome. The earlier summary listed the reexamination outcome as unverified. The record now shows a certificate (C1) issued, the claim set grew to include claims 11–16, and the independent claims as they appear in the certificate carry language not present in the 2007 Markman quote of claim 1 — e.g., "…wherein a clock signal of said second clock originates from a source other than said ring oscillator variable speed system clock," and (claim 6) "…an off-chip external clock… wherein a clock signal from said off-chip external clock originates from a source other than said oscillator." That pattern is consistent with the patentee amending the independent claims during reexamination to overcome a rejection. ⚠️ I could not read the certificate's face, so I cannot state whether the examiner relied on Ledzius/Mostek/Guttag specifically. Treat the "amended to overcome" inference as an inference.
3. Claim 1 text. The claim-1 language I quote below is the post-reexamination text (with the added "originates from a source other than" clause), which is narrower than the 2007 Markman version quoted in the earlier section. That matters for §103 — see §2.

1. Analytic framework

• Governing law: Pre-AIA § 103(a). The '336 patent is a division of Ser. No. 07/389,334, filed Aug. 3, 1989, so the critical date for § 103 is August 3, 1989 (and the § 102(b) bar date is August 3, 1988). Every reference below issued or published before August 3, 1988, so all are § 102(b) art and proper § 103 combinable art.
• Test: Graham v. John Deere (scope/content of claims; differences over prior art; PHOSITA level; secondary considerations), as refined by KSR Int'l v. Teleflex (2007) — a combination of known elements according to their known functions, with a predictable result, is obvious; so is an obvious-to-try variation within a finite, small design space.
• PHOSITA (Aug. 1989): a B.S. in electrical engineering (or equivalent) with ~3–5 years' experience in MOS/CMOS integrated-circuit design, including microprocessor datapath design, clock generation and distribution (ring oscillators, crystal oscillators, phase-locked loops), and memory/I-O interfacing. This is the artisan the applicant addressed when it argued "conventional crystal clock 434" for the I/O interface.
• One structural caveat: this analysis maps Ledzius/Guttag/Thaden as characterized by the reexamination requester's claim charts, which I have not independently read against the references themselves. Where I rely on a requester characterization, I say so. My own independent confirmations are limited to Sheets (I read its text), Magar (via the Federal Circuit's and ITC's descriptions), and the '336 specification's internal admissions.

2. Why the controlling construction is decisive — and cuts against the patent

Because the patentee won its claims by prosecution disclaimer, the § 103 analysis must use the construed claim, not the plain text. The Federal Circuit's controlling construction (Technology Properties Ltd. v. Huawei Techs. Co., Fed. Cir. 2017) is:

"an entire oscillator disposed upon said integrated circuit substrate" = "an oscillator located entirely on the same semiconductor substrate as the central processing unit that does not require a command input to change the clock frequency and whose frequency is not fixed by any external crystal."

Two consequences drive the obviousness case:

1. The Fed. Cir. broadened the claim relative to the district court. Judge Grewal had required an oscillator "that does not require a control signal" at all; the Federal Circuit held that was too narrow and limited the disclaimer to using a command input to change the clock frequency. Every oscillator that merely receives some command for another purpose now reads in. A broader claim is easier to invalidate.
2. The three construed requirements — (i) on one substrate, (ii) no command input to change frequency, (iii) not crystal-fixed — are precisely the three features of Ledzius, which was never before the examiner during original prosecution. The applicant's disclaiming statements ("varies in frequency but does not require manual or programmed inputs or external or extra components") describe Ledzius's self-compensating on-chip ring oscillator almost verbatim. The distinguishing feature the patentee relied on to obtain the patent is the teaching of a reference not in the original record.

Applicant-admitted prior art. The specification itself supplies § 103 ammunition:

• "Clock circuit 430 is the familiar 'ring oscillator' used to test process performance." (col. describing FIG. 17) — an admission that ring oscillators were known process-tracking structures.
• "…the speed of which is controlled by a conventional crystal clock 434." — an admission that clocking the I/O interface from a crystal is conventional.
• "…the ring oscillator 430 is useful as a system clock… because its performance tracks the parameters which similarly affect all other transistors on the same silicon die." — an admission of the operative principle.

These are admissions about the state of the art at the critical date and may be used as prior art under MPEP § 2129 / In re Fout.

3. The prior art of record

4. Ground 1 (primary): Ledzius + Guttag → claims 1, 2, 6, 10, 11, 12, 13, 15

This is the strongest § 103 case in the record, because Ledzius supplies the entire inventive core and Guttag supplies only the second-clock/interface subcombination.

4.1 Element mapping — claim 1 (post-reexam text)

Result: every element of claim 1 is disclosed in the combination, and the only reference that is arguably missing a single element is Guttag (which is missing the ring-oscillator core), while Ledzius is missing only the separate I/O clock domain.

4.2 Element mapping — claim 6 / claim 13 (post-reexam independent claims)

Claim 6 and claim 13 add "an off-chip external clock, independent of said oscillator… operative at a frequency independent of a clock frequency of said oscillator… originates from a source other than said oscillator," and (claim 13, and claim 11) "said central processing unit operates asynchronously to said input/output interface."

• Off-chip external clock: Guttag's 50 MHz package-level oscillator.
• Asynchronous CPU-to-interface operation: Thaden supplies this expressly — the requester cited Thaden as disclosing "an input/output interface as a solution for the same problem discussed in Ledzius, which is providing asynchronous operation of a functional circuit and external devices, such as a microprocessor and external memory" (PUBPAT request at 51–52). So the combination Ledzius + Guttag + Thaden covers claims 11 and 13 nearly element-for-element.
• Claim 15 ("said oscillator comprises a ring oscillator"): Ledzius, Mostek and Hitachi each disclose an on-chip ring/RC oscillator.
• Claim 2 / claim 12 ("said second clock is a fixed frequency clock"): Guttag's "50 MHz" oscillator (requester's chart, ¶ 2).
• Claim 14 ("operating temperature … or operating voltage"): Ledzius (PVT self-compensation); Hanamura independently discloses on-substrate temperature detection for a signal processor.

4.3 Why the PHOSITA would have combined them (KSR articulation)

1. Same field, same problem, same art. Both references are single-chip processor designs; both address clocking in a monolithic MOS environment. KSR holds this weighs in favor of combination.
2. The combination is a union of two known clocking techniques serving two different domains. Ledzius solves the core clocking problem (run as fast as this die permits, self-tracked to PVT). Guttag solves the interface clocking problem (talk to fixed-speed, asynchronous external memory/peripherals on a deterministic fixed clock). Putting a self-timed core behind a fixed-clock interface is the ordinary design response; the § 103 question is whether the reference combination suggests it, and Ledzius itself supplies the suggestion because it "explicitly suggests using a different input/output interface in place of latches 20–22" (PUBPAT request at 41, 52).
3. Predictable result, no new function. Each element performs exactly its established function: the ring oscillator tracks PVT; the crystal stays fixed; the interface exchanges data. The asserted benefit of the '336 patent — the CPU "will always execute at the maximum frequency possible, but never too fast," while I/O stays synchronized to the outside world — follows directly and predictably from those two known functions. There is no synergy beyond the sum of the parts, which is the hallmark of an obvious combination.
4. The patent's own specification concedes the design is conventional in the relevant respect, calling the I/O clock a "conventional crystal clock" and the ring oscillator the "familiar … ring oscillator used to test process performance." A PHOSITA reading the specification is told that both halves of the claimed combination were known.
5. Small, enumerated design space. As of 1989 the designer's options for generating an on-chip core clock were essentially: (a) external crystal (+ optional PLL/multiplier), (b) on-chip RC/ring oscillator, (c) divided/controlled VCO. Ledzius and Mostek/Hitachi occupy (b); Magar occupies (a); Sheets occupies (c). Where the prior art discloses a finite set of identified, predictable solutions, KSR makes the selection obvious absent evidence of unexpected results — and the applicant's own "unexpected results" position was, in substance, that the on-chip oscillator tracks PVT, which Ledzius expressly discloses.

4.4 The strongest point in favor of invalidity

The patentee survived original prosecution by persuading the examiner that the missing element relative to Magar and Sheets was "the ring counter variable speed clock 430" and by arguing that the invention "varies in frequency but does not require manual or programmed inputs or external or extra components to do so." Ledzius is a patent titled "Self-Compensating, Maximum Speed Integrated Circuit" whose entire point is an on-chip, self-compensating, maximum-speed clock that varies with process, voltage and temperature without any input or external component. The applicant's disclaimers therefore do not distinguish Ledzius; they describe it. Ledzius was not cited or considered during original prosecution (the PUBPAT request relies on it as uncited art). That is the textbook posture for a § 103 rejection.

5. Ground 2: Ledzius + Thaden → claims 1, 10, 11, 13, 16

Independent of Guttag, Thaden supplies both (i) an on-chip I/O interface between a functional circuit and an external memory bus and (ii) asynchronous operation between the processor and external devices. Combined with Ledzius's self-compensating ring-oscillator core clock and Ledzius's express suggestion to swap in a different I/O interface, this reads on the method claims (10, 16) and on claims 11 and 13's "operates asynchronously to said input/output interface" limitation. Motivation is explicit and shared: both references state that their I/O interface exists to solve the same problem of asynchronously coupling a fast functional circuit to slower external devices.

6. Ground 3: Ledzius + Sheets and Sheets + Guttag (the examiner's art, recombined)

• Sheets supplies a variable-frequency processor clock — the very feature the applicant told the examiner (and later argued to the courts) was missing from Magar. Sheets also supplies the second, independent clock concept, because in Sheets the clock frequency is set by a digital word written to a VCO. On the pre-disclaimer claim 1, Sheets + any on-chip-oscillator reference (Brenig, Mostek, Hitachi) would have been a viable § 103 combination: Sheets teaches varying the CPU clock; the secondary reference teaches putting the oscillator on the die.
• On the construed claim, however, Ground 3 is materially weaker than Ground 1, for a reason the courts already identified: the patentee disclaimed an oscillator requiring "a command input to change the clock frequency," and Sheets's VCO is changed by a digital word written to it — i.e., by a command input. A Sheets-based combination therefore runs into the disclaimer, and the Office is bound by the construction. This is exactly why the Ledzius-based grounds (which do not implicate the command-input disclaimer) are the ones to press.

7. Ground 4: Magar + Guttag (weak, but worth recording)

Magar supplies the single-chip CPU with an on-chip clock generator producing four non-overlapping phases and the multi-clock-distribution idea; Guttag supplies the separate fixed I/O clock. This combination is the weakest because Magar's clock is crystal-fixed and off-chip-driven — precisely what the patentee disclaimed — so Magar can at most serve as a secondary teaching on chip integration and phase generation, not on the "entire ring oscillator variable speed" limitation. I would not lead with it.

8. Ground 5: Mostek alone and Hitachi + Boney (anticipation and near-anticipation)

• Mostek (1981 data book, with 1976 EDN advertising and 1980 IC Master as corroboration). The requester asserted that claims 6–8 and 10 are anticipated by Mostek alone, i.e., that a single prior-art microcomputer data book discloses the whole apparatus and method claims at the broadest reasonable interpretation. If sustained, § 102(b) disposes of those claims and no § 103 combination is needed. Verified only at the level of the requester's assertion — I have not read the Mostek pages.
• Hitachi + Boney. The requester asserted Hitachi's HD6805W1 data book, with Boney, discloses "a ring oscillator, microprocessor and input/output interface on the same IC with the interface clocked in part by the processor's clock and in part by an external clock." That maps to claim 1's "on-chip I/O interface" plus the second, independent clock, and to the "clocked in part by … and in part by" language the reexamination added to the independent claims. This is a strong § 103 (and arguably § 102) ground for claims 1–5.

9. Secondary considerations (Graham factor 4)

• Licensing / commercial success — limited probative weight. The Moore Microprocessor Portfolio was broadly licensed (Intel, AMD, and others are described publicly as licensees), and the '336 patent was asserted in the ITC and in numerous district-court actions. But the record shows the licensing program was substantially litigation-driven and settlement-driven (Acer, Amazon, Kyocera and Sierra Wireless exited the ITC case on settlement), and the patentee won only one infringement verdict (HTC, $958,560, non-willful) while losing at the ITC and on stipulation in the N.D. Cal. cases. Licensing under threat of suit, without a demonstrated nexus between the license and the claimed combination, is weak evidence of non-obviousness — and KSR cautions against letting commercial success rescue a claim whose elements were each known.
• Long-felt need / failure of others. A genuine argument exists: contemporaries (Magar, Sheets) solved different problems — Sheets optimized for power reduction at low load, whereas the '336 aims at maximum guaranteed speed. The patentee could argue that the art was not motivated to use an on-chip free-running oscillator as a system clock because the received wisdom was that on-chip oscillators were too PVT-unstable to be trusted as clocks. This is the strongest non-obviousness argument available, and it is a teaching-away argument: the skilled artisan "knew" to use crystals for predictability.
  • Rebuttal: (i) Ledzius is affirmative evidence that the art did use on-chip oscillators as clocks, precisely because they track PVT — so there was no teaching away, only a second, recognized design option; (ii) the specification's own assertion that the ring oscillator is "familiar" and "used to test process performance" undercuts the claim that using it as a clock was a departure; (iii) the "maximum speed" and "never too fast" result is the expected consequence of self-compensation, not an unexpected one.
• Copying. Industry adoption of on-chip PLL/VCO clock generators is real, but the accused products used controlled oscillators/PLLs — which the ITC found outside the "entire oscillator" limitation and which the patentee itself conceded are "not what the patent is about" ("The VCO is not disclosed… The patent is not about VCO" — Oklobdzija, ITC Tr.). Copying of a different architecture is not nexus evidence for the claimed free-running oscillator.

10. Where the § 103 case is weak — be candid

1. Ledzius is a reexamination reference, and a certificate issued. If the examiner substantively considered Ledzius and confirmed claims over it, that is a strong (though non-binding, and rebuttable-on-appeal) administrative finding of non-obviousness. ⚠️ I could not verify whether the Office granted reexamination on the Ledzius grounds, or amended the independent claims to overcome a Ledzius-based rejection. Do not present the Ledzius ground as an established invalidity result — it is a theory, and an unverified one at that.
2. Ledzius may not disclose a CPU. The requester mapped Ledzius's "functional circuit" to a "central processing unit." Ledzius is a "Self-Compensating, Maximum Speed Integrated Circuit"; whether its clocked device is a general-purpose CPU or a special-purpose functional block is a factual question I cannot resolve without the reference text. If Ledzius's clocked circuit is not a CPU, the combination needs an additional reference (Mostek, Hitachi, Magar) to supply the CPU — which weakens but does not defeat the ground.
3. I have not read Ledzius, Guttag, Thaden, Brenig, Hanamura, Mostek, EDN, IC Master, Hitachi or Boney. Every mapping above drawn from the PUBPAT claim charts is second-hand. The only references I can independently ground are Sheets and Magar (https://patentimages.storage.googleapis.com/c4/93/fc/d8479d01e18e32/[US4670837](/patent/US4670837).pdf ; https://patents.google.com/patent/[US4503500](/patent/US4503500) ), plus the '336 specification itself.
4. The claims are already very narrow. Post-reexam, the independent claims require the second clock's signal to "originate from a source other than" the ring oscillator, and (claims 11/13) the CPU to operate "asynchronously to" the interface. A combination that satisfies all of these is a closer call than a bare "on-chip ring oscillator + separate I/O clock" statement suggests.
5. The patent is expired (Sept. 15, 2015). Any § 103 holding now is retrospective — relevant to past damages, licensing, or ownership, not to prospective infringement.

11. Bottom line

If the Office or a court were to apply the Federal Circuit's construction faithfully, the highest-probability § 103 outcome is that at least independent claims 1, 6, 10 and 13, and dependent claims 2, 12, 14 and 15, are invalid over Ledzius in view of Guttag (and, for the asynchronous limitations, Thaden) — because the invention's conceded point of novelty over Magar and Sheets ("the ring counter variable speed clock 430" that varies with PVT "without manual or programmed inputs or external or extra components") is disclosed by a reference, Ledzius, that the examiner never saw. The decisive open factual questions are (i) whether Ledzius's clocked circuit is a CPU, and (ii) whether the reexamination examiner substantively considered Ledzius and, if so, on what basis claims were allowed over it.

Verification steps I would take before relying on any of this: obtain the printed US 5,809,336 C1 reexamination certificate and the reexamination file wrapper (PTAB/PATENTS view) to determine (a) which reexam grounds were granted, (b) whether Ledzius/Guttag/Thaden were considered and overcome, and (c) the exact issued text of claims 1–16; then read Ledzius U.S. 4,691,124 and Guttag (IEEE Micro, May/June 1988) in full to confirm the element-level mapping first-hand.