US 7923764

US Patent 7923764: Semiconductor Device and Method for Fabricating the Same

Title: Semiconductor device and method for fabricating the same

Current Assignee: Advanced Integrated Circuit Process LLC
Original Assignee: Panasonic Corp
Inventors: Junji Hirase, Akio Sebe, Naoki Kotani, Gen Okazaki, Kazuhiko Aida, Shinji Takeoka
Filing Date: July 20, 2009
Issue Date: April 12, 2011

Abstract:
The patent describes a semiconductor device that includes a high dielectric constant gate insulating film formed on an active region within a substrate, a gate electrode on this insulating film, and an insulating sidewall on each side of the gate electrode. A key feature is that the high dielectric constant gate insulating film extends continuously from under the gate electrode to under the insulating sidewall. Furthermore, the portion of this insulating film under the sidewall is thinner than the portion under the gate electrode.

Plain-Language Overview of Independent Claims:

• Independent Claim 1 (Semiconductor Device):
  This claim describes a semiconductor device featuring a gate insulating film made of a high dielectric constant material. This film is located on an active area of a semiconductor substrate, with a gate electrode positioned on top of it. Insulating sidewalls are present on the sides of the gate electrode. The crucial aspect is that the high dielectric constant gate insulating film is continuous, extending from directly beneath the gate electrode to beneath these sidewalls. Additionally, the part of the insulating film under the sidewalls is designed to be thinner than the part under the main gate electrode.

• Independent Claim 8 (Method for Fabricating a Semiconductor Device):
  This claim outlines a method for manufacturing the semiconductor device. It involves four main steps:
  a) Creating a high dielectric constant gate insulating film on an active region of a substrate.
  b) Forming a gate electrode on this high dielectric constant gate insulating film.
  c) After forming the gate electrode, etching the part of the high dielectric constant gate insulating film that is outside the gate electrode to reduce its thickness.
  d) After the etching step, forming an insulating sidewall on each side surface of the gate electrode.

USPTO and CAFC 2026 Dockets:
The patent US7923764 is currently active, with an anticipated expiration date of July 24, 2026.
According to the latest information available (fetched May 14, 2026), there are several ongoing litigation cases related to this patent:

• Two US cases were filed in the Texas Eastern District Court (case numbers 2:24-cv-00623 and 2:24-cv-00730).
• Two PTAB (Patent Trial and Appeal Board) cases, IPR2025-01079 and IPR2025-00829, were filed but not instituted due to procedural reasons.
• Additionally, the patent family has experienced its first worldwide litigation.

As of April 26, 2026, and based on the provided and searched information (up to May 14, 2026), no specific dockets for US7923764 in the U.S. Court of Appeals for the Federal Circuit (CAFC) for the year 2026 have been found. While district court cases or PTAB decisions could potentially lead to CAFC appeals, none are currently listed as active in the CAFC dockets for 2026.