Invalidity dossier

US 8796779

Semiconductor device

Current assignee: Advanced Integrated Circuit Process LLC

Added 5/14/2026, 6:01:52 AM

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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US Patent 8796779 Summary:

  • Title: Semiconductor device
  • Assignee: Advanced Integrated Circuit Process LLC (Current Assignee as of 2024-07-30)
    • Original Assignee: Panasonic Corp
  • Inventors: Satoru Ito, Yoshiya Moriyama, Hiroshi Ohkawa, Susumu Akamatsu
  • Filing Date: 2012-10-31
  • Issue Date: 2014-08-05
  • Abstract: A first MIS transistor and a second MIS transistor of the same conductivity type are formed on an identical semiconductor substrate. An interface layer included in a gate insulating film of the first MIS transistor has a thickness larger than that of an interface layer included in a gate insulating film of the second MIS transistor.

Plain-language overview of Independent Claims:

  • Claim 1: This claim describes a semiconductor device with two Metal Insulator Semiconductor (MIS) transistors of the same conductivity type on the same substrate. Both transistors have a gate insulating film (which includes an interface layer and a high dielectric constant (high-k) insulating film) and a gate electrode. The key distinguishing feature is that the first transistor's interface layer is thicker than the second transistor's interface layer. Both interface layers are made of silicon dioxide or silicon oxynitride.

  • Claim 7: This claim describes a method for fabricating a semiconductor device. It involves forming an interface layer, a high-k insulating film, and a gate electrode material film sequentially on a substrate with first and second active regions. These layers are then patterned to form a first gate electrode and a first gate insulating film on the first active region, and a second gate electrode and a second gate insulating film on the second active region. Crucially, after this patterning, the method includes selectively increasing the thickness of the interface layer of the first gate insulating film.

  • Claim 14: This claim is similar to Claim 7, detailing a method for fabricating a semiconductor device. It specifically states that after covering both the first and second gate electrodes with an insulating film, a portion of the insulating film covering the first gate electrode is selectively etched. Following this, the interface layer of the first gate insulating film is selectively oxidized to increase its thickness.

I will now search for litigation information.Litigation Related to US Patent 8796779:

According to the provided patent information, US8796779 has been involved in several litigation proceedings:

Regarding CAFC 2026 dockets, a direct search for US8796779 within the provided CAFC search results did not yield specific cases related to this patent. The available CAFC resources allow for general access to scheduled cases for April, May, and June 2026, and case lookup via PACER, but no direct mention of US8796779 was found in the snippets. Therefore, I do not have authoritative information about any active or scheduled CAFC cases for US8796779 for 2026.

Generated 5/15/2026, 6:47:41 AM