US 7745847

Summary of US Patent 7745847

Title: Metal oxide semiconductor transistor

Assignee: Marlin Semiconductor Ltd (as of 2021-07-26; originally United Microelectronics Corp)

Inventors: Chu-Yin Tseng, Shih-Chieh Hsu, Chih-Chiang Wu, Shyh-Fann Ting, Po-Lun Cheng, Hsuan-Hsu Chen

Filing Date: 2007-08-09

Issue Date: 2010-06-29

Abstract: The patent describes a method for fabricating a metal oxide semiconductor transistor. This method involves providing a semiconductor substrate, forming at least one gate on the substrate, and then forming a protective layer over the substrate and the gate. Subsequently, at least one recess is formed in the semiconductor substrate adjacent to the gate, into which an epitaxial layer is then formed. A lightly doped region is formed in the semiconductor substrate adjacent to the gate, and finally, a spacer is formed on the sidewall of the gate.

Plain-language overview of independent claims:

Independent Claim 1: This claim describes a physical structure of a MOS transistor. It includes:

• A gate built on a semiconductor substrate.
• Two raised epitaxial layers located within the semiconductor substrate, positioned on either side of the gate, and extending above the surface of the semiconductor substrate.
• A spacer situated on the sidewall of the gate. This spacer extends partially over the raised epitaxial layers, and the point where the epitaxial layers touch the bottom of the spacer is also above the semiconductor substrate's surface.
• Two doped regions, each formed in the semiconductor substrate next to the corresponding sides of the gate.

The primary distinguishing feature of this claim appears to be the presence of "raised" epitaxial layers that are positioned next to the gate and extend above the substrate surface, with the spacer extending over a portion of these raised layers. The "contact surface" between the raised epitaxial layers and the bottom of the spacer is also above the substrate surface.

Independent Claim 1 (Method): (Note: The patent abstract and description refer to methods of fabricating a MOS transistor, but the claims section only explicitly lists claim 1 as a "MOS transistor structure" followed by dependent claims. The initial summary of the invention also lists two method claims. However, given the prompt to interpret the claims literally, and the provided full text of the claims, only a single independent claim related to a structure is presented. If there were independent method claims, they would typically be numbered separately or clearly indicated as method claims within the claims section. It is possible the "method" claims mentioned in the summary are high-level descriptions that are further detailed in the dependent claims or throughout the specification but not explicitly presented as independent claims in the final granted patent claims section, or the provided text is an excerpt.)

Based on the provided patent text, there is only one independent claim listed in the "Claims" section, which is a structural claim. The descriptions of "another method for fabricating a CMOS transistor" and "a method of fabricating a MOS transistor" in the "Summary of the Invention" section appear to describe conceptual inventions or embodiments, but they are not presented as separate independent claims in the actual "Claims" list provided. Therefore, I will only provide an overview of the explicit independent claim 1.

CAFC 2026 Dockets: A search of CAFC 2026 dockets for US patent 7745847 did not yield any specific results for this patent number. The search results provided general information about CAFC dockets and some recent patent cases, but none directly mention US7745847.