US 6831292

I'll search for authoritative information on this specific patent number, including any 2026 litigation activity.

Let me check for the specific litigation history and any recent 2026 activity.

US Patent No. 6,831,292 — Summary

Note on scope: I searched for this exact number (6,831,292 / "6831292"). Results returned this patent only; no 2026 Court of Appeals for the Federal Circuit docket activity involving this patent surfaced. I could not find any 2026-filed CAFC appeal, IPR, or district court case asserting the '292 patent. Its litigation history is from 2005–2007 (details below). I flag that the absence of 2026 activity is a negative finding from search, not an authoritative confirmation, and today's date context (April 26, 2026) is treated as given.

Bibliographic data

Source: Google Patents (https://patents.google.com/patent/[US6831292B2](/patent/US6831292B2)/en). Notes: the current-assignee field is Google's own caveat — "The listed assignees may be inaccurate."

Abstract (as issued)

"Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or 'FETs') that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced."

Plain-language overview of the independent claims

The invention addresses a manufacturing problem: after a strained Si/Ge/SiGe layer is grown (e.g., a strained channel), subsequent high-temperature processing steps can cause dopants to diffuse ("interdiffuse") upward into the strained layer, degrading device performance. The claimed solution is to define the strained layer so that a distal zone — the portion farthest from the substrate interface — is kept essentially impurity-free, i.e., the impurity concentration gradient equals approximately zero there. The specification sets that zone at at least about 50 Å thick in the dependent claims.

Claim 1 — Semiconductor structure (apparatus).
A substrate plus at least one strained layer on it, defining an interface. The strained layer has a "distal zone" located away from the interface. The substrate, the interface, and the strained layer are together characterized at least in part by an impurity gradient whose value is substantially equal to zero in the distal zone.

Claim 16 — FET (apparatus).
A field-effect transistor fabricated in a semiconductor substrate, with a channel region that includes at least one strained channel layer. That layer has a distal zone away from the substrate, and the substrate and channel region are characterized at least in part by an impurity gradient that is substantially zero in the distal zone.

Claim 31 — Method for fabricating a semiconductor structure.
Two steps: (1) dispose at least one strained layer on the substrate, defining an interface, the layer having a distal zone away from the interface; and (2) perform at least one subsequent processing step on the substrate, after which the impurity gradient has a value substantially equal to zero in the distal zone. (Dependent claim 44 adds that the subsequent step is performed within a predetermined temperature range.)

Claim 47 — Method for fabricating a FET.
(1) Dispose at least one strained channel layer in at least the channel region, with a distal zone away from the substrate; and (2) perform at least one subsequent processing step, after which the impurity gradient is substantially zero in the distal zone. (Dependent claim 60 adds the predetermined-temperature-range limitation.)

Dependent-claim themes (common across all four independents): substrate of Si (2/17/32/48), SiGe (3/18/33/49), p-type dopant (4/19/34/50), n-type dopant (5/20/35/51); multi-layer substrate including relaxed SiGe on graded SiGe (7/22/37/53), relaxed SiGe on Si (8/23/38/54), and buried insulating layers (9/24/39/55); strained layer of Si (10/25/40/56), Ge (11/26/41/57), or SiGe (12/27/42/58); distal zone of at least ~50 Å (13/28/43/59); and gradients describing Ge or Si concentration (14–15/29–30/45–46/61–62).

Two literal-reading observations (no auto-correction applied)

1. Claim 51 reads: "The method of claim 47 wherein the substrate comprises an p-type dopant." Its parallel counterparts (claims 5, 20, 35) recite "n-type dopant," so claim 51 appears textually anomalous — but I report it exactly as issued rather than correcting it.
2. Independent-claim numbering is non-contiguous with its dependents in one spot: claim 45 depends from claim 40 (strained layer "comprises Si") yet recites that the impurity gradient describes "the concentration of Ge," and claim 46 depends from claim 41 ("Ge") yet describes Si concentration — a possible transposition. Again, quoted as written.

Litigation history (2005–2007) — no 2026 matter found

The '292 patent was central to AmberWave Systems Corp. v. Intel Corp.:

• May 17, 2005 — Intel filed a declaratory-judgment action of non-infringement as to the '292 patent in the District of Delaware, Intel Corp. v. AmberWave Systems Corp., No. 1:05-cv-00301 (D. Del.) (closed 2007-03-05). Source: D. Del. opinion page; RPX Insight.
• July 15, 2005 — AmberWave sued Intel on a related patent (US 6,881,632) in E.D. Tex., and filed a Delaware counterclaim asserting the '292 patent. The Texas case was transferred under the first-to-file rule. Source: AmberWave Systems Corp. v. Intel Corp., No. 2:05-cv-321 (E.D. Tex. Nov. 1, 2005); Intel Corp. v. AmberWave Systems Corp., 233 F.R.D. 416 (D. Del. 2005).
• A second Delaware action, No. 1:05-cv-00682, appears in the Google Patents litigation record.
• A September 2005 follow-on dispute involved US 6,946,371 ("Methods of fabricating semiconductor structures having epitaxially grown source and drain elements").

Caveat: I have no authoritative confirmation of a 2026 CAFC docket or any post-2007 assertion of the '292 patent. Given the patent is recorded as expired (Google Patents lists an adjusted expiration of 2023-01-22), active 2026 enforcement/CAFC activity would be unlikely. If you need a definitive docket check, the authoritative sources are PACER/CM-ECF (D. Del.) and the CAFC docket search — I could not access those directly here.

I'll research litigation involving US patent 6831292. Let me start with searches on the litigation databases.

Let me dig into the specific Delaware cases and outcomes.

I have substantial data. Let me verify a few remaining details on the specific case numbers and outcomes.

Litigation involving US Patent 6,831,292

Bottom line: US 6,831,292 was litigated in a single, tightly-clustered dispute between AmberWave Systems Corporation and Intel Corporation, running from May 2005 to March 2007, primarily in the U.S. District Court for the District of Delaware (with one related action first filed in the Eastern District of Texas and transferred in). All of it ended in a global settlement on March 5, 2007 — no court ever adjudicated infringement or validity of the '292 patent. I found no CAFC appeal, no ITC action, and no other defendants.

Note on identifiers: I am treating the patent as US 6,831,292 B2 ("Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same"), priority 2001‑09‑21, issued 2004‑12‑14. Sibling patents in the same campaign were US 6,881,632 ('632) and US 6,946,371 ('371) — I am not conflating these with the '292 patent.

1. Intel Corp. v. AmberWave Systems Corp. — D. Del. No. 1:05-cv-00301 (-KAJ / -JJF-MPT)

2. AmberWave Systems Corp. v. Intel Corp. — E.D. Tex. No. 2:05-cv-00321, transferred and consolidated into D. Del. 1:05-cv-00301

3. Intel Corp. v. AmberWave Systems Corp. — D. Del. No. 1:05-cv-00682 (-KAJ)

(This is one of the two Delaware cases flagged in the Google Patents "family has litigation" entries — but it concerns the '371 patent, not the '292 patent. I am noting it for completeness because it is part of the same dispute cluster and because the two cases were cross-referenced by the court.)

4. AmberWave Systems Corp. v. Intel Corp. — E.D. Tex. No. 9:06-cv-00157

Overall outcome of the '292 dispute

• Settlement (March 5, 2007): Intel and AmberWave announced they had settled all pending patent-infringement suits relating to AmberWave's strained-silicon portfolio. Under the agreement, Intel received a license to all AmberWave patents and patent applications existing at the time or filed during the agreement's 10‑year term, and Intel agreed to make license payments to AmberWave over that term. The parties also agreed to continue discussing and evaluating AmberWave's ongoing R&D. Other terms were confidential. (EE Times; CNET; LA Times/Bloomberg; PC Perspective press release)
• No merits ruling: No court issued a judgment that Intel infringed (or did not infringe) the '292 patent, and there was no appellate decision (no CAFC appeal found). Coverage of the settlement explicitly notes the resolution did not represent a legal finding of patent infringement. (Beijing report summary)
• Court records: Intel v. AmberWave, D. Del. 05-301 opinion page; RPX Insight docket 1:05-cv-00301; CourtListener opinion discussing the 05-301/05-682 relationship.
• Related inter partes agreement: On March 23, 2006 the parties stipulated that neither would seek reexamination of the '292, '632, or '371 patents (or foreign equivalents) — relevant because it closed off the PTAB/reexam route for the '292 patent during the litigation.

Post-litigation status of the patent

• Ownership: Assigned by AmberWave Systems Corporation to Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC), reassignment recorded January 26, 2010 (consistent with the current-assignee listing on Google Patents).
• Term: Now listed as Expired – Lifetime, with an adjusted expiration of 2023-01-22.

Verification caveats

• The Google Patents "family has litigation" links point to Unified Patents case 1:05-cv-00682 and case 1:05-cv-00301, plus a Darts-IP family 23263100 entry. Those databases are paywalled/portal-restricted, so I could not pull the raw docket records directly; I grounded the details above in the Delaware court filings republished via findforms/courtlistener, the RPX dockets, contemporaneous press coverage, and the E.D. Tex. transfer opinion.
• I found no other defendants and no other jurisdictions for the '292 patent. If you need PACER-verified docket sheets for 1:05-cv-00301, 1:05-cv-00682, 2:05-cv-00321, and 9:06-cv-00157 (and confirmation of the patent(s) in the last one), those would be the next step, since I could not complete that verification within this session.

I'll verify the structured data's default ("no PTAB activity") against public sources before writing anything.

Let me run more targeted checks before concluding.

One more check specifically for any IPR/PGR docket naming this patent.

Proceedings overview

Zero AIA trial proceedings on file. The USPTO ODP structured block states no AIA trial proceedings exist for US 6,831,292, and my independent web checks (PTAB petition/exhibit documents, Docket Alarm PTAB dockets, PTAB E2E-indexed material, and CAFC coverage) surfaced no IPR, PGR, or CBM involving this patent — 0 active, 0 invalidated, 0 sustained, 0 settled, 0 institution-denied. The bottom line for a defendant is not "the patent is hardened by surviving IPRs" and not "the key claims are dead" — it is that no one has ever post-grant-challenged this patent, and the patent has expired (adjusted expiration 2023-01-22, status "Expired - Lifetime"), so a demand letter citing it today is asserting an expired right against conduct outside its term unless it is aimed at pre-2023 damages within the 35 U.S.C. § 286 six-year lookback.

No proceedings to report

There is no IPR, PGR, or CBM docket number to populate here. I will not invent one, and I will not back-fill this section with the district-court cases (which are not PTAB proceedings) or with the false-positive patent-number hits described below.

False positives I checked and rejected

Because claim-level research on an unlitigated patent produces a lot of noise, I want to be explicit about what I saw and why none of it is a proceeding on the '292 patent:

• PTACTS petition documents at ptacts.uspto.gov/ptacts/public-informations/petitions/1555319, /1554417, /1554416, /1553784 and Docket Alarm exhibits in IPR2024-00265 and IPR2024-00468 all contain the literal string "6831292". In every instance, the number appears inside an examiner EAST/prior-art search string (e.g., ("6737722" | "6831292" | "6878603" | ...)) taken from the prosecution history of a different patent. These are unrelated petitioners (e.g., GreenThread, Semiconductor Components Industries, Monolithic Power Systems) challenging unrelated patents. None of these petitions names US 6,831,292 as the challenged patent.
• IPR2020-00290, IPR2017-00375, IPR2017-01252 returned in search are proceedings on other patents (the '502 patent, Align Technology's 8,781,292, and a fucosyltransferase patent respectively). The "292" overlap is coincidental.
• I found no ex parte reexamination request either, but note that I did not have a reexamination-specific feed in the structured data — treat that as "not found," not as an affirmative negative.

Adjacent litigation context (not PTAB, but it explains the absence of PTAB activity)

This is worth knowing because it tells you why there are no IPRs, and it bears on defensive strategy:

• AmberWave Systems Corp. v. Intel Corp. — AmberWave sent a cease-and-desist letter on 2005-05-09 and sued Intel in the E.D. Tex. (C.A. No. 2:05-CV-321) on 2005-07-15 asserting US 6,881,632; that case was transferred to the D. Del. on 2005-11-01. The structured block lists two D. Del. filings, 1:05-cv-00682 and 1:05-cv-00301.
• Intel Corp. v. AmberWave Systems Corp., 233 F.R.D. 416 (D. Del. 2005) (C.A. No. 05-682-KAJ) was Intel's declaratory judgment action covering the '292 patent; the court granted Intel leave to supplement to add the then-newly-issued '371 patent. Opinion: https://www.courtlistener.com/opinion/[8759735](/patent/8759735)/intel-corp-v-amberwave-systems-corp/
• The parties settled all suits in March 2007: Intel took a license to all AmberWave patents existing or filed during a 10-year term, with license payments and confidential other terms. See EE Times, 2007-03-05: https://www.eetimes.com/intel-settles-strained-silicon-litigation/
• Timing point that matters: that dispute ran 2005–2007, i.e., before the AIA's IPR regime took effect on 2012-09-16. The patent was never re-asserted in the post-AIA era, was assigned to Taiwan Semiconductor Manufacturing Co. (TSMC) on 2010-01-26, and expired on 2023-01-22. That combination — early assertion, early settlement, expiry before the modern assertion wave — is the most likely explanation for the complete absence of PTAB filings.

Strategic summary

Claim status: everything is UNTESTED. No claim of US 6,831,292 has ever been canceled, confirmed, or even addressed by the PTAB. Claims 1–15 (the structure claims, with independent claim 1), claims 16–30 (the FET claims, with independent claim 16), claims 31–46 (the method claims, with independent claim 31), and claims 47–62 (the FET-fabrication method claims, with independent claim 47) all stand exactly as issued on 2004-12-14. Note in passing that the printed claim set contains what appear to be drafting errors — claim 51 recites "an p-type dopant" (duplicating claim 50's p-type recitation rather than reciting an n-type dopant, unlike parallel claim 20), and claim 15/30/46 characterize the impurity gradient as "the concentration of Si" for a Ge strained layer. Those are § 112(a)/(b) vulnerabilities a challenger could probe, but no tribunal has ever construed a single term of this patent — there is no claim construction, no IPR estoppel, and no PTAB record to build on.

Estoppel landscape: entirely clear. 35 U.S.C. § 315(e)(2) estoppel attaches only to a petitioner that obtained a final written decision in an IPR. Because there are no FWDs, no party is estopped as to any ground. For a defendant being asserted today, every prior-art ground remains available in district court — § 102(a)/(b)/(e), § 103, § 112 — subject only to the ordinary requirement that the art be timely disclosed under the local rules and Rule 26. There is no IPR-driven narrowing to fight around, but equally no IPR record to leverage. Practically, the usual "IPR first, then district court" sequencing gives way to straight district-court invalidity contentions, because the patent is expired and post-grant value is limited.

Pattern signals: none exist. No petitioner has filed multiple IPRs against this patent — no petitioner has filed any. The patent owner (AmberWave, now TSMC) never pursued a PTAB appeal of anything, because there was nothing to appeal. There is no defensive aggregator in the chain — no Unified Patents or RPX filing appears anywhere, and Unified's own litigation portal entries in the structured data are district-court case records, not PTAB matters.

Recommended next steps

1. Lead with expiration, not invalidity. Google Patents records an adjusted expiration of 2023-01-22 and legal status "Expired - Lifetime." Under 35 U.S.C. § 271, there is no infringement for acts after expiry; the exposure is limited to past damages within the six years preceding the complaint (§ 286, i.e., conduct after roughly 2020-09-28). Confirm the expiration date against the USPTO Patent Center's term/adjustment record before relying on it in a letter or brief, since I am reading it from the structured block rather than a certified term calculation.
2. Demand a claim chart tied to dates. If an assertion letter cites US 6,831,292, require the sender to identify (a) the specific claims, and (b) the pre-expiration acts and products alleged to infringe them. An assertion that does not do both is not supportable.
3. Verify the assignment and standing chain. The patent moved from AmberWave to TSMC on 2010-01-26. Confirm the current recorded owner and any unreleased licenses — the 2007 Intel settlement granted Intel a 10-year license to all AmberWave patents and applications, which (depending on its exact terms and whether it survived the TSMC assignment) may bear on exhaustion or license defenses. Intel's terms were confidential; I cannot tell you what they were.
4. If you nonetheless need a post-grant vehicle, note the constraints: the PGR window closed 9 months after 2004-12-14, CBM is unavailable (this is not a financial-services patent), and an IPR on the expired patent is legally possible but of marginal value because it cannot reach past damages any better than a district court can — and the § 315(b) one-year bar depends on the service date of a complaint you may already be facing. The real defensive work here is district-court invalidity and damages-date work, not PTAB work.
5. Monitor the family, not just this patent. The '292 patent has nine same-family continuations (US 7,884,353; 7,776,697; 7,846,802; 8,106,380; 8,344,355; 8,722,495; 9,281,376; 9,923,057; 10,164,015), all reported as expired or expired-fee-related. If a client is being asserted against the family rather than this patent alone, check each sibling's status separately — none of them shows PTAB activity either, but my check was driven by the '292 number.

Where to verify independently:

• Patent and prosecution history: https://patents.google.com/patent/US6831292/en
• PTAB document search (verify the empty result yourself): https://ptacts.uspto.gov/ptacts/ and https://www.uspto.gov/patents/ptab/decisions
• CourtListener for any CAFC/docket activity: https://www.courtlistener.com/?q=%226%2C831%2C292%22
• The one relevant district-court opinion: https://www.courtlistener.com/opinion/8759735/intel-corp-v-amberwave-systems-corp/

Confidence and caveats: High confidence that no IPR/PGR/CBM has been filed against this patent — the structured ODP data says so and multiple independent searches agree. Lower confidence on reissue, reexamination, and pre-AIA inter partes interference/derivation activity, which the structured block does not index; I found no evidence of any, but "not found" is not the same as "confirmed absent." If you need a belt-and-suspenders negative for those, pull the full file wrapper from Patent Center rather than relying on this memo.

I'll research this patent's ownership chain across multiple sources before reconstructing the record.

Key finding emerging: AmberWave asserted this patent against Intel in 2005. Let me dig into the assignment record details and corporate history.

Now let me pin down the recorded assignment reel/frame data and the AmberWave–TSMC transaction nature.

Ownership Reconstruction — US 6,831,292 B2

Patent: US 6,831,292 B2 — "Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same"
Appl. No.: 10/251,424 · filed 2002-09-20 · issued 2004-12-14 · priority 2001-09-21 (prov. 60/324,325)
Status: Expired – Lifetime; adjusted expiration 2023-01-22 (Google Patents legal status). No live assertion window remains.

Data-provenance caveat, stated up front. I could not reach assignmentcenter.uspto.gov / assignment.uspto.gov directly in this session, and no search result I obtained reproduced the reel/frame numbers or the correspondent of record for either recording on this patent. The two recorded assignments below are confirmed from the Google Patents legal-events record for US 6,831,292 (which is drawn from the same USPTO assignment data). I have deliberately left reel/frame and correspondent fields marked "not retrieved" rather than estimate them. This is a genuine gap, and it means NPE signal #3 (repeat correspondent) cannot be evaluated for this patent.

Inventors

Names taken from the printed patent and from the recording data (assignors: FITZGERALD, EUGENE; CURRIE, MATTHEW; HAMMOND, RICHARD; LOCHTEFELD, ANTHONY) in the 2002-11-13 reassignment entry.

Unusual patterns: none indicative of a fire-sale. All four inventors assigned to their employer within roughly 14 months of the 2001-09-21 priority date, which is normal employer-assignment behavior, not the "everyone leaves in 12 months" pattern. The only movement I can document is geographic: Hammond appears as "Canton Cardiff, GB" on a 2005 AmberWave filing and Currie as "Brookline, MA," i.e. ordinary career/relocation drift inside the same assignee's patent stream. I found no evidence of a coordinated inventor exodus preceding the 2010 transfer, and I will not infer one.

Original assignee

AmberWave Systems Corporation (also spelled "AmberWave System Corporation" in some family filings), Salem / 13 Garabedian Drive, Salem, NH 03079. Founded 1998 (some sources say 1999) as an MIT spinout; co-founder Eugene Fitzgerald, MIT professor.

• Primary line of business: advanced materials R&D and patent licensing. AmberWave's own fact sheet describes it as "a materials research science company with an intellectual property (IP) business model" that "patents and licenses technologies." It maintained a 30,000 sq-ft facility with a class-10 clean room for epitaxy and metrology — i.e. it practiced the technology at R&D scale and licensed it to foundries, but it was not a merchant chip manufacturer selling products that embody claim 1.
• Did it ship a product embodying the claims? No commercial product line; revenue came from licensing fees. It did enforce: this is the entity that sued Intel.
• Capital: ~$91M raised; investors included 3i, Adams Capital Management, Arch Venture Partners, The Hillman Company, TeleSoft Partners.
• Corporate actions: acquired Aonex Technologies, Inc. (Caltech-origin materials integration IP). Founder of the Innovation Alliance; active in patent-reform advocacy (KSR, Quanta amicus).
• Current status: no longer the owner of this patent. Its patent assets were transferred to Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC) by an assignment recorded 2010-01-26. Academic analysis of TSMC's external technology acquisition (PICMET proceedings, "Patent analysis in external technology acquisition: A case of TSMC") confirms TSMC acquired a large block of externally sourced patents in 2006–2010 from assignors including AMBERWAVE SYS, predominantly in photovoltaic/strained-layer materials. So this was a portfolio/technology acquisition, not a company-wide merger of equals.

Assignment timeline

Two recorded assignments. Execution dates are not shown in the legal-events entries I could retrieve; the dates below are recording dates (and are labeled as such), which is the one point where this reconstruction is weaker than a direct Assignment Center pull.

**2002-11-13 (recorded) — Reel not retrieved / Frame not retrieved

• Conveyance: Assignment (recorded as "ASSIGNMENT OF ASSIGNORS INTEREST"; Google Patents legal-event code: reassignment)
• Assignor: Eugene A. Fitzgerald; Matthew Currie; Richard Hammond; Anthony Lochtefeld (each individually)
• Assignee: AMBERWAVE SYSTEMS CORPORATION
• Correspondent: not retrieved — could not be obtained from the sources available; do not treat as absent
• Context: standard employee/founder assignment to the original assignee at, or shortly after, filing (execution precedes the 2002-09-20 filing date in the ordinary course).

**2010-01-26 (recorded) — Reel not retrieved / Frame not retrieved

• Conveyance: Assignment (recorded as reassignment)
• Assignor: AMBERWAVE SYSTEMS CORPORATION
• Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
• Correspondent: not retrieved — same gap as above. Because I cannot see either correspondent, repeat-correspondent analysis is impossible for this chain and I make no finding on it.
• Context: portfolio/technology acquisition by an operating manufacturer — part of TSMC's 2006–2010 intake of AmberWave materials/photovoltaic and strained-layer patents. Corroborated outside the US: the EP family member EP1350290 shows a transmission totale de propriété to "TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED" registered 2010-07-15 (French RNB No. 0178699, BOPI 2010-32) — i.e. the 2010 transfer was family-wide, not a single-patent carve-out.

No further assignments to this patent appear in the record after 2010-01-26. TSMC is the current assignee of record. No transfer to any licensing LLC, no security interest, no merger, no change-of-name entry appears.

Related enforcement (context, not an assignment)

• 2005-05-17 — Intel Corp. filed a declaratory-judgment action against AmberWave in D. Del. seeking non-infringement of the '292 patent (D. Del. 1:05-cv-00301, Judge Kent A. Jordan).
• 2005-07-15 — AmberWave sued Intel in E.D. Tex. (2:05-cv-321) on the sibling '632 patent.
• 2005-09-20 — AmberWave filed on the '371 patent (5:50 a.m. drop box); Intel filed the mirror DJ action, docketed as D. Del. 1:05-cv-00682. AmberWave's counterclaim on the '292 patent was litigated within this Delaware cluster. The Texas '632 case was transferred to Delaware on 2005-11-01 (first-to-file rule).
• 2007-03-05 — All Intel–AmberWave suits settled. Intel took a license to "all AmberWave patents and patent applications … existing today or filed during the agreement's 10-year term," with license payments over the term.

This matters for the NPE analysis: the only enforcement of this patent was by its original assignee, against a direct competitor/implementer, and the transfer to TSMC came ~35 months after settlement began, not before suit.

Timeline diagram

timeline
    title Ownership of US 6831292
    2001 : Provisional 60 324 325 filed
    2002 : Application filed by AmberWave Systems
         : Inventors assign rights to AmberWave
    2004 : Patent US 6831292 issues
    2005 : Intel files Delaware DJ action
         : AmberWave counterclaims on the 292 patent
         : Texas suit on sibling 632 patent
    2007 : Intel settles and takes portfolio license
    2010 : AmberWave assigns patent to TSMC
    2023 : Patent expires

NPE / troll-pattern signals

1. Shell-entity transfer — not present. The only post-original transfer is AmberWave → TSMC (recorded 2010-01-26), an operating manufacturer with fabs. Neither side is an "IP/Patents/Licensing/Holdings/Ventures" LLC, there is no registered-agent-service address, and the transferee files 10-Ks. Note the one nuance: AmberWave itself had no product revenue and an explicitly licensing-driven business model — but the rubric requires a transfer from an operating assignee to a licensing-only LLC, and AmberWave is the original assignee and the R&D originator (own clean room, its own engineers as inventors). A licensing-only model at the originating R&D company is not the shell-transfer tell.

2. Known asserter in the chain — not present. Neither AmberWave Systems Corporation (Salem, NH) nor TSMC appears on the enumerated lists (Acacia, Marathon, IV, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, DGC, Spangenberg entities). AmberWave is a venture-backed MIT spinout / Innovation Alliance founding member, not a high-frequency plaintiff — its litigation footprint is essentially the 2005–2007 Intel dispute. TSMC has never asserted this patent.

3. Repeat correspondent across the chain — unclear / cannot be evaluated. I could not retrieve either recording's correspondent of record (see provenance caveat). No correspondence are cited here, and I am not inferring any.

4. Cascading transfers — not present. Exactly two recorded assignments, ~7.2 years apart (2002-11-13 → 2010-01-26). No chained LLCs, no <24-month sequence, no shared addresses to test.

5. Pre-litigation transfer — not present, and inverted. The only transfer (2010) postdates the 2005 filings, the 2005-11-01 Texas→Delaware transfer order, and the 2007-03-05 settlement. Intel's DJ complaints and AmberWave's counterclaim were filed by the then-owner of record, so no assignment was needed to manufacture standing or venue.

6. Bankruptcy fire-sale — not present. No Chapter 7/11 sale record surfaced for AmberWave Systems Corporation; the 2010 transfer reads as a negotiated IP/technology purchase (consistent with the PICMET study's characterization of TSMC's 2006–2010 external acquisitions), not a court-supervised auction.

7. Privateering — not present. The direction of travel is the opposite of privateering: the operating-side innovator sued in its own name rather than pushing the patent to a proxy, and the eventual purchaser (TSMC) never asserted it. I found no SEC 10-K/8-K or Patent Progress/EFF coverage describing a TSMC-directed assertion campaign on this patent.

8. Defensive aggregator (anti-NPE) — not present. The chain terminates at TSMC, an operating manufacturer pursuing the technology (strained-layer/photovoltaic materials integration per the PICMET acquisition study) — not RPX, AST, LOT, Unified Patents, or OIN. The patent is not "neutralized" by a defensive aggregator; it simply expired on 2023-01-22.

Verdict

Operating-company assertion — closest fit.

Justification. The enforcement on this patent was brought by its owner of record at the time, AmberWave Systems Corporation — an MIT-spinout R&D company that practiced the strained-layer technology in its own clean-room facility and licensed it — directly against Intel, an actual competitor/implementer, in D. Del. 1:05-cv-00301 and 1:05-cv-00682 (2005), settled 2007-03-05 with Intel taking a portfolio-wide license. The chain then terminates at TSMC under the assignment recorded 2010-01-26 (family-wide; the EP counterpart's transfer to TSMC registered 2010-07-15), an operating manufacturer that acquired the AmberWave portfolio as technology, never asserted it, and still owns it as the patent expires 2023-01-22. No shell LLC, no cascading transfers, no known NPE, no bankruptcy sale, and no pre-litigation transfer appear anywhere in the record — so the two NPE-favorable options are not supported.

Two honest qualifications on that verdict. (a) The rubric's "Operating-company assertion" contemplates a current assignee that ships embodying products and is suing competitors; here the asserting party (AmberWave) was a licensing-based non-manufacturer and the current owner (TSMC) is a manufacturer that is not suing. If you prefer to weight AmberWave's licensing-only revenue model as the dominant fact, the fallback reading is NPE — moderate confidence on a single weak signal, with the explicit note that this would be a mischaracterization of a venture-backed R&D originator that built the technology itself. (b) Because the reel/frame and correspondent fields could not be retrieved, signals #3 (and part of #1/#4) are under-tested rather than affirmatively negative.

Verify at: USPTO Assignment Center — https://assignmentcenter.uspto.gov/ (search patent 6831292); Google Patents legal events — https://patents.google.com/patent/US6831292/en (source of the 2002-11-13 and 2010-01-26 recording entries cited above).

I'll research this patent's prior-art citations. Let me run several searches.

I have the patent's own text but not yet its backward citation list. Let me dig for the "References Cited" table specifically.

Bottom line up front

I could not retrieve US 6,831,292's own back‑citation ("References Cited") table. What the question calls "each patent citation for 6831292" is, in the material available, almost entirely forward citations — i.e., later documents that cite '292. Those are not prior art and cannot anticipate anything under 35 U.S.C. § 102. I'll give you what I verified, flag exactly what I could not verify, and explain why the distinction matters for the § 102 exercise you asked for.

1. Patent verification (search-confirmed)

Sources: https://patents.google.com/patent/[US6831292B2](/patent/US6831292B2)/en ; Official Gazette entry https://webapp1.dlib.indiana.edu/virtual_disk_library/index.cgi/[5628977](/patent/5628977)/FID3294/OG/html/1289-2/us06831292-20041214.html

The critical date for all § 102 analysis is 2001‑09‑21 (or 2002‑09‑20 at the latest). Any reference must predate that to be § 102 prior art.

2. The trap in the supplied text: "Cited By" ≠ "Citations"

The full patent text that was supplied contains a section headed "Cited By (139)" and "Families Citing this family (187)". Every entry there is a forward citation — art that came after '292. Examples illustrating how useless these are for § 102:

None of these can anticipate claims 1–62 under § 102, and none should be cited as prior art. If a search UI returns only a "Cited By" list, that is evidence for validity, not against it.

Likewise, the family members — WO 2003/025984 A2, EP 1428262 A2, JP 2005‑504436 A, AU 2002‑349881 A1 — are the same invention claiming the same 2001‑09‑21 priority. They are not prior art against '292.

3. Prior-art citations that are documented in the '292 record

These are the only references I could confirm appear in the '292 specification itself:

(a) Fitzgerald et al., Journal of Vacuum Science and Technology B, Vol. 10, No. 4, 1992 (incorporated by reference in the spec)

• Type: § 102(a)/(b)-style printed publication (NPL), pre‑2001. ✓ qualifies temporally.
• Disclosure: stress field of the misfit-dislocation network modulates local epitaxial growth rate, producing surface cross-hatch on relaxed SiGe buffer layers on Si.
• § 102 mapping: None. It discloses dislocation physics and buffer-layer morphology. It says nothing about a strained layer having a "distal zone" characterized by an impurity gradient "substantially equal to zero." No independent claim (1, 16, 31, 47) reads on it.

(b) Samavedam et al., Journal of Applied Physics, Vol. 81, No. 7, 1997 (incorporated by reference)

• Type: § 102(a)/(b) NPL, pre‑2001. ✓ qualifies temporally.
• Disclosure: mechanism of dislocation pile-ups from localized high misfit-dislocation stress fields; work hardening; trough formation.
• § 102 mapping: None. Purely a defect-physics background reference. Does not touch impurity gradients or distal zones.

(c) Provisional US 60/324,325 (2001‑09‑21) — the '292's own priority document. Not prior art; it is the same invention.

(d) Pre-grant publication US 2003/0057416 A1 — the '292's own publication. Not prior art.

Result of the § 102 mapping: of the references I could actually verify, zero anticipate any of claims 1–62. The two NPL items are § 102-bucket "printed publications" only as to the well-known strained-Si/SiGe background science (dislocation theory), not as to the claimed impurity-gradient-in-distal-zone limitation that gives '292 its novelty.

4. What I could not verify (stated explicitly rather than guessed)

• I could not obtain the examiner's or applicant's "References Cited" list for US 10/251,424. Google Patents, Justia and FreePatentsOnline queries returned the forward-citation table and family data, not the '292 back-citation table.
• The closest thing surfaced to an examiner list was the "References Cited" table on US 7,776,697 (a continuation in the same family, filed 2007‑08‑30) — see https://patents.justia.com/patent/[7776697](/patent/7776697). That list contains U.S. patents/applications and foreign documents, e.g.:
  • U.S.: 2004/0142545 (Ngo et al., 2004‑07‑22); 2004/0173815 (Yeo et al., 2004‑09‑09); 2005/0054168 (Currie et al., 2005‑03‑10); 2005/0116219 (Braithwaite et al., 2005‑06‑02); 2007/0293009 (Currie et al., 2007‑12‑20)
  • Foreign: DE 41 01 167; DE 100 11 054; EP 0 514 018; EP 0 587 520; EP 0 683 522; EP 0 810 124; EP 0 828 296; EP 0 829 908; EP 0 838 858; EP 0 889 502; EP 0 910 124; EP 1 020 900; EP 1 174 928; FR 2 701 599; GB 2 342 777; JP 4‑307974; JP 5‑166724; JP 6‑177046; JP 6‑244112; JP 6‑252046; JP 7‑094420; JP 7‑106446; JP 7‑240372; JP 10‑270685; JP 11‑233744; JP 2000‑021783; JP 2000‑031491; JP 2001319935; JP 2001‑148473; JP 2002‑076334; JP 2002‑164520; JP 2002‑289533; WO 98/59365; WO 99/53539; WO 00/48239; WO 00/54338; WO 01/22482; WO 01/54202; WO 01/93338; WO 01/99169; WO 02/13262; WO 02/15244; WO 02/27783; WO 02/47168; WO 02/071488; WO 02/071491; WO 02/071495; WO 02/082514
• I am not asserting these are '292's citations. Several of them (e.g., US 2004/0142545, US 2004/0173815, WO 02/082514) postdate '292's priority and therefore cannot be § 102 art against '292; their presence in a 2007‑filed continuation's list is exactly what you'd expect and is a strong sign this list belongs to the continuation, not to '292. Do not import it into a '292 § 102 chart without checking the actual file wrapper.

5. If you need a defensible § 102 chart

Retrieve the authoritative documents rather than third-party mirrors:

1. USPTO PatentCenter / IFW for application 10/251,424 — the "References Cited" / Form PTO‑892 and the examiner's search history. (https://patentcenter.uspto.gov)
2. Global Dossier for the corresponding WO 2003/025984 / EP 1428262 prosecution, which will contain an EPO/ISA search report with X/Y category citations — often more informative than the US front page.
3. Litigation record — this patent was asserted in D. Del. (1:05‑cv‑00301 and 1:05‑cv‑00682; AmberWave v. Intel) per https://portal.unifiedpatents.com/litigation/Delaware%20District%20Court/case/1%3A05-cv-00682. Intel's invalidity contentions in that case identify the references the defendant actually relied on, which is the practically relevant prior-art set.

A note on internal consistency while you build that chart: claim 51 of '292 recites "the substrate comprises an p‑type dopant," which reads as a duplicate of claim 50 ("a p‑type dopant"). Read literally as printed; also note claims 4/5 and 19/20 cover p‑ and n‑type respectively, so 50/51 appear redundant as well as grammatically anomalous. That kind of drafting artifact is worth flagging in any validity or infringement analysis, but it is not a prior-art issue.

Honest limitation: I do not have high confidence about the complete set of references the examiner considered against '292, and I will not invent citations to fill that gap. The verified conclusion is narrower but solid: on the record available, '292's own tail citations are the two 1992/1997 journal articles plus its provisional, none of which anticipates claims 1, 16, 31, or 47, and everything in the "Cited By (139)" list is post-priority forward citation that cannot be § 102 prior art.

I'll first try to recover the actual Prior Art / References Cited section for US 6,831,292, since the page dump I was given contains the specification, claims, family data, and citation lists — but the examiner-cited prior-art list itself did not survive the fetch truncation.

The Prior Art / "References Cited" list for US 6,831,292 did not come through in the page dump. Let me try to recover it from the front-page PDF and the EP/WO family members.

I found the face of the granted patent with its "References Cited" list. Let me try to complete that list and confirm the bibliographic details of the key references.

Obviousness Analysis — US 6,831,292 B2 (Currie et al., filed 2002‑09‑20, priority 2001‑09‑21, granted 2004‑12‑14, expired 2023‑01‑22)

0. What is actually in the record (and what is not)

The page text supplied to me contains the specification, the 62 claims, classification data, family/litigation data, a "Cited By (139)" list and a "Families Citing this family (187)" list — but the examiner‑cited "Prior Art / References Cited" block was truncated out of the fetch. I therefore retrieved the face of the granted patent (patentimages PDF of US 6,831,292). The partial list I recovered from the patent's own face is:

U.S. patents cited on the face of US 6,831,292 (as printed, including apparent OCR oddities that I am not correcting): 5,283,456 A (2/1994) Hsieh et al. (257/347); 5,340,759 A (8/1994) Hsieh et al. (437/41); 5,461,250 A (10/1995) Burghartz et al.; 5,516,721 A (5/1996) Galli et al. (437/67); 5,847,419 A (12/1998) "Liay et al." (257/192); 5,891,769 A (4/1999) "Liay et al." (438/167); 6,051,482 A (4/2000) Yang (438/526); 6,059,895 A (5/2000) Chu et al. (148/33.1); 6,096,590 A (8/2000) Chan et al. (438/233); 6,111,267 A (8/2000) Fischer et al. (257/19); 6,180,978 B1 (1/2001) Chatterjee et al. (257/327); 6,350,993 B1 (2/2002) Chu et al.; 6,368,925 B2 (4/2002) Weon et al. (438/289); 6,368,946 B1 (4/2002) Dekker et al. (438/488); list continues but was cut off at "6,3…".

Foreign documents cited: DE 100 11 054 A1 (9/2000); EP 0 587 520 A1 (3/1994); EP 0 889 502 A2 (1/1999); EP 0 810 124 A2 (4/1999); EP 0 910 124 A2 (4/1999) — note the 810/910 pair as printed is internally suspicious and should be checked against the paper.

Other publications cited on the face:

• Ohguro et al., "Undoped Epitaxial Si Channel n‑MOSFET Grown by UHV‑CVD with Preheating," IEEE Trans. Electron Devices 45, No. 3, Mar. 1998 (identified in the patent as "IDS Reference C14").
• Monroe, D. et al., "Comparison of mobility‑limiting mechanisms in high‑mobility Si₁₋ₓGeₓ heterostructures," J. Vac. Sci. Technol. B 11(4), Jul./Aug. 1993, pp. 1731–1737.
• Currie, M.T., "SiGe Virtual Substrate Engineering for Integration of III‑V Materials, Microelectromechanical Systems, and Strained Silicon MOSFET's with Silicon," MIT Ph.D. thesis, Feb. 2001, pp. 158–162, 170–182, 43.

Caveats (stated rather than papered over): (i) the U.S. list above is incomplete — the tail was truncated; (ii) I recovered bibliographic data only, not the disclosure text, of the face‑cited patents; (iii) the "Cited By" and "Families Citing this family" entries on the page are later‑dated documents and are therefore not prior art to the 2001‑09‑21 priority date — e.g., Kern Rim et al., 2002 Symposium on VLSI Technology Digest, 98–99, appears in the page's citation lists but post‑dates the priority date and cannot be used. Any element‑by‑element mapping below that depends on a document whose text I did not retrieve is flagged [verify text].

1. Framework and level of ordinary skill

Graham v. John Deere factors plus KSR Int'l v. Teleflex rationales and MPEP 2143/2144. The PHOSITA here is a person with an M.S. or Ph.D. in electrical engineering or materials science and roughly 2–5 years of hands‑on Si/SiGe epitaxy and CMOS process integration experience as of September 2001 — i.e., someone who routinely read the IEEE IEDM/VLSI and Applied Physics Letters literature on strained Si and knew the Ohguro‑type undoped‑channel work and the AmberWave/Fitzgerald virtual‑substrate work.

The relevant critical date is 2001‑09‑21 (provisional 60/324,325). Every reference used below must predate that (see §8 for why that date is itself attackable).

2. Claim 1 (structure) — primary combination

Combination A: Currie thesis + Ohguro 1998 + Chu 6,059,895 (or Hsieh 5,283,456 for the SiGe‑on‑Si substrate).

Motivation (KSR rationale (A)/(C)/(D)): All three are in the same field (Group‑IV MOSFETs) and address the same problem — maximizing channel carrier mobility/transconductance. Currie/Rim supply the strained‑channel platform and its known mobility payoff; Ohguro supplies the known technique of growing an undoped epitaxial channel to remove ionized‑impurity and remote‑Coulomb scattering. Applying that known technique to a known device "ready for improvement" (the strained‑Si MOSFET) to obtain the same, predictable benefit in the same way is the paradigm KSR case. The processing techniques are compatible (both UHV‑CVD/LPCVD epitaxy; oxide/silicide overlayers are deposit‑based, so the epi channel stack can be grown late in the flow). No reference teaches away.

3. Claim 16 (FET) — combination

Combination B: Rim IEDM 1998 + Ohguro 1998 + Currie thesis. Motivation: same field, same problem, and the '292 patent's own background concedes the strained‑channel FET platform.

4. Method claims 31 and 47 — combination

Claims 31 and 47 add only: "disposing at least one strained layer …; and performing at least one subsequent processing step on the substrate after which an impurity gradient … has a value substantially equal to zero in the distal zone."

That is a result‑of‑processing limitation with no recited process step. Any low‑thermal‑budget flow (e.g., Ohguro's pre‑heated UHV‑CVD epi channel with no subsequent channel implant, plus deposited rather than thermally grown oxides — the very approach AmberWave later claimed in US 7,071,014) satisfies it. A POSA performing the Combination‑A flow at conventional post‑epi temperatures would arrive within the claim.

Combination C (for claim 47's FIG. 4 flow): a dummy‑gate/etch‑stop/planarization sequence followed by channel regrowth — this is the standard "replacement gate" approach; the '292 family itself is classified under H10D64/017 ("dummy gates in replacement gate processes") and Y10S438/926 ("Dummy metallization"), and the dummy‑gate concept (polysilicon dummy gate + SiO₂ etch stop + TMAH removal) was a known CMOS technique. Flagged [verify specific pre‑2001 reference] — I did not retrieve one.

Claim 44/60 ("the at least one subsequent processing step is performed within a predetermined temperature range") is a bare process‑window recitation; a temperature is an obvious result‑effective variable (In re Applied Materials), and the specification supplies no numeric range.

5. Dependent claims — secondary references and why they fall

• Claims 2/3/17/18/32/33/48/49 (Si, SiGe substrate) — Currie thesis (Si substrate + SiGe virtual substrate); Hsieh.
• Claims 4/5/19/20/34/35/50/51 (substrate contains p‑ or n‑type dopant) — trivially met by any doped well/virtual substrate; the '292 specification itself describes doping the region below the channel (steps 306–312). Note as printed: claim 51 recites "the substrate comprises an p‑type dopant" — a duplicate of claim 50's p‑type limitation and almost certainly a drafting error; read literally, claim 51 is anticipated by claim 50's support and adds nothing.
• Claims 6–9/21–24/36–39/52–55 (multi‑layer, relaxed SiGe on graded SiGe, relaxed SiGe on Si, buried insulator) — Currie thesis (graded + relaxed + regrowth); the patent's background admits SOI‑type buried insulators; Mizuno IEDM 1999 for the buried‑oxide variant; face‑cited EP 0 889 502 A2 / DE 100 11 054 A1 [verify text].
• Claims 10–12/25–27/40–42/56–58 (strained layer = Si, Ge or SiGe) — routine selection among three known Group‑IV channel materials with predictable strain/mobility trade‑offs (compressive for Ge/SiGe, tensile for Si).
• Claims 13/28/43/59 (distal zone ≥ ~50 Å) — a 50 Å sub‑region of a typical 100–200 Å strained channel (the NIST‑hosted AmberWave data show a 175 Å strained Si channel; Mizuno's was 20 nm). A ≤50 Å thickness is an obvious design choice, not a patentable dimension (In re Rose; Gardner v. TEC).
• Claims 14/15/29/30/45/46/61/62 — the impurity gradient "describes at least the concentration of Ge" (in a Si layer, per claims 10/40/56) or "of Si" (in a Ge layer, per claims 11/41/57). These dependencies are internally strained; they add no structural limitation a POSA would not reach by specifying a graded SiGe buffer (Currie thesis teaches a Ge concentration gradient) [flag: claim‑dependency/Eighth‑paragraph ineligibility issues as drafted].

6. The strongest single piece of art: Ohguro 1998

The most damaging reference is one the applicant itself cited ("IDS Reference C14"). KSR and MPEP 2131.01 place no premium on the applicant's own IDS submission, and an undoped epitaxial Si channel is, on its face, the claimed "impurity gradient substantially equal to zero" in the channel's upper region. The specification's only asserted distinction is the reason — avoidance of interdiffusion from subsequent high‑temperature steps — but that rationale appears in the written description, not in claims 1, 16, 31 or 47 apart from the "after which" result clause of §4 above.

7. Where the patent owner has real arguments

1. Claim construction. Claims 1/16/31/47 recite an "impurity gradient" that is "equal to zero," while FIG. 1 and the description plot impurity concentration reaching the axis. If the term is construed literally (dN/dx = 0), an undoped epi layer everywhere satisfies it; if construed as the specification's figure does (N ≈ 0), an undoped layer still satisfies it. Either way the claim cuts broadly against the owner. Under the Nautilus standard, "substantially equal to zero" and "distal zone" are also plausible §112(b) attack points.
2. No express T‑S‑M statement in any single reference linking undoped channels to strained‑Si channels; the case is a KSR rational‑undertaking case, and the owner will argue predictable results are not enough where the combination changes the device electrostatics (an undoped strained channel on a SiGe virtual substrate creates threshold‑voltage/short‑channel‑effect problems — a point the '292 specification itself wrestles with by doping below the channel).
3. Secondary considerations. The family's litigation history (per the page: D. Del. cases 1:05‑cv‑00682 and 1:05‑cv‑00301, AmberWave v. Intel; first worldwide family litigation per Darts‑IP family 23263100) evidences commercial significance and industry adoption of SiGe virtual substrates, which the owner would offer as objective indicia. Counter‑argument: the accused‑infringer/industry conduct post‑dates grant and mainly reflects the virtual‑substrate art, not the impurity‑gradient claim; and the very breadth of the "Cited By" list (139) shows the claim's teaching was incremental.
4. § 102(e)/§ 103(c) disqualification issues for commonly owned AmberWave family documents must be checked before citing any sibling application as prior art.

8. Priority‑date vulnerability (changes the art field materially)

If the provisional 60/324,325 does not provide §112 support for the "impurity gradient ≈ 0 in a distal zone" limitation, the effective date moves to 2002‑09‑20, and the 2001–2002 strained‑Si literature (including, e.g., the Kern Rim et al. 2002 VLSI Symposium paper already visible in this page's citation lists, and Shimizu et al., IEDM 2001, 433–436, which appears in the retrieved reference lists) becomes available. That is a materially stronger §103 position and should be pursued in tandem with the combinations above. Note the page shows the entire family (US 7,884,353; 7,776,697; 7,846,802; 8,106,380; 8,344,355; 8,722,495; 9,281,376; 9,923,057; 10,164,015) riding on the same 2001‑09‑21 date, so the priority question has family‑wide consequences.

9. Bottom line

• Primary §103 rejection (claims 1, 16 and the material‑selection dependents): Currie MIT thesis (Feb. 2001) + Ohguro et al. 1998 + one of Chu 6,059,895 / Hsieh 5,283,456.
• Alternative: Rim IEDM 1998 + Ohguro 1998, with Currie for the virtual‑substrate architecture and Mizuno IEDM 1999 for the buried‑insulator variants (claims 9/24/39/55).
• Method claims 31/47: the same combinations plus routine low‑thermal‑budget integration (deposited oxides, late channel growth); the "after which" clauses are result limitations that do not distinguish.
• Confidence: high on Ohguro, Monroe and the Currie thesis as face‑cited, pre‑critical‑date references and on the KSR motivation; moderate on the Rim and Mizuno mappings; low/unverified on the substantive disclosures of the face‑cited U.S. patents and foreign documents, whose texts I did not retrieve.

Verification checklist before filing anything: (1) obtain the complete "References Cited" block from the paper copy of US 6,831,292 (the recovered list is truncated, and the "Liay et al." / "Burghartz" renderings need confirmation); (2) pull full texts of 5,283,456; 5,340,759; 5,461,250; 5,516,721; 5,847,419; 5,891,769; 6,051,482; 6,059,895; 6,096,590; 6,111,267; 6,180,978; 6,350,993; 6,368,925; 6,368,946 and the five foreign documents; (3) confirm the Mizuno IEDM 1999 citation from the primary source, not from the 2003 SEMATECH presentation that merely cites it; (4) treat every "Cited By"/"Citing family" entry on the page as non‑prior art; (5) test provisional support for the impurity‑gradient limitation.