US 11316014

A technical analysis of U.S. Patent 11,316,014 reveals the following details. A search of the Court of Appeals for the Federal Circuit (CAFC) dockets for 2026 did not yield any results for this patent number.

Summary of U.S. Patent 11,316,014

Title: Semiconductor devices with graded dopant regions

Assignee: GREENTHREAD, LLC

Inventor: G. R. Mohan Rao

Filing Date: July 9, 2021

Issue Date: April 26, 2022

Abstract: The patent describes a method for improving the performance of semiconductor devices by grading the dopant concentration in the active and isolation regions, as opposed to the uniform concentration typically used. This technique is claimed to enhance various performance aspects, such as increasing the operating frequency of digital logic and power devices (MOSFET, IGBT), improving refresh times in DRAM, reducing programming times for nonvolatile memory, and enhancing the quality and sensitivity of imaging sensors and varactors.

Plain-Language Overview of Independent Claims

This patent has two independent claims. In essence, they both describe an electronic system that includes at least one semiconductor device with specific features designed to improve its performance by managing the movement of charge carriers.

Independent Claim 1:

This claim describes an electronic system containing a semiconductor device built on a substrate of a certain electrical type (doping). This device has two separate "active regions" near its surface where transistors, the fundamental building blocks of digital logic, are formed. A key feature is that at least one of these active regions, or a "well region" next to them, has a graded dopant concentration. This grading is designed to help move electrical charge carriers away from the active surface and towards an area of the substrate where there are no active components. This helps to prevent unwanted electrical effects that can degrade the performance of the digital logic.

Independent Claim 21:

This claim is very similar to the first, also describing an electronic system with a semiconductor device that has a substrate, two separate active regions with transistors, and at least one well region. The central inventive concept is again the use of a graded dopant concentration in the active and/or well regions to aid the movement of charge carriers away from the active surface towards a non-active area of the substrate. This claim further specifies that the graded dopant concentration can be linear, quasi-linear, or follow a mathematical error function or complementary error function, or any combination of these. This provides more detail on the specific nature of the doping gradient.