US 10734481

A concise summary of US Patent 10,734,481, including a plain-language overview of its independent claims, is provided below.

Title: Semiconductor devices with graded dopant regions

Assignee: GREENTHREAD LLC

Inventor: G. R. Mohan Rao

Filing Date: December 17, 2019

Issue Date: August 4, 2020

Abstract:
Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICs, improvement in refresh time for DRAMs, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFETs, and a host of other applications.

Plain-Language Overview of Independent Claims

US Patent 10,734,481 has two independent claims, which describe the core of the invention.

Claim 1: This claim describes a semiconductor device with specific regions designed to improve performance by managing the flow of electrical carriers. In simple terms, it covers a semiconductor chip built on a base (substrate) of one electrical type. On this base, there are at least two separate "active regions" of an opposite electrical type where transistors are built. The key innovation is that at least one of these active regions, or an adjacent "well region," has a graded dopant concentration. This grading creates an electrical field that helps move charge carriers away from the surface of the chip down into the substrate. This can help reduce unwanted electrical noise and improve the performance of devices like DRAMs and image sensors.

Claim 20: This claim is very similar to Claim 1 but is worded slightly differently. It also describes a semiconductor device with a substrate and two separate active regions on its surface for forming transistors. Like Claim 1, it requires that at least one of the active regions or an adjacent well region has a graded dopant concentration. The purpose of this graded concentration is explicitly stated to "aid carrier movement from the surface to the substrate." This helps to sweep away unwanted charge carriers from the active parts of the transistors, thereby improving the device's reliability and performance.

Litigation in the Court of Appeals for the Federal Circuit (CAFC)

A search of 2026 dockets for the Court of Appeals for the Federal Circuit reveals a case involving this patent: Greenthread, LLC v. Monolithic Power Systems, Inc., docket number 26-1722, filed on April 22, 2026. This indicates that the patent is the subject of an appeal, likely related to an infringement or validity dispute.