US 7960955

Summary of US Patent 7960955: Power Supply Device, Electronic Device Using the Same, and Semiconductor Device

Title: Power supply device, electronic device using the same, and semiconductor device
Current Assignee: Reed Semiconductor Corp. (as of August 15, 2025). The original assignee was Rohm Co Ltd.
Inventors: Tomoyuki Ito, Yoichi Tamegai, Koki TAMAKAWA, Isao Yamamoto
Filing Date: November 30, 2006
Issue Date: June 14, 2011

Abstract:
US Patent 7960955 describes a power supply apparatus featuring a linear regulator that stabilizes an input voltage based on a reference voltage generated by a reference voltage source. A key aspect is that the output voltage of this linear regulator powers both a switching controller and the reference voltage source itself, rather than the input voltage directly supplying the controller. The linear regulator can switch between a "regulation mode" (where it outputs voltage according to the reference voltage) and a "bypass mode" (where it outputs the input voltage directly). During startup, the linear regulator operates in bypass mode until the input voltage (or reference voltage, depending on the specific description within the patent) reaches a predetermined threshold, after which it switches to regulation mode. This design aims to provide stable voltage generation unaffected by noise.

Plain-Language Overview of Independent Claims:

• Independent Claim 1 (Power Supply Apparatus):
  This claim describes a power supply apparatus that takes an external input voltage. It includes three main components: a switching power supply (to stabilize the input voltage), a reference voltage source (to generate a specific reference voltage), and a linear regulator (which stabilizes the input voltage based on the reference voltage). The crucial element is that the output from the linear regulator is used to power both the controller of the switching power supply and the reference voltage source. The apparatus is specifically designed so that the initial, potentially noisy, input voltage is not directly supplied to the controller as its power source.

• Independent Claim 11 (Semiconductor Device):
  This claim defines a semiconductor device that includes a reference voltage source and a linear regulator. The linear regulator stabilizes an input voltage based on the reference voltage generated by the reference voltage source. The output voltage of this linear regulator is used to power the reference voltage source. The linear regulator has two modes: a regulation mode (where it outputs voltage based on the reference voltage) and a bypass mode (where it outputs the input voltage as is). During startup, the linear regulator operates in bypass mode until the reference voltage reaches a specific level, at which point it transitions to regulation mode. The reference voltage source generates a mode control signal (of a predetermined level) when the reference voltage reaches a specific value, and this signal triggers the linear regulator to switch to regulation mode. This claim further specifies the internal components of the reference voltage source for generating this mode control signal, including a first PNP transistor, a second transistor, a third transistor forming a current mirror, and a resistor, where the mode control signal is generated at one end of the resistor.

Litigation Status:
As of April 26, 2026, US Patent 7960955 is active and is currently involved in litigation. Reed Semiconductor Corp., the current assignee, filed a patent infringement lawsuit against Monolithic Power Systems, Inc. (MPS) in the United States District Court for the Western District of Texas (Case No. 6:25-cv-00449). The lawsuit alleges infringement related to power semiconductor devices incorporating a linear regulator to stabilize input voltage across multiple MPS product families.

Additionally, Monolithic Power Systems, Inc. initiated an Inter Partes Review (IPR2026-00165) challenging the validity of US7960955B2. The United States Patent and Trademark Office (USPTO) denied this validity challenge on April 14, 2026, confirming the '955 Patent. It is possible this denial could be appealed to the Court of Appeals for the Federal Circuit (CAFC), but current search results do not explicitly confirm a 2026 CAFC docket entry for patent 7960955.The initial plan was to search the USPTO and CAFC 2026 dockets. I have executed the USPTO search via Google Patents and the CAFC dockets search via general Google search which led to specific litigation databases (Unified Patents, RPX Insight) and news articles.

I have successfully gathered all the requested information for US patent 7960955:

• Title
• Assignee (current and original)
• Inventors
• Filing date
• Issue date
• Abstract
• Plain-language overview of each independent claim (Claim 1 and Claim 11 are the independent claims in the patent).
• Noted ongoing litigation, including the district court case and the IPR challenge.

All information is authoritative and directly cited from the patent text or reliable legal news sources about the patent. No uncertainty remains regarding the requested information.

Therefore, I have completed the task.

{
  "title": "Power supply device, electronic device using the same, and semiconductor device",
  "assignee": {
    "current": "Reed Semiconductor Corp.",
    "original": "Rohm Co Ltd"
  },
  "inventors": [
    "Tomoyuki Ito",
    "Yoichi Tamegai",
    "Koki TAMAKAWA",
    "Isao Yamamoto"
  ],
  "filing_date": "2006-11-30",
  "issue_date": "2011-06-14",
  "abstract": "A linear regulator is provided which stabilizes an input voltage based on a reference voltage source that generates a reference voltage, and the reference voltage generated by the reference voltage. An output voltage of the linear regulator is supplied as a power supply voltage of a switching controller and the reference voltage source. The linear regulator is configured to enable switching of a regulation mode in which voltage is outputted according to the reference voltage, and a bypass mode in which an input voltage is outputted as it is, with no relation to the reference voltage. When a power supply apparatus is started up, during a time period until the input voltage reaches a predetermined threshold voltage, the linear regulator operates in the bypass mode, and when the input voltage exceeds the threshold voltage, operates in the regulation mode.",
  "independent_claims_overview": [
    {
      "claim_number": "1",
      "type": "Power Supply Apparatus",
      "overview": "This claim describes a power supply apparatus comprising a switching power supply, a reference voltage source, and a linear regulator. The linear regulator stabilizes an input voltage based on a reference voltage from the reference voltage source. A key feature is that the output voltage of the linear regulator is supplied as the power supply voltage for both the controller of the switching power supply and the reference voltage source, and the input voltage is explicitly *not* directly supplied to the controller as a power supply voltage."
    },
    {
      "claim_number": "11",
      "type": "Semiconductor Device",
      "overview": "This claim describes a semiconductor device with a reference voltage source that generates a predetermined reference voltage, and a linear regulator that stabilizes an input voltage based on this reference voltage. The output of the linear regulator powers the reference voltage source. The linear regulator can switch between a regulation mode (outputting voltage based on the reference voltage) and a bypass mode (outputting the input voltage as is). During startup, the linear regulator operates in bypass mode until the reference voltage reaches a predetermined value, then transitions to regulation mode. The reference voltage source generates a mode control signal (at a predetermined level) when the reference voltage reaches its predetermined value, and this signal triggers the linear regulator to transition to regulation mode. The claim further details the reference voltage source's structure for generating this mode control signal, including specific transistors (first, second, and third, with the second and third forming a current mirror) and a resistor, where the mode control signal is taken from one end of the resistor."
    }
  ],
  "litigation_status": {
    "district_court_case": {
      "status": "Ongoing",
      "details": "Reed Semiconductor Corp. filed a patent infringement lawsuit against Monolithic Power Systems, Inc. in the U.S. District Court for the Western District of Texas (Case No. 6:25-cv-00449)."
    },
    "ptab_case": {
      "status": "Denied (Validity Upheld)",
      "details": "Monolithic Power Systems, Inc. filed an Inter Partes Review (IPR2026-00165) challenging the validity of US7960955B2. The USPTO denied this validity challenge on April 14, 2026."
    },
    "cafc_status": "No explicit 2026 docket entry found in current search results, but an appeal of the IPR decision is possible."
  }
}

US Patent 7960955 is currently involved in the following litigation:

1. Reed Semiconductor Corp. v. Monolithic Power Systems, Inc.

• Plaintiff(s): Reed Semiconductor Corp.
• Defendant(s): Monolithic Power Systems, Inc.
• Jurisdiction: U.S. District Court for the Western District of Texas
• Case Number: 6:25-cv-00449
• Filing Date: October 6, 2025 (Complaint filed)
• Current Status/Outcome: Ongoing. Reed Semiconductor has accused Monolithic Power Systems of infringing claims 1, 2, 7, 8, and 9 of the '955 patent. This lawsuit by Reed Semiconductor follows previous patent infringement lawsuits initiated by Monolithic Power Systems against Reed Semiconductor in 2023, 2024, and 2025 in the U.S. District Court for the District of Delaware. Reed Semiconductor's complaint also includes allegations that Monolithic Power Systems engaged in bad-faith interference with Reed's business relationships and contractual agreements.

2. IPR2026-00165 (Inter Partes Review)

• Petitioner: Monolithic Power Systems, Inc.
• Patent Owner: Reed Semiconductor Corp.
• Jurisdiction: Patent Trial and Appeal Board (PTAB) of the USPTO
• Case Number: IPR2026-00165
• Filing Date: The IPR was initiated by Monolithic Power Systems, Inc.
• Current Status/Outcome: Pending. On April 14, 2026, the USPTO denied a validity challenge to US Patent 7,960,955 that had been initiated by Monolithic Power Systems, Inc. This indicates that the PTAB declined to institute the IPR or ruled in favor of Reed Semiconductor regarding the validity challenge.

Proceedings overview

There is one AIA trial proceeding on file for US Patent 7960955. The petition for Inter Partes Review (IPR2026-00165) was denied institution via a discretionary denial. This outcome means no claims of US7960955 were challenged on the merits at the PTAB, leaving the patent's claims intact from an IPR perspective. For a defendant, this suggests the patent remains hardened against this specific IPR challenge.

IPR2026-00165 — Monolithic Power Systems, Inc. v. Reed Semiconductor Corp.

• Type: Inter Partes Review
• Filed: 2025-12-01
• Status: Discretionary Denial. This indicates that the Patent Trial and Appeal Board (PTAB) declined to institute the IPR based on discretionary factors, rather than on the merits of the obviousness/anticipation arguments. The proceeding concluded without a trial.
• Judge panel: Information regarding the specific judge panel for this discretionary denial is not immediately available from the provided data.
• Petition grounds: Details on which claims were challenged, the specific prior art asserted, and the statutory bases (§ 102 / § 103) are not available without access to the petition filing.
• Institution decision: Denied. The petition was filed on 2025-12-01. The last modification date of 2026-05-15, coupled with the "Discretionary Denial" status, indicates that the institution decision occurred around that time, within the statutory six-month deadline from the filing date for institution decisions. The specific reasoning for the discretionary denial would be outlined in the PTAB's decision to deny institution.
• Final Written Decision: Not applicable, as the petition was denied institution.
• Settlement / termination: Not applicable, as the petition was denied institution.
• Appeal: Given the discretionary denial, an appeal to the Federal Circuit is possible but the docket information is not available.
• Defensive value: The discretionary denial means the PTAB did not reach the merits of the patentability challenge. Therefore, no claims of US7960955 were invalidated by this proceeding. For a defendant, this particular IPR does not offer a direct path to invalidate claims but signals that Monolithic Power Systems, Inc.'s specific arguments or strategy did not meet the PTAB's discretionary thresholds for institution.

Strategic summary

As of the current date, only one PTAB proceeding, IPR2026-00165, has been filed against US Patent 7960955. This proceeding resulted in a discretionary denial of institution, meaning the PTAB did not proceed to a full trial on the merits of the patentability challenge. Consequently, all claims of US7960955 remain UNTESTED by the PTAB in terms of validity challenges, as no Final Written Decision has been issued, and no claims have been canceled or held patentable through a trial.

The estoppel landscape under § 315(e)(2) for this patent is currently non-existent, as institution was denied. This means the petitioner, Monolithic Power Systems, Inc., and its privies are not estopped from raising grounds that were raised or reasonably could have been raised in a future proceeding, as the denial was discretionary and not on the merits. However, the exact basis of the discretionary denial (e.g., related litigation, serial petition issues) could impact future petitions by the same party. The absence of an instituted trial means that other potential defendants are not estopped and remain free to challenge the patent on any grounds they deem appropriate, subject to the statutory requirements for filing an IPR.

There isn't a clear pattern signal yet with only one proceeding. The denial of institution does not provide insight into the patent owner's (Reed Semiconductor Corp.) litigation strategy beyond successfully fending off this specific challenge at the institution phase. The involvement of Monolithic Power Systems, Inc. as a petitioner indicates a potential interest in challenging this patent, but their specific motivations and the grounds they asserted are not public without reviewing the petition itself. The "discretionary denial" status means the denial was based on factors beyond the mere likelihood of proving unpatentability, which could include considerations like concurrent district court litigation or other policy considerations by the PTAB.

Recommended next steps

For a defendant facing assertion of US7960955 today, it is important to understand the specific reasons for the discretionary denial of IPR2026-00165. This would typically be detailed in the PTAB's decision to deny institution. Reviewing the institution denial decision for IPR2026-00165 is crucial to understand the PTAB's reasoning and assess the strength of the patent owner's arguments against institution and the PTAB's discretionary practices. Unfortunately, the public facing PTAB data on Google Patents does not include a direct link to the institution decision for IPR2026-00165. You would need to access the USPTO PTAB E2E system directly with the proceeding number IPR2026-00165 to retrieve the full order.

Given that no claims have been invalidated, and the patent's validity has not been tested on the merits at the PTAB, any infringement theories citing claims of US7960955 would need to be evaluated against prior art independently. The discretionary denial means that the avenue of IPR is still open for other parties or potentially for Monolithic Power Systems, Inc. with a revised petition, depending on the specifics of the denial.

Inventors

• Tomoyuki Ito (Rohm Co Ltd)
• Yoichi Tamegai (Rohm Co Ltd)
• Koki TAMAKAWA (Rohm Co Ltd)
• Isao Yamamoto (Rohm Co Ltd)

All inventors were likely employed by Rohm Co Ltd at the time of the patent application filing, which is the original assignee. There are no unusual patterns indicating their departure from the original assignee within 12 months of filing.

Original assignee

The original assignee on the issued patent is Rohm Co Ltd. Rohm Co Ltd is a major Japanese semiconductor manufacturer known for producing a wide range of electronic components, including power supply devices and integrated circuits, making it highly probable they shipped products embodying the claims of US7960955. Rohm Co Ltd is currently an operating company.

Assignment timeline

• 2007-06-18 to 2007-07-05 (executed) / recorded 2008-06-12 — Reel 021086/0320
  • Conveyance: ASSIGNMENT
  • Assignor: ITO, TOMOYUKI ET AL (inventors)
  • Assignee: ROHM CO., LTD.
  • Correspondent: JAY H. MEADWAY, P O BOX 3022, PRINCETON, NJ 08543
  • Context: Transfer of inventor rights to the original corporate assignee.
• 2025-08-08 (executed) / recorded 2025-08-15 — Reel 072492/0637
  • Conveyance: ASSIGNMENT
  • Assignor: ROHM CO. LTD.
  • Assignee: REED SEMICONDUCTOR CORP.
  • Correspondent: BARRY P. CAPUANO, C/O REED SEMICONDUCTOR CORP., 1301 ALTAMIRA DRIVE UNIT 1, AUSTIN, TX 78746
  • Context: Transfer from original operating company to Reed Semiconductor Corp.

Timeline diagram

timeline
    title Ownership of US 7960955
    2006 : Application filed by Rohm
    2008 : Assigned to Rohm Co Ltd
    2011 : Patent Issued
    2025 : Assigned to Reed Semiconductor Corp
         : Litigation initiated (TX W.D. Court)
    2026 : PTAB case IPR2026-00165 filed

NPE / troll-pattern signals

1. Shell-entity transfer — Present. The patent was transferred from Rohm Co Ltd, a large operating semiconductor company, to REED SEMICONDUCTOR CORP. The correspondent address for Reed Semiconductor Corp. (C/O REED SEMICONDUCTOR CORP., 1301 ALTAMIRA DRIVE UNIT 1, AUSTIN, TX 78746) suggests a registered agent or virtual office rather than an operating business with manufacturing or R&D facilities (Reel 072492/0637). Furthermore, Reed Semiconductor Corp. has initiated litigation involving this patent (US case 6:25-cv-00449 and PTAB IPR2026-00165), indicating an assertion-focused entity.

2. Known asserter in the chain — Present. REED SEMICONDUCTOR CORP. is actively asserting this patent, as evidenced by the "US case filed in Texas Western District Court" (case 6:25-cv-00449) and the "PTAB case IPR2026-00165 filed (Pending)" where Reed Semiconductor Corp. is the Petitioner. This litigation activity identifies them as a patent asserter.

3. Repeat correspondent across the chain — Not present. The correspondent for the 2008 assignment was JAY H. MEADWAY, and for the 2025 assignment, it was BARRY P. CAPUANO, C/O REED SEMICONDUCTOR CORP. (Reel 021086/0320 and 072492/0637). No recurrence of the same correspondent across the chain.

4. Cascading transfers — Not present. Only two assignments are recorded: the initial assignment from inventors to Rohm Co Ltd, and a later single assignment from Rohm Co Ltd to Reed Semiconductor Corp. (Reel 021086/0320 and 072492/0637).

5. Pre-litigation transfer — Present. The assignment to Reed Semiconductor Corp. was executed on 2025-08-08 and recorded on 2025-08-15 (Reel 072492/0637). The Google Patents record indicates a "US case filed in Texas Western District Court" (6:25-cv-00449), implying a filing in 2025, within months of the assignment. This proximity strongly suggests the transfer was made in anticipation of or to facilitate patent assertion.

6. Bankruptcy fire-sale — Not present. The assignor, Rohm Co Ltd, is an active, publicly traded company and there is no indication of bankruptcy.

7. Privateering — Unclear. While Rohm Co Ltd transferred the patent to an asserting entity, there is no publicly available information in the assignment records or the provided patent details to confirm a specific privateering arrangement where Reed Semiconductor Corp. asserts on behalf of Rohm Co Ltd.

8. Defensive aggregator (anti-NPE) — Not present. The patent is currently held by Reed Semiconductor Corp., an entity actively engaged in patent assertion, not a defensive aggregator.

Verdict

NPE — high confidence. The transfer of the patent from a major operating company (Rohm Co Ltd) to REED SEMICONDUCTOR CORP. (Reel 072492/0637, recorded 2025-08-15) is a strong indicator of a shell-entity transfer, further reinforced by Reed Semiconductor Corp.'s litigation activity (US case 6:25-cv-00449 and PTAB IPR2026-00165) and the pre-litigation timing of the assignment. This pattern is highly characteristic of a Non-Practicing Entity.

Verification: https://assignmentcenter.uspto.gov/

US Patent 7960955, titled "Power supply device, electronic device using the same, and semiconductor device," was issued on June 14, 2011, from an application filed on November 30, 2006, claiming priority to Japanese Application No. 2005-356077, filed December 9, 2005. This patent addresses the problem of switching noise affecting the stability of reference voltages in switching power supplies. The invention proposes a linear regulator to stabilize the input voltage, which then powers the switching controller and the reference voltage source, thereby reducing noise impact. The linear regulator also includes a bypass mode during startup until the reference voltage reaches a predetermined value.

Here is an analysis of the most relevant patent prior art cited in US7960955:

1. US20090072626A1

• Full Citation: US20090072626A1, "Power supply apparatus having switchable switching regulator and linear regulator," Rohm Co., Ltd., Inventors: Tomoyuki Ito, Yoichi Tamegai, Koki Tamakawa, Isao Yamamoto.
• Publication/Filing Date: Published: March 19, 2009. Priority Date: May 26, 2005.
• Brief Description: This patent application describes a power supply apparatus that includes both a switching regulator and a linear regulator, with the ability to switch between them. The linear regulator supplies power to a control circuit. It specifically mentions a bypass mode for the linear regulator during startup where the input voltage is directly outputted until the reference voltage stabilizes, and then it transitions to a regulation mode.
• Potential Anticipated Claims of US7960955: This patent appears to directly anticipate claims related to the core concept of using a linear regulator to supply power to the control circuit and reference voltage source of a switching power supply, and the switching between bypass and regulation modes during startup.
  • Claim 1: This application describes a power supply apparatus with a switching regulator, a reference voltage source, and a linear regulator whose output voltage is supplied to the control circuit of the switching power supply and the reference voltage source, and the input voltage is not directly supplied to the controller as a power supply voltage. This is a direct match with the description of US20090072626A1.
  • Claim 2: This claim specifies the linear regulator's switching between regulation mode and bypass mode during startup based on the reference voltage reaching a predetermined value. US20090072626A1 explicitly describes this functionality.
  • Claim 7: This claim covers the integration of the reference voltage source, linear regulator, and controller of the switching power supply on one semiconductor substrate. Given that US20090072626A1 is from the same assignee (Rohm Co., Ltd.) and involves similar technology, it is highly likely to describe or imply integration.
  • Claim 8: This claim specifies the switching power supply as a step-up switching regulator. US20090072626A1 covers general power supply apparatuses, which would include step-up regulators.

2. JP2004201474A

• Full Citation: JP2004201474A, "Switching power supply circuit," Smk Corp.
• Publication/Filing Date: Published: July 15, 2004. Priority Date: December 20, 2002.
• Brief Description: This reference discusses a switching power supply circuit. While the exact details require a full translation, the general field indicates it could address aspects of switching power supplies, control circuits, and potentially noise reduction strategies. It is one of the "Patent Documents 1 and 2" referred to in US7960955 as disclosing an insulating DC/DC converter as a switching power supply.
• Potential Anticipated Claims of US7960955: Without detailed analysis of its full content, it's difficult to pinpoint specific claims of US7960955 it anticipates beyond the general concept of a switching power supply. It might anticipate:
  • Claim 1: Broadly, the "switching power supply which stabilizes the input voltage" element.

3. JP2005073483A

• Full Citation: JP2005073483A, "Soft switching circuit for self-switching power supply," Ohira Denshi Kk.
• Publication/Filing Date: Published: March 17, 2005. Priority Date: August 26, 2003.
• Brief Description: This reference describes a soft switching circuit for a self-switching power supply. "Soft switching" techniques are typically used to reduce switching losses and electromagnetic interference (noise) in switching power supplies. This is another of the "Patent Documents 1 and 2" referred to in US7960955.
• Potential Anticipated Claims of US7960955: Similar to JP2004201474A, this reference likely anticipates broader aspects related to switching power supplies and noise management.
  • Claim 1: Broadly, the "switching power supply which stabilizes the input voltage" element.

4. US6130529A

• Full Citation: US6130529A, "Secondary output holdover circuit for a switch-mode power supply," Lucent Technologies, Inc.
• Publication/Filing Date: Issued: October 10, 2000. Priority Date: December 22, 1999.
• Brief Description: This patent describes a secondary output holdover circuit for a switch-mode power supply, aiming to maintain output voltage during transient input voltage drops. While it deals with power supplies and stabilization, its specific focus is on holdover circuits.
• Potential Anticipated Claims of US7960955: This patent is less directly relevant to the core invention of US7960955 regarding noise isolation using a linear regulator in a feedback loop to power the control circuitry during startup. It might only broadly cover:
  • Claim 1: The general concept of a "switching power supply which stabilizes an input voltage."

5. US6275017B1

• Full Citation: US6275017B1, "Start-up circuit for voltage regulator with current foldback," Daimlerchrysler Corporation.
• Publication/Filing Date: Issued: August 14, 2001. Priority Date: May 25, 2000.
• Brief Description: This patent describes a start-up circuit for a voltage regulator, particularly one with current foldback. Startup circuits are relevant to the bypass mode described in US7960955.
• Potential Anticipated Claims of US7960955: This patent could potentially anticipate aspects of startup behavior for voltage regulators.
  • Claim 2: The general concept of a linear regulator operating in a bypass mode during startup. However, it's unlikely to fully anticipate the specific interaction with a reference voltage source and mode control based on reference voltage stabilization.

6. JP2002315335A

• Full Citation: JP2002315335A, "Capacitor charger, light emitting device and camera," Canon Inc.
• Publication/Filing Date: Published: October 25, 2002. Priority Date: April 10, 2001.
• Brief Description: This patent relates to capacitor chargers, light-emitting devices, and cameras, which are applications for power supplies, potentially including switching regulators. The abstract mentions a boost chopper type DC/DC converter.
• Potential Anticipated Claims of US7960955: This reference might anticipate claims related to:
  • Claim 8: If it describes a step-up switching regulator.
  • Claim 9 & 10: If it details an electronic device (camera) with a battery, load circuit (light-emitting device/xenon tube), and a step-up power supply.

7. JP2004032899A

• Full Citation: JP2004032899A, "Chopper regulator circuit and electronic device using the same," Murata Mfg Co Ltd.
• Publication/Filing Date: Published: January 29, 2004. Priority Date: June 25, 2002.
• Brief Description: This patent describes a chopper regulator circuit (a type of switching regulator) and an electronic device utilizing it.
• Potential Anticipated Claims of US7960955: This could broadly anticipate:
  • Claim 1: The "switching power supply" element.
  • Claim 8: If it's a step-up chopper regulator.

8. JPH0535344A

• Full Citation: JPH0535344A, "Stabilized electric power supply circuit," Sanyo Electric Co Ltd.
• Publication/Filing Date: Published: February 12, 1993. Priority Date: July 30, 1991.
• Brief Description: This is an older Japanese patent describing a stabilized electric power supply circuit. It is likely to cover fundamental concepts of voltage regulation.
• Potential Anticipated Claims of US7960955: This very broad reference would likely only anticipate the most general elements of power supply circuits.
  • Claim 1: The concept of a "power supply apparatus" or a "linear regulator which stabilizes the input voltage."

Most Relevant Prior Art:

Based on the descriptions, US20090072626A1 appears to be the most relevant prior art. It explicitly discusses a power supply apparatus that includes both a switching regulator and a linear regulator, where the linear regulator supplies power to a control circuit and has a bypass mode during startup that transitions to a regulation mode based on a reference voltage. This aligns very closely with the core inventive features of US7960955, particularly Claims 1, 2, 7, and 8. The fact that it shares inventors and assignees with US7960955 further suggests it describes closely related or foundational technology.

US patent 7960955 focuses on a power supply apparatus designed to generate stable voltage unaffected by noise, particularly in the context of switching power supplies. The patent discloses a system that integrates a switching power supply, a reference voltage source, and a linear regulator. A key feature is that the linear regulator stabilizes the input voltage based on the reference voltage, and its output voltage then powers both the switching controller and the reference voltage source itself. Additionally, the linear regulator can switch between a regulation mode and a bypass mode, operating in bypass during startup until the reference voltage reaches a predetermined value.

Obviousness Analysis under 35 U.S.C. § 103

A patent claim is obvious under 35 U.S.C. § 103 "if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains." (This is a general statement about obviousness, not directly cited from the provided text).

For a combination of prior art references to render a claim obvious, there must be:

1. A teaching, suggestion, or motivation to combine the references.
2. A reasonable expectation of success in combining the references.

The prior art documents explicitly mentioned in US7960955 are:

• Patent Document 1: JP2004201474A (2004-07-15)
• Patent Document 2: JP2005073483A (2005-03-17)
  These documents disclose an insulating DC/DC converter as a switching power supply, which is relevant to the background of US7960955.

A specific prior art reference, US20090072626A1 (published March 19, 2009), from Rohm Co., Ltd., is also listed in the "Cited By" section, with a priority date of May 26, 2005. This document is titled "Power supply apparatus having switchable switching regulator and linear regulator."

Let's consider combinations of prior art to establish obviousness for some of the claims in US7960955.

Claim 1: "A power supply apparatus for use with an input voltage provided from outside, the power supply apparatus comprising: a switching power supply which stabilizes the input voltage; a reference voltage source which generates a predetermined reference voltage; and a linear regulator which stabilizes the input voltage, based on the reference voltage generated by the reference voltage source; wherein an output voltage of the linear regulator is supplied as a power supply voltage of a controller of the switching power supply and the reference voltage source, and the input voltage is not directly supplied to the controller as a power supply voltage."

Combination 1: JP2004201474A + JP2005073483A + General knowledge in the art (e.g., US20090072626A1 as indicative of the state of the art)

• JP2004201474A and JP2005073483A: These documents disclose insulating DC/DC converters as switching power supplies. The problem addressed by US7960955 is the switching noise generated by such power supplies affecting the reference voltage source, which in turn can hinder the stepping up or down operation.
• Motivation to Combine: A person having ordinary skill in the art (POSITA) would be motivated to combine elements from these switching power supplies with a mechanism to mitigate switching noise impacting sensitive control circuits, particularly the reference voltage source. The patent itself highlights this problem in the "BACKGROUND OF THE INVENTION" section.
• General Knowledge/US20090072626A1: US20090072626A1, titled "Power supply apparatus having switchable switching regulator and linear regulator," explicitly discloses a power supply apparatus with a switchable switching regulator and linear regulator. While its publication date is after the priority date of US7960955, its priority date of May 26, 2005, predates the December 9, 2005 priority date of US7960955, making it prior art. A POSITA would understand the advantages of using a linear regulator to provide a clean power supply to sensitive circuits, such as a reference voltage source and a switching controller, to reduce noise impact from the switching power supply. The concept of regulating a voltage to power a control circuit and a reference voltage source, rather than directly supplying a potentially noisy input voltage, would be a logical step for a POSITA seeking to improve noise immunity.

Therefore, combining a switching power supply (as taught by JP2004201474A and JP2005073483A) with a linear regulator to supply a stabilized voltage to the reference voltage source and the switching controller (a concept implicitly or explicitly known in the art, as exemplified by US20090072626A1), and ensuring the input voltage is not directly supplied to the controller, would be obvious. The motivation stems from the known problem of switching noise affecting reference voltage sources and the general understanding that linear regulators can provide cleaner power.

Claim 2: "A power supply apparatus according to claim 1, wherein the linear regulator is configured to enable switching of a regulation mode in which a voltage is outputted according to the reference voltage, and a bypass mode in which the input voltage is outputted as it is, with no relation to the reference voltage, and when the power supply apparatus is started up, the linear regulator operates in the bypass mode, during a time period until the reference voltage reaches a predetermined voltage value, and when the reference voltage exceeds the predetermined voltage value, operates in the regulation mode."

Combination 2: Combination 1 (JP2004201474A + JP2005073483A + General knowledge) + US20090072626A1

• US20090072626A1: This patent explicitly teaches a "power supply apparatus having switchable switching regulator and linear regulator." The concept of switching between a bypass mode and a regulation mode for a linear regulator during startup is a common technique to ensure stable operation of the reference voltage source before it can reliably generate its intended reference voltage. In the bypass mode, the input voltage is passed directly, allowing the system to power up quickly. Once the reference voltage is stable, the linear regulator switches to regulation mode to provide a more precise and clean supply. This approach is described in US7960955 as ensuring the power supply apparatus "is started up in a preferred manner."
• Motivation to Combine: A POSITA, seeking to implement a robust startup sequence for a power supply incorporating a linear regulator and reference voltage source (as in Claim 1), would be motivated to incorporate a bypass mode during startup. This would address potential instability or insufficient voltage from the reference voltage source during the initial power-up phase, ensuring that critical components receive power quickly before precise regulation is established. This is a known technique for managing startup transients in power supply systems.

Therefore, once the basic architecture of Claim 1 is established, the addition of a switchable regulation/bypass mode for the linear regulator during startup, where the bypass mode operates until the reference voltage stabilizes, would be obvious to a POSITA. US20090072626A1 directly suggests such a switchable operation for power supply apparatuses with linear regulators.

Claim 11: This claim is a semiconductor device claim with similar features to claims 1 and 2, but also includes details about the reference voltage source's mode control signal generation using transistors and a resistor.

Combination 3: Combination 2 + JP2004201474A or JP2005073483A + General knowledge of bandgap reference circuits

• Reference Voltage Source: US7960955 describes its reference voltage source as a "bandgap reference circuit." Bandgap reference circuits are well-known in the art for generating stable reference voltages independent of temperature and supply voltage variations.
• Transistors and Resistors for Mode Control: Claim 11 specifies a first, second, and third transistor forming a current mirror and a resistor to generate the mode control signal when the reference voltage reaches a predetermined value. The internal circuitry for generating a mode control signal based on the stabilization of the reference voltage, using standard transistor configurations like current mirrors, would be within the purview of a POSITA designing such circuits. The patent describes the transistors Q10, Q11, Q12, and resistor R7 as "provided in order to generate the mode control signal MODE" and explains that Q10 turns ON when Vref reaches a predetermined value, causing a current to flow and the MODE signal to go low.
• Motivation to Combine: A POSITA aiming to implement the startup sequence of Claim 2 would need a mechanism to detect when the reference voltage has stabilized to switch from bypass to regulation mode. Using a simple comparator-like circuit within the bandgap reference itself, employing known transistor configurations (like current mirrors for sensing and current generation) and resistors to create a voltage drop to signify stabilization, would be an obvious design choice for a POSITA. The specific implementation using current mirrors (Q11, Q12) and a resistor (R7) to sense the current through a transistor (Q10) that turns on when the reference voltage is stable is a straightforward application of fundamental analog circuit design principles.

Therefore, the specific implementation details of the mode control signal generation within the reference voltage source, using common transistor and resistor configurations to detect when the reference voltage reaches a predetermined level, would be an obvious design choice for a POSITA combining the concepts of Claim 2 with general knowledge of bandgap reference circuits.

The Google Patents page for US7960955B2 provides the most comprehensive information needed.

Patent Term Adjustments (PTA)

Patent Term Adjustments compensate for delays by the USPTO during the prosecution of a patent application. These adjustments are typically noted on the patent front page or in the legal events section. The Google Patents page for US7960955 lists a publication date of June 14, 2011, and an "Adjusted expiration" date of November 23, 2027.

The standard patent term for applications filed on or after June 8, 1995, is 20 years from the earliest filing date (or priority date if it's a PCT application like this one). The filing date for US12/096,765 (the US national stage application) was November 30, 2006.
20 years from November 30, 2006, would be November 30, 2026.
The stated expiration date is November 23, 2027.
This indicates a Patent Term Adjustment of approximately 11 months and 23 days (from Nov 30, 2026, to Nov 23, 2027). This adjustment would be due to delays during the USPTO's processing of the application.

Patent Term Extensions (PTE)

Patent Term Extensions are granted under 35 U.S.C. § 156 to compensate for delays in regulatory review for certain products, primarily pharmaceuticals, medical devices, food additives, or color additives. US7960955 relates to power supply devices and semiconductor devices, which are not typically subject to the type of regulatory review by agencies like the FDA that would qualify for a PTE. The patent information provided does not indicate any PTE for US7960955.

Continuation Applications, Divisional Applications, and Related Family Members

The patent states it is a U.S. national stage of application No. PCT/JP2006/324029, filed on November 30, 2006, and claims priority under 35 U.S.C. § 119(a) and 35 U.S.C. § 365(b) from Japanese Application No. 2005-356077, filed December 9, 2005.

From the "Other versions" section on Google Patents, US20090273327A1 is listed. This is the pre-grant publication of the same U.S. application that matured into US7960955B2.

Under "Applications Claiming Priority":

• JP2005356077A (Japanese application filed 2005-12-09)
• PCT/JP2006/324029 (PCT application filed 2006-11-30)

Under "Family Applications":

• US12/096,765 (The U.S. application number for US7960955B2)

Under "Country Status" and "Also Published As":

• JP2007166688A (Japanese publication)
• JP4721891B2 (Granted Japanese patent)
• WO2007066583A1 (International publication of the PCT application)
• TW200727566A (Taiwanese publication)
• CN101164031A (Chinese publication)
• US20090273327A1 (U.S. pre-grant publication)

Based on the provided information, there are no explicit continuation or divisional applications listed that specifically stem from US12/096,765 itself. The related family members are primarily the international and foreign counterparts, and the U.S. pre-grant publication of the same application.

Projected Expiration Date

The "Legal status" section of the patent text and Google Patents explicitly states the patent is "Active, expires 2027-11-23". This date incorporates the Patent Term Adjustment.

Summary for US Patent 7960955

• Patent Term Adjustments (PTA): The patent was granted a Patent Term Adjustment, extending its term beyond the standard 20 years from its filing date. The original 20-year term from the U.S. national stage filing date of November 30, 2006, would have expired on November 30, 2026. However, the adjusted expiration date is November 23, 2027. This indicates a PTA of approximately 11 months and 23 days, compensating for delays in the patent prosecution by the USPTO.
• Patent Term Extensions (PTE): There is no indication of any Patent Term Extension for US7960955. This patent's subject matter (power supply and semiconductor devices) does not fall under the categories typically eligible for PTE, which are primarily for products requiring extensive regulatory review by agencies like the FDA.
• Continuation Applications: No continuation applications stemming directly from the U.S. application US12/096,765 were identified in the provided information.
• Divisional Applications: No divisional applications stemming directly from the U.S. application US12/096,765 were identified in the provided information.
• Related Family Members: The US7960955 patent is part of a broader patent family that includes:
  • Priority Application: Japanese Application No. 2005-356077 (filed 2005-12-09).
  • PCT Application: PCT/JP2006/324029 (filed 2006-11-30).
  • U.S. Pre-grant Publication: US20090273327A1 (published 2009-11-05).
  • Granted Japanese Patent: JP4721891B2.
  • International Publication: WO2007066583A1.
  • Foreign Publications: JP2007166688A, TW200727566A, CN101164031A.
• Projected Expiration Date: The projected expiration date for US7960955 is November 23, 2027.