Invalidity dossier

US 6888181

Triple gate device having strained-silicon channel

Current assignee: Unified Patents

Added 5/14/2026, 6:00:45 AM

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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Here's a concise summary of US Patent 6888181:

US Patent 6888181: Triple Gate Device Having Strained-Silicon Channel

  • Title: Triple gate device having strained-silicon channel
  • Assignee: The original assignee was United Microelectronics Corp. The current assignee is Marlin Semiconductor Ltd, as of a reassignment on July 26, 2021.
  • Inventors: Wen-Shiang Liao and Wei-Tsun Shiau
  • Filing Date: March 18, 2004
  • Issue Date: May 3, 2005
  • Abstract: The patent describes a three-dimensional Triple-Gate (Tri-gate) device featuring a three-sided strained silicon channel, designed for superior drive current. This device incorporates a composite fin structure, which consists of a silicon germanium (SiGe) core and a strained silicon epitaxy layer grown on the surface of the SiGe core. A gate strip wraps around the channel portion of this composite fin structure, while the portions of the fin not covered by the gate form the source and drain regions. A high-quality gate insulating layer is positioned between the composite fin structure and the gate strip.

Plain-Language Overview of Independent Claims:

  • Independent Claim 1: This claim describes a 3D Tri-gate transistor. Its central feature is a "fin" (a raised semiconductor structure) composed of two parts: an inner core made of silicon germanium, and an outer layer of silicon that has been stretched (strained silicon epitaxy) grown on the core's surface. A gate electrode wraps around a section of this fin, defining the transistor's active channel. The ends of the fin that are not covered by the gate serve as the source and drain terminals. An insulating layer separates the gate from the fin.
  • Independent Claim 6: This claim broadly describes a Tri-gate device with a composite fin structure. This fin has a semiconductor core and a strained epitaxy layer grown on its surface. A key characteristic is that the crystal structures (lattice constants) of the semiconductor core and the strained epitaxy layer do not perfectly match, which creates the "strain." Similar to Claim 1, a gate strip wraps around a part of this composite fin, forming the channel, with the un-gated fin portions functioning as the source and drain. A gate insulating layer is placed between the composite fin and the gate.

USPTO and CAFC Docket Search:
The patent US6888181 was granted on May 3, 2005, and its anticipated expiration was March 18, 2024, after which its legal status became "Expired - Lifetime".

Regarding litigation, the Google Patents record for US6888181 indicates that there is a PTAB (Patent Trial and Appeal Board) case, IPR2025-01082, which was filed in 2025 and is currently pending (Instituted). This is a PTAB case, not a CAFC (Court of Appeals for the Federal Circuit) case. As of April 26, 2026, there is no authoritative information or search result indicating any specific dockets or ongoing litigation for US Patent 6888181 in the CAFC for the year 2026. General searches for CAFC dockets in 2026 show other patent-related cases, but none are associated with US6888181.

Generated 5/21/2026, 6:48:43 PM