Invalidity dossier
US 11107768
Chip package
Current assignee: MYW Semitech, LLC
Added 5/12/2026, 11:40:33 PM
IndustrySemiconductor (T)
Active provider: Google · gemini-2.5-flash
Auto-generating section 1 of 2: Extensions…
Each section takes ~30-60s with web-search grounding. Keep this tab open — sections will fill in below as they complete.
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
✓ Generated
Here's a concise summary of US Patent 11107768:
US Patent 11107768
- Title: Chip package
- Assignee: Myw Semitech LLC
- Inventors: Ping-Jung Yang
- Filing Date: January 26, 2020
- Issue Date: August 31, 2021
- Abstract: A chip package is provided that includes a glass substrate with multiple through-glass vias (TGVs). The package features various conductive traces (X-axis, Y-axis, Z-axis) and can support multiple chips and passive components. The patent also describes methods for manufacturing the glass substrate, including techniques for forming metal plugs within the glass and processes like damascene and embossing for creating metal layers and interconnections. Applications in OLED, MEMS, and LCD display substrates are also described.
- Litigation Status: The patent is currently active and is involved in litigation. A PTAB case, IPR2026-00065, has been filed and is pending. Additionally, a US case has been filed in the Delaware District Court.
Plain-Language Overview of Independent Claims:
- Independent Claim 1: This claim describes a display device. It includes a display panel substrate with multiple contact pads and a display area defined by edges. The key features are that the distances between the display area's edges and the substrate's boundaries are very small (less than 100 micrometers). Over this display panel, there's a glass substrate containing multiple metal conductors that pass through it. Additionally, metal bumps are positioned between the glass substrate and the display panel, with one metal conductor connected to a contact pad on the display panel.
- Independent Claim 12: This claim focuses on a chip package. It comprises a glass substrate with top and bottom surfaces, and multiple metal plugs that extend entirely through the glass from the top surface to the bottom surface. The metal plugs are characterized by having the same area at both the top and bottom surfaces. Importantly, the top surfaces of these metal plugs are level (substantially coplanar) with the top surface of the glass substrate, and similarly, the bottom surfaces of the metal plugs are level with the bottom surface of the glass substrate.
- Independent Claim 13: This claim describes a method for creating a glass substrate. The method involves stretching multiple metal traces to a specific length and arranging them with certain spacing (pitch). A thermal resistance layer is then applied and cured around these traces. Next, a fixed layer is formed on the thermal resistance layer to secure the traces. Finally, a liquid glass layer is introduced, filling a mold around the fixed layer and traces, and then solidified to form the glass substrate with the metal traces embedded within it.
- Independent Claim 17: This claim outlines a manufacturing process for a glass substrate containing through-glass vias (TGVs). It involves using a metal trace block composed of multiple metal plates (first, second, and third) that are fastened together. This block defines the shapes and locations of the future TGVs. A mold is then placed around this metal trace block, and liquid glass is poured into the mold and subsequently solidified. After solidifying, the mold is removed, and the glass is cut to separate the desired glass substrate, which will contain the metal plugs formed from the original metal trace block.
Generated 5/26/2026, 6:48:50 PM