US 11841803

Patent Summary: US 11,841,803

A detailed analysis of United States Patent 11,841,803 reveals a system for enhancing graphics processing power by interconnecting multiple smaller graphics processing unit (GPU) "chiplets" to function as a single, powerful GPU.

Title: GPU chiplets using high bandwidth crosslinks

Assignee: The patent was originally assigned to Advanced Micro Devices, Inc. As of a reassignment on November 18, 2024, the current assignee is Onesta IP, LLC.

Inventors:

• Skyler J. Saleh
• Samuel Naffziger
• Milind S. Bhagavat
• Rahul Agarwal

Filing Date: June 28, 2019

Issue Date: December 12, 2023

Abstract: The patent describes a chiplet system where a central processing unit (CPU) is connected to a first GPU chiplet in an array of multiple GPU chiplets. This first chiplet is, in turn, connected to a second GPU chiplet through a "passive crosslink." This crosslink is a dedicated passive interposer die designed for communication between the chiplets, allowing the system to partition the functions of a larger system-on-a-chip (SoC) into smaller, more manageable chiplet groupings.

Overview of Independent Claims

The patent includes three independent claims which form the core of the invention. In plain language, they are:

Claim 1: The fundamental system. This claim outlines the basic architecture of the invention. It describes a system comprising a CPU linked to a "first" GPU chiplet. This first chiplet is then connected to a "second" GPU chiplet using a passive crosslink that is specifically dedicated to handling communications between the chiplets. This creates a multi-chiplet GPU array.

Claim 11: The method of operation. This claim details the process of how the system functions. It starts with the first GPU chiplet receiving a memory access request from the CPU. A controller on this first chiplet then determines which chiplet in the array (the "caching GPU chiplet") holds the requested data. The request is then routed through the dedicated passive crosslink to the last-level cache of the identified chiplet. Finally, the requested data is sent back to the CPU.

Claim 16: The non-transitory computer-readable medium. This claim covers the software aspect of the invention. It describes a storage medium (like a hard drive or RAM) containing executable instructions. When a processor runs these instructions, it performs the method outlined in Claim 11: receiving a memory request, determining the location of the data on one of the GPU chiplets, routing the request via the passive crosslink, and returning the data.

Litigation Search

As of April 26, 2026, a search of the dockets for the U.S. Court of Appeals for the Federal Circuit (CAFC) for the year 2026 did not reveal any cases involving US Patent 11,841,803.