Invalidity dossier
US 8898494
Current assignee: Daedalus Prime LLC
Added 9/23/2026, 6:49:17 PM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview — US 8,898,494 B2
Title: Power budgeting between a processing core, a graphics core, and a bus on an integrated circuit when a limit is reached.
Patent number / application: US 8,898,494 B2, application US 13/398,641; published as US 2013/0159741 A1.
Inventors: Travis T. Schluessler and Russell J. Fenger. Original assignee: Intel Corp. A reassignment to Daedalus Prime LLC is listed on 2022-06-06.
Dates (from the supplied text): priority date 2011-12-15; filed 2012-02-16; published 2013-06-20; granted 2014-11-25; legal status Active, with adjusted expiration 2032-04-01. Google's status and priority entries are expressly described as assumptions, not legal conclusions.
Purpose (as stated in the excerpt): The disclosure "pertains to energy efficiency and energy conservation in integrated circuits, as well as code to execute thereon, and in particular but not exclusively, to balancing power and performance between processing elements and/or a communication bus." The background notes that a system on chip (SOC) with a host processor and graphics processor "usually implements power savings policies individually and separately," and that a package-wide power policy "often only contemplates assumed power requirements for each of the individual devices without balancing power and performance amongst asymmetric cores to achieve maximum overall performance."
Plain-language scope: Per the title and definitions, the patent addresses budgeting power across three on-chip consumers — a processing core, a graphics core, and a bus — when a power limit is reached. The excerpt lists figure topics only: logical representations of a system with a multi-processing element processor and integrated graphics processor (FIG. 1) and of computer system configurations (FIGs. 2–4), with FIG. 5 beginning an unspecified embodiment. Classifications include G06F1/3203, G06F1/3234, G06F1/3253 (power saving in bus), G06F1/329 (task scheduling), and G06F9/5094 (resource allocation considering power or heat).
What the excerpt does not establish: No claims, detailed description, or figure content are included, so the specific budgeting method, claim scope, and FIG. 5 subject matter are not shown. No prior art is identified here.
Generated 10/1/2026, 9:42:32 PM
Cases on file (4)
Group view →Specific litigation cases in our database that name US patent 8898494. The free-form analysis below may also discuss cases beyond this list.
- Daedalus Prime LLC v. Samsung Electronics Co., Ltd. et al.filed Sep 12, 20222:22-cv-00352U.S. District Court for the Eastern District of Texasstayed
Defendants: Samsung Electronics Co., Ltd., Samsung Electronics America, Inc., Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC)
Other patents asserted: 10049080, 8775833, 9831306, 10319812, 10700178, 11251281, 10705588
- Daedalus Prime LLC v. Arrow Electronics, Inc. et al.filed Aug 23, 20221:22-cv-01107U.S. District Court for the District of Delaware (Judge Richard G. Andrews)terminated Mar 1, 2023closed/terminated
Defendants: Arrow Electronics, Inc., Avnet, Inc., Digi-Key Corp., and 6 others
Other patents asserted: 10049080, 8775833, 9575895, 10394300, 10705588
- Daedalus Prime LLC v. Mazda Motor Corp. et al.filed Aug 23, 20221:22-cv-01108U.S. District Court for the District of Delaware (Judge Andrews)closed
Defendants: Mazda Motor Corp., Mazda North American Operations, Mazda Motor of America, Inc., and 6 others
Other patents asserted: 10049080, 8775833, 9575895, 10394300, 10705588
- Daedalus Prime LLC v. Avnet, Inc. et al.filed Aug 23, 2022337-TA-1332U.S. International Trade Commission (Section 337)terminated Feb 27, 2023terminated
Defendants: Avnet, Inc., Digi-Key Electronics, Mercedes-Benz Group AG, and 6 others
Other patents asserted: 10049080, 8775833, 9575895, 10394300, 10705588
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
Current assignee: Daedalus Prime LLC
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.
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This patent in court (4)
4 tracked lawsuits name US 8898494.