US 10705588

Patent Overview: US 10,705,588 B2

Title: Enabling a non-core domain to control memory bandwidth in a processor

Patent number: US10705588B2

Application number: US16/249,103 (published as US20190212801A1)

Inventors: Avinash N. Ananthakrishnan, Inder M. Sodhi, Efraim Rotem, Doron Rajwan, Eliezer Weissmann, Ryan Wells

Original assignee: Intel Corp. (Current assignee listed as: Daedalus Prime LLC)

Priority date: 2011-10-27

Filing date: 2019-01-16

Publication date: 2020-07-07

Anticipated expiration (per source): 2031-10-27

Purpose: Processors have evolved from independent integrated circuits to multicore processors, and are being extended with additional functional units. Different circuitry can have differing frequency needs based on workload, but suitable mechanisms to ensure appropriate operating frequencies are not available. A shared interface to a shared cache or system memory is typically operated at a constant fixed frequency or tied to the processor core frequency.

Plain-language scope: In a multi-domain processor (e.g., a core domain, a non-core domain, and a system agent domain), the non-core domain is enabled to control the memory bandwidth available to it. Memory bandwidth can be realized via an interconnect structure, namely a ring interconnect that is part of the core domain; a multi-domain processor can also include an independent interconnect domain. A non-core domain can be coupled to shared memory such as a last level cache and system main memory via an interconnect structure. The interconnect frequency can be at the maximum frequency of all active cores; if the processor is power- and/or thermally limited, the interconnect frequency drops along with core frequency. Because interconnect frequency impacts effective memory bandwidth available to the non-core domain, it significantly affects non-core domain performance, but higher interconnect frequency costs higher power consumption in the core domain. Embodiments may use a mailbox interface to dynamically optimize power/performance for a workload executing on a non-core domain. The non-core domain can be a graphics domain including one or more graphics engines.

What the excerpt does not establish: It does not provide the full claims, detailed description, exact mailbox signaling mechanics, or the specific mapping-table update method. It does not establish litigation outcomes, validity, or prior-art scope. Litigation and reassignment entries appear in the source but are outside this overview's scope.

Source: https://patents.google.com/patent/US10705588/en