US 7920018

Summary of US Patent 7920018

Title: Booster circuit

Current Assignee: Advanced Memory Technologies LLC (as of April 22, 2024)

Inventor: Seiji Yamahira

Filing Date: July 14, 2010

Issue Date: April 5, 2011

Abstract: A boosting circuit comprises a first boosting cell row and a second boosting cell row. The boosting circuit further comprises an analog comparison circuit for comparing the potential of boosting cells on the same stage, and selecting and outputting the lower or higher of the potentials. The potential of an N well is controlled using the output potential of the analog comparison circuit. Thereby, the amplitude of an N well potential can be suppressed, and a single N well region can be shared.

Independent Claims Overview:

Claim 1:
This claim describes a booster circuit featuring two rows of boosting cells (a first row with N stages and a second row with M stages). Each boosting cell includes a switching element within a triple-well structure (a first-conductivity type first well region on a substrate, and a second-conductivity type second well region within the first well region). These switching elements transfer charges between a first and a second terminal. A key feature is at least one analog comparison circuit that compares the input potentials of boosting cells on the same stage from both rows. This analog comparison circuit then outputs a "well bias potential," which is applied to the first well region of the switching element in at least one boosting cell of both rows. The purpose of this control is to reduce current consumption and layout area while suppressing the substrate biasing effect of the switching elements.

Claim 12:
This claim describes a booster circuit also having a first boosting cell row (N stages, N≧2) and a second boosting cell row (M stages, M≧2), each with boosting cells. Similar to Claim 1, each boosting cell includes a switching element in a triple-well structure, configured to transfer charges between a first and second terminal. A distinguishing feature of this claim is that the potential of the first well region of the switching elements in the boosting cells, specifically those on the second stage or succeeding stages in both rows, is controlled based on the input potentials of boosting cells from the first and second boosting cell rows. Crucially, the input potential for each boosting cell in the first row is different from the input potential of each boosting cell in the second row.

CAFC 2026 Dockets:

A search for CAFC 2026 dockets related to US7920018B2 did not yield specific docket entries in the provided search results. The search returned general information on how to access case information from the U.S. Court of Appeals for the Federal Circuit, but no specific cases mentioning US7920018B2 within the 2026 dockets were found. Therefore, I cannot definitively report on any active CAFC litigation for this patent at this time with the information available.