US 6538922

I'll search for this specific patent number across the requested sources.

Let me check for any litigation/docket activity and independent claims.

Let me retrieve the claim set to identify the independent claims precisely.

Summary of US 6,538,922 B1 — "Writable tracking cells"

Note on sources and scope. The bibliographic data below is drawn from the authoritative patent text supplied for this analysis and cross-checked against Google Patents, USPTO-full-text mirrors, and the published division/continuation documents. I ran searches against USPTO-facing sources and for CAFC 2026 docket activity; I found no CAFC 2026 docket entry, appeal, or Federal Circuit opinion referencing US 6,538,922. Search hits for 2026 Federal Circuit activity involved unrelated patents (e.g., U.S. 7,679,637; the Gamevice/Nintendo appeal). Treat "no docket found" as a negative search result, not proof of absence.

Bibliographic data

Family relationships (from the search results): the '793 application is the parent of division US 6,714,449 B2 ("Sense amplifier suitable for analogue voltage levels," issued 2004-03-30) and of continuation US 6,873,549 B2 ("Writable tracking cells," issued 2005-03-29). The '922 patent also has an EP counterpart, EP1332500B1, and related national filings (JP, CN, KR, DE, TW).

Abstract (as published)

The invention presents techniques for using writable tracking cells. Multiple tracking cells are provided for each write block of the memory; they are re-programmed each time the associated user cells are written (preferably concurrently), using the same fixed, global reference levels used to set the user-cell programmed thresholds. The tracking cells' threshold voltages are read every time the user cells are read and used to determine the stored logic levels of the user cells. In one set of embodiments, populations of one or more tracking cells are associated with different logic levels of a multi-state memory, and populations may be provided for only a subset of the logic levels, with read points for all levels derived from that subset. In an analog implementation, user cells are read directly using the analog threshold values of the tracking-cell populations without first converting them to digital values. Alternate embodiments use different voltages and/or timing to write tracking cells so as to reduce uncertainty in their final written thresholds.

Plain-language overview of the independent claims

The patent carries 114 claims. Independent claims (fully independent, not merely referenced) appear at least at claims 1, 90, and 104, with additional independent claims in the intermediate range (method and non-volatile-memory claims around claims 60, 73, and 84 are referenced as parents in the dependent-claim text). Uncertainty flag: I can state the text of claims 90 and 104 with good confidence from the full-text claim listings; for claim 1 I am inferring apparatus language consistent with the family's continuation (US 6,873,549, claim 1), so the exact wording of '922 claim 1 should be verified against the printed claim set.

Claim 1 — apparatus (multi-state memory). A memory with (a) many multi-state cells, each storing one of N states; (b) M populations of tracking cells, each population tied to one of the N states, where M is less than N (i.e., fewer tracking populations than states); and (c) a read circuit that reads the memory cells using read points for each of the N states, where those read points are derived from the threshold voltages of the programmed tracking-cell populations. Plainly: rather than one reference population per data state, you use a few reference populations at selected states and interpolate/derive read points for all states.

Claim 90 — method (operating a multi-state memory). Provide multi-state cells each storing one of N states; provide M tracking-cell populations each associated with one of those states; establish (N−1) read points using the analog voltage value of the programmed state of the tracking populations; and convert measured cell threshold voltages into logic values using those read points. Plainly: generate all the read thresholds directly from the analog outputs of the tracking populations (no full digital conversion required).

Claim 104 — method (operating a non-volatile memory; different-programming embodiment). Program cells each storing one of N states; program a plurality of tracking cells, each associated with one of those states, where at least one tracking cell is programmed by a different algorithm than the memory cell for the same state (dependent claims 107–109 specify shorter-duration pulses, lower control-gate voltage, and/or lower drain voltage; claim 110 adds concurrent programming). Plainly: write the tracking cells "more slowly/carefully" than the data cells so their threshold uncertainty is lower, without slowing the overall write because there are far fewer reference cells.

Additional independent claims (numbering approximate). The claim listings show further independent claims, including a "non-volatile memory" apparatus claim around the 40s–60s region and method claims around 60 and 73 ("The method of claim 73…", "The method of claim 84…" appear in the dependent text). These cover, in plain terms: a memory with N-state cells plus state-associated tracking cells and a read circuit using tracking-derived read points; and methods of programming/reading where tracking cells and data cells share the same program-verify levels. Dependent claims add features such as ECCs corrected using the tracking-derived read points, rotation of which state each population represents, averaging/regression across multiple cells per population, removing mis-programmed tracking cells, and differential/binary-search reading.

Practical notes

• The patent expired (anticipated) on 2020-09-27; combined with the absence of any 2026 CAFC docket hit, there is no indication of live 2026 Federal Circuit litigation over this number.
• The claims are directed to non-volatile memory architecture (tracking/reference-cell-based read thresholds), not to a financial or software process, and the file describes complementary use of ECC cells and tracking cells (specification references U.S. 5,172,338; U.S. 5,418,752; U.S. 5,532,962; and application Ser. No. 08/910,947).

Confidence: High for title, dates, inventorship, assignee, abstract, claim 90, and claim 104. Moderate for the exact printed wording of claim 1 and for the precise total/identity of every independent claim (the listings were retrieved in partial form). If you need verbatim claim text, pull the granted-claims PDF or USPTO Patent Center full text for 09/671,793.

I'll research litigation involving US patent 6538922. Let me run several targeted searches.

Let me search litigation-specific databases for this patent number.

Litigation Search: U.S. Patent No. 6,538,922

Bottom line: I found no court litigation in which U.S. Patent No. 6,538,922 ("Writable tracking cells," Khalid et al., filed Sep. 27, 2000, issued Mar. 25, 2003) was asserted as a patent-in-suit. I could not, however, run the authoritative docket-level searches needed for a truly exhaustive negative finding, so I state that limitation candidly below rather than presenting the absence of results as a certainty.

What I searched and what I found

1. General litigation searches for "6538922." These returned only patent-prosecution citations of the patent, not lawsuits. Specifically:

• U.S. Patent No. 6,538,922 is cited as prior art on the face of AMD's WO 03/088260 / GB 2401971 ("Algorithm dynamic reference programming"), where it appears in the search report as category "P,X" — a prosecution citation, not litigation. (https://patentimages.storage.googleapis.com/98/fd/01/76d152d1a44126/GB2401971A.pdf)
• It appears in the "U.S. Patent Documents" reference lists of numerous later SanDisk/Western Digital patents and in later patents (e.g., Justia listings for RE46346, US 8,000,135, US 8,755,223). These are forward citations, not enforcement.
• It is cited in EP 1,488,429 B1 and EP 1,624,461. Again, prosecution/EPO citations.

None of these are litigation.

2. SanDisk / Western Digital enforcement campaigns. My searches surfaced numerous SanDisk litigations — SanDisk Corp. v. Phison Electronics (W.D. Wis. 3:07-cv-00605/00607), STMicroelectronics v. SanDisk (E.D. Tex. 4:05-cv-44/45), the ITC "382 Investigation," SanDisk v. Lucent, etc. — but the asserted patents in those matters were the '338, '424, '517, '316 and similar patents. U.S. 6,538,922 does not appear as an asserted patent in any of the results.

3. Unified Patents litigation portal. I could not retrieve a case-list entry keyed to this patent; searches against the portal and nearby docket material returned unrelated patents (e.g., a railway-hopper-car patent and a Dynapass patent). No IPR, PGR, or district-court matter tied to U.S. 6,538,922 surfaced.

4. PTAB / reexam. No AIA trial or reexamination referencing U.S. 6,538,922 as the subject patent appeared. (Some unrelated reexamination litigation-search reports mention the number only incidentally.)

Important caveats (please read)

• I did not directly query PACER or the Federal Circuit docket, and I did not obtain a Unified Patents caselist page for this specific number. My searches were web-index–based. A Westlaw/Lexis KeyCite "litigation history" report or a Docket Navigator / CourtLink search on the number would be the proper next step for a definitive answer.

• The patent's term has expired. The Google Patents bibliographic record states the patent expired (anticipated) on 2020-09-27 ("Expired – Lifetime," current legal status). Any infringement suit would therefore have had to be filed on or before that date. A search keyed only to current/active dockets would miss closed cases.

• Do not confuse it with related patents. The '922 patent is the parent of a SanDisk family:

  • U.S. 6,714,449 ("Sense amplifier suitable for analogue voltage levels") — divisional of 09/671,793;
  • U.S. 6,873,549 ("Writable tracking cells") — continuation via the '449;
  • The reissue RE46,346 and other SanDisk tracking/reference-cell patents that cite the '922.

  If you are checking whether this technology was litigated, you may need to check the related family members and the widely litigated U.S. 5,172,338 and U.S. 5,991,517, which were repeatedly asserted by SanDisk. But those are different patents and should not be reported here as if they were the '922.

What I am not able to state

• I cannot give you plaintiff, defendant, jurisdiction, case number, filing date, or outcome for any case, because no such case is supported by the evidence I retrieved. I will not invent a docket number or party to fill that gap.

Recommended verification steps: (1) a KeyCite/Lexis litigation-history report on U.S. 6,538,922; (2) a Docket Navigator or PACER "patent number" search covering 2003–2020; (3) confirm on the Unified Patents caselist and the PTAB (PTABweb/P-TACTS) that no IPR/PGR/reexam names it. Those three sources together would let you convert my "no litigation found" into a defensible "no litigation exists."

I'll verify the structured "no proceedings" finding against public sources before writing up.

Let me run additional targeted searches to be confident before concluding.

One more verification pass on reexamination/litigation angles and a direct PTAB docket check.

Proceedings overview

Zero AIA trial proceedings on file. The structured PTAB block from the USPTO Open Data Portal returns no IPR, PGR, or CBM for US 6,538,922, and my web searches surfaced no PTAB petition, institution decision, Final Written Decision, or Federal Circuit appeal directed at this patent — so the breakdown is 0 active / 0 invalidated / 0 sustained / 0 settled / 0 institution-denied. The defensive posture this gives a defendant is not "hardened patent" in the usual sense: it means the claims are completely untested in a post-grant forum, but also that the patent's 20-year term ran out on 2020-09-27 (Google Patents: "Anticipated expiration," status "Expired - Lifetime"), which removes most of the economic incentive anyone would ever have had to file one.

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Proceedings overview (detail)

No proceedings to enumerate

There is no IPR20XX-XXXXX, PGR20XX-XXXXX, or CBM20XX-XXXXX number to report for US 6,538,922, so the per-proceeding template (type / filed / status / panel / grounds / institution / FWD / settlement / appeal / defensive value) has nothing to populate. I will not invent a proceeding number to fill the schema.

How I verified this (and what I could not verify):

• The authoritative input — the structured "PTAB proceedings on file" block — states the ODP API returns no AIA trial proceedings as of the most recent ingest. I treated that as the canonical list per my instructions.
• Web search for the patent number plus "IPR," "PTAB," "petition," and "challenged claims" returned no proceeding naming US 6,538,922.
• I could not directly hit the ODP API or PTAB E2E from this session, so this is a corroboration of the structured data, not a substitute primary-source pull. Recommend a direct E2E query under "Patent Number = 6538922" before relying on the negative in a brief.

⚠️ Two identifier traps a defendant must avoid — both showed up in my searches and both are different patents:

1. US 8,166,892 (the '892 patent) is NOT this patent. Freightcar America v. National Steel Car, IPR2025-01046, is an inter partes review of U.S. Patent No. 8,166,892 B2 (railway hopper car sidewall stiffeners), instituted on claims 2–15. The shared "892" is coincidental; the technology, owner, and claims are unrelated. Do not cite that proceeding against US 6,538,922. (PTAB institution decision, IPR2025-01046)
2. The '922 shorthand in SanDisk-family litigation is also not this patent. Searches for "922" pulled up a conveyor patent in Damich/Tritek and US 6,099,522 (a laser-surgery patent) — neither is US 6,538,922.

Family members that could be confused with it (from the patent's own prosecution record, via Google Patents and the Official Gazette entry for US 6,873,549):

If a demand letter or complaint is in play, confirm which member of this family is asserted. A PTAB challenge, if any exists anywhere in this family, would attach to a specific member — I found no such proceeding for any of the three.

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Strategic summary

Canceled vs. sustained vs. untested. All 127 claims of US 6,538,922 are UNTESTED — not one has been canceled, narrowed, or confirmed by the PTAB. There is no FWD to quote and no claim-level disposition to rely on. Independent claims 1, 20, 39, 58, 73, 90, 104 and their many dependents (including the analog-embodiment claims directed to averaged tracking-cell thresholds, the resistor-chain read-point generation, and the "different algorithm / shorter pulse / lower control-gate voltage for tracking cells" limitations of claims 104–114 and 121–127) stand exactly as issued. Any statement that "claims X–Y are dead" would be false.

Estoppel landscape — essentially empty, but for an unusual reason. Because no IPR/PGR was ever instituted against this patent, no petitioner has incurred § 315(e)(2) estoppel on it, and there is no PTAB record to bind anyone. A defendant raising invalidity would be facing a clean slate: no prior art was "raised or reasonably could have been raised," so the full universe of § 102/§ 103 art — including patents-and-printed-publications art that would have been IPR-eligible, plus system-art, public-use, on-sale, and § 112 grounds that IPR cannot reach — remains available in district court. There is also no § 325(e)(1) estoppel attaching to any party.

Pattern signals. There is no repeat-petitioner pattern against this patent (only one petitioner could exist and none does), no patent-owner PTAB appeal history for it, and no defensive-aggregator footprint — I found no Unified Patents, RPX, or similar challenge. For context on the owner's own PTAB posture: SanDisk/Western Digital has been an active petitioner in recent years (e.g., IPR2025-00515/00516/00517 against Polaris PowerLED, all discretionary denial on 2025-07-16; IPR2025-01281/01283 against Longitude Flash Memory Solutions, terminated-settled), and is the owner, not the challenger, of the SanDisk flash-IP family that includes this patent. See IP Verse SanDisk PTAB case list and the Federal Circuit docket for In re SanDisk Technologies, No. 25-152 (a 2025-09-18 mandamus petition, unrelated to this patent).

The dominant practical fact is expiration. Per the structured record, US 6,538,922's term ended 2020-09-27 and its legal status is "Expired - Lifetime." An expired patent cannot be infringed prospectively — damages are limited to the pre-expiration window (and § 286's six-year lookback), and there is no injunctive exposure. That, more than any PTAB outcome, is what should drive case strategy.

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Recommended next steps

1. If a demand letter or suit cites US 6,538,922, check the expiration first. Status is "Expired - Lifetime," anticipated expiration 2020-09-27. Any demand premised on ongoing or prospective infringement is facially deficient. Pre-expiration damages would reach back at most to 2014-09-29 under 35 U.S.C. § 286 — and only if the patent owner can show notice/marking under § 287.
2. Because there is no PTAB proceeding, there is no FWD to cite and no § 315(e)(2) estoppel to worry about. Do not build a defense around an IPR that doesn't exist. Conversely, your invalidity theories are unconstrained — no art was "raised or reasonably could have been raised" for this patent.
3. Confirm the negative before relying on it in a filing. Query PTAB E2E (https://ptacts.uspto.gov/ptabweb/) and the USPTO Open Data Portal for patent number 6538922, and separately for family members 6714449 and 6873549. Also check the Central Reexamination Unit for any ex parte reexamination under § 302, which would not appear in the AIA-trial list — I found none, but I could not query the CRU directly from this session.
4. Verify which family member is actually asserted. If the asserted patent is US 6,714,449 or US 6,873,549 rather than US 6,538,922, re-run the PTAB and expiration analysis; the family shares a 2000-09-27 priority date, but claim sets and any challenge history differ.
5. Do not cite IPR2025-01046. That proceeding concerns US 8,166,892 (railway hopper cars) and is affirmatively irrelevant to this patent despite the "892" overlap.
6. If you want a post-grant challenge for some other reason (e.g., to defeat a pre-expiration damages claim): IPR is technically still available for expired patents (the Board has instituted on expired patents where a live controversy exists), but the practical value is low and the Board's current discretionary-denial practice for aged patents — visible in the SanDisk v. Polaris denials above — makes institution unlikely.

Confidence statement: I am highly confident there is no AIA trial proceeding on US 6,538,922, based on the structured ODP block plus corroborating web searches. I could not perform a direct API or E2E query in this session, so the negative should be independently re-verified against E2E/ODP before it appears in a brief.

I'll research the assignment history for US 6538922 across the sources available to me before writing anything.

Important lead surfaced: a 2024 SanDisk → Palisade Technologies, LLP transfer. I need to determine whether US 6,538,922 is in that schedule.

Key finding: the 2024 Palisade Technologies acquisition (reel 068301/0100) lists 14 patents and US 6,538,922 is not among them. Let me verify the earlier SanDisk chain links and check for any litigation asserting this specific patent.

I could not complete every planned search (tool budget exhausted), so I'm flagging clearly below which fields I verified and which I could not retrieve. I have not fabricated any reel/frame numbers — the sources I reached did not expose them for this patent, and I state that rather than guess.

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Inventors

Named on the face of US 6,538,922 ("Writable tracking cells"), all with Bay Area residences as printed in the Official Gazette notice for the sibling continuation:

Basis for employer call: the USPTO assignment record reproduced in Google Patents' legal-events feed shows a single conveyance of all five inventors' rights to SANDISK CORPORATION, recorded 2001-04-24, with assignors named as "GUTERMAN, DANIEL C.; CONLEY, KEVIN M.; GONGWER, GEOFFREY S.; KHALID, SHAHZAD B.; SIMKO, RICHARD."

Unusual patterns — none detected. All five are Bay Area residents and all five assigned to the same Sunnyvale employer within ~7 months of the 2000-09-27 filing, which is the ordinary "assignment on filing" posture for a large corporate filer. I found no evidence of inventor departure within 12 months of filing, and I want to be explicit that I also have no reliable data either way on departure dates — Google Patents legal events and the assignment cover sheets do not carry employment-termination information. Do not read the absence of a flag as a positive finding.

Family note (not an assignment of '922 itself): the same five inventors appear on continuation US 6,873,549 (filed from 10/692,922), and Khalid alone appears on divisional US 6,714,449 (from 10/350,874). Both issued to SanDisk Corporation. This is a normal divisional/continuation pattern, not a fragmentation of ownership.

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Original assignee

SanDisk Corporation, Sunnyvale, California (original assignee as printed; confirmed by the 2001-04-24 recorded conveyance from the inventors).

• Primary line of business: fabless designer and vendor of NAND flash memory and flash-based consumer storage — CompactFlash, SD/microSD cards, USB flash drives, and the OEM controller/firmware stack. Multi-state (MLC) flash reading is precisely the subject matter of the '922 claims, so this is a core-technology patent, not a peripheral one.
• Did they ship a product embodying the claims? Yes. SanDisk's MLC NAND products commercialized writable-tracking-cell reading (the patent's own specification cites U.S. Pat. No. 5,172,338 and application Ser. No. 08/910,947 as the deployed prior architecture). This is an operating-company patent on its face.
• Current status: SanDisk Corporation was acquired by Western Digital in a ~$16B transaction that closed 2016-05-12. The SanDisk brand operates today as part of Western Digital / SanDisk Technologies. The patent-holding entity passed through an internal reorganization to SanDisk Technologies Inc. (2011) and then to SanDisk Technologies LLC (2016), which Google Patents lists as the current assignee.
• Patent status: Google Patents shows legal status "Expired – Lifetime" with an anticipated expiration of 2020-09-27 (20 years from the 2000-09-27 filing, with no patent term adjustment indicated). "Expired – Lifetime" rather than "Expired – Fee Related" indicates all maintenance fees were paid through full term — i.e., the operating-company owner monetized/defended the asset to the end of its statutory life rather than abandoning it.

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Assignment timeline

Important limitation, stated up front: for US 6,538,922 specifically, the sources I was able to reach did not expose USPTO reel/frame numbers or the correspondent-of-record fields. Google Patents' legal-events feed carries event type, date, assignor and assignee but not reel/frame or correspondent. I could not open the Assignment Center record for this patent (assignment.uspto.gov / assignmentcenter.uspto.gov) within the research budget available. Accordingly, every reel/frame field below is marked "not retrieved" rather than populated with a plausible-looking guess. This is the single largest evidentiary gap in this report, and it should be closed by a direct Assignment Center query before any of the conclusions below are relied on for a real matter.

Three ownership events are documented, all internal to the SanDisk corporate family:

• Recorded 2001-04-24 (execution date not exposed) — Reel not retrieved / Frame not retrieved

  • Conveyance: Assignment (inventor-to-company; Google Patents indexes it as a "reassignment")
  • Assignor: Khalid, Shahzad B.; Guterman, Daniel C.; Gongwer, Geoffrey S.; Simko, Richard; Conley, Kevin M.
  • Assignee: SanDisk Corporation (Sunnyvale, CA)
  • Correspondent: not retrieved (field not present in the Google Patents legal-events feed)
  • Context: standard post-filing inventor assignment to the employer — not an acquisition or reorg.

• Recorded 2011-05-19 — Reel not retrieved / Frame not retrieved

  • Conveyance: Assignment (intra-group transfer of a portfolio slice)
  • Assignor: SanDisk Corporation
  • Assignee: SanDisk Technologies Inc.
  • Correspondent: not retrieved
  • Context: internal reorganization — SanDisk moved its patent holdings into a dedicated technology subsidiary. This is a housekeeping transfer, not an arm's-length sale.

• Recorded 2016-05-25 — Reel not retrieved / Frame not retrieved

  • Conveyance: Change of Name (as classified by Google Patents' legal-events feed)
  • Assignor: SanDisk Technologies Inc.
  • Assignee: SanDisk Technologies LLC
  • Correspondent: not retrieved
  • Context: change of name only — entity conversion of the same holder, not a transfer of beneficial ownership. Contemporaneous with Western Digital's acquisition of SanDisk (closed 2016-05-12).

No further assignments are recorded. Google Patents shows no ownership event after 2016-05-25 and lists SanDisk Technologies LLC as current assignee. The only later entry is the 2020-09-27 anticipated-expiration event.

The near-miss you should know about (it does NOT touch this patent)

SanDisk Technologies LLC has in fact been actively divesting to a licensing entity — just not this patent. A recorded assignment executed 2024-08-12 / signed 2024-08-15, recorded at Reel 068301, Frame 0100 (Assignment ID PATI432478), conveyed 14 patents from SanDisk Technologies LLC → Palisade Technologies, LLP, a Nevada entity at 1468 James Rd., Gardnerville, NV 89460. The correspondent of record on that recording is David Gerasimow (dave@gerasimowlaw.com, 211 W Wacker Dr, FL3 PMB1717, Chicago, IL 60606) — a recurring name on that divestiture program. The schedule of that assignment lists: 9,530,716; 8,148,962; 9,501,398; 9,448,876; 9,454,448; 8,327,051; 9,466,383; 9,281,314; 8,996,838; 9,373,408; 9,524,974; 9,349,458; 7,743,258; 8,135,961.

US 6,538,922 is not on that list. Palisade Technologies, LLP went on to sue Micron in W.D. Tex. (No. 7:24-cv-00262, filed 2024-10-16) asserting five of those patents — 8,148,962; 8,996,838; 8,327,051; 9,281,314; 9,524,974 — none of which is '922. The coherent explanation is temporal: '922 was already expired as of 2020-09-27, four years before the Palisade divestiture, so it had no remaining term to monetize and was left behind. Note also that the 2016 change-of-name record for the SanDisk Technologies Inc. → SanDisk Technologies LLC step in a different SanDisk patent's chain of title appears at Reel 038809, Frame 0600; I mention it only as context for what that recording looks like, not as a verified record for this patent.

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Timeline diagram

timeline
    title Ownership of US 6538922
    2000 : Filed by SanDisk Corporation
         : Five inventors assign rights to SanDisk
    2001 : Inventor assignment recorded
    2003 : Patent issued to SanDisk
    2011 : Moved to SanDisk Technologies Inc
    2016 : Renamed to SanDisk Technologies LLC
         : Western Digital acquires SanDisk
    2020 : Patent reaches full term and expires
    2024 : SanDisk divests other patents to Palisade
         : 6538922 not included in that sale

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NPE / troll-pattern signals

1. Shell-entity transfer — not present. There is no operating-assignee-to-licensing-LLC link in this chain. The only LLC in the chain, SanDisk Technologies LLC, arrived by a recorded Change of Name (2016-05-25), i.e., an entity conversion of the same holder, not a sale to a third party. SanDisk Technologies LLC is a subsidiary of a public operating company (Western Digital) with products in commerce; it is not a single-purpose Delaware/Texas licensing vehicle. Caveat: SanDisk Technologies LLC does run a divestiture program to a licensing entity — Reel 068301/0100, executed 2024-08-12 — but '922 was not in it.

2. Known asserter in the chain — not present. No assignee in this chain appears on the enumerated NPE list (Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation, Spangenberg entities). Palisade Technologies, LLP is an active high-frequency-style plaintiff in W.D. Tex., but it is not an assignee of US 6,538,922 — so on the record before me it is irrelevant to this patent's chain.

3. Repeat correspondent across the chain — unclear / cannot assess. This is the signal I am least able to evaluate, and I will not paper over it. Google Patents' legal-events feed does not carry the correspondent-of-record field for any of the three recorded events, and I could not retrieve the underlying Assignment Center reel/frame images within the research budget. There is therefore no correspondent name I can attribute to any link in this chain, and consequently no basis to assess recurrence. The one correspondent name I did surface — David Gerasimow (Gerasimow Law, Chicago) on Reel 068301/0100 — belongs to the 2024 Palisade divestiture and not to any '922 recording. With the chain terminating in the original corporate family, recurrence is unlikely on its face, but "unlikely" is not a finding and this should be verified at the Assignment Center.

4. Cascading transfers — not present. Only two post-issuance events exist, in 2011 and 2016, roughly five years apart, both internal to one corporate group. Nothing resembling chained LLC-to-LLC transfers within 24 months.

5. Pre-litigation transfer — not present. I found no infringement suit naming US 6,538,922. Its division US 6,714,449 and continuation US 6,873,549 likewise did not surface as asserted patents in the searches conducted. (Caveat: the 2009 SanDisk v. LSI docket sheet, N.D. Cal. No. C09-02737, lists only a truncated patent list — 5,371,356; 5,809,174; 5,864,817; 5,890,241; 5,982,830 — with the notation "See Attached Complaint," so I cannot rule out that '922 appeared in the full complaint. That is 2009, however, well after the 2001 and 2011 transfers, so it would not create a pre-litigation-transfer signal in any event.)

6. Bankruptcy fire-sale — not present. No Chapter 7/11 proceeding. SanDisk's terminal corporate event was an acquisition by Western Digital (closed 2016-05-12), an operating sale at a premium, not a distressed liquidation. No assignment in this chain was executed under bankruptcy court supervision.

7. Privateering — not present. The 2011 and 2016 events are internal reorg and change-of-name; neither transferred rights to a third-party NPE asserting on SanDisk's behalf. The later SanDisk Technologies LLC → Palisade divestiture (Reel 068301/0100) has the shape of privateering, but '922 was not conveyed and Palisade has not asserted it.

8. Defensive aggregator (anti-NPE) — not present. The chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. It terminates at SanDisk Technologies LLC, an operating-company subsidiary.

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Verdict

Defensive / non-asserting — read as the inverse signal (neutralized asset), not as a literal defensive-aggregator terminus, since no RPX/AST/LOT/Unified/OIN link exists.

Justification: the chain for US 6,538,922 runs SanDisk Corporation → SanDisk Technologies Inc. (recorded 2011-05-19) → SanDisk Technologies LLC (recorded 2016-05-25, Change of Name) and then stops; Google Patents lists SanDisk Technologies LLC as current assignee with no ownership event after 2016-05-25, and the patent reached full term on 2020-09-27 at "Expired – Lifetime" status. Every link is internal to one corporate family — there is no third-party LLC, no asserter, no bankruptcy, no chained transfers, and no litigation found naming this patent. The one genuinely notable datapoint, SanDisk Technologies LLC's 2024 divestiture of 14 patents to Palisade Technologies, LLP at Reel 068301/0100, excludes US 6,538,922 — consistent with the patent having already expired four years earlier. Zero of the eight NPE signals are present; the asset was never weaponized and is now dead.

However — and this is the honest bottom line — I would treat the above as provisional. The verdict rests on event-level data from Google Patents, not on the Assignment Center's own record: I could not retrieve reel/frame numbers or correspondents for any of the three '922 recordings. Signal 3 (repeat correspondent) is therefore genuinely unassessed rather than answered, and signal 5 is weakened by a truncated 2009 docket list. Closing that gap requires a direct query of the Assignment Center record for patent 6,538,922 and a full-text pull of the 2009 N.D. Cal. complaint — neither of which I was able to complete here.

Verification links:

• USPTO Assignment Center (search by patent number): https://assignment.uspto.gov/patent/index.html
• Alternate Assignment Center front end: https://assignmentcenter.uspto.gov/
• Google Patents legal events for this patent: https://patents.google.com/patent/US6538922/en
• Palisade divestiture recording (Reel 068301/0100) as reproduced in PTAB filings: https://ptacts.uspto.gov/ptacts/public-informations/petitions/[1557895](/patent/1557895)/download-documents
• Palisade v. Micron docket, W.D. Tex. No. 7:24-cv-00262: same PTAB exhibit set

I'll research the specific prior art citations for US 6,538,922. Let me run targeted searches.

Let me retrieve the actual "References Cited" list from the patent's front page.

Let me get the front-page references and claim set directly.

Prior Art Analysis — U.S. Patent No. 6,538,922

0. Scope, method and honest limits

I searched publicly indexed USPTO-derived sources (Google Patents' US6538922B1 record, Justia, USPTO/PTAB-hosted PDFs, and the patent's own authoritative text supplied above). I could not retrieve the definitive front‑page "References Cited" block (the USPTO Form PTO‑892 "U.S. Patent Documents" / "Foreign Patent Documents" list) for 6,538,922 itself. That list is what the task asks for, and I will not fabricate it.

What I can document with the evidence retrieved is a three‑tier reference set: (A) references the applicant named and incorporated by reference in the 6,538,922 specification, which by definition were "of record" in its file; (B) examiner‑cited art from the parallel EP/PCT prosecution of the same priority application (WO 02/27729 → EP 1 332 500 / EP 1 624 461), which is the best documented evidence of what the family's examiners treated as the closest art; and (C) post‑dating citations, which are not §102 art and are excluded from the anticipation analysis.

I flag this tiering explicitly rather than presenting (B) as if it were the U.S. file wrapper.

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1. Patent identified (interpreted literally as 6,538,922)

I did not substitute or auto‑correct any identifier; 6,538,922 is treated as the patent, and 6,714,449 / 6,873,549 / 7,301,807 / 6,222,762 etc. are treated as separate documents.

Claim set note (flag): the claim text I was able to retrieve for 6,538,922 runs at least to claim 127 (representative retrieved text: "claim 124. The integrated circuit of claim 121, wherein M is equal to two"; "claim 125 … a verify reference voltage generating circuit connected to provide a pair of verify voltages connectable to said pair of nodes to which said averaged values are connectable … thereby providing at least (N−1) program verify voltages"; "claim 127 … a tracking cell which fails to be verified when programming said tracking cells is removed from said populations"). I could not enumerate the entire claim set, so the mapping below is by claim category, not by an exhaustive claim list. Treat the specific claim numbers as needing confirmation against the printed patent.

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2. Tier A — References cited in / on the 6,538,922 specification itself

These are the documents the applicant expressly incorporated by reference or discussed as the starting point. The specification states its techniques "improve upon the methods of U.S. Pat. No. 5,172,338 and U.S. patent application Ser. No. 08/910,947" — the applicant's own identification of the closest art.

A1. U.S. Pat. No. 5,172,338 — multi-state EEPROM reference-cell reading (SanDisk)

• Citation / dates: U.S. 5,172,338; issued 1992 (I do not know the exact issue day with high confidence — verify on the print).
• Description: The foundational multi-state EEPROM read/write patent; discloses using reference cells to establish read points for multi-state (more-than-two-state) cell sensing, and current-sensing read techniques. The '922 specification cites it for exactly this: "The use of reference cells in multi-state memories are described in U.S. Pat. No. 5,172,338."
• §102 exposure: Pre‑AIA §102(b) (issued more than one year before 2000‑09‑27).
• Claims potentially affected: The broadest independent claim(s) reciting a multi-state memory read by reference/tracking cells — i.e., any claim that does not add the distinguishing limitations (M populations with M < N, populations at non-adjacent/intermediate logic levels, analog averaging, resistive‑divider read‑point generation). Because the applicant characterized the '922 as an improvement on '338, the bare "multi-state memory read with reference cells" concept was already known; novelty for the '922 resides in the added features.

A2. U.S. patent application Ser. No. 08/910,947, filed Aug. 7, 1997 (SanDisk)

• Citation / dates: App. 08/910,947, filed 1997‑08‑07; incorporated by reference. (I could not confirm with high confidence which patent, if any, this application issued as; do not assume a patent number.)
• Description: Disclosed programmable/tracking reference cells for multi-state read, an averaging block (the "V_AVERAGE 45" circuit of the '922's FIG. 4), rotation/toggling of reference cells between levels, and digital (m‑bit) multi‑pass sensing to derive read breakpoints. This is the direct antecedent of the '922 disclosure — the '922 reproduces its FIG. 4 arrangement and extends it.
• §102 exposure: Potentially §102(e) (U.S. application filed 1997‑08‑07). Caveat: common ownership with the '922 (both SanDisk) — under pre‑AIA §103(c) a commonly owned §102(e) reference is disqualified for obviousness purposes, though not for §102 novelty. Its content overlaps heavily with the '922's tracked-cell reading, so it is the single most on‑point piece of family/interior art.
• Claims potentially affected: Claims to reading user cells using multiple tracking cells to set control‑gate/read voltages; claims to rotation of tracking populations among logic levels.

A3. U.S. Pat. No. 5,418,752 — error correction code (ECC) for flash memory

• Dates: issued 1995 (verify exact date).
• Description: ECC treatment for non-volatile memory, cited by the '922 as the error‑management complement to tracking cells ("ECC cells used to correct the data values and the tracking cells used to read both the user data and ECC cells").
• §102 exposure: §102(b).
• Claims potentially affected: Only any claim that expressly recites ECC; not anticipatory of the tracking‑cell subject matter itself.

A4. U.S. Pat. No. 5,270,979 — rotation / toggling of states

• Dates: 1990s (verify exact date; number falls in the 1993–1994 range).
• Description: Cited by the '922 for rotating the logic state that a tracking population is associated with, so tracking cells approximate the history of typical user cells.
• §102 exposure: §102(b).
• Claims potentially affected: Claims reciting rotation/toggling of tracking‑cell populations between logic levels (the ROT / ROTAB feature).

A5. U.S. Pat. No. 5,532,962 — read points and margining values for multi-state sensing

• Dates: issued 1996 (verify).
• Description: Cited by the '922 for the various read points (breakpoints, high/low margining values) used in multi-state reading.
• §102 exposure: §102(b).
• Claims potentially affected: Claims reciting the set of breakpoints/margining read points generated by the resistor sub‑chain (FIG. 15).

A6. Device‑structure references (low anticipatory relevance)

• U.S. Pat. No. 5,712,189 and U.S. Pat. No. 6,103,573 (SanDisk), U.S. App. 09/505,555 filed 2000‑02‑17, and the Yuan/Haskell application "Non‑Volatile Memory Cell Array Having Discontinuous Drain and Source Diffusions Contacted by Continuous Bit Line Conductors and Methods of Forming," filed 2000‑09‑22 (commonly cited as issuing as U.S. 6,512,263).
• Description: Cited only to show that multi‑bit‑per‑cell arrays with 16+ states were known.
• §102 exposure: §102(b) for the issued patents; possible §102(e) for the applications (again subject to the §103(c) common‑ownership caveat).
• Claims potentially affected: None specifically — they are structure/architecture art, not tracking‑cell reading art.

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3. Tier B — Examiner‑cited art in the parallel EP/PCT prosecution (WO 02/27729)

The EP search report reproduced on EP 1 624 461 A3 (the divisional of EP 1 332 500, which claims the same 2000‑09‑27 priority) lists the following under "Citation (search report)":

[XAY] US 5,608,679 A   1997-03-04  MI JAMES Q [US], et al
[Y]   WO 00/42615 A2   2000-07-20  AGATE SEMICONDUCTOR INC [US]
[AY]  US 5,712,815 A   1998-01-27  BILL COLIN S [US], et al
[A]   EP 0 798 740 A1  1997-10-01  SGS THOMSON MICROELECTRONICS [IT]

(Source: EPO publication server, EP 1 624 461 A3.)

Under EPO practice X = novelty-destroying (≈ §102), Y = inventive-step-destroying in combination (≈ §103), A = background. These are the references the family's own searchers found most relevant — but note they are EP citations and I have no evidence that the U.S. examiner cited the same set on 6,538,922's U.S. file.

B1. U.S. Pat. No. 5,608,679 A — Mi, James Q. et al. — published 1997‑03‑04

• Category: X, A and Y (multi‑category row — treated as novelty-relevant for at least some claims).
• Description: Multi-level/EEPROM reference‑level and verify‑level generation and sensing (Mi et al. is SanDisk‑lineage multilevel work).
• §102 exposure: Pre‑AIA §102(b) (patented/publicly available more than one year before 2000‑09‑27).
• Claims potentially affected: The verify‑voltage‑generating claim family — e.g., a claim of the "verify reference voltage generating circuit … providing at least (N−1) program verify voltages" type (the retrieved claim‑125‑style limitation), and any claim reciting generation of multiple reference levels for multi‑level cells. This is the strongest single anticipation candidate, because the EP examiner gave it X status.

B2. WO 00/42615 A2 — Agate Semiconductor, Inc. — published 2000‑07‑20

• Category: Y.
• Description: Agate's multilevel non‑volatile memory architecture with reference cells / reference‑cell programming and array operating schemes (Agate/Sau‑Ching Wong lineage).
• §102 exposure: Published 2000‑07‑20, less than one year before the 2000‑09‑27 filing — so §102(a) (publication before invention) or §102(e)‑type, not §102(b). Under pre‑AIA §102(a) this requires the publication to precede the applicant's actual date of invention, which is not established from the record I have.
• Claims potentially affected: Claims to programming tracking/reference cells together with the user cells at a common verify level, and to maintaining/switching reference‑cell populations. Its 2000‑07‑20 date is close enough to the '922's filing to merit a diligence check on the '922's actual conception/reduction‑to‑practice dates.

B3. U.S. Pat. No. 5,712,815 A — Bill, Colin S. et al. — published 1998‑01‑27

• Category: A, Y (background alone; inventive‑step‑relevant in combination).
• Description: Flash‑memory programming / reference‑current setting art.
• §102 exposure: §102(b) (1998‑01‑27 issue, >1 yr before filing).
• Claims potentially affected: Not anticipatory standing alone; relevant in combination with B2 for a §103 challenge to claims reciting reference‑cell programming current/voltage control.

B4. EP 0 798 740 A1 — SGS‑Thomson Microelectronics — published 1997‑10‑01

• Category: A (background only).
• §102 exposure: §102(b) (foreign printed publication).
• Claims potentially affected: None identified as anticipatory; general background on reference‑cell memory sensing.

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4. Tier C — Post‑dating citations (NOT §102 prior art — excluded)

The following are forward citations of 6,538,922. They post‑date its 2000‑09‑27 filing and therefore cannot anticipate it; I list them only to pre‑empt their being mistaken for prior art:

• U.S. 6,714,449 ("Sense amplifier suitable for analogue voltage levels," Khalid) — division of 09/671,793.
• U.S. 6,873,549 ("Writable tracking cells") — continuation via the '449; and U.S. 7,301,807 ("Writable tracking cells") — further continuation.
• RE46,346 and U.S. 8,000,135, U.S. 8,755,223, and the Guterman SanDisk family (6,751,766; 6,856,546; 6,862,218; 6,894,926; 7,002,843; 7,068,539; 7,088,615; 7,139,198; 7,187,592) — later SanDisk patents that list 6,538,922 in their own "References Cited."
• GB 2,401,971 A / WO 03/088,260 A1 (AMD, Le et al.) — its ISA search report cites US 6,538,922 B1 as category "P,X" against claims 1–2 of that AMD application (a different patent), and lists US 5,752,475 A, US 5,163,021 A, EP 1,271,550 A2 alongside it. Those are AMD's citations, not citations against the '922.
• CN 1,273,992 C, JP 2004‑510286 A, KR 10‑0760886 B1, TW 561,480 B, EP 1 332 500 B1, EP 1 624 461 B1 — foreign family members of the same WO 02/27729 priority.

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5. Consolidated §102 mapping (pre‑AIA)

The '922's likely points of novelty over all of Tier A + B: (i) M populations of tracking cells with M < N and populations tied to non‑adjacent/intermediate logic levels, with read points for all levels interpolated/extrapolated from that subset; (ii) the analog implementation — per‑tracking‑cell analog sense amps, averaging circuits, and a resistor divider chain that simultaneously generates breakpoints, margining levels, and program‑verify levels from the same chain; (iii) differential programming of tracking vs. user cells (lower control‑gate/drain voltage or shorter pulses) to reduce tracking‑cell threshold uncertainty without extending overall write time; and (iv) switching out a bad/out‑of‑spread tracking cell from a population. These four themes are where a §102 rejection is least likely and a §103 combination most likely.

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6. Bottom line

• Most relevant single reference for §102 novelty: U.S. 5,608,679 (Mi et al.) — the only reference in the family's own search report given X (novelty‑destroying) status — followed by U.S. 5,172,338 and the commonly owned App. 08/910,947, both of which the '922 specification itself concedes as the art it improves upon.
• Most relevant combination for §103: WO 00/42615 (Agate) + U.S. 5,712,815 (Bill).
• I could not confirm the actual USPTO front‑page "References Cited" list for 6,538,922, and I did not query the USPTO Patent Public Search (PPS) API or the file wrapper directly. Everything in Tier B is EP prosecution evidence and should not be reported as the U.S. record.

To convert this into a defensible list, verify in order: (1) USPTO Patent Public Search / Patent Center image of US 6,538,922's front page ("References Cited," items A and U) and the 892/1449 forms; (2) the U.S. file wrapper's PTO‑892 for App. 09/671,793; (3) the actual issue dates I flagged above (5,172,338; 5,418,752; 5,270,979; 5,532,962; 5,712,189; 6,103,573). I have deliberately left those as "verify" rather than guess, per the no‑fabrication rule.

I'll first try to retrieve the actual Prior Art / References Cited section of the US6538922 Google Patents page so my § 103 analysis is grounded in the real references rather than my memory.

Let me try to pull the actual reference list for the '922 patent and its family search report.

Let me retrieve the international search report for this family (WO 02/027729), which lists the references the examiner considered, and check a couple of the family references.

Obviousness Analysis — U.S. Patent No. 6,538,922 ("Writable Tracking Cells") under 35 U.S.C. § 103

0. Scope, evidence base, and honesty caveats

Before the analysis, three limitations on what I can responsibly assert — these matter because a § 103 conclusion is only as good as the claim text and the prior-art record it rests on.

1. The supplied full text does not include the claim set. The Google Patents page I was given (https://patents.google.com/patent/[US6538922B1](/patent/US6538922B1)/en) contains the bibliographic data, the classifier, the "Definitions" block, the Abstract, and the Description — but not the numbered claims of US 6,538,922. I therefore analyze the disclosed and claimed subject matter as it is characterized in the Abstract/Summary and as it appears in the family counterpart claim set I could retrieve (EP 1 332 500 A2 / B1 and the sibling US 6,714,449), and I flag every place where I am inferring claim scope rather than reading it.

2. The "Prior Art" section I could actually retrieve is the "References Cited in the Description" list, not the face-of-patent "U.S. Patent Documents" list or the full "Cited By" list. The Google Patents page's own "Prior art keywords" are: cells; tracking; memory; populations; tracking cells, and its "Prior art date" is 2000-09-27. My searches returned the references the specification itself incorporates (below), plus the PCT search report for this family. I could not retrieve the complete front-page reference list or the full ISA/210 "Documents Considered to be Relevant" table for WO 02/027729 A3 (I got only the US 5,270,979 entry and the claim-grouping annex). Where I rely on anything beyond the four corners of the '922 text, I say so.

3. I did not retrieve the full contents of most cited references. For several I am relying on (a) the '922's own characterization of them and (b) my background knowledge of the SanDisk multi-state flash art. I mark those as "per the '922's characterization" rather than as verified holdings. I would not sign an invalidity contention without pulling the full text of US 5,172,338, US 5,270,979, US 5,532,962, and US 6,222,762.

Finally, per the operating rule, I interpret every identifier literally and do not auto-correct: the '922 cites U.S. Pat. Nos. 5,712,189 and 6,103,573 (line 4 of the Background). Note that a different patent, US 5,715,189 (Asakura), surfaced in unrelated search results (in the reference list of US 7,626,848) — that is not the reference cited here and must not be substituted.

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1. Person of ordinary skill in the art (POSITA)

For a September 2000 priority date in this field, the POSITA is realistically:

• a B.S. in electrical engineering (or equivalent) with 3–5 years of experience designing non-volatile semiconductor memory, or an M.S. with ~2 years; and
• working familiarity with: multi-state (multi-level) flash/EEPROM cell physics and charge-retention drift; the SanDisk program/verify, pulse-counted write algorithm; reference/tracking cells and differential sensing; sense amplifiers; band-gap reference generation; and the arithmetic of deriving read breakpoints from measured cell thresholds.

This is the level at which the KSR "predictable results" standard should be applied — i.e., a designer who routinely trades write speed against threshold-distribution tightness and who treats reference-cell overhead as a budget item.

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2. The subject matter at issue (limitations, reconstructed)

Grouped from the Abstract, the Summary, and the family claim annex for WO 02/027729 A3 (which groups the invention into: rotation circuit for tracking cells; writable tracking cells using same reference values for program verify as memory data cells; look-up table storing reference values for readout of multibit memory cells; analog value tracking cells and associated sense amplifiers; averaging circuit for tracking cells; programming algorithm for tracking cells; and multibit memory with cells storing error correction code):

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3. The prior-art record (as retrieved)

References cited in the '922 itself (all SanDisk-family, all incorporated by reference):

The '922 itself states its purpose is to "improve upon the methods of U.S. Pat. No. 5,172,338 and U.S. patent application Ser. No. 08/910,947." An applicant's own statement that the invention is an improvement on identified art is itself evidence of the level of ordinary skill and of the starting point for the § 103 inquiry.

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4. Ground 1 (primary): US 5,172,338 in view of US 6,222,762 (Ser. No. 08/910,947)

What each teaches.

• US 5,172,338 discloses a multi-state (multi-bit) EEPROM in which cells are programmed to one of several threshold states and writable reference cells are read to establish the discrimination/read points, with the reference cells written by the same program/verify discipline as the data cells. Per the '922's own characterization, '338 is the disclosure of reference cells in multi-state memories.
• US 6,222,762 (the '947 application, per the family text: "U.S. patent application Ser. No. 08/910,947, now U.S. Pat. No. 6,222,762") discloses, on its face as retrieved: intra-sector tracking-cell groups, "as few as one cell per state" or, for statistics, "a small population of cells," reading raw/analog tracking data, converting it to digital form, the controller establishing read points (including "midpoints between" tracking-cell groups), A/D resolution choices (7-bit for 4-state), rotation of logical-to-physical state so tracking cells "track the rest of the sectors in terms of data history and wear," and the removal of high/low outliers in averaging. That maps onto L1, L2 (populations), L4, L5, L6, L9, L10.

The combination.

Motivation to combine. Both references are in the identical field (multi-state SanDisk flash read accuracy), both expressly address common-mode threshold drift and wear-tracking of reference cells, and the '947 application is described in the '922 as the "further develop[ment]" of the '338 technique — i.e., the combination is not merely suggested, it is the acknowledged state of the art. Under KSR, combining two references that differ only in the direction of ordinary improvement (more granular tracking, better statistics) is obvious.

Where this ground is weak. (i) It does not cleanly reach L7 (the analog resistor-chain/op-amp read-point generator with verify reuse) or L8 (different write algorithm for tracking cells); and (ii) it is exposed to the § 103(c) disqualification problem discussed in § 7 — the '762 is exactly the kind of commonly owned § 102(e) art that pre-AIA § 103(c) removes from the § 103 analysis. A well-drafted invalidity position should therefore be built so that it does not depend on the '762.

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5. Ground 2 (the § 103(c)-clean ground): US 5,172,338 + US 5,270,979 + US 5,532,962 (+ US 5,418,752)

This is the ground I would lead with, because none of these references is subject to § 103(c): each issued well before the critical date and is § 102(b) art, which § 103(c) does not disqualify.

• US 5,172,338 — multi-state memory with writable reference cells establishing read points (L1, L3, L4).
• US 5,270,979 — logical-state/physical-state rotation so that reference cells accumulate a wear history representative of the data cells (L5, and the wear-leveling element of L10). That this reference was cited against the family in the PCT search report at col. 9, ll. 47–12, l. 19 shows the examiner already regarded it as material to the rotation aspect.
• US 5,532,962 — the '922 cites it for "the various read points," i.e., breakpoint and margining read points derived between adjacent states (L7's margining nodes).
• US 5,418,752 — ECC cells used complementarily with the reference cells (L10).

Motivation. '338 supplies the problem (reference-cell-derived read points must track drift) and the structure (writable cells carrying known states); '979 supplies the known remedy for the wear-history sub-problem (rotation) and was treated by the examiner as material; '962 supplies the known scheme for extracting multiple read points between states, which supplies the "intermediate breakpoints and margining values" that the '922's sub-chain of eight resistors per R_i generates. A POSITA seeking to make reference-cell-derived read points robust across cycling would combine these as a matter of ordinary engineering.

What this ground still needs help with: L2's "M < N" subset-population feature, and L7's specific analog resistor-ladder topology. For L2, I would argue (and the '922 helps me) that:

• the '922 concedes that cells "are programmed in a program/verify cycle which uses a series of program verify levels which are uniformly spaced, resulting in a linear relation at the time and conditions that programming is completed"; and
• a linear V_th-vs-state relation is, by definition, fixed by two points, so reading two populations and interpolating is the predictable result of the conceded linearity — directly implicating KSR's "predictable variation" rationale; and
• reducing the number of reference cells to save overhead is the express design incentive the '922 identifies ("reduces the number of required tracking cells as well as the corresponding amount of overhead").

This is a strong obviousness argument, but note it turns partly on the applicant's own admissions, so it should be pleaded as an admission, not merely as art.

For L7, I did not find a reference in the retrieved record that discloses a resistor-chain read-point generator driven by buffered, averaged tracking-cell voltages and shared between read and program-verify. I would support that limitation with (a) '338/'762 (deriving read voltages from reference cells), (b) '962 (read points), and (c) the POSITA's general knowledge that resistor ladders/voltage dividers and op-amp buffers are standard voltage-generation building blocks in flash reference circuitry. That is the weakest link in the chain and I flag it as such.

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6. Ground 3: "Different programming algorithm for tracking cells" (L8) — 5,172,338 + 5,532,962 + admitted design tradeoff

Claim group 6 of the WO search report is "programming algorithm for tracking cells," and dependent EP claims 46–48 cover shorter pulses / lower control-gate voltage / lower drain voltage.

Ground: '338 and '962 both disclose the pulse/verify write methodology in which the achievable final-threshold resolution is a function of pulse magnitude and duration (finer steps ⇒ smaller per-pulse threshold change ⇒ tighter distribution). The '922 itself concedes the entire rationale: "shorter write pulses… results in a smaller threshold change for each write pulse, and therefore a finer resolution (less uncertainty) in the final threshold," and "Lower voltages reduce the programming speed." Given that concession, the only step the claim adds is the allocation decision — spend the extra write time on the references rather than the data — and the '922 supplies the motivation as a matter of arithmetic capacity: with ~1,000 user cells vs. ~20 reference cells, "the slowest writing reference cell can usually complete writing to the target level as quickly as the slowest user cell," so tracking cells can be written ~2× slower (up to the '922's own worked example of 7.7× shorter pulses) at no cost to overall write time.

That is the paradigm of an obvious, predictable optimization: KSR ("a court must ask whether the improvement is more than the predictable use of prior art elements according to their established functions") and the Federal Circuit's line that a result-optimizing change in a known parameter is obvious absent unexpected results. There is no teaching away in the record I retrieved: nothing in '338, '979, '962 or '752 says reference cells must be written with identical voltages/timing to data cells. The '922's own specification confirms the art regarded same-algorithm writing as merely a convenient default ("All of the embodiments described so far have largely assumed that the tracking cell [sic] are programmed in the same manner"), not a requirement.

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7. The § 103(c) problem — and why it matters here

This is the most important doctrinal point in this analysis and it cuts against the easiest-looking combination:

• The '922 was filed 2000-09-27 and was, from filing, assigned to SanDisk Corporation (assignment recorded 2001-04-24, per the bibliographic record).
• Ser. No. 08/910,947 → US 6,222,762 was also SanDisk-owned and is of a different inventive entity (Guterman & Fong) than the '922 (Khalid, Guterman, Gongwer, Simko, Conley), so it would otherwise be available as § 102(e) art as of its 1997 filing date.AIA
• Pre-AIA 35 U.S.C. § 103(c) disqualifies subject matter that qualifies as prior art only under §§ 102(e), (f), or (g) where it and the claimed invention were, at the time the invention was made, owned by the same person or subject to an obligation of assignment to the same person. Different inventive entity + common SanDisk ownership is exactly the § 103(c) fact pattern.
• The same analysis would apply to the § 102(e) applications Ser. No. 09/505,555 and the Yuan/Haskell application.

Practical consequence: the '762 may be unavailable for the § 103 combination, and the same is true of any other § 102(e)-only art in the SanDisk family. That is why Ground 2 (built on § 102(b) references — '338, '979, '752, '962 — which § 103(c) does not reach) is the durable ground, and why the M<N subset-population limitation (L2) should be attacked primarily through the applicant's own linearity admission rather than through the '762.

(If this analysis were being done under the AIA for a post-2013 filing, the parallel provision is § 102(b)(2)(C), with the same common-ownership effect.)

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8. Anticipation check (§ 102), briefly

None of the retrieved references appears to anticipate the independent claims as a whole:

• '338 and '762 teach tracking populations per state (M = N), not the "M populations for a subset" (M < N) derivation;
• '762 teaches digital read-point establishment by the controller, not the analog resistor-ladder/op-amp read-point circuit with verify reuse;
• '338/'962 teach read points but not the tracking-cell-specific write-algorithm claim.

So the realistic attack is § 103, not § 102 — consistent with the fact that the PCT search report cited '979 only as a category-A/general reference in the snippet I retrieved.

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9. Rebuttal / non-obviousness arguments the patent owner will (and should) raise

I list these because an honest obviousness opinion must confront them:

1. Different-problem / teaching-away on L2. One could argue the art (and '762 in particular) taught that a population per state was needed for statistical reliability, so that deliberately reducing the number of populations to two and relying on interpolation would degrade margin. Counter: the '922 itself concedes uniform verify-level spacing yields a linear relation, and it asserts better margins when the two populations are placed at ~¼ and ¾ of the range — i.e., the placement is a routine optimization, not an unexpected result.
2. Unexpected result / synergy on L7. The strongest owner argument is that reusing the same resistor chain for both program-verify and data-extraction read automatically cancels non-linearities (the '922's claim that "non-linearities introduced… during programming are automatically compensated for when translating the threshold values back into logic states… whether the non-linearity is intentional or not"). That is a genuine technical effect; whether it rises to "unexpected" depends on the record. I would need to see '338/'962 to know whether self-cancellation was already known or inherent.
3. § 103(c) / common-ownership bar (§ 7) — a threshold argument that knocks out the best reference.
4. Secondary considerations generally. No evidence of long-felt need, failure of others, licensing, or industry praise surfaced in the litigation search previously generated for this patent, and the patent expired (anticipated) 2020-09-27, so commercialization-era evidence will be hard to develop. Absent a strong nexus argument tied to L7's self-cancellation, secondary considerations look thin.

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10. Bottom line

Overall: the claims are, on the retrieved record, largely vulnerable to § 103 — most of the disclosed architecture (writable tracking cells, per-state populations, rotation, breakpoints/margining, ECC coexistence, and finer-resolution tracking-cell programming) is either expressly attributed by the applicant to US 5,172,338 / US 5,270,979 / US 5,532,962 / US 5,418,752, or conceded in the specification as a predictable tradeoff. The features with the best chance of surviving an obviousness challenge are (i) the specific analog read-point circuit in which a single averaging/resistor-chain block is time-shared between program-verify and data-read operation, and (ii) the "M populations for a subset of N states" interpolation — and (i) is the stronger of the two because I could not locate in the retrieved record a reference that discloses that shared-ladder topology.

Verification steps needed before this becomes an invalidity opinion: (1) pull the actual granted claims of US 6,538,922 from USPTO PatentCenter; (2) obtain the complete face-of-patent reference list and the full ISA/210 for WO 02/027729; (3) obtain full texts of US 5,172,338, US 5,270,979, US 5,532,962, US 5,418,752 and US 6,222,762; (4) document the common-ownership chain as of September 2000 to test § 103(c).

Sources consulted: https://patents.google.com/patent/US6538922B1/en (full text supplied); https://patents.google.com/patent/EP1332500B1/ (family counterpart); https://patentimages.storage.googleapis.com/02/52/99/d183030a02fb24/WO2002027729A3.pdf (PCT search-report annex and '979 citation); https://patents.google.com/patent/US6714449#1 (confirms Ser. No. 08/910,947 = US 6,222,762); https://trade.patenthub.cn/cpc/patent-[180123](/patent/180123)-EP1332500A2-… (EP claim text, claims 29–49); the previously generated litigation section of this analysis (no litigation found; patent expired 2020-09-27).