US 9524974

Summary of U.S. Patent 9524974: Alternating Sidewall Assisted Patterning

This report provides a concise summary of United States Patent 9,524,974, including its key bibliographic details and an overview of its independent claims. The patent is currently the subject of federal court litigation.

Key Patent Details:

• Title: Alternating sidewall assisted patterning
• Assignee: The current assignee of record is Palisade Technologies, LLP. The original assignee was SanDisk Technologies LLC.
• Inventors: Erika Kanezaki, Ryo Nakamura, Kotaro Jinnouchi, Satoshi Kamata
• Filing Date: July 22, 2015
• Issue Date: December 20, 2016
• Abstract: The patent describes a method for creating trenches with different shapes in a dielectric layer on a semiconductor substrate. Specifically, it involves forming alternating "first" and "second" trenches. The first trenches have a different cross-sectional shape than the second trenches. These trenches are then used to form bit lines, which are critical components in memory devices.

Plain-Language Overview of Independent Claims:

The patent contains three independent claims (1, 12, and 17), which define the core inventions.

• Claim 1: This claim describes a physical NAND flash memory device. The key feature is a dielectric layer (an insulating material) that has two different types of trenches, referred to as "first trenches" and "second trenches." These trenches are arranged in an alternating pattern. The "first trenches" contain the bit lines of the memory device. The core innovation is the presence of these two distinct, alternating trench shapes on the chip.

• Claim 12: This claim outlines a method for manufacturing a NAND flash memory device. The process involves creating NAND strings on a substrate, covering them with a dielectric layer, and then etching two different kinds of trenches ("first" and "second") in an alternating, odd-even pattern. This means a second trench always separates two first trenches. Finally, a metal is deposited into the "first trenches" to create the bit lines. The invention here is the specific manufacturing process that results in this alternating trench structure.

• Claim 17: This claim details a more specific manufacturing method for a NAND flash memory device. The process starts similarly by forming NAND strings and depositing a dielectric layer. It then describes a "sidewall assisted" technique:

  1. Create temporary structures called "mandrels."
  2. Form a "liner layer" and "sidewall spacers" around these mandrels.
  3. Remove the mandrels, leaving behind a pattern of the spacers and liner material.
  4. This pattern is then used as a mask to etch the two different types of trenches. "First trenches" are formed where the original mandrels were, and "second trenches" are formed in the spaces between where the mandrels were.
  5. Finally, copper is deposited into the "first trenches" to form the bit lines. This claim focuses on a precise and complex sequence of steps to achieve the alternating trench pattern.

Litigation Status:

U.S. Patent 9,524,974 has been the subject of litigation in U.S. federal courts.

• A case was filed in the U.S. District Court for the Western District of Texas, docket number 7:24-cv-00262. In this case, Palisade Technologies, LLP sued Micron Technology, Inc. for infringement of this and other patents. The claims against Micron were dismissed with prejudice on January 26, 2026, meaning Palisade cannot refile the same claims against Micron.
• Another case was filed by Palisade Technologies, LLP in the U.S. District Court for the Eastern District of Texas, docket number 2:25-cv-01170, against Yangtze Memory Technologies Company, Ltd., filed on November 26, 2025.
• An inter partes review (IPR) proceeding, IPR2025-01559, was filed at the Patent Trial and Appeal Board (PTAB).

No relevant results were found in a search of the CAFC (Court of Appeals for the Federal Circuit) 2026 dockets for this specific patent number.