US 11894306

US Patent 11894306: Chip Package Summary

Title: Chip package

Assignee: Myw Semitech LLC [cite: Myw Semitech LLC]

Inventors: Ping-Jung Yang [cite: Ping-Jung Yang]

Filing Date: November 12, 2022 [cite: Filing date 2022-11-12]

Issue Date: February 6, 2024 [cite: Publication date 2024-02-06]

Abstract:
The patent describes a chip package that includes a glass substrate with multiple through-glass vias (TGVs) and a semiconductor chip mounted on the glass substrate. The glass substrate has a top surface and a bottom surface, with the TGVs extending through it. The semiconductor chip has multiple metal pads and metal bumps, where these bumps are connected to redistribution layers (RDLs) on the glass substrate. The RDLs consist of at least two metal layers and at least two dielectric layers, with openings in the dielectric layers exposing parts of the metal layers. The metal bumps on the chip are connected to the exposed parts of the RDLs. The chip package also includes an underfill layer between the chip and the glass substrate.

Plain-Language Overview of Independent Claims:

Independent Claim 1:
This claim describes a chip package comprising a glass substrate with internal metal plugs (acting as through-glass vias) and a semiconductor chip mounted on it. The key features are:

• A glass substrate with a top and bottom surface, having multiple metal plugs passing through it from top to bottom.
• A semiconductor chip with metal pads and metal bumps attached to these pads.
• The chip is connected to the top surface of the glass substrate.
• Redistribution layers (RDLs) are present on the top surface of the glass substrate, providing electrical connections. These RDLs are complex, formed from at least two metal layers and at least two dielectric layers.
• The dielectric layers have openings that expose portions of the metal layers beneath them.
• The metal bumps of the semiconductor chip are connected to these exposed portions of the redistribution layers.
• An underfill material fills the space between the chip and the RDLs on the glass substrate.

Independent Claim 11:
This claim outlines a display device that incorporates the chip package described in claim 1. The display device includes:

• A display panel substrate with multiple contact pads, a display area, and defined boundaries.
• The display area's edges are set back from the display panel substrate's boundaries by less than 100 micrometers.
• A glass substrate (which is essentially the "first substrate" from Claim 1) is positioned over the display panel substrate.
• This glass substrate contains multiple metal conductors (TGVs) running through it and multiple metal bumps between the glass substrate and the display panel substrate.
• One of these metal conductors is connected to one of the contact pads on the display panel substrate.

Independent Claim 12:
Similar to Claim 11, this claim also describes a display device that uses a glass substrate (referred to as a "first substrate") with integrated metal plugs. The key elements are:

• A display panel substrate with multiple transparent electrodes.
• A first substrate (glass substrate) having multiple metal plugs (TGVs) extending through it.
• Multiple metal bumps are located between the first substrate and the display panel substrate.
• These metal bumps connect the metal plugs in the first substrate to the transparent electrodes on the display panel substrate using an anisotropic conductive film (ACF) layer. The ACF layer contains conductive particles that facilitate this connection.

Independent Claim 13:
This claim also describes a display device, focusing on a display panel substrate with through-substrate interconnects and a chip package attached via flip-chip bonding.

• A display panel substrate that includes multiple transparent electrodes on its bottom surface and multiple metal plugs within the substrate that connect to these transparent electrodes.
• A first substrate (glass substrate) with metal plugs (TGVs) extending through it.
• Multiple metal bumps are situated between the first substrate and the display panel substrate.
• These metal bumps connect the metal plugs in the first substrate to the metal plugs within the display panel substrate through a solder layer.

Independent Claim 14:
This claim describes a display device where the glass substrate itself forms part of the display.

• The display device comprises a first substrate (glass substrate) which has metal plugs extending through it.
• A second glass substrate.
• An organic light-emitting diode (OLED) layer and thin-film transistor (TFT) circuit layers are located between the first substrate and the second glass substrate.
• Transparent electrodes are also located between the first and second glass substrates.
• The metal plugs in the first substrate are connected to these transparent electrodes through a first metal layer.

Independent Claim 15:
This claim focuses on the manufacturing process of the glass substrate with integrated metal plugs, a variation of the "1st process" described in the detailed description.

• The process involves providing first and second nets of traces with gaps, and also providing separate metal traces.
• The metal traces are inserted through the gaps in the first and second nets.
• A thermal resistance layer is formed that permeates the second net through its gaps and covers the metal traces. This layer is then cured.
• A mold is placed between the first and second nets, surrounding the metal traces and resting on the thermal resistance layer.
• A fixed layer is formed on the thermal resistance layer.
• A liquid glass layer is introduced into the mold and on the fixed layer, then cooled to a solid state.
• The mold is removed, and the resulting structure is cut to produce a column containing multiple first substrates, each with multiple metal plugs formed from the metal traces.

Uncertainty Regarding CAFC Dockets:
As of April 26, 2026, direct CAFC dockets specifically pertaining to US Patent 11894306 (or its associated PTAB IPR2026-00067 case or the Delaware District Court case) for the year 2026 were not found in the conducted searches. The patent itself indicates active litigation, including an Inter Partes Review (IPR2026-00067) and a District Court case in Delaware, which could potentially lead to CAFC appeals. However, no direct CAFC case filings naming this specific patent or those related proceedings were identified.