Invalidity dossier
US 11402426
Added 9/24/2026, 5:43:17 PM
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Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
I'll search for the specific patent number and any related litigation/docket records.
Let me check for any Federal Circuit or litigation activity, and verify the patent's status.
US Patent 11,402,426 — Summary
Scope-of-search caveat first: I ran targeted searches against USPTO/public patent databases and Federal Circuit–related docket sources for the literal string 11402426 / 11,402,426. I found no CAFC 2026 docket entry, no PTAB IPR/PGR, and no district-court or ITC filing that names this patent. Any statement that it is in litigation would not be supported by what I retrieved.
Literal-ID warning (do not auto-correct): the unpunctuated string 11402426 is ambiguous across USPTO numbering systems:
- As a patent number,
11,402,426= US11402426B2 (Micron Technology), the subject of this request. - As an application number,
11/402,426= US 7,874,447 / US2006/0261068A1, "Reclosable Cup Lid," inventors Rush & Schmidtner, assignee Fort James Corp. / GPCP IP Holdings LLC. Completely unrelated art (B65D cup lids).
I am resolving 11402426 as the patent number per your instruction, and flagging the app-number collision because several search hits were false positives on that basis.
Search results are also internally dated later than the April 26, 2026 date stated in your prompt (some retrieved records carry September 2026 dates), so I am treating the retrieved records as the most current available information.
Bibliographic data (from the authoritative patent text)
| Field | Value |
|---|---|
| Patent number | US 11,402,426 B2 (US11402426B2) |
| Title | Inductive testing probe apparatus for testing semiconductor die and related systems and methods |
| Assignee | Micron Technology, Inc. (Boise, ID) — original and current |
| Inventors | Tony M. Lindenberg; Kurt J. Bossart; Jonathan S. Hacker; Chandra S. Tiwari |
| Application no. | 17/083,193 (divisional of US 15/839,559) |
| Filing date | October 28, 2020 |
| Priority date | December 12, 2017 |
| Issue date | August 2, 2022 |
| Pre-grant publication | US 2021/0041495 A1 (Feb. 11, 2021) |
| Parent patent | US 10,852,344 B2 (issued Dec. 1, 2020) |
| Status / anticipated expiry | Active; 2037-12-12 |
| Claims | 20 (independents: 1, 12, 20) |
| Classifications | G01R31/3025 (contactless testing – wireless interface with DUT), G01R31/315 (inductive), G01R1/073 family, G01R31/2889 (probe/tester interface) |
Abstract (verbatim substance): A testing probe apparatus for testing die. The testing probe may include a probe interface and a carrier for supporting at least one die comprising 3D interconnect (3DI) structures. The probe interface may be positionable on a first side of the at least one die and include a voltage source and at least one first inductor operably coupled to the voltage source. A voltage sensor and at least one second inductor coupled to the voltage sensor may be disposed on a second opposing side of the at least one die. The voltage source of the probe interface may be configured to inductively cause a voltage within the 3DI structures of the at least one die via the at least one first inductor. The voltage sensor may be configured to sense a voltage within the at least one 3DI structure via the at least one second inductor. Related systems and methods are also disclosed.
Plain-language overview of the independent claims
Claim 1 — System (apparatus), "energy source / energy sensor" framing. A test system with three physical building blocks: (a) a first probe interface positioned on a first side of a die (or dies) of a wafer that has 3D interconnect (3DI) structures, the interface containing an energy source and at least one first inductor wired to it; (b) a carrier that holds the wafer on the wafer's opposite side; and (c) a second probe interface on the far side of that carrier (opposite the first interface), containing an energy sensor and at least one second inductor wired to it. Operationally, the energy source inductively drives energy into a 3DI structure through the first inductor, and the energy sensor detects that energy through the second inductor. In short: a wireless, contactless inductive "send on one side / read on the other side" test rig, with the wafer carrier sandwiched in between. Note the claim is drafted in generic "energy" terms (not voltage/current specifically), which is what dependent claims 2–5 then narrow.
Claim 12 — Method of testing. Steps: (1) place a first probe interface with at least one first inductor on a first side of a die having at least one 3DI structure; (2) place a second probe interface with at least one second inductor on the opposite side of that die, across from the first inductor; (3) generate an electromagnetic field in the first inductor; (4) initiate energy within the 3DI structure in response to that field (i.e., inductive coupling into the TSV/pillar/UBM path); and (5) sense energy within the 3DI structure using the second inductor. This is the method counterpart of claim 1, and it notably does not require the carrier element of claim 1.
Claim 20 — System, alternative "energy source/energy sensor" framing. A system comprising an energy source; a first probe interface having a first inductor coupled to the energy source and positioned on a first side of a die of a wafer with 3DI structures; an energy sensor; and a second probe interface having a second inductor positioned on a side of the carrier opposing the first inductor. As in claim 1, the energy source inductively generates energy in a 3DI structure via the first inductor, and the energy sensor detects it via the second inductor. Claim 20 is broader than claim 1 in that the energy source and energy sensor are recited as separate system elements rather than as components strictly housed within the respective probe interfaces.
Dependent-claim highlights
- Claims 2–5: all four combinations of voltage/current source × voltage/current sensor.
- Claim 6: single first inductor and single second inductor.
- Claim 7: first array of inductors mapped to a plurality of 3DI structures, plus a corresponding second array.
- Claim 8: a pick arm carrying the first inductor(s) — i.e., probing during die pick, not just in a dedicated prober.
- Claim 9: dielectric material at least partially surrounding each inductor (the "no-touch" standoff).
- Claims 10–11: carrier is a cavity carrier receiving pillar portions, or a wafer chuck.
- Claims 13–15: determine defects from the sensed energy; then pick/place the die onto tape/wafer/higher-level packaging/stack; or move on to the next 3DI structure.
- Claims 16–19: array positioning and sequential energization of the first array; second interface as an array or as a carrier with an embedded second array.
Drafting observations (uncertainty flags)
- Claim 20 antecedent basis: claim 20 recites "a side of the carrier" although no carrier is introduced earlier in claim 20 itself. If read literally, this is an antecedent-basis defect; a court could read the carrier in from the incorporated-by-reference disclosure, or find the claim indefinite under § 112. I have no prosecution-history or litigation record establishing which view controls, so I flag this as unresolved rather than asserting an outcome.
- Claim 7 internal inconsistency: it recites the second array as coupled to "a voltage sensor," whereas parent claim 1 recites an "energy sensor." Under the doctrine of claim differentiation this is usually curable, but it is an inconsistency on the face of the claim set.
- Sibling disclosed embodiments not claimed: the specification describes a "voltage biased probe card" with a single inductor (FIG. 3) and a "smart wafer carrier" with embedded inductor arrays (FIG. 4), plus die-sorter integration (FIG. 5). These appear in the written description and in the separate system claims quoted in the specification, but not in the issued independent claims above.
- Home for the claim family: the disclosed purpose is detecting defects in TSV/pillar/UBM (3DI) structures to identify known good die (KGD), replacing touch-based needle probing and cosmetic-only optical screening.
Litigation / docket check — result
- No CAFC 2026 appeal or other Federal Circuit docket entry naming US 11,402,426 was found.
- No PTAB proceeding (IPR/PGR) naming it was found.
- The active Micron–Netlist ITC matters in 2026 (e.g., Investigation No. 337-TA-1523, instituted Sept. 23, 2026, and the later HBM complaint announced Sept. 29, 2026) assert other patents — U.S. 10,025,731; 10,217,523; 12,373,366; 12,675,407; and 12,308,087; 12,646,537 — not 11,402,426. Citing: https://www.usitc.gov/press_room/news_release/2026/er0923_69264.htm and https://www.barchart.com/press-releases/[4852585](/patent/4852585)/netlist-files-new-itc-action-against-micron-technology-inc-involving-hbm-patents-for-ai-computing.
Confidence: High on bibliographic data, abstract, and claim text (grounded in the authoritative patent text and corroborated by https://patents.justia.com/patent/11402426 and assignee/inventor records at patentleaderboard.com). High confidence that no 2026 CAFC docket exists for this number based on the searches performed — but absence of a search hit is weaker evidence than a positive record; if you need a definitive negative, a direct PACER/CAFC docket query and a USPTO Patent Center transaction-history pull would be required, which I cannot perform here.
Generated 9/29/2026, 1:23:22 PM
Cases on file (0)
Specific litigation cases in our database that name US patent 11402426. The free-form analysis below may also discuss cases beyond this list.
No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
I'll search for litigation involving US 11402426 across patent litigation databases and court records.
Let me search more targeted litigation databases and the Unified Patents portal.
Let me run a few more targeted searches to be thorough, including the related family patent and CourtListener/Docket Alarm.
Litigation Search Results for US Patent No. 11,402,426
Bottom line
No litigation involving U.S. Patent No. 11,402,426 ("the '426 patent") was identified in the searches performed. I searched general web and patent-litigation-oriented sources for the patent number in both the "11,402,426" and "11402426" formats. No district court case, ITC action, PTAB proceeding, or CAFC appeal asserting or challenging the '426 patent appeared in the results.
Because this is a negative finding, I want to be precise about what I did and did not verify, and about several false-positive hits you should be aware of.
Patent identification (as confirmed by the patent text)
| Field | Value |
|---|---|
| Patent | US 11,402,426 B2 |
| Title | Inductive testing probe apparatus for testing semiconductor die and related systems and methods |
| Inventors | Tony M. Lindenberg; Kurt J. Bossart; Jonathan S. Hacker; Chandra S. Tiwari |
| Assignee | Micron Technology, Inc. |
| Application | 17/083,193, filed Oct. 28, 2020 |
| Grant date | Aug. 2, 2022 |
| Priority | Dec. 12, 2017 |
| Relationship | Divisional of US 15/839,559, now US 10,852,344 |
| Anticipated expiration | Dec. 12, 2037 (per Google Patents legal-status data) |
Searches performed
I ran web searches across patent-litigation-relevant sources, including the Unified Patents litigation portal, Justia federal case documents, Docket Alarm-hosted filings, CAFC opinion/order PDFs, and general web queries combining the patent number with "litigation," "lawsuit," "infringement," and the assignee "Micron."
Result: no hit tied to US 11,402,426.
False positives — do NOT treat these as litigation for the '426 patent
Per your instruction to interpret identifiers literally and not auto-correct, note the following distinct identifiers that surfaced:
Unified Patents portal — U.S. Pub. No. 2006/0261068 A1 ("Reclosable Cup Lid"). That record lists "Application Number: 11402426." This is application 11/402,426 — a utility application number (Fort James Corp. / GPCP IP Holdings), not patent 11,402,426. The number "11402426" coincides numerically, but the identifier is an application number for an unrelated beverage-lid patent. It is not the '426 patent and is not litigation of it.
UK company "ALL NATION CARE LTD," registered number 11402426 — a UK Companies House registration number, unrelated.
Brazilian Ministry of Communications document number 11402426 — an administrative document ID, unrelated.
These illustrate why a bare-string search for "11402426" is unreliable; the correct patent identifier is US 11,402,426 B2.
Related note (not litigation of the '426 patent)
A search result referenced news that Micron Technology faces legal action over alleged infringement of Netlist patents (an ITC action and related disputes). That is Micron as an accused infringer of Netlist's patents — it is not an assertion of the '426 patent by Micron. I mention it only to dispel any impression that it satisfies your query.
Important limitations and caveats
- Coverage is not exhaustive. Patent litigation is not fully centralized in any free public dataset. Full confidence would require a paid/comprehensive search of PACER (all district courts), the ITC's EDIS, PTAB P-TACTS, the CAFC docket, and commercial databases (Lex Machina, Docket Navigator, Westlaw/Lexis). My searches did not encompass all of these.
- Timing. My searches reflect the state of public results as of the search, not a live docket query on today's date. A recently filed case could exist that is not yet well indexed.
- Divisional/family confusion. Because the '426 patent is a divisional of US 10,852,344 (the '344 patent), litigation is more likely to have been filed on the parent or on the broader family. If you want a complete picture of litigation exposure for this family, search US 10,852,344 and the Chinese counterpart CN 110031744 B as well.
Suggested next steps for a definitive clearance
- Query PACER Case Locator / CourtListener RECAP for "11,402,426" and "10,852,344."
- Query the USPTO Patent Trial and Appeal Board (P-TACTS) for IPR/PGR petitions naming the '426 patent.
- Query the ITC EDIS for Section 337 investigations listing the patent.
- Query the CAFC docket for appeals naming the patent.
- Use a commercial litigation database (Docket Navigator / Lex Machina) filtered on the exact patent number.
If you would like, I can attempt additional targeted searches on any of the specific databases above — and on the parent '344 patent — to look for family-level litigation.
Generated 9/29/2026, 1:23:26 PM
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
I'll verify the structured data with targeted web searches before reporting.
Let me run a few more targeted checks for any recently-filed proceedings.
PTAB / AIA Trial Report — US 11,402,426 B2
"Inductive testing probe apparatus for testing semiconductor die and related systems and methods"
Patent Owner / Current Assignee: Micron Technology, Inc. · Priority: 2017-12-12 · Granted: 2022-08-02 · Anticipated expiration: 2037-12-12
Application: US 17/083,193 (divisional of US 15/839,559, now US 10,852,344)
Proceedings overview
Total AIA trial proceedings on file: 0 — no IPRs, no PGRs, no CBM petitions, no derivation proceedings. The USPTO Open Data Portal returns no AIA trial proceedings for US 11,402,426, and my independent web checks surfaced none either (see diligence note below). Because nothing was filed, there is no breakdown by status (0 active / 0 claims invalidated / 0 claims sustained / 0 settled / 0 institution denials), and all 20 claims remain intact and untested at the Board.
The defensive posture this creates is mixed and should be read carefully:
- Not "hardened." The patent has not survived an IPR — it has simply never been challenged at the PTAB. A clean PTAB record is not the same as a validity endorsement. The claims have only been examined once, ex parte; the cited art was limited to what the examiner found or the applicant disclosed.
- Also not "dead." There is no cancelled-claim leverage here. Every claim a demand letter cites — claims 1, 12, and 20 (the independent claims) and all 17 dependents — is live.
- The real signal is the owner. This is a Micron Technology patent, not a troll portfolio patent. Micron is itself one of the most prolific IPR petitioners in the country (it has filed dozens of IPRs against Netlist, YMTC, and others). A Micron-owned patent that sits unasserted and unchallenged most likely means it is being used for cross-licensing, defensive portfolio value, or internal KGD-testing technology — not for revenue litigation. If your demand letter comes from Micron or a Micron affiliate, you are dealing with a deep-pocketed operating company that can litigate to judgment; PTAB activity may simply not have been triggered yet because the patent was never asserted.
Proceedings detail
None. There is no proceeding to report at claim-level granularity — no petition, no institution decision, no FWD, no settlement, no appeal. I will not manufacture numbers, panels, or grounds.
Diligence note (so you can rely on the negative finding): the search results did include PTAB filings that look adjacent but are not this patent. In particular, a petition referencing "the '024 Patent" (challenged with Mizobuchi and Akashi art, claims 1–17) is an unrelated patent — US 11,402,426 has 20 claims (independent claims 1, 12, 20) and is directed to inductive probe testing of 3D interconnect structures, not the subject matter of that petition. Many "Micron v. Yangtze Memory" IPRs (e.g., IPR2024-00788 through -00911, IPR2025-00034/-00117/-00244, etc.) involve Micron as petitioner against YMTC patents and do not involve this patent. No hit tied US 11,402,426 to any AIA trial.
Strategic summary
Claim status. Claims 1–20 of US 11,402,426 are all UNTESTED at the PTAB. 0 claims CANCELED. 0 claims SUSTAINED through an AIA trial. For planning purposes, treat the full claim set — independent claims 1 (testing probe system with energy source/energy sensor and first/second inductors on opposite sides of the die), 12 (method of touchless inductive testing), and 20 (system with energy source/sensor and first/second inductors) — as available to the patent owner. Note that claims 1 and 20 claim "energy source"/"energy sensor" broadly (with dependent claims 2–5 reciting current/voltage source-and-sensor permutations), which is a deliberately generic claim-drafting choice that leaves the patent owner room to read onto a range of inductive test hardware.
Estoppel landscape. Because no petitioner has ever been through an IPR on this patent, § 315(e)(2) estoppel does not exist against anyone. There is no group of prior-art grounds foreclosed by statute and no petitioner-privity bar. Any defendant is free to file an IPR on any § 102/§ 103 ground, and — importantly — free to raise in district court any invalidity ground it could have raised at the PTAB. The full universe of prior art is open. This is the single most favorable feature of the current posture for a defendant.
Pattern signals. No repetitive-petitioner pattern (there are no petitioners). No PTAB appeal activity by the patent owner to analyze. No defensive aggregator (Unified Patents, RPX, etc.) appears anywhere in the chain — the assignee is a major operating company, Micron. Notably, the same specification also yielded the parent US 10,852,344, so any future challenger will need to consider both the parent and this divisional (and the family's foreign counterparts, e.g., CN110031744A) when scoping art and designing around the "inductive, no-touch" concept.
Recommended next steps
- Do not treat "no PTAB activity" as invalidity evidence. There is no FWD to cite and no cancelled claim to lean on. You cannot tell a court or an adversary that claims 1–5 (or any other claims) are dead — they are not, and asserting otherwise would be sanction-bait in the other direction.
- Validate the negative before you rely on it. I confirmed via ODP structured data plus web search (2026-09-29). Re-check PTAB E2E (https://ptacts.uspto.gov) by patent number and confirm the Patent Center "Proceedings" tab immediately before any filing deadline; recent petitions can lag in third-party indexes.
- If you are threatened or sued, an IPR is fully available. No § 315(b) time bar is triggered for you unless you were served more than one year ago, and no § 315(e) estoppel applies. The natural first-line attack is an obviousness combination against independent claims 1/12/20 using art on (a) contactless/inductive wafer and interconnect testing, and (b) inductive coupling as a test-signal injection mechanism across a through-silicon via or pillar — with the dependent claims (e.g., claim 7 arrays, claim 8 pick arm, claim 10 cavity carrier, claim 11 wafer chuck) as fallbacks.
- Claim-construction is likely to matter more than prior art. Terms like "energy source," "energy sensor," "inductively generate energy within … a 3D interconnect structure," and "without physically contacting" were drafted broadly; because the patent has never been tested, there is no PTAB or Federal Circuit construction to bind a later panel. Expect the "inductively generate energy within" limitation to be the crux — whether the reference must couple through the 3DI structure itself, versus merely generating a field near it, will decide both infringement and validity fights.
- Monitor the Micron litigation ecosystem. Given Micron's posture in the Netlist and YMTC campaigns, this patent's most likely path to assertion is as a counter-asserted or cross-licensed portfolio asset rather than through a standalone troll campaign — but if it is asserted, the first petition filed will be the event that reshapes this analysis.
Bottom line: There are no PTAB proceedings on file for US 11,402,426. The patent is wholly unchallenged, all 20 claims are live, no estoppel has attached against anyone, and every invalidity ground remains open — but there is also no claim-level outcome to exploit. The absence of AIA activity is a factual signal about how the patent has been deployed (unasserted, held by an operating company), not a validity finding.
Caveat: I have no attorney-client relationship here and cannot guarantee the absence of a very recently filed, not-yet-indexed petition. This is a research summary, not legal advice.
Generated 9/29/2026, 1:23:34 PM
Ownership chain (1)
Asserters network →Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
I'll research the assignment and ownership record for US 11402426 before writing up the analysis.
Let me check for assignment records and any litigation or assertion activity involving this patent family.
Ownership & Assignment Analysis — US 11,402,426 B2
Important methodological caveat up front: I could not open the USPTO Assignment Center (assignmentcenter.uspto.gov) directly in this session, and my search queries against the publicly indexed assignment records returned no post-issuance assignment entries for US 11,402,426, application 17/083,193, or its parent application 15/839,559. What follows is grounded in (a) the authoritative Google Patents bibliographic/legal-events data in the patent text you supplied, and (b) web-indexed corroborating sources. Where I could not retrieve a reel/frame number, I say so rather than inventing one. Verify the negative finding at the Assignment Center search page before relying on it.
Inventors
| Inventor | Employer at time of filing (determinable) | Notes |
|---|---|---|
| Tony M. Lindenberg | Micron Technology, Inc. (Boise, ID) | Named on 13 Micron patents per Patent Leaderboard |
| Kurt J. Bossart | Micron Technology, Inc. | Named on 5 Micron patents |
| Jonathan S. Hacker | Micron Technology, Inc. | Named on 23 Micron patents |
| Chandra S. Tiwari | Micron Technology, Inc. | Named on the Micron family |
All four are listed by Patent Leaderboard as Micron-associated inventors for this family (the '426 divisional and its parent US 10,852,344), and the corresponding Chinese family member CN110031744B lists the same four inventors with applicant Micron Technology Inc. There is no evidence in any source I retrieved of the inventors departing Micron or of a subsequent inventor-side transfer. That is a normal in-house R&D pattern, not a departure/portfolio-sale signal. (I did not find 12-month departure data either way — mark this unclear, not "present.")
The foreign counterpart also confirms the four inventors were filing under Micron as applicant, consistent with the standard "hired-to-invent" employee-assignment pipeline.
Original assignee
Micron Technology, Inc. (Boise, Idaho; Delaware-organized per TTAB/TM records surfaced in search) is both the original assignee and the current assignee named on the issued patent's face and in Google Patents' "Current Assignee" field.
- Primary line of business: Memory and semiconductor manufacturing (DRAM, NAND, HBM, and related 3D-interconnect packaging technologies). This patent (touchless inductive screening of 3D interconnect structures — pillars, TSVs, UBM pads) sits squarely on Micron's core 3D-IC/advanced-packaging roadmap.
- Product embodiment: Micron is a high-volume operating manufacturer; its advanced-packaging flows employ 3D interconnect structures (pillars/TSVs) of exactly the type the claims screen. Whether Micron deploys this specific inductive probe apparatus in production test lines is not something I could confirm from public sources — treat "ships a product embodying the claims" as plausible but unverified.
- Current status: Operating, publicly traded (Nasdaq: MU). Active legal status; anticipated expiration 2037-12-12 (per Google Patents). No bankruptcy, dissolution, or acquisition events found.
Assignment timeline
Finding: No post-issuance assignment records were surfaced for this patent.
The patent text's Google Patents record shows only the routine chain of title that attaches to any corporate-filed application:
- Original assignment (inventors → Micron Technology, Inc.) — the standard employee invention-assignment recording. I could not retrieve the reel/frame or correspondent for this entry; I am not going to fabricate one.
- 2017-12-12 — priority date (parent application 15/839,559 filed).
- 2020-12-01 — parent US 10,852,344 issued.
- 2020-10-28 — divisional application 17/083,193 filed (internal divisional, not a conveyance).
- 2022-08-02 — US 11,402,426 B2 issued.
There is no recorded transfer to any licensing entity, no security interest, no merger, no change of name, and no release in the sources I could access. An internal divisional filing is not an assignment event and does not change ownership.
Because I cannot confirm even the routine inventor→Micron recording from the Assignment Center directly, I stop the analysis here per the rule on incomplete records, but I flag the near-certain conclusion below.
Timeline diagram
timeline
title Ownership of US 11402426
2017 : Parent application filed by Micron
: Inventors assign to Micron Technology
2020 : Parent patent US 10852344 issued
: Divisional application 17083193 filed
2022 : US 11402426 B2 issued
2037 : Anticipated expiration
NPE / troll-pattern signals
| # | Signal | Call | Supporting evidence |
|---|---|---|---|
| 1 | Shell-entity transfer | Not present | No assignment to any "IP / Holdings / Licensing / Ventures" entity exists in the record. Current and original assignee are both Micron Technology, Inc. |
| 2 | Known asserter in the chain | Not present | No assignee matches Acacia, Marathon, IV, Wi-LAN/Conversant, Round Rock, Pendrell, Spangenberg entities, or any Unified/RPX high-frequency plaintiff. |
| 3 | Repeat correspondent across the chain | Unclear | Only one link (inventor→Micron) would exist, so "recurrence" is structurally impossible within this chain. No correspondent retrieved. |
| 4 | Cascading transfers | Not present | Zero post-issuance transfers; nothing to cascade. |
| 5 | Pre-litigation transfer | Not present | No assignment and no infringement suit naming this patent was found. |
| 6 | Bankruptcy fire-sale | Not present | Micron is solvent and operating; no Chapter 7/11 event. |
| 7 | Privateering | Not present | No transfer to a third-party asserter that would litigate on Micron's behalf. |
| 8 | Defensive aggregator | Not present | Chain does not terminate at RPX, AST, LOT, Unified, or OIN. |
Caution on one data point I am deliberately discounting: Patent Leaderboard displays an "Approx. Value" of ~$10.8M for this patent and ~$14.9M for its parent. That is a third-party algorithmic estimate, not evidence of any transaction, and must not be read as an assignment or valuation event.
Verdict
Insufficient data (only the original assignment).
The only ownership event evidenced is the routine inventor→Micron Technology, Inc. recording that accompanies any corporate-filed application; I found no post-issuance conveyance of any kind, and Micron remains both original and current assignee with the patent Active and running to a 2037-12-12 expiration. Across all eight NPE signals, the six that require an actual transfer are not present, and the two that depend on recovering the Assignment Center record (correspondent recurrence) are unclear because I could not query the database directly. Nothing in this record supports an NPE characterization — but because I could not retrieve the reel/frame for even the base assignment, the disciplined call is insufficient data rather than an affirmative "clean" finding. I recommend a direct lookup at the USPTO Assignment Center (search "11402426" and "17083193") to close the gap; I expect it will confirm a single inventor→Micron assignment and nothing further.
Generated 9/29/2026, 1:23:38 PM
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
I'll research the prior-art citations for US 11,402,426. Let me run several targeted searches.
Retrieval status and scope caveats (read first)
ID resolution. Per instruction, 11402426 is resolved literally as the patent number US 11,402,426 B2 (US11402426B2, Micron Technology, Inc.), not as an application number. As flagged in the earlier-generated section, the unpunctuated string collides with application no. 11/402,426 ("Reclosable Cup Lid," Rush & Schmidtner) — I excluded those false positives.
Critical gap I must disclose up front. I could not retrieve the front-page "References Cited" block (the examiner/applicant-cited U.S. patent documents, foreign patent documents, and other publications) for US 11,402,426. The authoritative full text supplied for this analysis contains the bibliographic data, abstract, description and claims, but the Google Patents "Citations" / "Cited By" tables were not captured in the fetch, and my searches for the citation list returned search reports belonging to other applications (e.g., PCT/AU2016/050580, PCT/US2012/029019, PCT/US2015/065566, PCT/US2019/036333) — none of which is the file of US 11,402,426. I am therefore not going to name any "examiner-cited" reference, because I cannot verify that any such reference is actually of record in this patent. Per my operating rules, I state this explicitly rather than fabricate a citation list.
Date discrepancy (carried forward): the task states April 26, 2026, while the operating date is September 29, 2026, and retrieved records carry September 2026 dates. Treating the later records as current, as before.
1. Patent citations that are on the face of US 11,402,426
The only patent documents the patent itself identifies are the four specification-cited, incorporated-by-reference documents (all cited in connection with the FIG. 5 die-sorter / positioning discussion):
| # | Full citation (as literally stated in the patent) | Date(s) | Why the patent cites it | Anticipates a claim of '426? |
|---|---|---|---|---|
| A | U.S. patent application Ser. No. 11/485,193, to Moore et al. — title not given in the patent text | Filed July 11, 2006 | Die-sorter pick arm assembly 502 / place arm assembly 506 and optical inspection system 503 "may operate in substantially the same manner" | No |
| B | U.S. Pat. No. 9,733,304 — "to Vogel et al." (Google Patents text) / "to Gandhi et al." (US10852344 PDF) — see discrepancy note below | Filed Sept. 24, 2014; issued Aug. 15, 2017 | "devices for positioning electronic die… testing structures" | No |
| C | U.S. Pat. No. 7,043,388, to Cram | Filed Dec. 22, 2003; issued May 9, 2006 | "the testing apparatus" | No |
| D | U.S. Pat. No. 6,900,459, to Farnworth | Filed Dec. 5, 2002; issued May 31, 2005 | "the positioning apparatus" | No |
Grounding: these four are recited in the FIG. 5 description of the authoritative text (source: https://patents.google.com/patent/US11402426/en), and recite the same passage in the parent's PDF, https://patentimages.storage.googleapis.com/b2/40/a0/3e73282169d5e8/US10852344.pdf.
Brief descriptions and § 102 analysis
- Ref A (Moore et al., app. 11/485,193). Discloses the mechanics of a tape-and-reel die sorter: a pick arm and place arm on an X-axis drive that remove singulated die from a wafer and transfer them to pocket tape, plus three alignment/inspection cameras. The '426 patent incorporates it "in its entirety by reference" only for the pick/place and optical-inspection operation. Under § 102 it discloses none of the limitations that define the '426 independent claims: no energy source, no first/second inductor pair, no inductive generation of energy in a 3D interconnect structure, and no energy sensor across the die. It is at most a § 103 secondary reference against dependent claim 8 ("pick arm configured to carry at least the at least one first inductor") and claim 14 (pick-and-place step) — and even then it supplies only the pick-arm hardware, not the inductor/energy-source combination.
- Ref B (U.S. 9,733,304). "Testing structures" for positioning electronic die. Cited as a host platform for the disclosed probe. Again supplies die-positioning/handling context, not the inductive send/receive architecture. No § 102 anticipation; § 103 possible only as a platform reference for claims 8/11/19.
- Ref C (U.S. 7,043,388, Cram). A "testing apparatus" for electronic parts, cited as an alternative host for the probe. On its face it is a contacting/handling test apparatus disclosure; it does not disclose inductively causing energy within a 3DI structure using a first inductor on one side and detecting it with a second inductor on the opposite side of the same structure. No § 102 anticipation.
- Ref D (U.S. 6,900,459, Farnworth). A "positioning apparatus" cited as another host for the wafer testing probe. Positioning/handling art. No § 102 anticipation.
All four are § 102-eligible prior art by date (published or issued years before the December 12, 2017 priority date), but none discloses the claimed subject matter, so none anticipates claims 1, 12 or 20, or any dependent claim, on the text I can verify.
Discrepancy to flag (do not auto-correct)
The same patent number — U.S. Pat. No. 9,733,304, filed Sept. 24, 2014, issued Aug. 15, 2017 — is attributed to "Vogel et al." in the Google Patents rendering and to "Gandhi et al." in the USPTO/Google patentimages PDF of the parent US 10,852,344. This is an inconsistency between source renderings of the same document. I am reporting both literally rather than picking one; if inventor identity matters for a § 102 ownership/exception analysis, the issuing document (US 9,733,304 front page) should be pulled directly.
Family documents that are not prior art against '426
- US 15/839,559 (filed Dec. 12, 2017) → US 10,852,344 B2 (issued Dec. 1, 2020) — divisional parent.
- US 2021/0041495 A1 (pub. Feb. 11, 2021) — '426's own pre-grant publication.
- US 2019/0178933 A1 — parent's pre-grant publication (source: https://www.patents-review.com/a/20190178933-inductive-testing-probe-apparatus-testing-semiconductor-die.html).
Because these share inventors/assignee and the same disclosure, they are excepted from § 102(a)(2)/(b)(2) as to '426; they cannot be used to anticipate it.
2. What the claims require, mapped to § 102 (anticipation framework)
Since I cannot enumerate the citations of record, the more defensible deliverable is the anticipation test each independent claim imposes. A single reference anticipates only if it discloses every element:
Claim 1 (system): (a) first probe interface on a first side of a die of a wafer having 3D interconnect structures; (b) an energy source plus ≥1 first inductor operably coupled; (c) a carrier supporting the wafer on the side opposing the first interface; (d) a second probe interface on the side of the carrier opposing the first interface, with an energy sensor and ≥1 second inductor; (e) the energy source configured to inductively generate energy within a 3DI structure via the first inductor, and the energy sensor to detect that energy via the second inductor. A reference disclosing contactless/eddy-current inspection of a single side, or needle probing, or optical screening, lacks (c)–(e) and cannot anticipate.
Claim 12 (method): five steps — first inductor on a first side; second inductor on the opposing second side; generate an EM field in the first inductor; initiate energy in the 3DI structure responsively; sense energy in the 3DI structure with the second inductor. Note claim 12 does not require the carrier (a deliberate breadth difference from claim 1); an anticipatory reference need only practice the two-sided inductive drive/sense.
Claim 20 (system): as claim 1, but the energy source and energy sensor are recited as separate system elements rather than as housing components — broader, and additionally carries the antecedent-basis defect already flagged in the prior section ("a side of the carrier" with no carrier earlier introduced in the claim).
Likely art areas the claims would be searched against (classification-anchored, not citations of record): G01R31/3025 (contactless testing — wireless interface with the DUT), G01R31/315 (contactless testing by inductive methods), and G01R1/073-family probe-card art. I deliberately stop at the classification level rather than naming specific patents, because I could not verify their presence in this patent's citation record.
3. Confidence and recommended next steps
High confidence: the four specification-incorporated citations (A–D) and their dates/roles, and the conclusion that none of them anticipates any claim of US 11,402,426; the family-document analysis; the element-by-element § 102 framework.
Low / unverified: the identity of any examiner-cited prior art. I have zero verified citations of record for this patent, so any "most relevant prior art" list I produced would be speculation. To complete the task properly, one of the following is required, which I cannot execute here:
- Google Patents "Citations" tab for US11402426B2 (and for the parent US10852344B2); or
- USPTO Patent Center → application 17/083,193 → "References Cited" / IFW PTO-892 and PTO-1449 forms; or
- Global Dossier file wrapper for the 15/839,559 parent.
One corroborating fragment did appear in searches — US11402426B2 is listed on the CN101617242A Google Patents page (https://patents.google.com/patent/CN101617242A/en) and US10852344B2 appears on the US20170336470A1 page — but those are "Cited By"/similar-document listings pointing toward the Micron family, not references cited in '426, so I have not treated them as prior art.
If you can supply the PTO-892/1449 (or the Google Patents Citations HTML), I will produce the requested per-reference table — full citation, publication/filing date, description, and the specific claim(s) each reference potentially anticipates under § 102 — in one pass.
Generated 9/29/2026, 1:24:07 PM
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
I'll pull the prior-art landscape for this space. Note the source page only exposed keywords and the in-spec incorporated references, so I need to identify the actual art to combine.
Strong prior-art signals are surfacing. Let me pin down the most citable references precisely.
Obviousness Analysis — US 11,402,426 B2 under 35 U.S.C. § 103
Scope note: The Google Patents page supplied in the prompt did not reproduce a prior-art citation list (it exposed only four "Prior art keywords" — inductor, die, probe, probe interface, testing — plus the references incorporated by name in the specification). I therefore ran outside searches to reconstruct the art. Below I distinguish references I verified from full text (Google Patents / patentimages / Justia retrieval) from those I can verify only as citation-list metadata (number, date, title) appearing inside another reference's "References Cited" section. That distinction matters for how much weight the analysis can bear.
1. Analytical framework
| Item | Value | Source |
|---|---|---|
| Effective filing date | December 12, 2017 (US 17/083,193 is a divisional of US 15/839,559, filed 2017-12-12) | Patent text, Cross-Reference paragraph |
| Statutory framework | AIA § 103 (post‑2013); art must qualify under § 102(a)(1) (before effective filing date) or § 102(a)(2) | — |
| Independent claims | 1 (system), 12 (method), 20 (system) | Patent text |
| PHOSITA | B.S. in EE/Materials/Mechanical + ~2–5 yrs in semiconductor wafer-level test (probe card / die handler) or in inductive/eddy-current non-destructive evaluation; familiarity with Faraday/Ampere coupling, eddy-current NDT, and probe-card architecture | Conventional; supported by the cited art's own framing of the problem |
The § 103 question is narrow and, I think, answerable: the patent's point of novelty over the mechanical die-handling art of record is a two-sided inductive drive/detect pair whose coupling path is the 3DI structure itself. That concept was well developed in two separate bodies of art before 2017 — (i) mutual-inductance/eddy-current testing of plated through-holes in boards, and (ii) inductive/eddy-current sensing of TSVs and contactless wafer-level TSV probing.
2. Prior-art inventory
Verified from full text
| Ref | Date | Assignee / venue | What it teaches |
|---|---|---|---|
| US 9,658,255 B2 (DiRocco et al.), "Signal monitoring of through-wafer vias using a multi-layer inductor"; also published US 2015/0362534 A1 and US 2015/0185273 A1 | Priority 2014‑01‑02; filed 2015‑08‑20; issued 2017‑05‑23 | IBM | An inductor formed around a TSV; a voltage induced in the inductor by current in the TSV is sensed and compared to a reference voltage; an "electrical signature" of the TSV is determined; failure (open/partially open/short) is flagged. Explicitly addresses "opens, current spikes, and other abnormalities on a given TSV," including high-resistance TSVs in a die stack. https://patents.google.com/patent/[US9658255B2](/patent/US9658255B2)/en |
| US 6,072,313 (Li, Barbee, Halperin, Heinz), in-situ eddy-current film monitoring | Filed 1997‑06‑17; issued 2000‑06‑06 | IBM | LC-resonant eddy-current sensor embedded in the wafer carrier; sensor head engineered (ferrite pot core, phenolic tube, epoxy potting) to direct the field away from the metal carrier housing and toward the wafer, expressly to solve field leakage into the metal carrier; "many small sensors can be embedded inside the carrier" connected in series/parallel/independently; each sensor head given a unique resonant frequency so measurements can be correlated to embedded positions across the wafer. https://companyprofiles.justatic.com/patent/[6072313](/patent/6072313) |
| US 2011/0074455 A1 / US 8,659,312 B2 (Advantest) | JP priority 2009‑09‑25; published 2011‑03‑31 | Advantest | Probe card for a semiconductor wafer carrying a non-contact electrode that "is an inductor for probing," with the die having a corresponding inductor for transmission/reception; signals transmitted by inductive coupling in a non-contact state; teaching that magnetic-material vias/plugs may be used to boost coupling between the probe card's non-contact patterns and the wafer. https://patents.google.com/patent/US20110074455 |
| US 9,105,501 B2 (and family member US 8,334,759 B2), "Semiconductor device, method of manufacturing thereof, signal transmission/reception method… and tester apparatus" | — | (NEC family; verified from US 9,105,501 text) | Wafer-level test in which a signal transmitting/receiving portion on the die communicates with an external tester carrying a corresponding external signal transmitting/receiving portion by electromagnetic induction in a non-contact manner, replacing probe-needle pads. https://patentimages.storage.googleapis.com/7b/f2/bc/ec312d9a02f29a/US9105501.pdf |
| NPL — "Contactless wafer-level TSV connectivity testing method using magnetic coupling," IEEE EDAPS 2012 | 2012‑12 | IEEE, DOI 10.1109/EDAPS.2012.6469404 | Articulates the exact problem: narrow TSV pitch, defects caused by direct probing, bump-height variation. Proposes contactless TSV connectivity testing by magnetic coupling with a probe card having transmit and receive coils ~5 µm from the wafer; models mutual inductance M between probe-card transmitter coil L_pr and wafer receiver coil L_wr. |
| NPL — "A test probe for TSV using resonant inductive coupling," IEEE International Test Conference 2013, Paper 7.3, DOI 10.1109/TEST.2013.6874619 | 2013‑09 | IEEE ITC | States that cantilever/vertical probes "cannot be readily used for TSV probing as they exert too much force … causing scrub marks and structural damage"; surveys contactless access by inductive, capacitive and radiative coupling; discloses an inductive contactless probe for TSVs using a microscale inductor at the TSV side and a probe-side coil; frames contactless probing as the industry's expected solution. |
Verified only as citation-list entries (metadata-level — flagged as such)
| Ref | Listed date | Title as cited | Note |
|---|---|---|---|
| US 3,840,802 (Rockwell Int'l) | 1974‑10‑08 | Mutual inductance coupling probe for testing the integrity of through-hole plating in printed circuit boards | Cited in US 9,658,255. Title alone places it squarely on the through-hole-integrity-by-mutual-inductance concept. I have not read the specification. |
| US 4,060,760 (Rogachev) | 1977‑11‑29 | Eddy current sensor for non-destructive testing the quality of electrically conductive through-hole plating in printed circuit boards | Cited in US 9,658,255; metadata-level only. |
| US 5,963,038 (Philips) | 1999‑10‑05 | Method of testing a connection which includes a conductor in an integrated circuit | Cited in US 9,658,255; metadata-level only, but title is highly pertinent. |
| US 6,072,320 | 1999 (filed) / 2000‑06‑06 | Product wafer junction leakage measurement using light and eddy current | Verified at abstract level; contactless eddy-current measurement on product wafers. |
References cited on the face of the patent (from the family's "Referenced Cited" list)
6787375 (Cheng), 6900459 (Farnworth), 7043388 (Cram), 7764366 (Moore), 7952375 (Eldridge), 9733304, 2004/0100277 (Tam), 2011/0006794 (Sellathamby), 2011/0121366 (Or-Bach), 2012/0153745 (Pagani), plus various CN and WO documents; and "Other publications" consisting of two Chinese Office Actions on CN application 201811488517.4 (the CN family member) and a Chinese microwave-engineering textbook. Source: https://patents.justia.com/patent/[11402426](/patent/11402426)
Two observations with real consequence for validity risk:
- The art of record is largely die-handling and probe-needle hardware. Farnworth, Cram, Moore, Eldridge, the Or-Bach 3D-IC publication, and the die-sorter references are positioning/handling art. Nothing on the face of the '426 family appears to be the eddy-current / mutual-inductance TSV-sensing art (IBM 9,658,255; Rockwell 3,840,802; Rogachev 4,060,760) or the contactless TSV coupling NPL (EDAPS 2012, ITC 2013). If that impression holds after a proper IDS/PTO file-wrapper pull, then the strongest § 103 combination was likely not considered during prosecution. (Caveat: the CN Office Actions and search report may have cited additional art in the CN sibling; I cannot see their contents.)
- Record contradiction to flag (do not auto-correct): the Google Patents text of this patent states the incorporated reference is *"U.S. Pat. No. 9,733,304, to Vogel et al., filed Sep. 24, 2014 and issued Aug. 15, 2017,"* whereas the Justia "Referenced Cited" table for the same patent lists 9733304 — "Gandhi et al." The two records disagree on the named inventor. I cannot resolve inventorship of US 9,733,304 from the material retrieved, and per your instructions I am not harmonizing the records. Whatever the correct name, this reference is a Micron die-handling/testing-structure patent and is not, on its face, the inductive-sensing art that defeats the claims.
3. Element-by-element mapping of claim 1
Claim 1 requires: (a) a first probe interface positioned on a first side of a die of a wafer having 3DI structures, containing (b) an energy source and (c) ≥1 first inductor coupled to it; (d) a carrier supporting the wafer on the side opposing the first probe interface; (e) a second probe interface on the side of the carrier opposing the first probe interface, containing (f) an energy sensor and (g) ≥1 second inductor coupled to it; and (h) operation such that the energy source inductively generates energy within the 3DI structure via the first inductor, and the energy sensor detects that energy via the second inductor.
| Element | Supplied by | Support in that reference |
|---|---|---|
| (a),(b),(c) probe interface / source / drive inductor on one side of a vertical interconnect | US 3,840,802 (with US 4,060,760 as alternative) | A mutual-inductance coupling probe for testing the integrity of through-hole plating: a drive coil on one side of the board and a pick-up coil such that the plated barrel is the coupling path. Also US 9,658,255 for the semiconductor analogue (inductor coupled to a TSV; voltage induced by current in the TSV is sensed). |
| (c)+(e)+(g) second coil on the opposite side, used as the detector | US 3,840,802 | Same-issue PCBs: the second coil on the far side of the barrel is the receiver. Using a second, opposed coil as the sensor — rather than measuring the transmit coil's own impedance shift — is the known technique for isolating the via's contribution from the surrounding ground plane. |
| (d) carrier supporting the wafer | Any die-handler/wafer-chuck art; expressly US 6,072,313 ("sensor embedded in the metal housing of the wafer carrier"; carrier holds the wafer, no contact required); US 6,900,459 (Farnworth, positioning apparatus) | Conventional and disclosed in the patent's own incorporated references. |
| (e)+(f)+(g) second probe interface on the far side of the carrier, with the sensor inductor disposed there | US 6,072,313 | Multiple sensor heads embedded inside the carrier, wired independently or in combination, with the field deliberately shaped to reach the wafer; explicitly contemplates an array of heads at known carrier positions, differentiated by resonant frequency. Anticipates the structural and functional core of claims 1, 10 and 11. |
| (h) inductive generation within the 3DI structure and detection within it | US 9,658,255 | Inductor coupled to the TSV; "the electrical current in said TSV inducing measured voltage in said single multi-level coil"; comparing to a reference to output an "indication of failure of said TSV." Also EDAPS 2012 / ITC 2013 for the probe-card-mediated version. |
| "energy" generic (vs. voltage/current) | Applicant's own specification | The spec states the interfaces "may include energy sources and energy sensors other than voltage sources and sensors," enumerates all four voltage/current source×sensor permutations, and adds that "the voltage source 116 and the voltage sensor 122 may be switched." |
Result: every element of claim 1 is disclosed in the pre-2017 art, distributed across four documents plus two NPL items, with no element requiring anything beyond the ordinary skill level.
4. Combination A — the primary § 103 attack on claim 1
US 3,840,802 + US 4,060,760 + US 9,658,255 + US 6,072,313
Why a PHOSITA would combine them
(Applying MPEP 2143 rationales (A)–(G) and KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007)):
- Same field of endeavor and same problem (rationale (A)). Both the PCB art and the TSV art are directed to the same technical question: is this vertical conductive interconnect continuous and adequately conductive? US 3,840,802's very title is "testing the integrity of through-hole plating," and US 9,658,255's stated problem is "open via or … partially open via" and "high resistance TSVs." The substrate differs (FR-4 board vs. silicon wafer); the physics (Faraday/Ampere coupling into a metal barrel) does not.
- The art itself supplied the migration incentive. The EDAPS 2012 and ITC 2013 papers frame contactless magnetic/inductive coupling as the answer to the specific limitations of conventional TSV probing — narrow pitch, scrub marks and structural damage from probe tips, bump-height variation. That is, verbatim, the motivation section of the '426 specification. When the prior art articulates the problem and points to the solution class, the § 103 case is strong (KSR: "design incentive" / "market pressure").
- Predictable results (rationale (C)). Mutual inductance between two opposed coils through a conductive barrel, and eddy-current loading of an inductor coupled to a conductor, are both well-characterized, calculable effects (the EDAPS paper literally presents the mutual-inductance M model). Scaling coil geometry and frequency to TSV dimensions is optimization of a known parameter, not a new principle.
- Known technique to improve a known method (rationale (F)). Relocating the pick-up coil to the far side of the DUT and using the through-path as the coupling medium is the disclosed technique of the PCB art for eliminating common-mode loading from the surrounding structure. Applying it to a TSV is application of a known technique to a known structure, yielding the predictable improvement of a cleaner signal from the interconnect itself.
- Embedding the sensor in the carrier is separately motivated. US 6,072,313 states the advantages of embedding the sensor in the wafer carrier: it "further avoids exposing the sensor head," "fixes the relative distance between the sensor head and the metal film and permits stable and reproducible detection," and "eliminates scratching and contamination of the wafer because it prevents direct contact of the sensor head with the wafer." Each of those is a stated desideratum of the '426 disclosure. US 6,072,313 even solves the predicate problem that a skilled artisan would immediately foresee here — field leakage into the metal carrier — by directing the field away from the housing with a ferrite core.
- Array/mapping practice is also supplied. US 6,072,313's multiple carrier-embedded sensors with distinct resonant frequencies correlated to positions anticipates the "correlate the array pattern to the 3DI pattern" concept of claim 7 and the sequential-activation concepts of claims 17 and 19.
Anticipated patentee rebuttal and why it likely fails
- "The PCB references are non-analogous art." — Rejected under the same-field/same-problem test: both are nondestructive testing of conductive vertical interconnects; and US 9,658,255 is directly analogous and expressly semiconductor.
- "The references teach sensing the transmit coil's impedance change, not a separate receiver coil on the far side." — US 3,840,802's title itself recites mutual inductance coupling, i.e., a two-coil send/receive geometry.
- "The references don't disclose a carrier between the wafer and the second probe interface." — US 6,072,313 does exactly that, and does it inside the metal carrier.
- No objective indicia are of record (no known commercial embodiment evidence, no unexpected results in the specification; the spec asserts accuracy benefits, but those are the expected consequence of electrical rather than cosmetic screening).
5. Combinations for the remaining claims
Claims 2–5 (voltage/current source × voltage/current sensor)
Combination A + the applicant's own specification. The disclosure concedes all four permutations and that the source/sensor "may be switched." In re Kao-type reasoning (substitution of one known sensing quantity for another) and KSR's "obvious to try"/"design choice" line make these claims vulnerable; each permutation is also individually known (eddy-current sensors conventionally detect impedance/voltage/current/phase shift; the EDAPS NPL notes induced voltage, induced current, or phase as the measurable).
Claim 6 (single inductor each side)
Disclosed by the structural claim 1 figure of US 3,840,802 (a single drive/pick-up coil pair) and by US 9,658,255 ("a single multi-level coil inductor"). Strong.
Claim 7 (first/second arrays correlated to the 3DI pattern)
Combination B: A + US 2011/0074455 (Advantest). Advantest discloses a probe card whose non-contact electrodes are inductors for probing, disposed at positions facing the die's pads, i.e., an inductance array registered to the die pattern. Add US 6,072,313 for the carrier-side array. Motivation: arraying is the standard way to avoid stepping the probe card across every die/pillar and to shorten test time — a recognized industry pressure (the '426 spec itself claims "real time" whole-wafer screening as its benefit).
Caveat carried forward from the earlier section: claim 7 recites the second array as coupled to "a voltage sensor" while parent claim 1 recites an "energy sensor" — an on-face inconsistency, curable-by-construction but noted.
Claim 8 (pick arm carrying the first inductor)
Combination C: A + US 7,764,366 (Moore) / US 6,900,459 (Farnworth) / US 9,733,304. These Micron die-handling references (two of them expressly incorporated into the '426 disclosure) teach pick arms and die-positioning structures that carry test/positioning elements. Motivation: testing during pick eliminates a separate probe pass and is directly aligned with the stated goal of real-time KGD determination in a die sorter (FIG. 5). Combining a known sensor with a known handler to gain the handler's throughput benefit is a classic rationale-(A)/(B) combination.
Claim 9 (dielectric body at least partially surrounding each inductor)
Combination A + US 6,072,313 + routine design. US 6,072,313's sensor head is sealed in a phenolic tube with epoxy and shielded by a ferrite pot core — i.e., an inductor with dielectric/protective material around it, sized to stand off from the wafer. The 426 dielectric laundry list (polyimide, BCB, PBO, spin-on-glass, thermal oxide, PARYLENE™, silicon dioxide/nitride/oxynitride, BPSG/PSG/BSG, BT resin, ceramic) is a selection among known IC-compatible dielectrics for the stated purpose (thin, close, non-contacting standoff) — routine optimization.
Claims 10–11 (cavity carrier; wafer chuck)
Combination A + US 6,072,313 (wafer carrier with embedded sensors; the same document's carrier/chuck context) and the die-sorter art for cavity/pillar-receiving carriers. Claim 11 is met almost literally by 6,072,313's carrier-embedded sensor head.
Claim 12 (method) and claim 13 (determine defects)
Combination F: US 9,658,255 + US 3,840,802 / US 4,060,760 + (EDAPS 2012 / ITC 2013 NPL). Claim 12 omits the carrier limitation entirely, so it needs only opposed first/second probe interfaces, field generation, energy initiation in the 3DI structure, and sensing. US 9,658,255 supplies inductive coupling into a TSV and sensing an induced voltage; the PCB art supplies the two-sided geometric arrangement; the NPL supplies the contactless probe-card realization. Claim 13's "determine whether the 3DI structure includes one or more defects" is met verbatim by US 9,658,255's comparing the induced voltage to a reference and outputting an indication of TSV failure.
Claims 14–15 (pick/place after determination; move to next 3DI)
Combination C, supra, plus the die-sorter disclosures incorporated by reference in the '426 patent (Moore et al.; Farnworth; Cram). The decision logic ("place good die on tape/wafer/higher-level packaging/stack") is the ordinary operation of the die sorter once the electrical grade is known.
Claims 16–19 (arrays; sequential energization; carrier with embedded second array)
Combination B, plus US 6,072,313 for the carrier-embedded array. Sequential (time-multiplexed) energization of an inductor array to avoid mutual interference is a routine expedient; US 6,072,313's alternative — giving each head a unique resonant frequency — is the frequency-domain equivalent and demonstrates that the art already knew how to discriminate among closely spaced carrier-embedded coils.
Claim 20 (system; energy source and sensor recited as separate elements)
Combination A applies with an even larger margin, because claim 20 does not require the source/sensor to be housed within the interfaces. Caveat carried forward: claim 20 recites "a side of the carrier" without any earlier recitation of a carrier in that claim — I flagged this in the earlier section as an unresolved antecedent-basis/§ 112 issue, and I do not assert an outcome here.
6. Independent single-reference and two-reference attacks worth testing in prosecution/PTAB
- § 102 against claims 12–13 by US 9,658,255 alone? Probably not clean: 9,658,255's inductor is fabricated in the wafer around the TSV, not positioned on a first side of the die as an external probe interface, and there is no second, opposing probe interface. But it is a powerful § 103 reference and a strong § 102 reference against any claim read to cover in-wafer inductive TSV sensing.
- § 102 by the EDAPS 2012 NPL? Also probably not anticipatory of claim 12: in the EDAPS structure, both coils sit on the probe card and the wafer carries coils wired to groups of TSVs (with fuses to be burned afterward) for a series-capacitance measurement. That is a different coupling topology than "first inductor on a first side / second inductor on an opposing second side of the die with the 3DI structure as the coupling path." So EDAPS is best deployed as the motivation/teaching reference, not as an anticipation reference.
- Two-reference kill shot (claims 12–13): US 3,840,802 (two opposed coils, through-hole as coupling path) in view of US 9,658,255 (substitute a TSV for the plated barrel; sense the induced voltage; compare to a reference; flag failure). This is the cleanest, most defensible short combination in the set.
7. Where the patent retains defensible room
Being balanced about it, I do not think every claim falls, and I flag the following:
- The specific "carrier sandwiched between the wafer and the receiver coil" architecture (claim 1 element (e)) is unusual and, on its face, has an operability wrinkle: if the carrier is a metal wafer chuck (claim 11), a coil on the far side of the chuck must couple through the chuck to the TSV. US 6,072,313 addresses the metal-carrier leakage problem but by keeping the sensor on the wafer side of the carrier housing. A patentee could argue that the prior art teaches away from putting the receiver on the far side of a carrier, and could point to its own "smart wafer carrier" (FIG. 4) as the inventive placement. This is the claim-1 feature I would stress-test against the art before asserting a strong § 103 position, and it is exactly where a § 112 written-description/enablement cross-attack (does the spec enable coupling through a chuck?) is worth exploring.
- Claim 8's pick-arm-carried first inductor combined with the carrier-side second inductor is a genuinely specific integration of test and handling. The combination is motivated (throughput), but if objective evidence of commercial success in a die sorter exists, this is the claim most likely to attract secondary-consideration evidence (KSR, part IV; WB Electric).
- Prosecution history is not in hand. I have not read the file wrapper for 15/839,559 or 17/083,193; I do not know what art the examiner actually compared, whether an IDS captured the eddy-current TSV art, or what arguments were made. The "why the claims were allowed" question cannot be answered from what I retrieved, and I am not going to speculate about it.
- Verification asymmetry. The keystone references for motivation — US 3,840,802 and US 4,060,760 — I have only as citation-list metadata (number/title/date) surfaced inside US 9,658,255. Before this analysis is used in a validity contention, both should be pulled in full and their disclosures checked for: (a) whether the second coil is genuinely on the opposite side of the workpiece from the first (vs. both on one side); (b) whether the references measure a coil-impedance change or a true mutual-inductance transfer between two coils; and (c) the excitation/sensing quantities used. Items (a) and (b) are the load-bearing assumptions of Combination A.
8. Conclusions
| Claim(s) | Strength of § 103 case | Best combination |
|---|---|---|
| 1, 20 | High, with the caveat in § 7.1 | US 3,840,802 + US 4,060,760 + US 9,658,255 + US 6,072,313 (+ EDAPS/ITC NPL for motivation) |
| 2–5, 6 | High | Combination A + applicant's own admission of interchangeability |
| 7, 16–19 | High | Combination A + US 2011/0074455 (Advantest) |
| 8, 14–15 | Moderate–High | Combination A + US 7,764,366 / US 6,900,459 / US 9,733,304 + die-sorter logic |
| 9 | High | Combination A + US 6,072,313's potted/shielded head + routine selection of known IC dielectrics |
| 10–11 | High (11 in particular) | Combination A + US 6,072,313 |
| 12–13 | High | US 9,658,255 + US 3,840,802/4,060,760 (+ NPL) |
Bottom line: the claimed subject matter is, in substance, the application of pre-existing mutual-inductance/eddy-current non-destructive testing of conductive vertical interconnects to the semiconductor TSV/pillar context, plus the known expedient of embedding the sensing inductors in the wafer carrier and arraying them across the die pattern. Each rationale — same field, same problem, predictable results, known technique, design incentive — is independently available, and the applicant's own specification supplies the conversion of "voltage" to generic "energy" that broadens the claims further. Absent strong objective indicia of non-obviousness (none of record that I found) or art that teaches away from far-side, carrier-separated receiver coupling, I would rate the independent claims as more likely than not obvious as a matter of law.
Confidence: High on the content and dates of US 9,658,255, US 6,072,313, US 2011/0074455/US 8,659,312, US 9,105,501, and the EDAPS 2012 / ITC 2013 NPL (full text or abstract retrieved). Medium on US 3,840,802 and US 4,060,760, which I have only as citation metadata. Low on the disclosure of US 2011/0006794 (Sellathamby) and the other face-of-patent references, which I did not retrieve and whose content I therefore do not characterize. One record contradiction (US 9,733,304 — "Vogel et al." per the patent text vs. "Gandhi et al." per Justia) is flagged above and left unresolved per the literal-interpretation rule.
Generated 9/29/2026, 1:24:46 PM
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.
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