Invalidity dossier

US 5657332

Soft errors handling in EEPROM devices

Current assignee: SanDisk Technologies LLC

Added 9/27/2026, 3:38:08 AM

At a glanceNo PTAB challengesNo litigation on fileSemiconductor (T)

Active provider: DeepSeek · deepseek-v4-flash

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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I'll search for authoritative information on this specific patent number.

Search results for US 5,657,332

Important search note on identifier collisions: The string "5657332" also corresponds to JP 5657332 B2 (Japanese Patent No. 5657332, registered 2014‑12‑05, granted 2015‑01‑21, to 株式会社マキタ / Makita — an electric appliance/water heater patent). That is a different, unrelated document from US 5,657,332 and should not be conflated with it. I found no US or CAFC document using that number for anything other than the SanDisk patent below.

CAFC 2026 dockets: I found no Federal Circuit case in the 2026 dockets (including the March 2026 oral argument calendar) involving U.S. Patent No. 5,657,332. This is consistent with the patent's status — it is recorded as Expired – Lifetime, with an anticipated expiration of 2014‑08‑12, roughly twelve years before the current date. I cannot rule out an appeal that merely mentions the patent, but there is no evidence of one. Treat this as a negative search result, not as proof of absence.


Bibliographic summary

Field Value
Patent number US 5,657,332 A (literal)
Title Soft errors handling in EEPROM devices
Application no. 08/406,677
Filing date 1995‑03‑20 (March 20, 1995)
Issue/publication date 1997‑08‑12 (August 12, 1997)
Priority date 1992‑05‑20 (May 20, 1992)
Priority relationship Division of application 07/886,030, filed 1992‑05‑20 (now abandoned)
Inventors Daniel L. Auclair; Jeffrey Craig; John S. Mangan; Robert D. Norman; Daniel C. Guterman; Sanjay Mehrotra
Original assignee SanDisk Corp
Current assignee (per Google Patents) SanDisk Technologies LLC
Status Expired – Lifetime; anticipated expiration 2014‑08‑12
Claim count 11 claims (independent: 1, 2, 4, 5, 7)
Classifications G11C 16/3418, G11C 29/50, G11C 29/52, G06F 11/10, G06F 11/1072, and others

Term note: 17 years from the 1997‑08‑12 issue date yields 2014‑08‑12, which matches the recorded expiration (longer than 20 years from the 1992 priority date, so the pre‑URAA transitional rule governs). This corroborates the expired status.


Abstract (verbatim from the patent)

Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.


Plain-language overview of the independent claims

Claim 1 — System for recovering from read errors by shifting the read reference level.
A solid-state memory array where each cell's threshold voltage is programmed to an intended level, and reads are done by comparing the cell's threshold voltage against a read reference level. Because threshold voltages drift with use, read errors occur. The claim covers: (a) error-checking means operated on data read from a group of cells to identify read errors; (b) means for adjusting the read reference level before each read attempt on a group that shows read errors, each time moving the reference by a predetermined step away from the normal-read reference, repeating until the error checker stops reporting errors; and (c) writing means to re‑write the drifted cells back to their intended threshold levels (so the data is again readable under normal conditions).

Claim 2 — Same scheme, but built around ECC with a correction ceiling.
Like claim 1, except the error checking means is an error checking and correcting (ECC) means capable of correcting up to a predetermined maximum number of errors. The reference level is stepped/shifted until the error count falls to or below that correctable maximum (rather than to zero), at which point ECC can finish the job. Again includes writing means to re‑write the drifted cells to their intended levels.

Claim 4 — Method counterpart of claim 1.
A method for recovering from hard errors (cells whose threshold has drifted enough to cause read errors) in a solid-state memory: provide an error-checking scheme per group of cells; step the read reference level away from the normal-read reference on successive re‑reads until the error check no longer indicates errors; then re‑write the drifted cells to their intended threshold levels.

Claim 5 — Method counterpart of claim 2 (ECC-based).
A method using an error checking and correcting scheme that handles a predetermined maximum number of errors: shift the read reference level in predetermined steps from the normal-read reference until the errors are reduced to not more than the correctable maximum, thereby letting ECC correct them; then re‑write the drifted cells to their intended levels.

Claim 7 — Apparatus framed as circuits rather than "means".
A solid-state memory system comprising: memory cells; a read circuit that determines a cell's state by comparing its programmed threshold voltage with a read reference level set at a predefined level; a read error detection circuit that produces a predefined read error indication when reading a group of cells; and an error recovery circuit activated each time such a read error is detected, which shifts the read reference level by a predetermined step from the normal-read reference until the error detection circuit no longer produces the error indication.

Dependent claims (for context): claim 3 (ECC implementation of claims 1–2); claim 6 (ECC implementation of methods of claims 4–5); claim 8 (recovery circuit deactivated when a predefined condition is reached); claim 9 (that condition is reading without error indication); claim 10 (adds a write circuit that re‑writes the data after the condition is met); claim 11 (error detection circuit includes error correction codes). Claims 3, 6, 10 and 11 are multiple‑dependent claims of the form "as in claims X–Y."


Practitioner notes / caveats

  • Claim scope vs. specification. The specification describes two distinct techniques: (1) automatic "scrubbing" of sectors (margin-checking and rewriting at read margins during write or read operations, with a statistical scheduling rule such as one extra sector scrubbed per eight sectors programmed), and (2) read‑margining data recovery (stepping the demarcation/reference level in trial‑and‑error fashion until ECC can recover). The granted claims of 5,657,332 are directed to the read‑reference‑shifting/recovery aspect; the scrub/monitoring claims appear in the continuation family members (e.g., US 6,049,899).
  • Claim 7 does not recite the re‑write step; that limitation is added only in dependent claim 10. This is a meaningful distinction if claim 7 is ever construed against the specification.
  • Family: continuations/continuations‑in‑part of this patent include US 6,049,899, US 7,438,631, US 7,548,461, US 7,616,484 and US 7,839,685 (all claiming 1992‑05‑20 priority and titled "Soft errors handling in EEPROM devices"). Note a citation-table anomaly: Google Patents' "Cited By" listing shows US 6,049,899 attributed to Zilog, Inc., while the "Family Applications" table lists it as SanDisk. I have not resolved that discrepancy and flag it rather than assert an assignment history.
  • Uncertainty: My bibliographic data comes from the Google Patents copy of the full text and the search results above, not from a direct USPTO PatentCenter/Assignment-record query. I could not independently verify current ownership (SanDisk Technologies LLC is now part of Western Digital) or confirm absence of litigation via a dedicated litigation database. The only search target I could check for 2026 CAFC activity was the published calendar and general dockets, and it returned nothing tied to this number.

Sources: https://patents.google.com/patent/US5657332/en ; https://patentimages.storage.googleapis.com/cb/35/4c/5ab2334d9ae939/US7839685.pdf ; https://www.freepatentsonline.com/5657332.html ; https://www.cafc.uscourts.gov/wp-content/uploads/OralArguments/PublicCalendar-March2026.pdf ; https://patentimages.storage.googleapis.com/2a/18/9a/8236d5a0775923/JP5657332B2.pdf (the unrelated Japanese patent bearing the same numeral).

Generated 9/27/2026, 4:45:30 AM

Cases on file (0)

Specific litigation cases in our database that name US patent 5657332. The free-form analysis below may also discuss cases beyond this list.

No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.

Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

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I'll search for litigation involving US patent 5657332.

Initial searches didn't surface US litigation. Let me search litigation-specific databases.

Let me search additional litigation-focused sources.

Result: No litigation found involving US Patent No. 5,657,332

I searched for litigation specifically identifying US Patent No. 5,657,332 (Soft errors handling in EEPROM devices, Auclair et al., SanDisk). Based on the searches I was able to complete, I did not find any litigation — district court, ITC, or CAFC — in which US 5,657,332 is identified as an asserted patent.

What I searched and what came back

Search target Result
US patent 5657332 litigation No litigation hits; only patent-family, prosecution, and prior-art citations
"5657332" patent lawsuit defendant No litigation hits
"5,657,332" patent infringement complaint No hits identifying US 5,657,332 as asserted
SanDisk "5657332" lawsuit litigation EEPROM SanDisk litigation found, but for other patents (e.g., U.S. 5,172,338, 6,978,512, 6,675,434)
unifiedpatents litigation "5657332" No litigation record for this number

What the number "5657332" actually turned up (do not confuse these)

Because the instruction is to interpret identifiers literally, note that several unrelated items share the digit string:

  1. JP5657332B2 — a Japanese patent (電気機器 / "Electrical equipment," Makita Corporation, granted 2015), entirely unrelated to the U.S. EEPROM patent. This is a different patent in a different jurisdiction.
  2. Various non-patent documents (Brazilian corporate registrations, Lithuanian business registry entries, municipal gazettes) containing the string "5657332" — irrelevant.
  3. US 5,657,332 appears only as a cited prior-art reference in later patent documents (e.g., the CN101601094B prosecution, and a PCT search report for WO2014/164134 where US 5,657,332 is listed as a family member of a SanDisk publication). Being cited as prior art is not litigation.

Context that may explain the absence (but is not litigation)

  • US 5,657,332 is a division of Ser. No. 07/886,030 (filed May 20, 1992) and is part of a large SanDisk family that includes US6049899, US7548461, US7437631, US7616484, and US7839685. Patent families of this type are frequently licensed rather than litigated.
  • The famous early SanDisk enforcement action I encountered — ITC Investigation No. 337-TA-382 (Jan. 1996, SanDisk v. Samsung) — concerned U.S. 5,172,338 ("Multi-state EEPROM Read and Write Circuits and Techniques"), not US 5,657,332. I want to be explicit about that to avoid a mis-identification.
  • The patent expired (anticipated expiration Aug. 12, 2014, per the Google Patents record), which further reduces the likelihood of recent assertion.

Important caveats on this negative finding

  • My searches were general web/patent searches. I was not able to complete direct queries against PACER, CourtListener's full docket index, Unified Patents' litigation portal, or RPX/insight databases for this number (the tool call limit was reached). A PACER/CourtListener docket-text search on the exact patent number is the definitive check and should be run to confirm.
  • Accordingly, treat this as: "No litigation found in the sources searched," rather than an affirmative representation that no litigation exists.

Recommended next steps to confirm

  1. Search CourtListener RECAP (courtlistener.com) docket text for 5,657,332 and 5657332.
  2. Search Unified Patents litigation portal (portal.unifiedpatents.com/litigation) by patent number.
  3. Search USPTO Patent Center / Assignment and USITC EDIS for the number.
  4. Check Google Patents "Litigation" tab for US5657332, which aggregates district court and PTAB/ITC records.

If you can grant another round of searches, I can run the exact-number queries on those databases and either produce the case list (plaintiff, defendant, jurisdiction, case number, filing date, status) or confirm the negative finding with citations.

Generated 9/27/2026, 4:45:26 AM

Proceedings on file (0)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

✓ Generated

I'll verify the structured data with targeted searches before finalizing.

PTAB / AIA Trial Analysis — U.S. Patent No. 5,657,332

"Soft errors handling in EEPROM devices" (Auclair et al., SanDisk Corp.)
Priority date: 1992-05-20 | Filed: 1995-03-20 | Granted: 1997-08-12 | Expired: 2014-08-12
Source of record: US5657332A on Google Patents | Structured input: USPTO Open Data Portal "PTAB proceedings on file" block


Proceedings overview

Zero AIA trial proceedings exist for US 5,657,332 — no IPRs, no PGRs, and no CBM reviews were ever filed, instituted, or decided by the PTAB. The breakdown is therefore: 0 active, 0 claims invalidated by the Board, 0 claims sustained by the Board, 0 settled, 0 institution denials. The bottom line for a defendant: there is no PTAB record to exploit and no PTAB-created estoppel to worry about — the claim set stands exactly as it issued from the examiner on 1997-08-12, all 11 claims are untested by the Board, and any validity attack must be mounted from scratch in district court (or in a DJ action), with the full body of prior art available and no § 315(e)(2) bar in either direction.

Confidence level: High, with the caveat noted below. The ODP structured block returns no trials; three independent open-web searches (PTAB IPR "5,657,332" SanDisk, "5657332" PTAB petition, "Soft errors handling in EEPROM devices" IPR petition) returned no petition, institution decision, FWD, or Board docket entry identifying this patent. This is corroborated by the patent's 2014-08-12 expiration, which is a strong (though not conclusive) disincentive to post-grant challenge.


Per-proceeding detail

No proceedings to report. There is no IPR####-#####, PGR####-#####, or CBM####-##### number to list, and per the operating rules I will not generate one. The absence is itself the finding.

For completeness — three near-miss artifacts that a keyword search will surface and that must not be mistaken for PTAB activity on this patent:

Artifact surfaced by search Why it is not a proceeding on the '332 patent
JP5657332B2 (Makita Corp., granted 2015-01-21, "電気機器" / electric kettle–battery appliance) A Japanese national patent sharing only the digit string; different jurisdiction, different subject matter. Its specification (A47J 27/21 — kettles) is unrelated to EEPROM error handling.
IPR2015-01925 (U.S. Pat. 7,224,607) A SanDisk-related IPR that used US 5,532,962 — a sibling Auclair "Soft errors handling in EEPROM devices" patent — as Exhibit 1025. A cited exhibit is not a challenged patent. docketalarm record
Docket strings such as "Dkt. 332," "Publication No. 5657332" (Brazilian gazettes), EMI Classics catalog no. 5657332 Coincidental numeric matches.

Strategic summary

1. Claim status — everything is UNTESTED; nothing has been canceled or sustained by the Board.
All eleven issued claims remain in force as issued: independent claims 1, 2, 4, 5, and 7, and dependent claims 3, 6, 8, 9, 10, and 11. No claim has been canceled by the PTAB, no certificate of correction or reexamination certificate narrowing the claims appears in the file, and no disclaimer has been recorded. Practically, this means claims 1–2 and 7 (the read-reference-level-shifting recovery claims) and claims 4–5 (the method counterparts) are the ones a defendant will actually face, and each is a virgin validity question in the AIA-trial sense. Note a drafting quirk that a challenger should exploit early: claims 3, 6, and 10–11 are written in multiple-dependent form ("as in claims 4-5," "as in claims 8-9"), which is proper in the U.S. but limits the permissible claim combinations; this affects how many grounds a petition would need and how a district court would construe the dependent scope.

2. Estoppel landscape — a clean slate, in both directions.
Because no IPR was ever instituted, 35 U.S.C. § 315(e)(2) estoppel is entirely absent. No petitioner, real party in interest, or privy is barred from raising any § 102 or § 103 ground — in the PTAB or in district court. For a defendant currently facing a demand letter or complaint on this patent, that means the entire universe of prior art is available, including printed publications and patents that would otherwise have been consumed by an earlier petitioner. The corollary is that the patent owner has no estoppel shield either; the patent owner has never had to defend these claims post-grant, so there is no adverse Board record, no claim-construction ruling, and no expert testimony to reuse. Conversely, the patent owner also cannot point to any Board affirmance as a validity proxy.

Two structural notes on why the AIA toolkit was never used here:

  • PGR was categorically unavailable. Post-grant review under 35 U.S.C. § 321 applies only to patents with an effective filing date on or after 2013-03-16. This patent's priority date is 1992-05-20, so no PGR could ever have been filed.
  • CBM was theoretically available but inapplicable. The transitional CBM program (AIA § 18, sunset 2020-09-16) reached only "covered business method" patents tied to financial-services data processing. A Flash EEPROM soft-error-scrubbing patent is a technological invention, so it would have been excluded from CBM eligibility.
  • That leaves IPR as the only AIA vehicle ever available, and none was filed across the patent's ~17-year post-AIA life.

3. Pattern signals — none of the usual flags.
No serial petitioner, no defensive aggregator (no Unified Patents, RPX, or similar entity appears anywhere in the record for this number), no Director Review petitions, no Board appeals to the Federal Circuit, and no claim-amendment activity. The patent family (US6049899, US7548461, US7437631, US7616484, US7839685) was repeatedly continued and re-filed by SanDisk/Western Digital, which is consistent with commercial licensing rather than enforcement-through-trial — the same pattern the earlier litigation section documented. Where this family was litigated, it was pre-AIA, in the ITC, and on different patents (the SanDisk v. STM matters concerning the multi-state-memory patents and the '517 patent, capped in SanDisk Corp. v. Int'l Trade Comm'n, 219 F. App'x 984 (Fed. Cir. 2007)). That is a § 337 / district-court history, not a PTAB history — and it does not involve US 5,657,332. This is consistent with, not contradictory to, the earlier "no litigation found" finding in the litigation section of this analysis; neither analysis identifies US 5,657,332 as an asserted patent.

4. The expiration wildcard.
The patent expired 2014-08-12 (failure to pay maintenance / end of term as recorded). Under 35 U.S.C. § 286, a patentee may still recover damages for infringement accruing within the six years before suit, so an expired patent can support a past-damages claim for conduct before 2014-08-12 — but only against a defendant that made, used, sold, or imported the patented system during that window. Two consequences: (a) an IPR filed today on an expired patent would be of marginal practical value, because the Board applies Phillips construction and no amendment is possible, and cancellation would not unwind already-accrued pre-2014 liability; and (b) the realistic defensive posture is a declaratory-judgment invalidity or non-infringement action under 28 U.S.C. §§ 2201–2202, not an IPR. Note that declaratory-judgment standing requires a real, substantial, and immediate controversy — for a patent expired in 2014, standing is a genuine hurdle for the patent owner to overcome in either direction.


Recommended next steps

If you are a defendant:

  1. There is no FWD to cite and no cancellation to lean on. Do not represent to a court or an adversary that any claim of US 5,657,332 has been invalidated — it has not. The "no PTAB activity" finding cuts for you only in the sense that no estoppel binds you.
  2. Run the definitive negative-confirmation searches yourself and retain the results as evidence of diligence, since this conclusion rests on ODP plus open-web sources:
  3. If a demand letter cites claims 1–7, focus the response on § 286 and § 271 timing. Establish when the accused product was first made/sold/used and whether any of it falls within the 2008-08-12 → 2014-08-12 damages window. If activity is entirely post-expiration, the patent supports no recoverable damages at all.
  4. If pre-2014 activity exists and the exposure is material, the highest-value filings are: (a) a DJ of invalidity under §§ 102/103 against claims 1–2 and 7 (the read-reference-shift recovery claims) and against claims 4–5 (method), using all available prior art with no § 315(e)(2) restriction; and (b) a § 112(b) indefiniteness challenge to the means-plus-function language in claim 1 ("means for adjusting the read reference level," "means for re-writing") framed under Williamson v. Citrix Online, 792 F.3d 1339 (Fed. Cir. 2015) — the specification's disclosure of corresponding structure for those means is comparatively thin. This § 112 ground is, notably, one that an IPR could never have raised, which is a small consolation prize for the absence of any PTAB record.

If you are the patent owner / licensor:

  • You have an unusually clean post-grant record: no cancellation, no adverse Board construction, no estoppel, and no invalidity judgment on the AIA side. That is genuinely favorable and worth stating in licensing discussions — but it is favorable because the claims were never tested, not because they were tested and survived. Expect a sophisticated licensee to press exactly that point, and expect the 2014-08-12 expiration to cap the damages conversation.

Milestone note: Because there are no pending proceedings, the usual PTAB clocks (three-month § 314(b) institution deadline, one-year statutory FWD deadline from institution under § 316(a)(11), and the pre-institution § 315(b) one-year bar) are not running. There is nothing to monitor.


Caveats and limits of this finding

  • Sources searched: USPTO ODP structured block (canonical) + Google Patents US5657332A + three open-web searches as described above. I did not complete direct API/database queries against PTAB E2E, PTAB API, or CourtListener RECAP full-text within this session.
  • The correct characterization of this result is "no AIA trial proceeding found in the sources searched," not an affirmative warranty that none ever existed. In practice, however, the combination of (i) ODP returning zero trials, (ii) three independent searches returning zero IPR/PGR/CBM numbers, and (iii) a 2014 expiration makes a missed, still-relevant proceeding very unlikely.
  • No proceeding numbers, claim dispositions, judge panels, institution dates, FWD outcomes, or docket numbers have been supplied in this section, because none exist in the record. Any such detail would be fabricated.

Generated 9/27/2026, 4:45:57 AM

Ownership chain (4)

Asserters network →

Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.

  1. 1992-05-20 · Assignment

    Daniel L. Auclair; Jeffrey Craig; John S. Mangan; Robert D. Norman; Daniel C. Guterman; Sanjay MehrotraSundisk Corporation

    employer/employee assignment

  2. ? · recorded 1997-04-21 · Change of Name

    Sundisk CorporationSanDisk Technologies Inc.

    change of name only

  3. ? · recorded 2011-05-18 · reel 038809/0600 · Assignment

    SanDisk Technologies Inc.SanDisk Technologies Inc.

    internal reorg

  4. 2016-05-16 · recorded 2016-05-25 · reel 038807/0898 · Change of Name

    SanDisk Technologies Inc.SanDisk Technologies Inc.

    change of name only

Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

✓ Generated

I'll research the assignment chain for US 5,657,332 before writing up. Let me run several targeted searches.

Significant lead found — a 2024 assignment from SanDisk Technologies LLC to Palisade Technologies, LLP. Let me dig into whether US 5,657,332 is in that property list.

Let me verify whether US 5,657,332 is in any NPE portfolio, and pin down the recorded reel/frame for its chain.

Assignment / Ownership Reconstruction — US 5,657,332

Search note (read first): I was able to confirm the shape of this patent's chain of title from Google Patents legal events and from SanDisk chain-of-title documents filed in unrelated PTAB proceedings, but I could not complete a direct reel/frame-level query of USPTO Assignment Center for patent number 5,657,332 itself (tool-call budget exhausted). Where I give a reel/frame below, it comes from a document that lists it as part of a SanDisk-wide chain of title — not from a record I confirmed is keyed to 5,657,332. Those are flagged [UNCONFIRMED FOR THIS PATENT]. Everything else is flagged accordingly rather than asserted.


Inventors

# Inventor Employer at filing (1992) Basis
1 Daniel L. Auclair Sundisk / SanDisk Corporation Named on the issued patent; applicant is SanDisk
2 Jeffrey Craig Sundisk / SanDisk Corporation same
3 John S. Mangan Sundisk / SanDisk Corporation same
4 Robert D. Norman Sundisk / SanDisk Corporation same
5 Daniel C. Guterman Sundisk / SanDisk Corporation same
6 Sanjay Mehrotra Sundisk / SanDisk Corporation same

How I determined employer. The specification repeatedly refers to co-pending SanDisk applications (Harari et al. Ser. No. 337,566; Gross et al. Ser. No. 422,949; Yuan & Harari Ser. No. 323,779; Mehrotra et al. Ser. No. 508,273; Harari et al. Ser. No. 670,246) as having "the same assignee as the present application," and the patent issued with SanDisk as assignee. This establishes common employment at filing but does not independently evidence each inventor's individual employment contract. Treat column 3 as "high confidence, not independently documented in the sources I retrieved."

Unusual patterns check — none present.

  • No inventor departure cluster. All six remained associated with the assignee; inventor Sanjay Mehrotra is publicly known as a SanDisk co-founder who later served as SanDisk CEO and is now CEO of Micron — I state that from general knowledge with moderate confidence, and note it is not evidence of an early exit or a fire-sale trigger.
  • No evidence any inventor assigned to a party other than the employer, or re-acquired rights later. This is a straight employer-owned patent, not a university-style or inventor-held asset.

Original assignee

Sundisk Corporation → SanDisk Corporation (the record is split, and that split matters).

  • The issued patent's front page and Google Patents list the original assignee as SanDisk Corp (Milpitas, CA).
  • Google Patents' legal events entry for 1997-04-21 records a CHANGE OF NAME whose assignor is "SUNDISK CORPORATION" and assignee is "SANDISK CORPORATION." Read literally, that means the pre-issue corporate name was Sundisk Corporation, and "SanDisk Corporation" arose by name change (the misspelling "SunDisk" was corrected at some point in the early 1990s). This corroborates a name change rather than a transfer of ownership.

Did they ship a product embodying the claims? Yes. The patent's claims are directed to read-reference-level shifting and re-write of drifted cells, implemented with ECC, in flash EEPROM — i.e., the read-margining/ECC recovery engine used in SanDisk's flash memory cards and ATA flash disk drives of that era. SanDisk was an operating NAND/flash-controller manufacturer and did not operate as a licensing shell. High confidence on the product/operating characterization; the specific product part numbers are outside what I verified here.

Current status: Acquired, then re-formed — not dissolved, not bankrupt.


Assignment timeline

Chronological. Confidence tags are deliberate — I am not filling in reel/frame numbers I did not see.

1992-05-20 (executed, inferred) / recording date not retrieved — Reel/Frame NOT RETRIEVED

  • Conveyance: Assignment (inventors → employer)
  • Assignor: Auclair; Craig; Mangan; Norman; Guterman; Mehrotra (individually)
  • Assignee: Sundisk Corporation
  • Correspondent: not retrieved
  • Context: standard employer/employee assignment at filing of the parent application Ser. No. 07/886,030. Not listed among Google Patents' legal events (Google typically omits initial filing-time assignments), so its existence is inferred from the fact that the patent issued to the corporate assignee. Flagged as not directly evidenced.

1997-04-21 (recorded) / execution date not retrieved — Reel/Frame NOT RETRIEVED

  • Conveyance: Change of Name (per Google Patents: "CHANGE OF NAME (SEE DOCUMENT FOR DETAILS)")
  • Assignor: Sundisk Corporation
  • Assignee: SanDisk Corporation
  • Correspondent: not retrieved
  • Context: internal reorg / change of name only — no change in beneficial ownership. Recorded ~4 months before the 1997-08-12 issue date.

2011-05-18 (recorded per Google Patents) / execution date not retrieved — Reel/Frame PROBABLY 038809/0600 — [UNCONFIRMED FOR THIS PATENT]

  • Conveyance: Assignment of Assignors' Interest ("ASSIGNMENT OF ASSIGNORS INTEREST")
  • Assignor: SanDisk Corporation
  • Assignee: SanDisk Technologies Inc.
  • Correspondent: not retrieved
  • Context: internal corporate reorganization — movement of the portfolio into the entity that became the Western Digital flash subsidiary. A USPTO 37 CFR 3.73(c) "Statement Under 3.73(c)" filed in a SanDisk-related PTAB proceeding lists "From: SANDISK CORPORATION To: SANDISK TECHNOLOGIES INC — recorded at Reel 038809, Frame 0600" as a link in the SanDisk chain of title. Conflict flagged: reel 038809 is a 2016-era reel, which sits awkwardly against Google's stated 2011-05-18 record date. The most likely reconciliation is that 2011-05-18 is the execution date and the record was filed in 2016 alongside the conversion paperwork — but I could not confirm that, so I record the discrepancy instead of resolving it.
  • Source: https://ptacts.uspto.gov/ptacts/public-informations/petitions/[1557895](/patent/1557895)/download-documents?artifactId=sJQTZ2Xyl8kV57dpBDeEhGOumfFtBRp2zhhs7QfqDzQLzcGVXO1vFbs

2016-05-25 (recorded) / 2016-05-16 (Texas conversion instrument) — Reel 038807/0898 — [UNCONFIRMED FOR THIS PATENT; confirmed for the SanDisk chain generally]

  • Conveyance: Change of Name
  • Assignor: SanDisk Technologies Inc.
  • Assignee: SanDisk Technologies LLC
  • Correspondent: not retrieved
  • Context: internal reorg / change of name only — Texas conversion of the Inc. into the LLC. The reel is documented in a Sandisk Technologies, Inc. v. Viasat exhibit (reel/frame series 038807/0898, recorded 05/25/2016, 17 pages) and in a Patent Center assignment abstract for a SanDisk application. I did not verify this reel is keyed to 5,657,332, though a portfolio-wide conversion filing would normally sweep in every live SanDisk asset.

2014-08-12 — no assignment; anticipated expiration of the patent term. This is not a recorded assignment but is load-bearing for the verdict (patent is dead; cannot be asserted).

2024-08-15 (recorded) / 2024-08-12 (executed) — Reel 068301/0100 — DOES NOT COVER US 5,657,332

No further assignment record for US 5,657,332 was found. Google Patents' legal-events list terminates at the 2016-05-25 change of name and reports the current assignee as SanDisk Technologies LLC.

Data anomaly flagged: the Patentcloud assignment-market entry for reel 68301-100 lists the assignor as "SANDISK TECHNOLOGIES INC" whereas the assignment instrument itself names "SanDisk Technologies LLC." The instrument controls; the tracker appears to have used a stale entity name. Also carried over from the prior sections: Google Patents' "Cited By" table attributes family member US 6,049,899 to Zilog, Inc., which conflicts with the "Family Applications" table listing it as SanDisk — unresolved.


Timeline diagram

timeline
    title Ownership of US 5657332
    1992 : Inventors assign rights to Sundisk Corporation
    1997 : Patent issued to SanDisk Corporation
         : Name change Sundisk to SanDisk
    2011 : Assigned to SanDisk Technologies Inc
    2014 : Patent term expires
    2016 : Name change to SanDisk Technologies LLC
    2024 : SanDisk sells 14 NAND patents to Palisade
         : US 5657332 excluded from that deal

NPE / troll-pattern signals

1. Shell-entity transfer — NOT PRESENT.
No licensing-only LLC appears anywhere in this patent's recorded chain. Every post-1992 link is either a name change or an intra-corporate assignment (Sundisk → SanDisk → SanDisk Technologies Inc. → SanDisk Technologies LLC). The one genuine shell/asserter transfer I found in this corporate family — Reel 068301/0100, executed 2024-08-12, SanDisk Technologies LLC → Palisade Technologies, LLP — expressly does not list 5,657,332 among its 14 properties. Naming alone is not the basis for this call; the property enumeration is.

2. Known asserter in the chain — NOT PRESENT.
Chain assignees: Sundisk Corporation → SanDisk Corporation → SanDisk Technologies Inc. → SanDisk Technologies LLC. None of these appears on the Acacia / Marathon / IV / IPNav / Wi-LAN / Converso / Vringo / Pendrell / Round Rock / Spangenberg lists mentioned in the task, and the current assignee is an operating NAND manufacturer. Important adjacency, explicitly distinguished: Palisade Technologies, LLP — an asserter that filed Palisade Techs., LLP v. Micron Tech., Inc., No. 7:24-cv-00262 (W.D. Tex., filed 2024-10-16; first amended complaint 2024-12-19) and that is the patent owner in IPR2025-01009 (U.S. 9,281,314) — is not an assignee of 5,657,332. Its 2024 acquisition from SanDisk post-dates this patent's 2014 expiration and excludes it by number.

3. Repeat correspondent across the chain — UNCLEAR for this patent / PRESENT for the adjacent deal.
I retrieved no correspondent of record for any of 5,657,332's own three recorded events, so I cannot test for recurrence on this chain. However, the 2024 SanDisk→Palisade recording (reel 068301/0100) shows David Gerasimow, 211 W. Wacker Dr., FL3 PMB1717, Chicago, IL 60606, acting as correspondent and submitter and signer of the assignee's power of attorney — i.e., a single attorney running the recording mechanics for an entire NPE-acquired portfolio. That is a textbook repeat-correspondent tell for the Palisade portfolio, and I flag it as such; it is not a finding for 5,657,332.

4. Cascading transfers — NOT PRESENT.
Three recorded events over 19 years (1997, 2011, 2016), all name changes or intra-group assignments. Nothing resembling chained LLCs inside 24 months. The 2024 Palisade deal is a single-step transfer and, again, excludes this patent.

5. Pre-litigation transfer — NOT PRESENT.
The last ownership event touching this patent predates the current date by a decade (2016-05-25) and the patent expired 2014-08-12. There is no assignment within 6 months of any suit naming 5,657,332 — and consistent with the prior litigation section, I found no suit naming it at all.

6. Bankruptcy fire-sale — NOT PRESENT.
No Chapter 7/11 of any assignor. SanDisk's 2016 endpoint was a ~$19B acquisition by Western Digital, and its 2024-2025 endpoint was a spinoff/merger reorganization evidenced by the Delaware incorporation and certificate of merger filings exhibited in Sandisk Technologies, Inc. v. Viasat. Neither is a bankruptcy sale.

7. Privateering — NOT PRESENT.
No evidence SanDisk transferred this patent to an NPE to assert on its behalf. The only SanDisk→asserter transfer I found is the 2024 Palisade deal, which is a sale, excludes this patent, and post-dates expiration. No SEC filing, Patent Progress, or EFF coverage connecting 5,657,332 to privateering surfaced.

8. Defensive aggregator — NOT PRESENT.
Chain does not terminate at RPX, AST, LOT, Unified Patents, or OIN. Note that Unified Patents' own portal surfaces US-5657332-A as prior art cited against third-party patents (e.g., in the prior-art listing on https://portal.unifiedpatents.com/patents/patent/US-[8498151](/patent/8498151)-B1) — being cited by Unified is not ownership by Unified.


Verdict

Operating-company assertion.

The chain terminates at SanDisk Technologies LLC, an operating NAND manufacturer whose products implement exactly the ECC-plus-read-margining behaviour claimed in claims 1–11; every recorded link is a name change or intra-group assignment (1997-04-21 Sundisk→SanDisk; 2011-05-18 SanDisk→SanDisk Technologies Inc., probably reel 038809/0600; 2016-05-25 converted to SanDisk Technologies LLC, probably reel 038807/0898), and no NPE ever appears as assignee of this patent — the one 2024 asserter transfer in this family (SanDisk Technologies LLC → Palisade Technologies, LLP, reel 068301/0100) excludes 5,657,332 by number. Two caveats you should carry forward: (a) the "assertion" prong is unverified — I found no suit naming this patent, and it expired 2014-08-12, so it is an operating-company-owned, non-asserted asset, which is the nearest label in the supplied menu rather than a perfect fit; and (b) I could not confirm reel/frame for the 1992 and 1997 links at all, and the 2011/2016 reel numbers come from SanDisk-wide chain-of-title documents rather than from a record keyed to 5,657,332.

Verify at: USPTO Patent Assignment Search (same underlying records as Assignment Center) — search by patent number 5657332 — https://assignment.uspto.gov/patent/index.html · https://assignmentcenter.uspto.gov/
Recommended confirmation steps: (1) run the exact-number query in Assignment Center and capture reel/frame for the 1992, 1997, 2011 and 2016 records; (2) confirm the 2011 execution-vs-recording date conflict against reel 038809/0600; (3) spot-check the Google-Patents-vs-family-table Zilog, Inc. anomaly on US 6,049,899; (4) confirm no post-2016 assignment of 5657332 exists in any Palisade, Acacia, or other NPE acquisition batch.

Generated 9/27/2026, 4:46:29 AM

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

✓ Generated

I'll research the prior art cited in US 5,657,332. Let me run several targeted searches.

Let me search the specific patent databases for the references cited on the front page.

Let me try to retrieve the front-page "References Cited" (prior art) list directly.

Methodology note (important — read first)

I ran the searches you asked for, but I need to be explicit about what I could and could not retrieve, because it directly affects the reliability of the prior-art analysis below. Two separate problems arose:

  1. The full text supplied for US 5,657,332 contains a "Cited By (403)" list — that is not prior art. It is a list of forward citations (later patents that cite 5,657,332). Every entry there postdates the patent's 1992‑05‑20 priority, so none of them can anticipate under §102. The genuinely relevant list — the patent's own front‑page "References Cited" (backward citations) — was not included in the supplied text, and my searches for it returned the citation list of a different, family‑related patent instead (see point 2).

  2. My searches returned the front‑page reference list of US 7,437,631 B2 ("Soft errors handling in EEPROM devices," Auclair et al.), not US 5,657,332. US 7,437,631 is a continuation in the same family (filed 2004 as 10/917,870, which claims priority back through US 6,049,899 and the 08/406,677 application that issued as 5,657,332). Its reference list is the cumulative list carried forward through the family and therefore approximates, but does not equal, the original 1992 citation list. I present it below as the best available proxy, clearly flagged.

I did not obtain a verbatim "References Cited" list for 5,657,332 itself. Treat everything in §3 below as provisional until confirmed against the actual front page of 5,657,332 in USPTO Patent Public Search / PatentCenter, or the "Patent Citations" tab of Google Patents.

Also, per the operating rule on literal identifiers: the string "5657332" also denotes JP 5657332 B2 (Makita, "Electrical equipment"), an unrelated Japanese patent. Do not conflate the two.


1. USPTO search result for patent number 5657332

Field Value (literal)
Patent number US 5,657,332 A
Title Soft errors handling in EEPROM devices
Application no. 08/406,677
Filing date 1995‑03‑20
Issue date 1997‑08‑12
Priority 1992‑05‑20 (division of 07/886,030, now abandoned)
Inventors Daniel L. Auclair; Jeffrey Craig; John S. Mangan; Robert D. Norman; Daniel C. Guterman; Sanjay Mehrotra
Assignee SanDisk Corp (original) / SanDisk Technologies LLC (current)
Claims 11 (independents: 1, 2, 4, 5, 7)
Status Expired – Lifetime (anticipated expiration 2014‑08‑12)

No other U.S. grant bearing this number exists; the only same-numbered document is the unrelated JP 5657332 B2.


2. What the patent itself identifies as the pertinent art (highest-confidence "prior art")

The specification of 5,657,332 distinguishes over and incorporates by reference the following co‑pending SanDisk applications. These are the references most directly "cited" by the patent and are the most probative for novelty analysis, because the patent's stated advance is that these earlier schemes (cell‑by‑cell, on‑the‑fly defect handling) were ineffective against accumulating soft errors:

Cited in the spec (by serial no./date) Issued U.S. patent (my identification) Status of identification
Ser. No. 422,949, Gross et al., filed Oct. 17, 1989 US 5,200,959 A, "Device and method for defect handling in semi-conductor memory," issued Apr. 6, 1993 High confidence (matches the US 7,437,631 reference list entry "5,200,959 A 4/1993 Gross et al.")
Ser. No. 508,273, Mehrotra et al., filed Apr. 11, 1990 US 5,172,338 A, "Multi-state EEPROM read and write circuits and techniques," issued Dec. 15, 1992 High confidence (matches "5,172,338 A 12/1992 Mehrotra et al.")
Ser. No. 337,566, Harari et al., filed Apr. 13, 1989 US 5,095,344 A, issued Mar. 10, 1992 Moderate confidence — flag for verification
Ser. No. 323,779, Yuan & Harari, filed Mar. 15, 1989 US 5,070,032 A, issued Dec. 3, 1991 Moderate confidence — flag for verification
Ser. No. 670,246, Harari et al., filed Mar. 15, 1991 Number not verified Unverified — do not rely on
Ser. No. 07/886,030 (parent), filed May 20, 1992 Abandoned; not prior art (same application family) High confidence

3. Provisional "References Cited" list (best available proxy — from family member US 7,437,631)

The following is the U.S. patent-document list from the front page of US 7,437,631 B2, the closest family member. Numbers, issue month/year and first-named inventor are as printed there. Titles are not verified in my sources and are therefore not asserted except where I have independent confidence (noted).

Pre‑1991 references (potential §102(b) art, i.e., published more than one year before the 1992‑05‑20 critical date):

Patent Issue date First inventor
4,139,911 02/1979 Sciulli et al.
4,218,764 08/1980 Furuta et al.
4,253,059 02/1981 Bell et al.
4,460,982 07/1984 Gee et al.
4,612,630 09/1986 Rosier
4,694,454 09/1987 Matsuura
4,703,196 10/1987 Arakawa
4,703,453 10/1987 Shinoda et al.
4,733,394 03/1988 Giebel
4,763,305 08/1988 Kuo
4,779,272 10/1988 Kohda et al.
4,799,195 01/1989 Iwahashi et al.
4,809,231 02/1989 Shannon et al.
4,827,450 05/1989 Kowalski
4,937,787 06/1990 Kobatake
4,962,322 10/1990 Chapman
4,964,079 10/1990 Devin
4,975,883 12/1990 Baker et al.

References issued 1991–1993 (at best §102(a) or §102(e) art only):

Patent Issue date First inventor Notes
5,043,940 08/1991 Harari SanDisk
5,052,002 09/1991 Tanagawa
5,065,364 11/1991 Atwood et al.
5,070,032 12/1991 Yuan et al. SanDisk (see §2)
5,095,344 03/1992 Harari SanDisk (see §2)
5,119,330 06/1992 Tanagawa issued after critical date
5,122,985 06/1992 Santin issued after critical date
5,132,928 07/1992 Hayashikoshi et al. issued after critical date
5,132,935 07/1992 Ashmore, Jr. issued after critical date
5,151,906 09/1992 Sawada issued after critical date
5,157,629 10/1992 Sato et al. issued after critical date
5,172,338 12/1992 Mehrotra et al. SanDisk (see §2)
5,172,339 12/1992 Noguchi et al.
5,200,922 04/1993 Rao
5,200,959 04/1993 Gross et al. SanDisk (see §2)
5,239,505 08/1993 Fazio et al.

(The list as retrieved was truncated at "5,2…"; additional later entries likely exist.)


4. §102 anticipation analysis

Bottom line: On the record available, no single reference appears to anticipate any independent claim (1, 2, 4, 5, or 7) of US 5,657,332. The patent's novelty resides in the combination of (i) an ECC/error check on read data, (ii) iteratively shifting the read reference level by a predetermined step until the error check clears (or the error count falls to ECC's correctable maximum), and (iii) rewriting the drifted cells back to their intended threshold levels. I could not find a single reference teaching all three. This is consistent with the claims having been allowed and the patent surviving to full term.

Element mapping for the key independent claims:

Claim Required elements
1 programmable cells + reference comparison read + error check + step-shifted read reference until error check clears + re-write drifted cells
2 as 1, but ECC with a max-correctable threshold; step until errors ≤ max; re-write
4 / 5 method counterparts of 1 / 2
7 circuit version: read circuit + read-error detection circuit + recovery circuit that steps the reference until no error indication (no re-write required)

Reference-by-reference assessment (provisional):

  • US 5,172,338 (Mehrotra et al., SanDisk), issued 12/15/1992, filed 04/11/1990 — most technically pertinent. Discloses multi-state EEPROM read circuits using multiple reference levels (maps to claim‑1 element "comparing the cell's threshold voltage with a read reference level," and to claim 7's "read circuit"). It does not disclose error-check-driven iterative shifting of the reference until errors clear, nor rewriting cells to their intended threshold. → Does not anticipate; possibly relevant only to claims 1/2/7's "reading means" if that were the sole difference (it is not). Also, because it issued after the critical date and is commonly owned, its use as prior art is limited to §102(e) (and disqualified for §103 by pre‑AIA §103(c) common ownership).

  • US 5,200,959 (Gross et al., SanDisk), issued 04/06/1993, filed 10/17/1989 — second most pertinent. "On-the-fly" defect detection/handling with error correction (maps to the "error checking means" element of claims 1/2 and to claim 11's "error correction codes"). The 5,657,332 specification expressly states this scheme is insufficient because small soft‑error drifts escape its per‑operation margin checks. → Does not anticipate; it lacks the reference-stepping and re‑write-to-intended-level features.

  • US 5,095,344 (Harari, SanDisk), issued 03/10/1992, filed 04/13/1989. Flash/EEPROM cell architecture; relevant to the "array of memory cells" element only. → Does not anticipate.

  • US 5,070,032 (Yuan et al., SanDisk), issued 12/03/1991, filed 03/15/1989. EEPROM structure/manufacture. → Does not anticipate. (Both 5,095,344 and 5,070,032 are §102(a) art at most.)

  • US 4,975,883 (Baker et al., 12/1990); US 4,962,322 (Chapman, 10/1990); US 4,964,079 (Devin, 10/1990); US 4,809,231 (Shannon et al., 02/1989); US 4,827,450 (Kowalski, 05/1989); US 4,733,394 (Giebel, 03/1988); US 4,139,911 (Sciulli, 02/1979). These pre‑May‑1991 documents are potentially §102(b) art and are the most likely candidates for disclosing memory‑error‑correction and/or programmable reference/margin reading. However, based on the information I could retrieve I cannot verify their disclosures, and none is reported to teach the combination of error-driven iterative reference shifting plus re‑write to intended threshold levels. → I would not assert anticipation by any of these without reading the full texts. These are the references I would examine first to attempt a §102 challenge, because of their §102(b) status.

  • US 5,239,505 (Fazio et al., 08/1993), US 5,200,922 (Rao, 04/1993), US 5,172,339 (Noguchi et al., 12/1992), and the 1992‑issued 5,11x/5,13x/5,15x series (Tanagawa, Santin, Hayashikoshi, Ashmore, Sawada, Sato). All issued on or after 1992‑05‑20, i.e., after the effective filing date. They can only be prior art under §102(e) (if filed before the applicant's invention date and "by another"). → Not §102(a)/(b) art; weak for anticipation.

Dependent claims 3, 6, 8–11: No independent significance for anticipation; they add ECC implementation (3, 6, 11), deactivation on a predefined condition (8, 9), and a re‑write circuit (10). Claim 10 in particular supplies the "re‑write" element absent from claim 7 — the reference‑shifting references above lack it, and the re‑write references lack the shifting.


5. Caveats and recommended verification steps

  1. This is a provisional analysis, not an official record. The citation list above is the family list from US 7,437,631, not the verified front page of US 5,657,332. Before relying on it in any filing, pull the actual "References Cited" list from:
  2. I could not verify the titles or disclosures of most of the 1979–1990 references. Any statement that a given reference "discloses" an element would be speculation on my part; I have therefore flagged guesses rather than asserting them.
  3. The "Cited By (403)" list in the supplied full text is forward‑citation only and is legally irrelevant to anticipation of 5,657,332. Note one anomaly visible in that list: Google Patents' "Cited By" table attributes US 6,049,899 to Zilog, Inc., while the "Family Applications" table lists it as SanDisk — an unresolved discrepancy worth checking against the assignment record.
  4. Date rule applied: because 5,657,332 is a division of 07/886,030 filed 1992‑05‑20, the effective filing date is 1992‑05‑20 and the §102(b) critical date is 1991‑05‑20; references published before that date are the strongest prior art.

If you can grant another search round, the highest‑value queries are the exact‑number lookups on USPTO PatentCenter and Google Patents' Patent Citations tab for US5657332, plus full‑text retrieval of the pre‑1991 references (4,975,883; 4,962,322; 4,733,394; 4,827,450; 4,809,231) to complete the §102 analysis.

Generated 9/27/2026, 4:46:34 AM

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

✓ Generated

I'll pull the actual prior-art references cited on the face of US 5,657,332 and identify the published equivalents of the co-pending applications the specification relies on, since those are the real § 103 candidates (the "Cited By" list on the page is later art and cannot be § 102/103 prior art against a 1992 priority date).

I have partial prior-art data from sibling family members. Let me pin down the exact "References Cited" list on US 5,657,332 itself and identify the content of the key references.

Obviousness Analysis — U.S. Patent No. 5,657,332 (35 U.S.C. § 103)

Builds on the previously generated bibliographic, abstract, claim-overview and status sections. Do not re-read those; this memo assumes them.


0. Threshold note on "the Prior Art section of this page"

Two things must be flagged before analysis, because they materially limit what can honestly be done here:

  1. The Google Patents copy supplied in the prompt does not contain the front-page "References Cited" (Patent Citations) list at all. The text jumps from the Claims (11) block straight into the citation tables. The only prior-art content actually on the page is:
    • the "Prior art keywords" line — read; errors; cells; error; threshold voltage (i.e., the examiner's field of search was the read/verify/error domain, not, say, memory cell fabrication); and
    • the "Cited By (403)" list — which is later art and therefore legally cannot be § 102/§ 103 prior art against a May 20, 1992 critical date. It is useful only as evidence of the state of the art at later dates and as evidence of who was working the problem.
  2. I therefore recovered the examiner-cited references from sibling/continuation members of the same family that reproduce the same specification, namely US 5,532,962 (Auclair et al., granted Jul. 2, 1996 — a continuation of the same Ser. No. 07/886,030), US 6,049,899, US 7,437,631 and US 7,839,685.

Contradiction flag (minor, carried forward): the earlier "Practitioner notes" flagged the "Cited By" table attributing US 6,049,899 to Zilog, Inc. That anomaly is now corroborated as an artifact — the US 6,049,899 PDF front page states it is a continuation of "Ser. No. 08/406,677, filed Mar. 20, 1995, now U.S. Pat. No. 5,657,332," i.e., it is a SanDisk family member, not Zilog art. (Source: https://patentimages.storage.googleapis.com/9e/59/e4/26be123b23be63/US6049899.pdf)


1. Legal framework (pre-AIA)

  • The application is a division of Ser. No. 07/886,030, filed May 20, 1992 (now abandoned). The effective filing date is therefore May 20, 1992; the § 102(b) critical date is May 20, 1991.
  • Pre-AIA § 103(a) governs. References qualify as prior art under § 102(a) (known/published before the invention), § 102(b) (>1 yr before filing), and § 102(e) (US patents/applications filed before May 20, 1992, even if they issued later).
  • Pre-AIA § 103(c) matters enormously here (see § 3 below).

The patent has expired (anticipated expiration Aug. 12, 2014), so this is a retrospective validity/defensive analysis; obviousness would be adjudicated under pre-AIA law with the expired-claim limitation that damages-facing infringement no longer applies.


2. Claim-element breakdown for § 103 mapping

# Element (all independent claims; claim nos.) Character
E1 Floating-gate array, each cell Vt programmed to an intended level within a range (margined programming) (1, 2, 4, 5, 7) Admitted prior art
E2 Read by comparing cell Vt against a read reference/demarcation level (1, 2, 4, 5, 7) Admitted prior art
E3 Error checking (1, 4) or error checking and correcting with a correctable-errors ceiling (2, 5, 7, 11) over a group of cells Known (ECC)
E4 Means/error-recovery circuit for shifting the read reference level by a predetermined step from the normal-read reference, repeatedly, until the error condition clears (1, 4) or falls to ≤ the ECC ceiling (2, 5, 7–9) Core point of novelty
E5 Writing means to re-write the drifted Vt of each error-associated cell back to its intended level (1, 2, 4, 5, 10) Secondary point

Crucially, claim 7 omits E5 (only dependent claim 10 adds it). That makes claim 7 materially easier to invalidate than claims 1/2/4/5.


3. Prior-art inventory (as cited on the family front pages)

Ref. Date / class What it is understood to show Confidence
5,172,338 Mehrotra, Harari, Lee (Ser. No. 508,273, filed Apr. 11, 1990; issued Dec. 15, 1992; SanDisk) — express § 102(e) art 365/185.09 Multi-state EEPROM read relative to a set of threshold levels provided by reference cells; reading between write/erase for verify; different reference levels for normal read vs. verify; reference cells tracking cell variations High (abstract retrieved; IEEE Milestone background PDF; SanDisk/Docket Alarm copies)
4,799,195 Iwahashi et al. Jan. 1989; 365/185 Nonvolatile memory read/verify-type disclosure (content not verified) Low–Medium
4,253,059 Bell et al. Feb. 1981; 324/73 R Memory test/measurement circuitry family Low
4,460,982 Gee et al. Jul. 1984; 365/104 Memory with redundancy/repair Low
4,612,630 Rosier Sep. 1986; 365/201 Memory test/refresh-type Low
4,733,394 Giebel Mar. 1988; 365/201 Memory test-type Low
4,779,272 Kohda et al. Oct. 1988; 365/201 Memory test-type Low
4,809,231 Shannon et al. Feb. 1989; 365/201 Memory test-type Low
5,111,906 / 5,151,906 Sawada Sep. 1992; 371/511 (error detection/correction) Error-detection/correction for solid-state memory Medium (classification only)
5,132,935 Ashmore Jul. 1992; 365/185.13 Floating-gate memory read/sense Low
5,157,629 Sato et al. Oct. 1992; 365/185 Nonvolatile memory Low
5,200,922 Rao Apr. 1993; 365/185.09 Nonvolatile memory read Low
5,239,505 Fazio et al. (Intel) Aug. 1993; 365/185 Flash EEPROM Low–Medium
5,321,655 Iwahashi et al. Jun. 1994; 365/218 Nonvolatile memory Low
Lee, E.K.F. et al., "Error Correction Technique for Multivalued MOS Memory," Electronics Letters, Vol. 27, No. 15 (Jul. 18, 1991), pp. 1321–1323 Printed pub. Jul. 18, 1991 ECC applied to multivalued (multi-state) MOS memory High (title/venue; cited as "Other Publications" in US 7,839,685)

Also present in the family front pages but not prior art: EP 97460009.0 (8/1997) — the family's own later EP filing — and the family's own 5,657,332 / 5,532,962 self-citations.

Note the citation-list OCR discrepancy (do not auto-correct): this reference appears as "5,111,906 … Sawada … 371/511" in the US 5,532,962 list, but as "5,151,906 A 9/1992 Sawada" in the US 7,437,631 list. The two numbers differ and I have not resolved whether one is an OCR error. Any § 103 theory resting on Sawada must first verify the correct number and its filing date.


4. The § 103(c) problem — and why it matters for which art you may use

The three references that most directly supply elements E1/E2/E4 are:

  • Mehrotra et al. '338 (Ser. No. 508,273),
  • Harari et al. Ser. No. 337,566 (filed Apr. 13, 1989 → issued inter alia as US 5,095,344 / 5,297,148), and
  • Gross et al. Ser. No. 422,949 (filed Oct. 17, 1989),

each of which the specification expressly identifies as sharing "the same assignee as the present application."

Because these qualify as prior art only under § 102(e) (they were pending/published-after relative to the May 20, 1992 filing), pre-AIA § 103(c) removes them from § 103 consideration if, at the time the invention was made, they and the claimed invention were commonly owned or subject to an assignment obligation to the same person. On the face of the specification, they were (SanDisk/SunDisk). A defensible § 103 attack must therefore be built on the non-commonly-owned art — principally the Lee et al. 1991 paper, the Sawada error-correction patent, and the test/refresh and flash references (Bell, Rosier, Giebel, Kohda, Shannon, Fazio, Iwahashi, Sato, Ashmore, Rao).

(Caveat: the specification's own narrative describing the Harari '566 / Gross '949 "on-the-fly" schemes may still function as an applicant admission about the state of the art, which § 103(c) does not automatically neutralize. That is a litigable point, not a settled one.)


5. Proposed § 103 combinations

Combination A — Claims 1 & 4 (shift-the-reference-until-error-free)

References: Lee et al. (1991) in view of a nonvolatile-memory "multiple/adjustable read-reference" teaching — e.g., Mehrotra '338 (if § 103(c) can be defeated by showing non-common ownership at the relevant time) or, failing that, Sato '629 / Ashmore '935 / Iwahashi '195.

  • Lee et al. supplies E3 (ECC for a multivalued MOS memory — i.e., error checking on a group of cells read against threshold references) and the express motivation that error correction is the way to keep a multivalued/margined memory reliable.
  • The secondary reference supplies E2 in adjustable form: a memory whose demarcation/reference level is one of several selectable levels (this is the everyday multi-state read/verify capability of a '338-type device, and the essence of the patent's own FIG. 6a multiplexer).
  • E4 is the combination of the two: use the already-existing ability to select a different reference level as the recovery lever when ECC reports an error.

Motivation (KSR-grade): (i) the problem is expressly the known ECC ceiling — once errors exceed capacity, data is lost; (ii) the prior art already provided a finite, identified set of alternatives (shift the reference up, shift it down, or leave it), and trial-and-error stepping of a sense threshold is the natural, predictable approach; (iii) Lee et al.'s own teaching is that ECC for multilevel MOS memory is limited by error count, which directs the artisan to the reference level as the degree of freedom because that is what determines whether a drifted cell is counted as an error at all. Under KSR, "use of a known technique to improve a similar device in the same way."

Combination B — Claim 7 (apparatus, no re-write)

Claim 7 is an apparatus claim reciting only: read circuit (E2) + read error detection circuit producing a predefined error indication (E3) + error recovery circuit that shifts the read reference by a predetermined step until the indication disappears (E4), with no re-write.

References: Sawada (error-detection/correction circuit for memory) in view of [Sato '629 / Ashmore '935 / Iwahashi '195 / Fazio '505] (adjustable/plural read reference or sense level), and a trivial control-logic element.

Claim 7's claim 8 ("deactivated when a predefined condition is reached") and claim 9 ("the condition includes reading without error indication") are met by the ordinary loop-exit of any iterative search and are, on their face, little more than the inherent termination of an "until no errors" loop. Claim 11 (error detection "includes error correction codes") is met by Sawada/Lee directly.

This is the weakest of the independent claims and, in my assessment, the most likely to fall.

Combination C — the re-write element, claims 1, 2, 4, 5, 10 (E5)

E5 ("re-writing the drifted threshold voltage … to its intended level") is the step that converts a read into a repair/refresh, and it is why this family is often cited as the ancestor of flash "scrub"/read-retention management.

Attack: Lee et al. + Sawada + [Bell '059 / Rosier '630 / Giebel '394 / Shannon '231 / Gee '982], the memory-test/refresh cluster. Those references are classified in 365/201 (testing/refresh) and 324/73 (test) and were cited by the examiner precisely because they teach detecting an out-of-tolerance memory state and restoring/rewriting the cell or memory content. Combined with the applicant's own admission that Harari '566 and Gross '949 already taught verify-then-rewrite-and-remap "on-the-fly," re-writing recovered data at full margin looks like a mechanical application of the known write-verify-rewrite cycle.

Motivation: once E4 has recovered the data, the artisan has the data in hand; the known remedy for a marginal cell (rewrite it) is the obvious next step, and the patent itself concedes that "a cell's threshold level is typically programmed with a margin."


6. Reasons a POSITA would have combined (summary of the motivation showing)

  1. Explicit problem recognition in the art: the "ECC ceiling" limitation is stated in the background and in Lee et al.; finite error-correction capacity is what motivates a non-ECC recovery avenue.
  2. Known, selectable reference levels: multi-state/nonvolatile read circuitry of the '338/'195/'629 type already had adjustable reference levels; using an existing adjustment to solve the problem is "a known technique to improve a similar device."
  3. Finite, predictable solutions: with a threshold window and a demarcation level, the available moves are monotonic: step up or step down. That is the classic "predictable variation" posture under KSR.
  4. Design incentive: extended program/erase endurance and retention were the openly stated commercial goal (the spec itself frames the DRAM-vs-EEPROM failure-mode distinction as the unmet need).

7. Points cutting toward non-obviousness (why this may still be a strong patent)

  • Closed-loop, ECC-driven stepping is not the same as open-loop margin verification. The pre-1992 references appear to teach reading at a pre-set more-stringent level (verify/margin read). Stepping the reference as a search, driven by the error-count feedback, changing the level between read attempts, is a different mode of operation. That distinction is where the independent claims live.
  • The step "until no errors" (claims 1, 4) can require reading at a level worse than specification limits — deliberately abandoning the normal read criterion. That is not an obvious use of a verify-reference; it is a recovery protocol.
  • Aggregation insight. The specification's asserted distinction (EEPROM soft errors are cumulative and aggregative across a commonly-biased group of cells, unlike isolated alpha-particle DRAM errors) is a technical insight that supplies the reason the claimed group-wise, feedback-driven recovery works where cell-by-cell "on-the-fly" schemes (Harari '566 / Gross '949) fail. If the prior art does not teach the aggregative failure mode, a strong secondary-indicia/teaching-away argument exists.
  • § 103(c) disqualification removes the closest art (Mehrotra '338, Harari '566, Gross '949) from the obviousness case; the examiner allowed the claims with that art of record.
  • Claim 7 aside, the combination claims (2/5 + ECC ceiling, and 10 + re-write) require the specific "step until errors ≤ the correctable maximum, then let ECC finish, then re-write" sequence — for which I found no single or combined reference squarely teaching the ordering.

8. Bottom line and confidence

Claim Obviousness risk Basis
7 High (likely obvious) Sawada/Lee (error detection) + adjustable-reference nonvolatile memory (Sato/Ashmore/Iwahashi/'338) + loop control; no re-write required
8, 9, 11 High (dependent on 7) Loop-termination + ECC = express content of Lee/Sawada
1, 4 Moderate Requires showing the reference could be stepped, not merely selected once, and that the stepping loop is a predictable variation — weakest against Lee + a "plural reference level" reference
2, 5 Moderate–Low The "step until errors ≤ correctable maximum" interlock with ECC is the narrowest, least-anticipated limitation
10 Moderate Re-write after recovery; supported by the memory-test/refresh cluster and the applicant's own admission re Harari '566/Gross '949, but the rewrite-to-intended-level-after-margin-recovery sequence is not squarely shown

I cannot represent that any of these reference contents are established. I retrieved only classification numbers, dates and (for '338 and Lee et al.) titles/abstracts. A real § 103 opinion requires pulling the full text of: Sawada (and resolving 5,111,906 vs. 5,151,906), Iwahashi '195, Sato '629, Ashmore '935, Rao '922, Fazio '505, Bell '059, Rosier '630, Giebel '394, Kohda '272, Shannon '231, Gee '982, and the Lee et al. paper; plus confirming filing dates for each (to test § 102(e)) and the ownership records as of May 20, 1992 (to test § 103(c) against the SanDisk-family references). I also could not verify whether the US 5,657,332 front page carries additional references beyond those reproduced in its siblings.

Sources for the prior-art lists and dates: https://patentimages.storage.googleapis.com/66/c6/e5/9476c46a5afefd/US7437631.pdf ; https://patentimages.storage.googleapis.com/cb/35/4c/5ab2334d9ae939/US7839685.pdf ; https://patentimages.storage.googleapis.com/9e/59/e4/26be123b23be63/US6049899.pdf ; https://www.docketalarm.com/cases/[PTAB](/ptab)/IPR2015-01925/Inter_Partes_Review_of_U.S._Pat._7224607/docs/09-17-2015-Petitioner/Exhibit-1025-Ex_1025___US_5,532,962_to_Auclair.pdf ; https://ieeemilestones.ethw.org/w/images/6/62/IEEE-MilestoneProposal-DataInFlashMemory-Background.pdf (Mehrotra '338 abstract/filing data) ; https://patents.google.com/patent/US5657332/en (claim text, prior-art keywords).

Generated 9/27/2026, 4:46:47 AM

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