US 8947962

Here's a concise summary of US Patent 8947962:

US Patent 8947962: On-Die Termination of Address and Command Signals

• Title: On-die termination of address and command signals
• Current Assignee: Signal LLP (as of 2025-10-15)
• Original Assignee: Rambus Inc (as of 2013-11-22)
• Inventors: Ian Shaeffer, Kyung Suk Oh
• Filing Date: November 22, 2013 (Application number US14/088,277)
• Issue Date: February 3, 2015
• Abstract: A memory controller is disclosed. The memory controller is configured to be connected to one or more memory devices via an address and control (RQ) bus. Each of the memory devices has on-die termination (ODT) circuitry connected to a subset of signal lines of the RQ bus, and the memory controller is operable to selectively disable the ODT circuitry in at least one memory device of the one or more memory devices.

Plain-Language Overview of Independent Claims:

• Claim 1: This claim describes a memory controller. This controller is designed to connect to one or more memory devices using a communication pathway called an address and control (RQ) bus. Each memory device on this bus includes special circuitry for "on-die termination" (ODT), which is connected to some of the signal lines within the RQ bus. The key feature is that this memory controller can turn off (selectively disable) the ODT circuitry in at least one of these memory devices by sending specific control signals over a set of ODT control lines.

Litigation Status:

The patent family associated with US8947962 has litigation filed in the Texas Western District Court and the Texas Eastern District Court in 2026. However, a search of CAFC 2026 dockets for US8947962 did not yield any specific results for this patent.