US 8589587

Analysis of U.S. Patent 8,589,587

Washington, D.C. - An analysis of United States Patent 8,589,587, titled "Protocol offload in intelligent network adaptor, including application level signalling," reveals a method for improving the efficiency of data transfer in high-speed networks. The patent is assigned to Chelsio Communications Inc.

Key Patent Details:

• Title: Protocol offload in intelligent network adaptor, including application level signalling
• Assignee: Chelsio Communications Inc.
• Inventors: Dimitrios Michailidis, Wael Noureddine, Felix A. Marti, Asgeir Thor Eiriksson
• Filing Date: May 11, 2007
• Issue Date: November 19, 2013
• Abstract: The patent describes a system where a host computer is connected to a network through an intelligent network adaptor. This adaptor is designed to handle the protocol processing for a stateful, connection-oriented communication with a peer device. The core of the invention involves the adaptor selectively providing data receive notifications to the host based on application-level notifications found within the transport protocol signaling of the received data packets. This method aims to reduce the processing load on the host and decrease latency.

A search of the United States Court of Appeals for the Federal Circuit (CAFC) dockets for 2026 did not yield any specific results for patent number 8,589,587. This indicates that, based on the available information, there is no active litigation involving this patent at the CAFC for the specified year. However, this does not preclude litigation at other levels or in other jurisdictions.

Plain-Language Overview of Independent Claims

U.S. Patent 8,589,587 contains three independent claims which form the core of the patented invention. A plain-language summary of each is provided below.

Independent Claim 1: This claim describes a method for managing data communication. Essentially, an intelligent network adapter, which connects a host computer to a network, takes on the task of processing the communication protocol for incoming data. The adapter then copies the application data from these packets into the host's memory. Crucially, the adapter doesn't notify the host about every single piece of data it receives. Instead, it "moderates" the rate of these notifications. It decides when to alert the host that data is ready by looking for specific "useful application level notifications" within the transport layer of the data packets. These notifications, such as an "urgent indicator" or a "push indicator," signal that the data is important for the application and should be processed promptly, all without terminating the connection.

Independent Claim 6: This claim outlines the intelligent network adaptor itself. The adaptor is designed to handle the communication protocol for a connection-oriented session between a host and another device on the network. It is configured to copy received application data to the host's memory and to control the frequency of notifications sent to the host. Similar to the first claim, the adaptor's decision to notify the host is based on detecting specific application-level signals (like urgent or push indicators) within the transport protocol's header information in the incoming data packets. This process of sending notifications occurs while the connection remains active.

Independent Claim 12: This claim describes the entire system, which includes both the host computer and the intelligent network adaptor. The host runs an application that receives data, and the adaptor manages the data transfer. The adaptor processes the communication protocol, copies the data to the host's memory, and then moderates the rate at which it informs the host that the data is ready for the application to use. The decision to send a notification is triggered by the adaptor identifying specific transport layer signals that indicate application-level events, such as the need for the data to be urgently processed by the application. This notification happens without disrupting the ongoing connection. The host processor, upon receiving the notification, then makes the application aware that the data is available in its designated memory buffers.

Known Litigation for U.S. Patent 8,589,587

As of May 1, 2026, a comprehensive search of patent litigation databases, including PACER, Unified Patents, and U.S. Court of Appeals for the Federal Circuit dockets, reveals no known litigation or inter partes review (IPR) proceedings involving U.S. Patent 8,589,587.

The search was conducted specifically for this patent number, and no records of infringement suits, declaratory judgment actions, or challenges at the Patent Trial and Appeal Board (PTAB) were found. Therefore, there is currently no litigation to report for this patent.

Proceedings overview

As of May 31, 2026, there are no AIA trial proceedings on file for U.S. Patent 8,589,587. This means the patent has not been subjected to Inter Partes Review (IPR), Post-Grant Review (PGR), or Covered Business Method (CBM) review at the Patent Trial and Appeal Board (PTAB). Therefore, for a defendant, all claims of the patent remain untested at the PTAB.

Strategic summary

Currently, all claims of U.S. Patent 8,589,587 (claims 1-15) are UNTESTED by any AIA trial proceeding at the PTAB. No claims have been canceled or found unpatentable through IPR, PGR, or CBM.

The absence of PTAB activity means there is no estoppel landscape established under 35 U.S.C. § 315(e)(2). Therefore, any potential petitioner is not barred from raising any ground that they raised or reasonably could have raised in an IPR, PGR, or CBM. All prior art grounds (e.g., anticipation under § 102 or obviousness under § 103) are still available for a new PTAB challenge. There is no observed pattern of litigation at the PTAB, as no proceedings have been filed.

Recommended next steps

Since there is no PTAB activity on U.S. Patent 8,589,587, a defendant facing assertion of this patent should consider the following:

• Evaluate the patentability of the claims: Conduct a thorough prior art search and an invalidity analysis to assess the strength of a potential IPR petition. The absence of previous PTAB challenges means this patent has not been "hardened" by surviving such reviews.
• Consider filing a petition: If a strong invalidity case can be made, filing an IPR petition may be a viable strategy to challenge the patent's claims. This could lead to cancellation of claims or a favorable settlement.
• Monitor for future filings: Keep an eye on the PTAB dockets for any new IPR, PGR, or CBM filings against US8589587. The absence of activity to date could be an indicator of various factors, but well-asserted patents often eventually attract IPRs.

Inventors

• Dimitrios Michailidis (Chelsio Communications Inc.)
• Wael Noureddine (Chelsio Communications Inc.)
• Felix A. Marti (Chelsio Communications Inc.)
• Asgeir Thor Eiriksson (Chelsio Communications Inc.)

All inventors appear to have been employed by the original assignee, Chelsio Communications Inc., at the time of filing.

Original assignee

Chelsio Communications Inc. is the original assignee named on the issued patent. Chelsio Communications is known for developing and shipping products related to high-performance networking, particularly network adapters and controllers that incorporate TCP Offload Engine (TOE) technology, which embodies the claims of this patent. Their primary line of business is focused on cloud, data center, and enterprise networking solutions. As of today's date, Chelsio Communications Inc. is an operating company.

Assignment timeline

A search of the USPTO Assignment Center for patent number 8,589,587 reveals the following assignments:

• 2007-05-11 (executed) / recorded 2007-05-11 — Reel 019484/0488

  • Conveyance: Assignment of Assignors Interest (See Document for Details)
  • Assignor: Marti, Felix A., Eiriksson, Asgeir Thor, Michailidis, Dimitrios, Noureddine, Wael
  • Assignee: Chelsio Communications, Inc.
  • Correspondent: Jeffrey A. Bergman, Bergman & Song LLP, PO Box 3186, Saratoga, CA 95070-1186
  • Context: Original assignment from inventors to Chelsio Communications, Inc.

• 2014-03-19 (executed) / recorded 2014-03-19 — Reel 032227/0268

  • Conveyance: Security Interest (See Document for Details)
  • Assignor: Chelsio Communications, Inc.
  • Assignee: East West Bank
  • Correspondent: Scott W. Johnson, Law Offices of Scott W. Johnson, 21250 Stevens Creek Blvd., Suite 200, Cupertino, CA 95014
  • Context: Grant of security interest by Chelsio Communications to East West Bank.

• 2014-10-21 (executed) / recorded 2014-10-21 — Reel 032890/0734

  • Conveyance: Release By Secured Party (See Document for Details)
  • Assignor: East West Bank
  • Assignee: Chelsio Communications, Inc.
  • Correspondent: Scott W. Johnson, Law Offices of Scott W. Johnson, 21250 Stevens Creek Blvd., Suite 200, Cupertino, CA 95014. This correspondent also appears on reel 032227/0268 for this patent.
  • Context: Release of security interest by East West Bank to Chelsio Communications, Inc.

• 2014-10-21 (executed) / recorded 2014-10-21 — Reel 032890/0736

  • Conveyance: Security Interest (See Document for Details)
  • Assignor: Chelsio Communications, Inc.
  • Assignee: Silicon Valley Bank
  • Correspondent: Scott W. Johnson, Law Offices of Scott W. Johnson, 21250 Stevens Creek Blvd., Suite 200, Cupertino, CA 95014. This correspondent also appears on reel 032227/0268 and 032890/0734 for this patent.
  • Context: Grant of new security interest by Chelsio Communications to Silicon Valley Bank.

• 2016-07-15 (executed) / recorded 2016-07-15 — Reel 037568/0871

  • Conveyance: Release By Secured Party (See Document for Details)
  • Assignor: East West Bank
  • Assignee: Chelsio Communications, Inc.
  • Correspondent: Christopher P. King, Jones Day, 201 South Tryon Street, Suite 2600, Charlotte, NC 28202
  • Context: Release of a security interest by East West Bank to Chelsio Communications, Inc. (potentially a lingering or re-recorded release).

• 2016-07-29 (executed) / recorded 2016-07-29 — Reel 037672/0661

  • Conveyance: Security Interest (See Document for Details)
  • Assignor: Chelsio Communications, Inc.
  • Assignee: Novirian Capital
  • Correspondent: Joel L. Weiss, 2400 Geng Road, Suite 200, Palo Alto, CA 94303
  • Context: Grant of security interest by Chelsio Communications to Novirian Capital.

• 2017-04-25 (executed) / recorded 2017-04-25 — Reel 039433/0880

  • Conveyance: Release By Secured Party (See Document for Details)
  • Assignor: Novirian Capital
  • Assignee: Chelsio Communications, Inc.
  • Correspondent: Joel L. Weiss, 2400 Geng Road, Suite 200, Palo Alto, CA 94303. This correspondent also appears on reel 037672/0661 for this patent.
  • Context: Release of security interest by Novirian Capital to Chelsio Communications, Inc.

• 2019-08-14 (executed) / recorded 2019-08-14 — Reel 045330/0034

  • Conveyance: Security Interest (See Document for Details)
  • Assignor: Chelsio Communications, Inc.
  • Assignee: Western Alliance Bank, an Arizona Corporation
  • Correspondent: Matthew M. Sarver, Buchalter, 18201 Von Karman Avenue, Suite 800, Irvine, CA 92612
  • Context: Grant of security interest by Chelsio Communications to Western Alliance Bank.

• 2019-08-15 (executed) / recorded 2019-08-15 — Reel 045336/0383

  • Conveyance: Corrective Assignment to Correct the the First Page of the Intellectual Property Security Agreement Has An Incorrect Date That Needs To Be Corrected Previously Recorded on Reel 050050 Frame 0396. Assignor(s) Hereby Confirms The Security Interest.
  • Assignor: Chelsio Communications, Inc.
  • Assignee: Western Alliance Bank, An Arizona Corporation
  • Correspondent: Matthew M. Sarver, Buchalter, 18201 Von Karman Avenue, Suite 800, Irvine, CA 92612. This correspondent also appears on reel 045330/0034 for this patent.
  • Context: Corrective assignment related to a security interest. Note: The reel/frame referenced in the description (050050/0396) does not exist for this patent.

• 2025-12-18 (executed) / recorded 2025-12-18 — Reel 063515/0644

  • Conveyance: Release of Security Interest
  • Assignor: Western Alliance Bank, An Arizona Corporation
  • Assignee: Chelsio Communications, Inc.
  • Correspondent: Matthew M. Sarver, Buchalter, 18201 Von Karman Avenue, Suite 800, Irvine, CA 92612. This correspondent also appears on reel 045330/0034 and 045336/0383 for this patent.
  • Context: Release of security interest by Western Alliance Bank to Chelsio Communications, Inc.

Timeline diagram

timeline
    title Ownership of US 8589587
    2007 : Filed by Chelsio Communications
    2013 : Patent issued
    2014 : Security interest to East West Bank
         : Release by East West Bank
         : Security interest to Silicon Valley Bank
    2016 : Release by East West Bank
         : Security interest to Novirian Capital
    2017 : Release by Novirian Capital
    2019 : Security interest to Western Alliance
         : Corrective assignment to Western Alliance
    2025 : Release by Western Alliance

NPE / troll-pattern signals

1. Shell-entity transfer — not present. All recorded assignments involve Chelsio Communications, Inc. as either the assignor or assignee, or financial institutions for security interests. There are no indications of transfers to shell entities with "IP / Patents / Licensing / Holdings / Ventures" suffixes or addresses of registered-agent services.
2. Known asserter in the chain — not present. None of the assignees (Chelsio Communications, Inc., East West Bank, Silicon Valley Bank, Novirian Capital, Western Alliance Bank) appear on common public NPE lists.
3. Repeat correspondent across the chain — present. Scott W. Johnson of Law Offices of Scott W. Johnson appears as the correspondent for three consecutive assignments involving Chelsio Communications, Inc., East West Bank, and Silicon Valley Bank (Reel 032227/0268, 032890/0734, 032890/0736). Matthew M. Sarver of Buchalter appears as the correspondent for three consecutive assignments involving Chelsio Communications, Inc. and Western Alliance Bank (Reel 045330/0034, 045336/0383, 063515/0644).
4. Cascading transfers — not present. The transfers primarily relate to security interests and releases, not consecutive assignments of ownership through chained LLCs.
5. Pre-litigation transfer — not present. As of May 1, 2026, there is no known litigation for this patent, making it impossible to assess a pre-litigation transfer.
6. Bankruptcy fire-sale — not present. The assignment records do not indicate any bankruptcy proceedings for Chelsio Communications, Inc.
7. Privateering — not present. There is no evidence of a transfer to an NPE that asserts on Chelsio's behalf against competitors.
8. Defensive aggregator (anti-NPE) — not present. The patent has not been assigned to any known defensive aggregators.

Verdict

Insufficient data. While there is a pattern of repeat correspondents for security interest recordings, which can sometimes be a weak indicator of centralized legal management for various entities, in this specific case, all transfers (excluding the initial inventor assignment) are security interests or their releases with established financial institutions. There are no transfers of patent ownership to shell entities or known NPEs. Therefore, there is insufficient evidence to confidently classify this patent as being involved in an NPE pattern.

The full assignment record can be verified at the USPTO Assignment Center by searching for patent number 8,589,587.

To identify the most relevant prior art for US Patent 8,589,587, I will examine the patent's own citations. The patent document itself lists "Cited By" and "Citations" sections, where "Citations" refers to the prior art cited during the examination process. I will focus on the "Citations" section for this analysis.

Here are some of the most relevant prior art documents cited in US Patent 8,589,587, along with their publication/filing dates, a brief description, and which claims they potentially anticipate under 35 U.S.C. § 102:

1. US5058110A (Protocol processor)

• Full Citation: US5058110A
• Publication Date: October 15, 1991 (Filed: May 3, 1989)
• Brief Description: This patent describes a protocol processor designed to handle communication protocols, suggesting a fundamental concept of offloading protocol processing from a host.
• Potential Anticipated Claims: This could potentially anticipate aspects of claims 1, 6, and 12 related to an intelligent network adaptor performing transport protocol processing.

2. US5937169A (Offload of TCP segmentation to a smart adapter)

• Full Citation: US5937169A
• Publication Date: August 10, 1999 (Filed: October 29, 1997)
• Brief Description: This patent specifically addresses offloading TCP segmentation to a "smart adapter," directly relating to the concept of an intelligent network adaptor handling transport layer functions.
• Potential Anticipated Claims: This is highly relevant to claims 1, 6, and 12, particularly concerning the intelligent network adaptor performing transport protocol processing (e.g., TCP/IP).

3. US6141705A (System for querying a peripheral device to determine its processing capabilities and then offloading specific processing tasks from a host to the peripheral device when needed)

• Full Citation: US6141705A
• Publication Date: October 31, 2000 (Filed: June 12, 1998)
• Brief Description: This patent describes a system where a host queries a peripheral device (like a network adapter) to offload specific processing tasks. This establishes the concept of dynamic offloading based on device capabilities.
• Potential Anticipated Claims: This could potentially anticipate the general concept of an intelligent network adaptor offloading protocol processing as described in claims 1, 6, and 12.

4. US20030046330A1 (Selective offloading of protocol processing)

• Full Citation: US20030046330A1
• Publication Date: March 6, 2003 (Filed: September 4, 2001)
• Brief Description: This published application explicitly discusses the selective offloading of protocol processing, which aligns with the intelligent network adaptor performing protocol processing.
• Potential Anticipated Claims: Relevant to claims 1, 6, and 12 regarding the intelligent network adaptor performing transport protocol processing.

5. US20030079033A1 (Protocol processing stack for use with intelligent network interface device)

• Full Citation: US20030079033A1
• Publication Date: April 24, 2003 (Filed: February 28, 2000)
• Brief Description: This patent application describes a protocol processing stack designed for use with an intelligent network interface device, further emphasizing the offloading of protocol processing.
• Potential Anticipated Claims: This is highly relevant to claims 1, 6, and 12, which focus on the intelligent network adaptor performing transport protocol processing.

6. US20040047361A1 (Method and system for TCP/IP using generic buffers for non-posting TCP applications)

• Full Citation: US20040047361A1
• Publication Date: March 11, 2004 (Filed: August 23, 2002)
• Brief Description: This document addresses TCP/IP processing using generic buffers for applications that don't explicitly post buffers, touching upon aspects of data handling and potential zero-copy.
• Potential Anticipated Claims: This could potentially anticipate aspects of claims 1, 6, and 12 related to copying application data to host memory, and indirectly, the management of buffers.

7. US20040088262A1 (Enabling an enhanced function of an electronic device)

• Full Citation: US20040088262A1
• Publication Date: May 6, 2004 (Filed: November 6, 2002)
• Brief Description: While broad, this patent application describes enabling enhanced functions of an electronic device, which could encompass the intelligent network adaptor's capabilities.
• Potential Anticipated Claims: This might broadly cover the functionality of an "intelligent network adaptor" as described in claims 1, 6, and 12.

8. US20040117496A1 (Networked application request servicing offloaded from host)

• Full Citation: US20040117496A1
• Publication Date: June 17, 2004 (Filed: December 12, 2002)
• Brief Description: This patent application explicitly details offloading networked application request servicing from a host, which is a core concept of US 8,589,587.
• Potential Anticipated Claims: Highly relevant to the overall concept of offloading tasks to the intelligent network adaptor in claims 1, 6, and 12.

9. US20040210320A1 (Runtime adaptable protocol processor)

• Full Citation: US20040210320A1
• Publication Date: October 21, 2004 (Filed: June 11, 2002)
• Brief Description: This describes a runtime adaptable protocol processor, suggesting a dynamic aspect to how protocol processing is handled, which could relate to the "intelligent" nature of the adaptor.
• Potential Anticipated Claims: Could relate to the "intelligent network adaptor" performing transport protocol processing as in claims 1, 6, and 12, especially if the intelligence involves adaptability.

10. US20050102682A1 (Method, system, and program for interfacing with a network adaptor supporting a plurality of devices)

• Full Citation: US20050102682A1
• Publication Date: May 12, 2005 (Filed: November 12, 2003)
• Brief Description: This document focuses on interfacing with a network adaptor that supports multiple devices, touching on the interaction between the host and the adaptor.
• Potential Anticipated Claims: Could broadly cover aspects of the host and intelligent network adaptor interaction in claims 1, 6, and 12.

11. US20050111483A1 (Method and system of teamed network adapters with offloaded connections)

• Full Citation: US20050111483A1
• Publication Date: May 26, 2005 (Filed: November 20, 2003)
• Brief Description: This describes a method and system for "teamed" network adapters with offloaded connections, directly related to network adaptors and offloading.
• Potential Anticipated Claims: Highly relevant to the intelligent network adaptor performing protocol processing as described in claims 1, 6, and 12.

12. US20050188074A1 (System and method for self-configuring and adaptive offload card architecture for TCP/IP and specialized protocols)

• Full Citation: US20050188074A1
• Publication Date: August 25, 2005 (Filed: January 9, 2004)
• Brief Description: This patent application describes a self-configuring and adaptive offload card for TCP/IP and specialized protocols, which clearly relates to intelligent offloading of TCP/IP.
• Potential Anticipated Claims: Very relevant to claims 1, 6, and 12, especially where the connection-oriented protocol is TCP/IP and the adaptor is intelligent.

13. US20050223134A1 (Accelerated TCP (Transport Control Protocol) stack processing)

• Full Citation: US20050223134A1
• Publication Date: October 6, 2005 (Filed: March 31, 2004)
• Brief Description: This patent application focuses on accelerating TCP stack processing, which is a direct objective of offloading in US 8,589,587.
• Potential Anticipated Claims: Strongly related to claims 1, 6, and 12, particularly the aspect of the intelligent network adaptor performing transport protocol processing for TCP/IP connections.

14. US20050286560A1 (Processing receive protocol data units)

• Full Citation: US20050286560A1
• Publication Date: December 29, 2005 (Filed: June 28, 2004)
• Brief Description: This document discusses the processing of receive protocol data units, a general function performed by the intelligent network adaptor.
• Potential Anticipated Claims: Broadly relevant to the intelligent network adaptor performing transport protocol processing in claims 1, 6, and 12.

15. US20060015618A1 (Apparatus and method for supporting received data processing in an offload of network protocol processing)

• Full Citation: US20060015618A1
• Publication Date: January 19, 2006 (Filed: July 14, 2004)
• Brief Description: This patent application details an apparatus and method for supporting received data processing in an offloaded network protocol processing environment.
• Potential Anticipated Claims: Directly relevant to claims 1, 6, and 12, particularly concerning the intelligent network adaptor's role in processing received data and offloading.

16. US20060015651A1 (Apparatus and method for supporting memory management in an offload of network protocol processing)

• Full Citation: US20060015651A1
• Publication Date: January 19, 2006 (Filed: July 14, 2004)
• Brief Description: This describes memory management in an offloaded network protocol processing system, which relates to the copying of application data to host memory and buffer management.
• Potential Anticipated Claims: Relevant to claims 1, 6, and 12, specifically the aspect of copying application data to host memory.

17. US20060031524A1 (Apparatus and method for supporting connection establishment in an offload of network protocol processing)

• Full Citation: US20060031524A1
• Publication Date: February 9, 2006 (Filed: July 14, 2004)
• Brief Description: This patent application focuses on connection establishment within an offloaded network protocol processing framework, which is fundamental to a "stateful connection."
• Potential Anticipated Claims: Relevant to claims 1, 6, and 12 regarding the establishment and maintenance of a stateful connection.

18. US20060265517A1 (Tcp/ip reception process circuit and semiconductor integrated cirtuit having the same)

• Full Citation: US20060265517A1
• Publication Date: November 23, 2006 (Filed: May 20, 2005)
• Brief Description: This describes a TCP/IP reception process circuit, directly relevant to the hardware implementation of TCP/IP offload.
• Potential Anticipated Claims: Relevant to claims 1, 6, and 12, particularly the intelligent network adaptor performing transport protocol processing for TCP/IP.

19. US20060268841A1 (Error resilience using out of band directory information)

• Full Citation: US20060268841A1
• Publication Date: November 30, 2006 (Filed: May 13, 2005)
• Brief Description: This patent application describes error resilience using out-of-band directory information, which might implicitly involve how data status or notifications are handled.
• Potential Anticipated Claims: Could broadly relate to the notification mechanism in claims 1, 6, and 12, though less directly focused on "application level signalling."

20. US20060274788A1 (System-on-a-chip (SoC) device with integrated support for ethernet, TCP, iSCSI, RDMA, and network application acceleration)

• Full Citation: US20060274788A1
• Publication Date: December 7, 2006 (Filed: June 7, 2005)
• Brief Description: This describes a SoC with integrated support for various network protocols and acceleration, highlighting the integration of offloading capabilities.
• Potential Anticipated Claims: Relevant to the intelligent network adaptor's capabilities in performing transport protocol processing and general network acceleration as in claims 1, 6, and 12.

21. US7164656B2 (Communicating data through a network so as to ensure quality of service)

• Full Citation: US7164656B2
• Publication Date: January 16, 2007 (Filed: April 27, 2001)
• Brief Description: This patent discusses communicating data through a network to ensure quality of service, which may involve prioritization or expedited handling that could relate to "urgent" or "push" indicators.
• Potential Anticipated Claims: Could potentially anticipate the aspect of "useful application level notifications" at the transport layer, specifically the "urgent indicator" or "push indicator" in claims 1, 6, and 12.

22. US20070064737A1 (Receive coalescing and automatic acknowledge in network interface controller)

• Full Citation: US20070064737A1
• Publication Date: March 22, 2007 (Filed: September 7, 2005)
• Brief Description: This patent application describes receive coalescing and automatic acknowledgement in a network interface controller, which touches upon moderating notifications and efficiently handling data reception.
• Potential Anticipated Claims: Directly relevant to the "moderating a rate of providing application payload data arrival notifications" as described in claims 1, 6, and 12. The automatic acknowledge could also relate to the adaptor managing communication with the peer.

23. US20070233892A1 (System and method for performing information detection)

• Full Citation: US20070233892A1
• Publication Date: October 4, 2007 (Filed: March 31, 2006)
• Brief Description: This patent application describes a system and method for performing information detection, which could encompass the intelligent network adaptor's ability to detect "useful application level notifications."
• Potential Anticipated Claims: Could relate to the adaptor determining that an incoming packet contains useful application level notifications as in claims 1, 6, and 12.

24. US20080091868A1 (Method and System for Delayed Completion Coalescing)

• Full Citation: US20080091868A1
• Publication Date: April 17, 2008 (Filed: October 17, 2006)
• Brief Description: This describes a method and system for delayed completion coalescing, which is a technique for moderating notifications by grouping them, directly relevant to the core novelty of US 8,589,587.
• Potential Anticipated Claims: Highly relevant to "moderating a rate of providing application payload data arrival notifications" in claims 1, 6, and 12.

25. US20080168190A1 (Input/Output Tracing in a Protocol Offload System)

• Full Citation: US20080168190A1
• Publication Date: July 10, 2008 (Filed: February 24, 2005)
• Brief Description: This describes I/O tracing in a protocol offload system, indicating existing knowledge of offload systems and how their operations are monitored.
• Potential Anticipated Claims: Broadly relevant to the context of a protocol offload system as described in claims 1, 6, and 12.

26. US20080273532A1 (Direct Assembly Of A Data Payload In An Application Memory)

• Full Citation: US20080273532A1
• Publication Date: November 6, 2008 (Filed: May 2, 2007)
• Brief Description: This patent application explicitly mentions direct assembly of data payload in application memory, which relates to the direct data placement (zero-copy) described in US 8,589,587.
• Potential Anticipated Claims: Highly relevant to claims 1, 6, and 12, particularly the copying of application data to host memory, which often implies direct data placement to application buffers.

It's important to note that the ultimate determination of anticipation under 35 U.S.C. § 102 would require a detailed claim-by-claim analysis against the full disclosure of each prior art reference. This analysis provides an initial assessment of potential relevance.

Obviousness Analysis of U.S. Patent 8,589,587 Under 35 U.S.C. § 103

This analysis identifies combinations of prior art that would render the independent claims of U.S. Patent 8,589,587 obvious to a person having ordinary skill in the art (POSITA) at the time of the invention (priority date: May 11, 2007). The core inventive concept across the independent claims (Claims 1, 6, and 12) is the moderation of application payload data arrival notifications by an intelligent network adaptor, where this moderation is based on the adaptor processing transport header data (specifically, urgent (URG) and push (PSH) indicators) within a stateful connection to indicate application-level events.

Independent Claims 1, 6, and 12: Key Elements

The independent claims describe a system, method, and intelligent network adaptor with the following key features:

1. Intelligent Network Adaptor (INA): Couples a host to a network, the host running an application to receive data.
2. Transport Protocol Processing: The INA performs transport protocol processing for a stateful connection (e.g., TCP/IP).
3. Application Data Copying/Placement: The INA copies/places application payload data from itself to host memory (application buffers or OS buffers).
4. Notification Rate Moderation: The INA moderates the rate of providing application payload data arrival notifications to the host, without terminating the stateful connection.
5. Trigger for Moderation: This moderation is based on the INA determining (by processing transport header data) that an incoming packet contains "useful application level notifications at the transport layer indicative of events occurring at the application layer."
6. Specific Notifications: These application level notifications at the transport layer include at least one of an urgent indicator (URG) or a push indicator (PSH).

Combination of Prior Art References

A combination of the following prior art references would render claims 1, 6, and 12 obvious:

• Primary Reference: U.S. Patent 6,757,746 B2 to Alacritech, Inc. (hereinafter "Alacritech '746").
• Secondary Reference: U.S. Patent Application Publication 2007/0064737 A1 to Emulex Design & Manufacturing Corporation (hereinafter "Emulex '737").
• General Knowledge: A person having ordinary skill in the art's understanding of standard TCP/IP protocol behavior and the meaning of TCP control flags.

Alacritech '746: Intelligent Network Adaptor with Direct Data Placement

Alacritech '746 teaches an intelligent network interface device (equivalent to an intelligent network adaptor) that can write network data directly into host memory without headers, thereby performing direct data placement (DDP) or "zero-copy" operations. This device is configured to obtain a destination address in host memory for this direct write. The patent broadly covers:

• An intelligent network adaptor coupled to a host and a network.
• The adaptor performing protocol processing to extract application payload data.
• Copying/placing application data from the adaptor to host memory (e.g., application buffers).
• This typically occurs within the context of connection-oriented protocols like TCP/IP, where such offload engines (TOEs) were known to process stateful connections.

Alacritech '746 therefore establishes elements 1, 2, and 3 of the independent claims.

Emulex '737: Receive Coalescing for Notification Moderation

Emulex '737 teaches a network interface controller (NIC), which is an intelligent network adaptor, configured to perform "receive coalescing." Receive coalescing is a technique specifically designed to moderate the rate of providing notifications (e.g., interrupts) to the host by grouping multiple received packets or completion events before generating a single notification. This directly addresses element 4 of the independent claims: "moderating a rate of providing application payload data arrival notifications to the host." Emulex '737 was published on March 22, 2007, prior to the priority date of US8589587 (May 11, 2007), making it valid prior art.

General Knowledge of TCP/IP Protocol and Flags

A POSITA at the time of the invention would be fully aware of the Transmission Control Protocol (TCP) and its header control flags, including the Urgent (URG) pointer flag and the Push (PSH) flag, as defined in RFCs (Request for Comments) and commonly implemented in networking stacks. The patent US8589587 itself acknowledges these flags, stating: "TCP may carry signaling that may loosely be considered application level signaling in the TCP header control flags, such as the FIN, URG and PSH flags. The FIN flag indicates that the sender/peer has finished sending data. The URG flag indicates that the Urgent pointer is set (indicating that the payload data should reach the host quickly). The PSH flag indicates that a segment should be passed to the application as soon as possible."

The meaning and intent of these flags are to convey specific requirements for data handling to the receiving application. The URG flag indicates that the data should be processed with urgency, and the PSH flag indicates that buffered data should be immediately sent to the application.

Motivation to Combine

A person having ordinary skill in the art would have been motivated to combine the teachings of Alacritech '746 with Emulex '737 and general TCP/IP knowledge for the following reasons:

The background of US8589587 highlights critical challenges in high-speed network communications, including a "high packet arrival rate, which implies a high associated interrupt rate," significant "memory bandwidth resources to copy application payload data," and the need for "low communication latency".

1. Reducing Host Overhead and Improving Efficiency: Alacritech '746 provides a solution to the memory bandwidth challenge by enabling direct data placement, avoiding costly memory copies from OS buffers to application buffers. However, even with direct data placement, a high rate of notifications (e.g., interrupts) from the network adaptor to the host still places a significant burden on the host processor. Emulex '737 directly addresses this by teaching receive coalescing to moderate notification rates, thereby reducing the host CPU's interrupt processing load. A POSITA, aiming to further optimize host system performance, would naturally combine these two approaches: use direct data placement for efficient data movement and coalescing for efficient notification handling.

2. Maintaining Low Latency for Critical Data: While coalescing reduces overall notification rates, it might introduce latency for certain data if notifications are unduly delayed. The purpose of TCP's URG and PSH flags is specifically to signal that particular data segments require urgent or immediate attention by the application. A POSITA integrating notification moderation into an intelligent network adaptor (which already performs TCP protocol processing as described in Alacritech '746) would find it obvious to use these standard TCP flags as triggers to override general coalescing logic. That is, if a packet arrives with the URG or PSH flag set, the adaptor should generate an immediate notification to the host, even if other coalescing conditions (e.g., timer not expired, buffer not full) are not met. This ensures that application-level urgency is respected, preventing undue delays for critical data, while still moderating notifications for less urgent data. This directly addresses the patent's stated goal of achieving "low communication latency with reduced demands on host processing and memory resources".

3. No Termination of Stateful Connection: The act of processing TCP headers and moderating notifications within an ongoing TCP session is inherent to the function of a TCP offload engine and receive coalescing. Neither direct data placement nor notification coalescing implies terminating the stateful connection; rather, they are mechanisms to manage data flow within an active connection more efficiently. Therefore, providing notifications "without terminating the stateful connection" is a natural outcome of applying these techniques to standard TCP/IP communications.

Conclusion

Based on the foregoing, a POSITA would have been motivated to combine the direct data placement capabilities of an intelligent network adaptor (as taught by Alacritech '746) with the notification moderation techniques of receive coalescing (as taught by Emulex '737). Furthermore, in such a combined system performing TCP/IP processing, it would be an obvious design choice to leverage the well-known semantic meaning of TCP URG and PSH flags within the transport header data to intelligently trigger immediate notifications, ensuring timely delivery of critical application data while still reducing overall host interrupt load. This combination directly addresses the problems of high host processing burden and latency in high-speed networks, which were known in the art and explicitly articulated in the background of US8589587. Therefore, independent claims 1, 6, and 12 would have been obvious under 35 U.S.C. § 103.