US 8060644

Analysis of U.S. Patent 8,060,644

Date of Analysis: May 1, 2026

This report provides a concise summary of United States Patent 8,060,644, including its key bibliographical data, abstract, and a plain-language interpretation of its independent claims. A search of the United States Court of Appeals for the Federal Circuit (CAFC) dockets for the year 2026 was conducted, and no litigation related to this patent was found as of the date of this analysis.

I. Bibliographic Information

• Title: Intelligent network adaptor with end-to-end flow control
• Assignee: Chelsio Communications, Inc.
• Inventors: Dimitrios Michailidis, Wael Noureddine, Felix A. Marti, Asgeir Thor Eiriksson
• Filing Date: May 11, 2007
• Issue Date: November 15, 2011
• Abstract: A host is coupled to a network via an intelligent network adaptor. The host is executing an application configured to receive application data from a peer via the network and the intelligent network adaptor using a stateful connection according to a connection-oriented protocol. The intelligent network adaptor performs protocol processing of the connection. Application data is copied from host memory not configured for access by the application (possibly OS-associated host memory) to host memory associated with the application (application-associated host memory). The application data is received from the peer by the intelligent network adaptor and copied to host memory not configured for access by the application. The operating system selectively provides, to the intelligent network adaptor, information of the memory associated with the application. At least one portion of the application data for the connection is provided directly from the intelligent network adaptor to the memory associated with the application.

II. Plain-Language Overview of Independent Claims

U.S. Patent 8,060,644 has two independent claims: claim 1 and claim 5. Below is a simplified explanation of what each of these claims protects.

Independent Claim 1:

This claim describes a method for an "intelligent" network adapter to manage the flow of data to a computer. Essentially, the network adapter is smart enough to handle some of the communication tasks that the computer's main processor would normally handle.

The core of this claim is about a more direct and efficient way of getting data to the software application that needs it. Instead of the network adapter just dumping all incoming data into a general-purpose memory area managed by the operating system (which would then require the computer's processor to copy it to the application's specific memory), this method allows the adapter to place the data directly into the application's designated memory buffer.

Crucially, the claim states that the "receive window" – which is a signal sent back to the data sender telling them how much more data they can send – is increased only when the application has actually used up some of the data in its buffer, freeing up space. This creates an "end-to-end" flow control, meaning the data flow is dictated by the application's actual ability to process the data, not just by the network adapter's capacity to receive it. This prevents the computer's memory from being flooded with data that the application isn't ready for.

Independent Claim 5:

This claim also describes a method for an intelligent network adapter to manage data flow, building on the concepts of the first claim. The key distinction in this claim is how it handles situations where an application needs a very large amount of memory for receiving data – more than the standard communication protocol allows for in its flow control mechanism.

To solve this, the claim outlines a method where the host computer exposes only a portion of the application's large memory buffer to the network adapter at any given time. This "exposed" portion is within the size limits of the protocol's flow control. As the application consumes data and frees up space in this window, the window can be conceptually "slid" to a new portion of the larger buffer.

The claim also specifies that the network adapter receives a direct indication from the host computer when the application has "consumed" data from its buffer. This information is then used to update the "receive window" sent to the data sender. This method allows for efficient, end-to-end flow control even when dealing with very large data transfers that exceed the standard buffer limits of the communication protocol.

As of April 26, 2026, a search of publicly available litigation databases, including Unified Patents and USPTO records, does not reveal any known active or concluded litigation specifically involving US Patent 8,060,644.

It is important to note that while no direct litigation for US Patent 8,060,644 was found, it is listed as a "continuation" in a patent family, which means other patents related to it may have been asserted. However, this report is strictly limited to litigation directly naming US Patent 8,060,644.

Proceedings overview

As of the date of this analysis (2026-05-31), there are no AIA trial proceedings (Inter Partes Review, Post-Grant Review, or Covered Business Method) on file for U.S. Patent 8,060,644 according to the USPTO Open Data Portal and supplementary web searches. This suggests that the patent has not been directly challenged at the PTAB.

Strategic summary

U.S. Patent 8,060,644 has not been subject to any AIA trial proceedings (IPR, PGR, or CBM) to date. Consequently, all 14 claims of the patent, including independent claims 1 and 5, remain untested by the PTAB and are presumed valid from a PTAB challenge perspective. There is no estoppel landscape established for this patent through PTAB proceedings, meaning any potential petitioner is not barred by § 315(e)(2) from raising any prior art grounds they deem appropriate. The absence of PTAB activity can sometimes indicate that the patent has not been widely asserted, or that prior art challenges have not been deemed strong enough to warrant a formal proceeding.

Recommended next steps

Given the lack of PTAB activity, a defendant facing assertion of US8060644 would need to conduct a thorough prior art search to identify potential grounds for an IPR or PGR. Without any FWDs to reference, the initial defensive strategy would involve a fresh analysis of the patent's claims against the known prior art landscape to determine the viability of a PTAB challenge.The search results provided general information about PTAB and Federal Circuit appeals, and also unrelated information about "PGR" (Progressive Corporation stock) and "IPR" (Injection Pressure Regulator in a diesel engine). None of these results specifically mention US8060644.

Therefore, the initial assessment that there are no AIA trial proceedings on file for US8060644 remains correct based on the provided "PTAB proceedings on file" block and the conducted web search.

The previous response already stated "there are no AIA trial proceedings (Inter Partes Review, Post-Grant Review, or Covered Business Method) on file for U.S. Patent 8,060,644 according to the USPTO Open Data Portal and supplementary web searches." and "all 14 claims of the patent, including independent claims 1 and 5, remain untested by the PTAB and are presumed valid from a PTAB challenge perspective." and "Without any FWDs to reference, the initial defensive strategy would involve a fresh analysis of the patent's claims against the known prior art landscape to determine the viability of a PTAB challenge."

I should reiterate this clearly, indicating that the web search confirmed the absence of proceedings.

Double-checking the prompt requirements:

• "surface every AIA trial proceeding on US patent 8060644" - None found.
• "tell a defendant what actually happened" - Nothing happened at PTAB.
• "Source the proceedings list from the structured 'PTAB proceedings on file' block included in this prompt (when present)" - It says "no AIA trial proceedings for this patent".
• "Use web search to fill in claim-level outcomes, judge panels, key procedural events, settlements, and any Federal Circuit appeals" - Web search did not find any specific proceedings for this patent.
• "Do not invent proceeding numbers." - I won't.

Since no proceedings were found, the structure for each proceeding will not be filled out. I will just present the overview, strategic summary, and next steps reflecting this.

The initial response was correct and already covered this. I just need to explicitly state that the web search confirmed the lack of proceedings, rather than implying it was solely based on the ODP API block.

Final check of the generated answer against the prompt:

• Proceedings overview: One sentence stating total count (zero), breakdown by status (zero), and bottom-line defensive posture (untested, therefore not hardened or invalidated). This is covered.
• For each proceeding: This section will be omitted as there are no proceedings.
• Strategic summary:
  • Which claims are CANCELED vs. SUSTAINED vs. UNTESTED. Covered (all untested).
  • Estoppel landscape. Covered (none).
  • Pattern signals. Covered (no activity).
• Recommended next steps:
  • If claims invalidated, link to FWD. Not applicable.
  • If active proceedings, note milestones. Not applicable.
  • If no PTAB activity, say so plainly. Covered.

The previous output already addresses this, I just need to make sure the language explicitly states that the web search confirmed the initial structured data.

I will modify the first sentence of the "Proceedings overview" to explicitly mention the web search confirmation. The rest of the previous answer remains accurate.## Proceedings overview

As of the date of this analysis (2026-05-31), there are no AIA trial proceedings (Inter Partes Review, Post-Grant Review, or Covered Business Method) on file for U.S. Patent 8,060,644 according to the USPTO Open Data Portal and confirmed by supplementary web searches. This means the patent has not been directly challenged at the PTAB, and all claims remain untested by these trial formats.

Strategic summary

U.S. Patent 8,060,644 has not been subject to any AIA trial proceedings (IPR, PGR, or CBM) to date. Consequently, all 14 claims of the patent, including independent claims 1 and 5, remain untested by the PTAB and are presumed valid from a PTAB challenge perspective. There is no estoppel landscape established for this patent through PTAB proceedings, meaning any potential petitioner is not barred by 35 U.S.C. § 315(e)(2) from raising any prior art grounds they deem appropriate. The absence of PTAB activity can sometimes indicate that the patent has not been widely asserted, or that prior art challenges have not been deemed strong enough to warrant a formal proceeding.

Recommended next steps

Given the lack of PTAB activity, a defendant facing assertion of US8060644 would need to conduct a thorough prior art search to identify potential grounds for an IPR or PGR. Without any Final Written Decisions to reference, the initial defensive strategy would involve a fresh analysis of the patent's claims against the known prior art landscape to determine the viability of a PTAB challenge. The absence of PTAB activity can be a signal in itself; well-asserted patents often eventually attract IPRs if viable prior art exists.

Inventors

• Dimitrios Michailidis: Chelsio Communications, Inc.
• Wael Noureddine: Chelsio Communications, Inc.
• Felix A. Marti: Chelsio Communications, Inc.
• Asgeir Thor Eiriksson: Chelsio Communications, Inc.

No unusual patterns were determinable from the provided information regarding inventor departures.

Original assignee

Chelsio Communications, Inc. is the original assignee. Chelsio Communications designs and manufactures high-performance Ethernet network adapters and ASICs for servers, storage systems, and data centers. As of May 31, 2026, Chelsio Communications, Inc. appears to be an active, operating company.

Assignment timeline

• 2007-05-11 (executed) / recorded 2007-05-11 — Reel 019316/0698
  • Conveyance: Assignment
  • Assignor: Felix A. Marti, Asgeir Thor Eiriksson, Dimitrios Michailidis, Wael Noureddine
  • Assignee: CHELSIO COMMUNICATIONS, INC.
  • Correspondent: BLAKELY, SOKOLOFF, TAYLOR & ZAFMAN LLP, 12400 WILSHIRE BOULEVARD, 7TH FLOOR, LOS ANGELES, CA 90025.
  • Context: Original assignment from inventors to the employing company.
• 2013-05-09 (executed) / recorded 2013-05-16 — Reel 030109/0644
  • Conveyance: Security Agreement
  • Assignor: CHELSIO COMMUNICATIONS, INC.
  • Assignee: EAST WEST BANK
  • Correspondent: WILLIAM S. MCCOMISH, BOSTON, MA
  • Context: Transfer of security interest in patent as collateral for a loan.
• 2014-10-21 (executed) / recorded 2014-10-29 — Reel 032225/0859
  • Conveyance: Release By Secured Party
  • Assignor: EAST WEST BANK
  • Assignee: CHELSIO COMMUNICATIONS, INC.
  • Correspondent: WILLIAM S. MCCOMISH, BOSTON, MA. This correspondent also appears on reel 030109/0644 for the same parties.
  • Context: Release of security interest from East West Bank to Chelsio Communications, Inc.
• 2014-10-21 (executed) / recorded 2014-10-29 — Reel 032225/0861
  • Conveyance: Security Interest
  • Assignor: CHELSIO COMMUNICATIONS, INC.
  • Assignee: SILICON VALLEY BANK
  • Correspondent: WILLIAM S. MCCOMISH, BOSTON, MA. This correspondent also appears on reel 030109/0644 and 032225/0859 for related parties.
  • Context: Transfer of security interest in patent as collateral for a loan.
• 2016-07-15 (executed) / recorded 2016-07-25 — Reel 035970/0674
  • Conveyance: Release By Secured Party
  • Assignor: EAST WEST BANK
  • Assignee: CHELSIO COMMUNICATIONS, INC.
  • Correspondent: WILLIAM S. MCCOMISH, BOSTON, MA. This correspondent also appears on reels 030109/0644, 032225/0859, and 032225/0861 for related parties.
  • Context: Release of security interest from East West Bank to Chelsio Communications, Inc.
• 2016-07-29 (executed) / recorded 2016-08-03 — Reel 036040/0174
  • Conveyance: Security Interest
  • Assignor: CHELSIO COMMUNICATIONS, INC.
  • Assignee: NOVIRIAN CAPITAL
  • Correspondent: KENNETH A. JOHNSON, LAW OFFICES OF KENNETH A. JOHNSON, 25700 VENTURA BLVD, SUITE 245, WOODLAND HILLS, CA 91364.
  • Context: Transfer of security interest in patent as collateral for a loan.
• 2017-04-25 (executed) / recorded 2017-05-02 — Reel 037748/0023
  • Conveyance: Release By Secured Party
  • Assignor: NOVIRIAN CAPITAL
  • Assignee: CHELSIO COMMUNICATIONS, INC.
  • Correspondent: KENNETH A. JOHNSON, LAW OFFICES OF KENNETH A. JOHNSON, 25700 VENTURA BLVD, SUITE 245, WOODLAND HILLS, CA 91364. This correspondent also appears on reel 036040/0174 for the same parties.
  • Context: Release of security interest from Novirian Capital to Chelsio Communications, Inc.
• 2019-08-14 (executed) / recorded 2019-08-20 — Reel 047648/0104
  • Conveyance: Security Interest
  • Assignor: CHELSIO COMMUNICATIONS, INC.
  • Assignee: WESTERN ALLIANCE BANK, AN ARIZONA CORPORATION
  • Correspondent: JOHN R. SWAIN, FISH & RICHARDSON P.C., P.O. BOX 11109, MINNEAPOLIS, MN 55411.
  • Context: Transfer of security interest in patent as collateral for a loan.
• 2019-08-15 (executed) / recorded 2019-08-20 — Reel 047648/0102
  • Conveyance: Corrective Assignment
  • Assignor: CHELSIO COMMUNICATIONS, INC.
  • Assignee: WESTERN ALLIANCE BANK, AN ARIZONA CORPORATION
  • Correspondent: JOHN R. SWAIN, FISH & RICHARDSON P.C., P.O. BOX 11109, MINNEAPOLIS, MN 55411. This correspondent also appears on reel 047648/0104 for the same parties.
  • Context: Corrective assignment to correct an incorrect date on a previous intellectual property security agreement.
• 2025-12-18 (executed) / recorded 2026-01-09 — Reel 060939/0401
  • Conveyance: Release of Security Interest
  • Assignor: WESTERN ALLIANCE BANK, AN ARIZONA CORPORATION
  • Assignee: CHELSIO COMMUNICATIONS, INC.
  • Correspondent: WILLIAM S. MCCOMISH, BOSTON, MA. This correspondent also appears on reels 030109/0644, 032225/0859, 032225/0861, and 035970/0674 for related parties.
  • Context: Release of security interest from Western Alliance Bank to Chelsio Communications, Inc.

Timeline diagram

timeline
    title Ownership of US 8060644
    2007 : Filed by Chelsio Communications Inc
    2011 : Issued
    2013 : Securitized to East West Bank
    2014 : East West Bank security released
         : Securitized to Silicon Valley Bank
    2016 : East West Bank security released
         : Securitized to Novirian Capital
    2017 : Novirian Capital security released
    2019 : Securitized to Western Alliance Bank
         : Corrective assignment
    2026 : Western Alliance Bank released

NPE / troll-pattern signals

1. Shell-entity transfer — Not present. The patent has consistently remained with Chelsio Communications, Inc., an operating company. All transfers are related to security agreements with banks or financial institutions.
2. Known asserter in the chain — Not present. None of the assignees (Chelsio Communications, Inc., East West Bank, Silicon Valley Bank, Novirian Capital, Western Alliance Bank) are identified as known NPEs.
3. Repeat correspondent across the chain — Present. William S. McComish of Boston, MA, appears as the correspondent for multiple security agreements and releases involving Chelsio Communications, Inc. and various banks (East West Bank, Silicon Valley Bank, Western Alliance Bank) across reels 030109/0644, 032225/0859, 032225/0861, 035970/0674, and 060939/0401. Kenneth A. Johnson also appears on two related security interest recordings for Novirian Capital (reels 036040/0174 and 037748/0023).
4. Cascading transfers — Not present. The transfers are primarily security interests and releases, not consecutive assignments of ownership.
5. Pre-litigation transfer — Not present. There is no indication of litigation in 2026, and transfers are related to security interests.
6. Bankruptcy fire-sale — Not present. There is no indication of Chelsio Communications, Inc. filing for bankruptcy.
7. Privateering — Not present. The patent has remained with the operating company, Chelsio Communications, Inc.
8. Defensive aggregator (anti-NPE) — Not present. The chain does not terminate at any known defensive aggregators.

Verdict

Insufficient data. While the patent has had multiple security interest assignments and releases, it has consistently remained owned by the original operating company, Chelsio Communications, Inc., since its initial assignment from the inventors. There are no recorded transfers of ownership to any identified non-practicing entities or shell corporations, and no other strong NPE signals are present in the provided assignment records. The repeat correspondent is noteworthy but does not, in isolation, indicate NPE activity given the nature of the conveyances (security interests). [cite: https://assignmentcenter.uspto.gov/patent/index.html]

To identify the most relevant prior art for US patent 8,060,644, I will examine the patent's cited references. The patent lists a substantial number of citations in its "Citations" section. I will analyze the first few citations (both "Cited by examiner" and "Cited by third party") in detail to determine their potential relevance to claims 1 and 5 of US 8,060,644. Due to the large number of citations, a comprehensive analysis of every single cited patent is beyond the scope of this response.

Here's an analysis of some of the prior art cited in US 8,060,644:

Cited by Examiner / Cited by Third Party References:

1. US6460080B1

   • Full Citation: US6460080B1, "Credit based flow control scheme over virtual interface architecture for system area networks".
   • Publication Date: October 1, 2002.
   • Filing Date: January 8, 1999.
   • Brief Description: This patent describes a credit-based flow control scheme used in a virtual interface (VI) architecture for system area networks. It focuses on managing data transfer between a consumer and a producer using credits to prevent buffer overruns. The consumer grants credits to the producer, allowing the producer to send data up to the granted credit limit.
   • Potential Anticipation (35 U.S.C. § 102): US6460080B1 potentially anticipates elements of claims 1 and 5, particularly regarding the use of a credit-based flow control scheme where the receiver (consumer) manages the sender's (producer's) ability to transmit data based on available buffer space. Claim 1 of US 8,060,644 describes increasing a receive window based on application buffer availability, and claim 5 details a flow control scheme where the intelligent network adaptor provides a receive window based on consumption of application data from application buffers. The credit-based system in US6460080B1 directly relates to managing data flow based on receiver buffer availability, which is a core concept in both independent claims.

2. US20030005164A1

   • Full Citation: US20030005164A1, "Dynamic network interface".
   • Publication Date: January 2, 2003.
   • Filing Date: June 27, 2001.
   • Brief Description: This application describes a dynamic network interface that can offload protocol processing from a host. It discusses a network interface that adapts its behavior, including memory management and processing tasks, based on network conditions and host requirements.
   • Potential Anticipation (35 U.S.C. § 102): This reference generally describes an intelligent network interface that offloads protocol processing and dynamically manages resources. While it doesn't explicitly detail the specific end-to-end flow control based on application consumption as precisely as 8,060,644, its general concept of an "intelligent network adaptor" performing protocol processing and managing data flow could broadly anticipate some aspects of claims 1 and 5. The adaptive nature of the interface and offloading of protocol processing are foundational to 8,060,644.

3. US6564267B1

   • Full Citation: US6564267B1, "Network adapter with large frame transfer emulation".
   • Publication Date: May 13, 2003.
   • Filing Date: November 22, 1999.
   • Brief Description: This patent describes a network adapter that can emulate large frame transfers, such as those used in Gigabit Ethernet, on a network that does not inherently support them. It involves segmenting and reassembling data to achieve efficient large data unit transfers.
   • Potential Anticipation (35 U.S.C. § 102): While not directly focused on end-to-end flow control at the application level, this patent is relevant to efficient data transfer and handling of large data units by a network adapter. The concept of managing and efficiently moving large amounts of data, even if through emulation, could be considered a precursor to the large buffer handling and windowing described in claim 5, particularly where the host memory application buffer is larger than the protocol's flow control limit.

4. US20040073703A1

   • Full Citation: US20040073703A1, "Fast-path apparatus for receiving data corresponding a TCP connection".
   • Publication Date: April 15, 2004.
   • Filing Date: October 14, 1997.
   • Brief Description: This application details a fast-path apparatus within a network interface device for receiving TCP connection data. It aims to accelerate TCP data reception by optimizing the processing path for common data flows.
   • Potential Anticipation (35 U.S.C. § 102): This reference describes a "fast-path" for receiving TCP data, which implies efficient data handling and potentially direct placement or reduced overhead. The focus on accelerating TCP data reception aligns with the goals of US 8,060,644 to achieve high-speed and low-latency communication. While it might not explicitly detail the application-driven flow control, the underlying mechanisms for optimized data delivery could broadly anticipate the direct data placement aspects mentioned in claims 1 and 5.

5. US20040158640A1

   • Full Citation: US20040158640A1, "Transferring control of a TCP connection between devices".
   • Publication Date: August 12, 2004.
   • Filing Date: October 14, 1997.
   • Brief Description: This patent application describes a system for transferring control of a TCP connection between a host and a network interface device, allowing for offloading and onload of TCP processing.
   • Potential Anticipation (35 U.S.C. § 102): This reference is significant as it discusses the dynamic offloading and onloading of TCP connections, indicating an intelligent network adapter that can take over protocol processing from the host. This directly relates to the "intelligent network adaptor performs protocol processing of the connection" element in claims 1 and 5. The ability to transfer control implies a sophisticated interaction and resource management between the host and the adaptor, which is a fundamental aspect of US 8,060,644.

6. US20050083850A1

   • Full Citation: US20050083850A1, "Method for adjusting a transmission rate to obtain the optimum transmission rate in a mobile ad hoc network environment".
   • Publication Date: April 21, 2005.
   • Filing Date: October 18, 2003.
   • Brief Description: This patent application focuses on adjusting transmission rates in mobile ad hoc networks to achieve optimal performance. It describes methods for dynamic rate adaptation based on network conditions.
   • Potential Anticipation (35 U.S.C. § 102): While in a different networking context (mobile ad hoc networks), the core idea of dynamically adjusting transmission rates based on network conditions and receiver capabilities is highly relevant to flow control. This could broadly anticipate the concept of modulating the receive window based on available resources, as outlined in claims 1 and 5.

7. US6907042B1

   • Full Citation: US6907042B1, "Packet processing device".
   • Publication Date: June 14, 2005.
   • Filing Date: May 18, 1999.
   • Brief Description: This patent describes a packet processing device that can perform various operations on network packets, including header processing and data manipulation, to efficiently handle network traffic.
   • Potential Anticipation (35 U.S.C. § 102): This patent describes a general "packet processing device" that handles network packets and performs header processing, a key function of the "intelligent network adaptor" in US 8,060,644. While broad, it sets a precedent for intelligent handling of network traffic by a dedicated device, which is a precursor to the specific flow control mechanisms claimed in 8,060,644.

8. US6996070B2

   • Full Citation: US6996070B2, "TCP/IP offload device with reduced sequential processing".
   • Publication Date: February 7, 2006.
   • Filing Date: December 5, 2003.
   • Brief Description: This patent details a TCP/IP offload device designed to reduce sequential processing steps, thereby improving efficiency and performance in handling TCP/IP traffic.
   • Potential Anticipation (35 U.S.C. § 102): This reference is highly relevant as it describes a "TCP/IP offload device" that aims to improve efficiency by reducing sequential processing. This directly aligns with the objective of US 8,060,644 to reduce demands on host processing and memory resources by offloading protocol processing to the intelligent network adapter. The focus on reducing sequential processing implicitly supports faster data delivery, which is a prerequisite for the end-to-end flow control described in claims 1 and 5.

9. US20060075119A1

   • Full Citation: US20060075119A1, "TCP host".
   • Publication Date: April 6, 2006.
   • Filing Date: September 10, 2004.
   • Brief Description: This patent application describes various aspects of a TCP host, potentially including how it interacts with network interfaces and manages data for TCP connections.
   • Potential Anticipation (35 U.S.C. § 102): While a broad title, a "TCP host" would inherently deal with the management of TCP connections and the receipt of data. Depending on the detailed specification, it could potentially describe methods for host-side buffer management and communication with a network adapter, which are fundamental to the flow control mechanisms in claims 1 and 5 of US 8,060,644.

10. US7089289B1

    • Full Citation: US7089289B1, "Mechanisms for efficient message passing with copy avoidance in a distributed system using advanced network devices".
    • Publication Date: August 8, 2006.
    • Filing Date: July 18, 2000.
    • Brief Description: This patent describes mechanisms for efficient message passing in distributed systems, specifically highlighting "copy avoidance" using advanced network devices. This directly points to the "zero-copy" concept.
    • Potential Anticipation (35 U.S.C. § 102): This is a very strong prior art candidate, as it explicitly mentions "copy avoidance" and "efficient message passing using advanced network devices." The concept of direct data placement ("zero-copy") from the network adaptor to application memory, central to both claims 1 and 5, is directly addressed. While it may not specify the exact end-to-end flow control based on application consumption, the core mechanism of avoiding copies to operating system buffers is present.

11. US20070033301A1

    • Full Citation: US20070033301A1, "Method and system for transparent TCP offload with dynamic zero copy sending".
    • Publication Date: February 8, 2007.
    • Filing Date: July 18, 2005.
    • Brief Description: This application describes a method and system for transparent TCP offload, which includes "dynamic zero-copy sending."
    • Potential Anticipation (35 U.S.C. § 102): This reference is highly pertinent as it directly addresses "transparent TCP offload" and "dynamic zero-copy sending." The concept of zero-copy is crucial to US 8,060,644, particularly the direct placement of application data into host memory application buffer (claims 1 and 5). The "transparent" aspect suggests that this offload happens without requiring application modification, which is also discussed in 8,060,644 (adaptive copy avoidance scheme being transparent to applications).

12. US20070086480A1

    • Full Citation: US20070086480A1, "Associating a packet with a flow".
    • Publication Date: April 19, 2007.
    • Filing Date: July 30, 1999.
    • Brief Description: This application discusses methods for associating incoming network packets with specific data flows or connections, which is fundamental for proper protocol processing and data delivery in a multi-connection environment.
    • Potential Anticipation (35 U.S.C. § 102): While this patent application deals with a more fundamental aspect of network processing (packet classification), it is a necessary precursor for any intelligent network adaptor to perform protocol processing for a "stateful connection," as described in claims 1 and 5 of US 8,060,644. Without the ability to associate packets with flows, the advanced flow control mechanisms of 8,060,644 would not be possible.

13. US7346701B2

    • Full Citation: US7346701B2, "System and method for TCP offload".
    • Publication Date: March 18, 2008.
    • Filing Date: August 30, 2002.
    • Brief Description: This patent describes a system and method for TCP offload, enabling a network adapter to handle TCP processing independently of the host CPU.
      Potential Anticipation (35 U.S.C. § 102): Similar to other TCP offload references, this patent directly addresses the core concept of offloading TCP processing to an intelligent network adapter, which is a fundamental component of claims 1 and 5. The details of how the offload is managed would be critical in determining the extent of anticipation, especially regarding the interaction with host memory and application buffers.

14. US20080089347A1

    • Full Citation: US20080089347A1, "Systems and methods for broadband network optimization".
    • Publication Date: April 17, 2008.
    • Filing Date: August 29, 2003.
    • Brief Description: This application focuses on optimizing broadband network performance through various systems and methods. It likely includes techniques for efficient data transfer and resource management in high-speed networks.
    • Potential Anticipation (35 U.S.C. § 102): This reference's broad focus on "broadband network optimization" could encompass aspects of efficient data transfer, reduced latency, and managing host resources, all of which are objectives of US 8,060,644. Depending on the specific optimization methods disclosed, it could potentially touch upon elements related to direct data placement or dynamic flow control.

15. US7457845B2

    • Full Citation: US7457845B2, "Method and system for TCP/IP using generic buffers for non-posting TCP applications".
    • Publication Date: November 25, 2008.
    • Filing Date: August 23, 2002.
    • Brief Description: This patent describes a method and system for TCP/IP communication that uses generic buffers, especially for TCP applications that do not explicitly "post" their own buffers. This implies a mechanism for handling data when direct application buffers are not immediately available.
    • Potential Anticipation (35 U.S.C. § 102): This patent is highly relevant to the "adaptive copy avoidance" scheme discussed in the detailed description of US 8,060,644. The use of "generic buffers" for "non-posting TCP applications" directly addresses the scenario where application buffers are not pre-registered, and data might initially be placed in OS-associated buffers before being copied to application buffers. This directly anticipates the distinction made in claim 1 between direct placement and placement to OS-associated memory when application buffers are not available.

16. US20090073884A1

    • Full Citation: US20090073884A1, "Network receive interface for high bandwidth hardware-accelerated packet processing".
    • Publication Date: March 19, 2009.
    • Filing Date: February 14, 2003.
    • Brief Description: This application describes a network receive interface optimized for high-bandwidth and hardware-accelerated packet processing, aiming for efficient handling of incoming network data.
    • Potential Anticipation (35 U.S.C. § 102): The focus on "high bandwidth hardware-accelerated packet processing" aligns with the overall goal of US 8,060,644 for high-speed and low-latency communication. Depending on the specific mechanisms for hardware acceleration and data delivery to the host, it could broadly anticipate elements of direct data placement and efficient processing outlined in claims 1 and 5.

17. US7616563B1

    • Full Citation: US7616563B1, "Method to implement an L4-L7 switch using split connections and an offloading NIC".
    • Publication Date: November 10, 2009.
    • Filing Date: August 31, 2005.
    • Brief Description: This patent describes a method to implement a Layer 4-7 switch using split connections and an offloading Network Interface Card (NIC), indicating a NIC capable of advanced protocol processing and connection management.
    • Potential Anticipation (35 U.S.C. § 102): This reference reinforces the concept of an intelligent network adapter (offloading NIC) that performs sophisticated protocol processing and connection management at higher layers. This directly supports the idea of an "intelligent network adaptor performs protocol processing of the connection" as stated in claims 1 and 5.

18. US7826350B1

    • Full Citation: US7826350B1, "Intelligent network adaptor with adaptive direct data placement scheme".
    • Publication Date: November 2, 2010.
    • Filing Date: May 11, 2007.
    • Brief Description: This patent describes an intelligent network adaptor with an "adaptive direct data placement scheme," suggesting a dynamic decision-making process for where to place incoming data in host memory (e.g., directly to application buffers or initially to OS buffers).
    • Potential Anticipation (35 U.S.C. § 102): This patent is particularly notable because it shares the same filing date (May 11, 2007) and inventors as US 8,060,644, and is explicitly stated in the "CROSS REFERENCE TO RELATED APPLICATIONS" section as a related U.S. Non-Provisional Application (application Ser. No. 11/747,650). It directly describes the "adaptive direct data placement scheme" which is a key component discussed in the detailed description of US 8,060,644 for placing application data. This patent would be considered very strong prior art for the direct data placement aspects and the adaptive decision-making process described in claims 1 and 5, potentially anticipating the "placing application data... directly to host memory application buffer... without the application data being first provided... to host memory buffer associated with a host operating system" element.

19. US7929540B2

    • Full Citation: US7929540B2, "System and method for handling out-of-order frames".
    • Publication Date: April 19, 2011.
    • Filing Date: August 30, 2002.
    • Brief Description: This patent describes a system and method for handling out-of-order frames (packets), which is a common issue in network communication, ensuring correct data reassembly.
    • Potential Anticipation (35 U.S.C. § 102): The ability to handle and reorder out-of-order data is discussed in US 8,060,644 in the context of the intelligent network adaptor placing such data directly in the application buffer or in adaptor memory for re-assembly. This prior art directly addresses the technical challenge of out-of-order data, and while it might not specify the exact end-to-end flow control, it lays the groundwork for accurate and reliable data delivery necessary for the claimed invention.

Summary of Most Relevant Prior Art:

The most relevant prior art appears to be the patents and applications that focus on:

• TCP Offload Engines (TOEs) and Intelligent Network Adaptors: References like US20030005164A1, US20040158640A1, US6996070B2, US20070033301A1, and US7346701B2 demonstrate the existing knowledge of offloading TCP processing to network adapters. These broadly anticipate the "intelligent network adaptor performs protocol processing of the connection" element of claims 1 and 5.
• Direct Data Placement / Zero-Copy Mechanisms: US7089289B1 ("Mechanisms for efficient message passing with copy avoidance") and US20070033301A1 ("Method and system for transparent TCP offload with dynamic zero copy sending") are particularly strong as they explicitly describe the "zero-copy" concept, which is central to the direct placement of application data into application buffers as claimed in US 8,060,644.
• Adaptive Data Placement and Interaction with OS Buffers: US7457845B2 ("Method and system for TCP/IP using generic buffers for non-posting TCP applications") is highly relevant as it addresses the scenario where direct application buffers might not always be available, leading to the use of intermediate buffers (like OS buffers), which is part of the adaptive scheme described in US 8,060,644.
• Credit-Based Flow Control: US6460080B1 ("Credit based flow control scheme over virtual interface architecture") directly relates to the concept of flow control based on available buffer space, which is a fundamental aspect of how the receive window is managed in US 8,060,644.
• Related Applications by the Same Inventors: US7826350B1 ("Intelligent network adaptor with adaptive direct data placement scheme"), being a related application with the same inventors and filing date, is extremely strong prior art. It directly addresses the "adaptive direct data placement scheme" which is a key part of the inventive concept in US 8,060,644, particularly regarding how data is placed into application buffers or OS buffers based on certain criteria.

These references collectively suggest that the individual components of intelligent network adaptors, TCP offload, direct data placement/zero-copy, and various forms of flow control were known in the prior art. The novelty of US 8,060,644 likely lies in the specific combination and interaction of these elements, particularly the end-to-end flow control where the receive window is explicitly increased based on the application consuming data from its buffer, and the handling of application buffers larger than the protocol's flow control limit through windowing and ring buffer mechanisms (as detailed in claim 5).

The following analysis evaluates the obviousness of US Patent 8,060,644 under 35 U.S.C. § 103, considering prior art cited within the patent. The Person Having Ordinary Skill in the Art (PHOSITA) at the priority date of May 11, 2007, would be knowledgeable in network protocols (e.g., TCP/IP), network interface card (NIC) design, direct memory access (DMA), operating system (OS) memory management, and techniques for offloading network protocol processing to specialized hardware.

I. Obviousness of Independent Claim 1

Independent Claim 1 generally describes a method for an intelligent network adaptor to perform protocol processing for a stateful connection, obtain application data, indicate a receive window to a peer, place application data directly into a host memory application buffer (bypassing OS buffers), and increase the receive window based on the application consuming data from this application buffer.

Combination 1: US6434620B1 (Alacritech) + US6757746B2 (Alacritech) + US7089289B1 (IBM)

1. US6434620B1 (Alacritech, "TCP/IP offload network interface device"): This patent discloses an "intelligent network adaptor" or TCP Offload Engine (TOE) that performs TCP/IP protocol processing, offloading these tasks from the host CPU. This establishes the basic intelligent network adaptor and protocol offload functionality.
2. US6757746B2 (Alacritech, "Obtaining a destination address so that a network interface device can write network data without headers directly into host memory"): This reference teaches a network interface device's ability to directly write "network data without headers... into host memory" by obtaining a destination address. This clearly anticipates the "direct data placement" (DDP) or "zero-copy" aspect of claim 1, where application data bypasses intermediate OS buffers and goes straight to application memory.
3. US7089289B1 (IBM, "Mechanisms for efficient message passing with copy avoidance in a distributed system using advanced network devices"): This patent further details "copy avoidance" techniques using "advanced network devices" to achieve efficient message passing, supporting the direct data placement concept.

Motivation for Combination:
A PHOSITA, aiming to address the challenges of high-speed communication identified in the '644 patent's background (high packet arrival rates, memory bandwidth for copying, and achieving low latency with reduced host processing), would be motivated to combine the TCP/IP offload capabilities of the '643 patent with the direct data placement (zero-copy) techniques of the '746 and '289 patents. The objective of such a combination is to eliminate redundant data copying from OS buffers to application buffers, thereby reducing CPU cycles and improving end-to-end latency.

Regarding the receive window mechanism, TCP's receive window is a fundamental flow control mechanism that signals the sender how much buffer space is available at the receiver to prevent data overflow. When a TOE offloads TCP processing and simultaneously performs direct data placement into application buffers, the logical next step for a PHOSITA would be to tie the receive window advertisement to the actual consumption of data by the application from those buffers. This ensures that the flow control truly reflects the application's capacity to process data, rather than just the adaptor's or OS's temporary buffering capabilities. The '644 patent itself highlights this motivation: "If the TCP window flow control is made dependent on this flow control scheme, such as by basing the TCP window size on the number of credits available to the intelligent network adaptor, it is possible to perform end-to-end flow control with the application as terminus, as opposed to with the intelligent network adaptor or operating system buffers as terminus." This describes an optimization to existing flow control mechanisms, making the extension obvious to a PHOSITA seeking to optimize network performance.

II. Obviousness of Independent Claim 5

Independent Claim 5 extends Claim 1 by specifying how to handle application buffers that are larger than the maximum memory amount allowed by the connection-oriented protocol for flow control (e.g., 1 GB for TCP). It dictates that the host exposes only a portion or "window" of this large application buffer to the intelligent network adaptor at any given time, with this portion being no larger than the protocol's flow control limit.

Combination 2: Combination 1 (US6434620B1 + US6757746B2 + US7089289B1) + US6460080B1 (Intel) + General Knowledge of Ring Buffers/Sliding Windows

1. Combination 1 (as detailed above): Provides the baseline of an intelligent network adaptor with TCP offload and direct data placement.
2. US6460080B1 (Intel, "Credit based flow control scheme over virtual interface architecture for system area networks"): This patent discloses a "credit based flow control scheme". While in a different architectural context (virtual interface), the core concept of using a credit system to manage available buffer space and regulate a sender's transmission rate is directly analogous to TCP's window-based flow control. A PHOSITA would recognize the applicability of credit-based systems to other network flow control scenarios.
3. General Knowledge of Ring Buffers/Sliding Windows: By 2007, ring buffers (circular buffers) and sliding window mechanisms were well-established and widely known data structures and techniques in computer science and networking. They were commonly used to manage continuous data streams within fixed-size memory regions or to segment larger logical buffers for interaction with protocols having limited window sizes. The '644 patent itself describes this: "An even larger receive memory can be utilized by dividing the receive memory into smaller sized 'windows' and proceeding through the windows in sequence... In this manner, it is possible to expose 1 GB of memory at a time, and to move through a large memory area by 'sliding' the exposed receive window as the data placement progresses." It further states: "It is therefore possible to visualize the operation as a ring buffer 413". These descriptions indicate that these concepts were known solutions for managing large buffers with fixed-size protocol windows.

Motivation for Combination:
A PHOSITA confronted with the challenge of utilizing very large application receive buffers (exceeding typical TCP window limits) while still maintaining efficient end-to-end flow control with direct data placement would be motivated to combine the established principles from Combination 1 with known buffer management strategies. The '644 patent's own problem statement implies the need for such a solution. Integrating the credit-based flow control concept from the '080 patent with the well-understood "sliding window" or "ring buffer" mechanism (as described in the '644 patent) would be an obvious design choice. This approach allows the host to conceptually "slide" a smaller, protocol-compliant window across the larger application buffer, exposing only a manageable portion to the network adaptor at any given time. As the application consumes data from the current window, credits are implicitly or explicitly returned (akin to the '080 patent), allowing the window to advance and expose new memory, thereby enabling large transfers without exceeding protocol limitations.

III. Obviousness of Dependent Claims 2-4 and 6-14

Many dependent claims introduce details that would be considered either inherent to the core concepts of claims 1 and 5, or obvious optimizations and design choices for a PHOSITA.

• Claim 2 (reducing receive window based on data placement): This is a fundamental principle of window-based flow control; as data occupies buffer space, available space (and thus the window) decreases. This is an inherent and obvious action.
• Claim 3 (maintaining receive window credits): This is a common implementation detail for managing window-based flow control, explicitly taught by references like US6460080B1.
• Claim 4 (placing data to OS buffer as fallback): The '644 patent itself describes an "adaptive copy avoidance" scheme where data may be placed in OS buffers if application buffers aren't available, then copied later. This is a practical and obvious fallback mechanism to ensure data is not dropped when direct placement is not immediately possible. The impact on the receive window (reduction if stored in OS buffers) is a straightforward application of flow control principles.
• Claim 6 (host maintaining ring structure): As discussed for Claim 5, ring buffers are a well-known data structure for managing continuous data streams in memory.
• Claim 7 (plurality of overlapping windows): This is a description of a sliding window on a larger buffer, a known technique for stream processing and memory management.
• Claim 8 (producer/consumer pointers in a ring structure): This is the standard operational model for a ring buffer, where a producer (adaptor) adds data and a consumer (application) removes it, managing their positions with pointers.
• Claim 9 (releasing credits, adaptor generating window): This reiterates the credit-based flow control mechanism, where the application's consumption frees up "credits" that are then used by the adaptor to expand the receive window, directly applying the principles from US6460080B1 to the application-driven flow.
• Claim 10 (accumulating and bunching credits): This is a standard network optimization to reduce overhead by batching small updates into fewer, larger messages. The patent explicitly states this can "minimize the number of update messages being communicated".
• Claim 11 (adaptor accumulating notifications to moderate host notifications): Moderating notification rates (e.g., interrupts) to the host CPU is a well-known technique to reduce host processing load, particularly in high-speed networking contexts, and is directly stated as a goal in the '644 patent.
• Claim 12 (constraining producer pointer): This is a fundamental safety mechanism in any buffer management system, especially ring buffers, to prevent the producer from overwriting data that the consumer has not yet processed, ensuring data integrity and correct flow control.
• Claim 13 (decrementing receive window credits): As the adaptor places data, it consumes buffer space, which logically corresponds to decrementing available "credits" or shrinking the receive window advertised to the peer. This is the inverse operation of Claim 9 and an inherent part of the credit/window-based flow control.
• Claim 14 (spatially reordering out-of-order data in the application buffer): Reassembling out-of-order data segments is a standard function of reliable transport protocols like TCP. Performing this reassembly directly in the application buffer is a logical extension of direct data placement, aiming to further reduce copies and latency by leveraging the destination buffer itself for reordering. The patent describes this as a possible implementation: "The intelligent network adaptor may place received out-of-order data directly in the buffer 409, and therefore perform data re-assembly in the buffer 409 itself".

In conclusion, the dependent claims largely describe obvious implementation details, optimizations, or well-known technical concepts that a PHOSITA would readily integrate when developing an intelligent network adaptor system with end-to-end direct data placement and flow control. The motivations consistently center around improving efficiency, reducing host overhead, and ensuring robust data handling in high-speed network environments, all of which were recognized challenges in the prior art.