US 11740801

US Patent 11740801, titled "Cooperative flash management of storage device subdivisions," was filed on January 5, 2022, and issued on August 29, 2023. The current and original assignee is Radian Memory Systems LLC. The inventors are Andrey V. Kuzmin, Alan Chen, and Robert Lercari.

Abstract:
The patent describes storage systems and methods for managing data within them, particularly focusing on nonvolatile memory such as flash. It introduces techniques for data placement and migration based on individual metrics tracked for data (like "hot/cold" status or age) and wear metrics tracked for memory locations. These techniques can be implemented by a host, a memory controller (within a single drive), or a cooperative scheme involving both the host and one or more memory controllers. The aim is to improve the efficient integration and utilization of nonvolatile memory in various storage system architectures.

Independent Claims Overview:

• Independent Claim 1: This claim describes a method for managing a memory system that includes at least one tier of non-volatile (NV) memory. The method involves a memory controller maintaining metadata for each physical subdivision of the NV memory. This metadata includes wear information for each subdivision and persistence information for data stored in at least some of the subdivisions. The memory controller is configured to communicate this metadata to a host. The host then uses this received metadata to determine and issue a command to the memory controller to perform a memory operation on at least one specific physical subdivision, without requiring the memory controller to translate a logical address to a physical address for that command.

• Independent Claim 16: This claim is directed to a memory controller for managing at least one tier of non-volatile (NV) memory. The memory controller includes storage to store metadata for each physical subdivision of the NV memory, comprising wear information for each subdivision and persistence information for data stored in at least some subdivisions. It also includes an interface configured to receive a command from a host to send this metadata to the host and logic to send the metadata to the host via the interface. The memory controller is further configured to receive, from the host, a command for a memory operation on at least one specific physical subdivision, wherein the command is based on the metadata previously sent to the host, and the memory controller performs the memory operation on the specified physical subdivision without logical-to-physical address translation by the memory controller for that command.

• Independent Claim 22: This claim describes a memory system comprising a host and a memory controller, where the memory controller manages at least one tier of non-volatile (NV) memory. The memory controller includes storage for metadata for each physical subdivision of the NV memory, containing wear information for each subdivision and persistence information for data stored in at least some subdivisions. The memory controller has an interface to communicate this metadata to the host. The host includes logic to receive this metadata and to issue a command to the memory controller for a memory operation on a specific physical subdivision, with the command directly specifying the physical address. The memory controller is configured to execute this command based on the directly specified physical address without performing logical-to-physical address translation.

Litigation:
As of the current date, US11740801B1 is involved in litigation. A PTAB case, IPR2025-01350, has been filed and is marked as "Settlement". Additionally, a US case has been filed in the Texas Eastern District Court (case number 2:24-cv-01073). The status of the patent is "Active" with an anticipated expiration date of 2033-02-14.