US 11016918

I'll search for authoritative sources on US 11,016,918 and any 2026 CAFC activity.

I have good leads. Let me verify the actual granted claims, abstract, and the CAFC docket specifics for the '918 patent.

Let me pin down the independent claim set and the exact CAFC case mapping.

US 11,016,918 B2 — Summary

Sourcing note: I queried for the literal number 11016918 / "11,016,918" (US 11,016,918 B2). All results below relate to that number; none are for look-alike numbers. Where I could only assemble claim text from USPTO/PTAB and district-court exhibits rather than from a single authoritative full-text source, I flag it.

Bibliographic data (per USPTO front page / Google Patents)

Uncertainty flagged:

• The pre-grant publication US 2021/0124701 A1 names Hyun Lee (Ladera Ranch, CA) as an inventor (listed first), and the USPTO assignment record lists assignors "BHAKTA, JAYESH; LEE, CHI-SHE; LEE, HYUN; MILTON, SCOTT H.; SOLOMON, JEFFREY C." The issued patent prints four inventors (Chen, Solomon, Milton, Bhakta). Treat the issued front page as controlling, but note the inventor-set discrepancy vs. the publication/assignment records.
• The intermediate family member's patent number appears as both "8,974,831" and "8,874,831" in different OCR renderings of the priority chain; I can't resolve that from these sources.
• Google Patents lists several litigation entries (IPR2022-00996, IPR2023-00406, E.D. Tex. 2:21-cv-00463, 2:22-cv-00203, 2:23-cv-00628; D. Idaho 1:24-cv-00081, 1:25-cv-00323; Fed. Cir. 24-1859, 24-2203, 24-2281) as family litigation. I could not verify that every one of those specifically involves the '918 patent; some involve sibling patents in the same family.

Abstract (verbatim, from the printed patent)

"In certain embodiments, a memory module includes a printed circuit board (PCB) having an interface that couples it to a host system for provision of power, data, address and control signals. First, second, and third buck converters receive a pre-regulated input voltage and produce first, second and third regulated voltages. A converter circuit reduces the pre-regulated input voltage to provide a fourth regulated voltage. Synchronous dynamic random access memory (SDRAM) devices are coupled to one or more regulated voltages of the first, second, third and fourth regulated voltages, and a voltage monitor circuit monitors an input voltage and produces a signal in response to the input voltage having a voltage amplitude that is greater than a threshold voltage."

Important caveat on the "full patent text" you supplied: the Google Patents rendering you pasted carries the same title and an auto-generated "Definitions" summary drawn from the description (Flash-DRAM hybrid DIMM, data manager, on-DIMM controller, backup/restore, power module). That description is accurate to the specification, but it is not what the '918 patent claims. The granted claims — confirmed by the USPTO front page, PTAB records, and district-court claim-construction orders — are directed to on-module voltage conversion/regulation and voltage monitoring (the FIG. 16 "power module 1100" subject matter). The abstract above reflects that claim focus. Do not treat the Google Patents "Definitions/Overview" OCR block as the abstract or the claims.

Independent claims (plain language)

The '918 patent has three independent claims — 1, 16 and 23 (claims 2–15 depend from 1; 17–22 from 16; 24–30 from 23). Claim text below is reconstructed from the PTAB petition/exhibit listings and the E.D. Tex. claim-construction order; wording of preambles is verbatim from those sources, and connecting language is as I could best assemble — treat as high-confidence but not guaranteed character-perfect.

Claim 1 — a DIMM with multi-rail on-board power conversion feeding a buffered address/control path.
A memory module with a PCB whose edge connector plugs into a host slot (carrying power, data, address and control). It has a first, second and third buck converter, each producing a regulated voltage with its own amplitude, plus a converter circuit producing a fourth regulated voltage with a fourth amplitude. Components include SDRAM devices powered from the first regulated voltage, and at least one circuit between some of the edge connections and the SDRAMs that receives a first set of address/control signals from the host and outputs a re-driven second set to the SDRAMs. That circuit is powered by both the second and fourth regulated voltages, and one of those two amplitudes must be lower than the other. In short: a DDR-style module that generates four regulated rails on-board and uses two different rails to power the register/buffer that sits between the host bus and the DRAMs.

Claim 16 — same architecture plus an over-voltage monitor.
A memory module with a PCB/edge-connector interface; first, second and third buck converters that receive a "pre-regulated input voltage" and produce first, second and third regulated voltages; a converter circuit that reduces the pre-regulated input voltage to a fourth regulated voltage (with corresponding first–fourth amplitudes); and a voltage monitor circuit that monitors an input voltage received via the edge connections and produces a signal when that input voltage amplitude exceeds a first threshold (an over-voltage detection output). In short: on-module multi-rail power conversion plus a host-supply over-voltage detector. Dependent claims 24–27 (via the register group) and 5/12 (per the appeal record) tie the monitor/over-voltage signal to a controller that executes a write operation, including writing data to non-volatile memory.

Claim 23 — registers powered by a switchable rail, giving address/control isolation of the DRAMs.
A memory module with a PCB/edge-connector interface and four regulated rails, where the components include SDRAM devices and one or more registers. The SDRAMs are coupled to the first regulated voltage; the registers are coupled to (i) the second regulated voltage, (ii) a portion of the edge connections, and (iii) the SDRAMs, so host address/control signals reach the registers via those edge connections. First/second/third buck converters provide the first/second/third rails and a converter circuit provides the fourth rail. The second regulated voltage can be selectively switched on or off to the registers while the SDRAMs remain powered: when it is on, the registers couple the address/control signals to the SDRAMs; when it is off, the SDRAMs are decoupled from those signals. In short: power-gating the register rail is used as the isolation switch between the host bus and the DRAM address/control inputs — the mechanism the spec ties to backup/restore states where DRAM must be isolated from the host. (Claim 30 depends from 23 and adds that the three buck converters receive a pre-regulated input voltage and that the converter circuit reduces that input to the fourth regulated voltage.)

Prior-art and validity posture (relevant because it defines what these claims actually cover)

• IPR2022-00996 (Samsung Electronics Co., Ltd. v. Netlist, Inc.) — filed May 17, 2022, challenging claims 1–30; Final Written Decision Dec. 6, 2023, holding all challenged claims unpatentable as obvious (2023 WL 8525632). Grounds included Harris (U.S. Pat. Pub.) in view of FBDIMM standards, plus Amidi and Hajeck.
• Central claim terms construed: "memory module" (preamble limiting), "pre-regulated input voltage" (plain meaning — regulated before step-up/down conversion), "converter circuit" (not means-plus-function), and the "first/second/third/fourth regulated voltages / voltage amplitudes" (labels of convenience; amplitudes need not all differ).
• Statutory disclaimer note: a USPTO disclaimer of claims 24–28 was filed in the same period, but for U.S. Patent No. 12,308,087 — a different patent. I found no disclaimer of the '918 claims.

CAFC 2026 docket activity touching the '918 patent

• Netlist, Inc. v. [Samsung Electronics Co.](/litigations/by-defendant/Samsung%20Electronics%20Co.), Ltd., Nos. 24-1859, 24-1863 — the consolidated appeals from the PTAB Final Written Decisions in IPR2022-00996 ('918) and IPR2022-00999 ('054). These appeals were ordered treated as companion cases with Nos. 24-1707, 24-2203 and 24-2240 (Sept. 12, 2024 order). A nonprecedential opinion was issued September 2, 2026 (panel: Reyna, Linn, Stark) affirming the Board — the court found substantial evidence that Harris in view of the FBDIMM standards teaches receiving power through the module's edge connections, and that the combination with Amidi renders the over-voltage/write-operation claims (e.g., claims 5 and 12) obvious. Some sources caption this appeal as Netlist, Inc. v. Micron Technology, Inc., others as Netlist, Inc. v. Samsung Electronics Co., Ltd., with the Samsung case number [24-1859, 24-1863].
• Netlist, Inc. v. Samsung Electronics Co., Ltd., No. 24-2203 — separate Fed. Cir. appeal; oral argument March 6, 2026, same three-judge panel (Reyna, Linn, Stark). It is one of the companion cases.
• Micron Technology, Inc. v. Netlist, Inc., No. 24-2281 — appeal concerning federal-question jurisdiction over Micron's Idaho "bad faith patent assertion" claims; the underlying Idaho dispute involves Netlist's suits asserting U.S. Pat. Nos. 11,232,054 and 11,016,918. Oral argument noticed for June 5, 2026. Related district-court/state matters: D. Idaho 1:24-cv-00081 and 1:25-cv-00323; E.D. Tex. 2:21-cv-00463 and 2:22-cv-00203.
• The precedential September 2, 2026 decision Netlist, Inc. v. Micron Technology, Inc. affirms invalidation of U.S. Pat. No. 10,949,339 — a different patent, not '918. Do not conflate it.

Two things you should know before relying on the above

1. Date conflict. Your prompt states the current date is April 26, 2026, but the sources I retrieved include events dated September 2, 2026 (the Fed. Cir. opinion in 24-1859/24-1863) and the fetched Google Patents page is timestamped 2026-09-25. I have reported the September 2026 disposition as the most recent available information; if your operative date really is April 26, 2026, then that opinion would not yet exist and the '918 appeal would still be pending as of that date (with 24-2203 argued March 6, 2026).
2. Claim text fidelity. Claims 1, 16 and 23 are quoted/assembled from PTAB petition exhibits and the E.D. Tex. Markman order rather than from a clean USPTO claim listing in my search results. The substance is well corroborated across multiple independent documents, but if you need verbatim claim text for a filing, pull it directly from the USPTO PatentCenter/Patent Public Search record for 17/138,766 (US 11,016,918 B2).

I'll research litigation involving US patent 11016918 across litigation databases and court sources.

Let me gather more specifics on the key cases and PTAB proceedings involving this patent.

Let me check the appeals, Micron case, and recent 2025 ITC/litigation developments.

Litigation Involving U.S. Patent No. 11,016,918 ("the '918 patent")

Patent: US 11,016,918 B2 — "Flash-DRAM hybrid memory module"; assignee Netlist, Inc.; granted May 25, 2021; application 17/138,766 (filed Dec. 30, 2020); priority traced to June 1, 2007. This patent is a member of the Netlist "hybrid memory" family and is closely related to US 11,232,054 (the '054 patent), which shares its specification.

Below is the litigation I was able to confirm where the '918 patent itself was asserted or challenged. I have interpreted all case/IPR numbers literally as they appear in the docket sources.

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A. District Court Cases Asserting the '918 Patent

1. Netlist, Inc. v. Samsung Electronics Co., Ltd., [[Samsung Electronics America](/litigations/by-defendant/Samsung%20Electronics%20America), Inc.](/litigations/by-plaintiff/Samsung%20Electronics%20America%2C%20Inc.), and Samsung Semiconductor, Inc.

• Court/Jurisdiction: U.S. District Court for the Eastern District of Texas (Marshall Division), before Chief Judge Rodney Gilstrap
• Case No.: 2:21-cv-00463-JRG
• Filed: December 20, 2021 (originally asserted the '506, '339, and '918 patents; later amended to add the '054, '060, and '160 patents)
• Outcome/Status: Jury trial April 14–21, 2023. On April 21, 2023, the jury returned a unanimous verdict that Samsung willfully infringed all five asserted patents (including the '918 patent) and that none were invalid. Composite reasonable royalty of $303,150,000 (the Final Judgment allocated $147,225,000 to the '918 and '054 patents jointly). Final Judgment entered August 11, 2023. Samsung's post-trial motions were denied (July 12/23, 2024 opinion unsealed; Netlist press release July 24, 2024). Samsung noticed an appeal to the Federal Circuit on August 9, 2024 (No. 2024-2203); the Federal Circuit heard oral argument on March 6, 2026 — appeal pending.
• Sources: Netlist Final Judgment, E.D. Tex. 2:21-cv-00463, Dkt. 551; Netlist press release, Apr. 24, 2023; CAFC 2024-1859/related appeal listing

Caveat on outcome: The '918 patent was separately invalidated by the PTAB (see Section B below). The EDTX jury verdict and the PTAB FWD are in tension and are being reconciled through the appeals.

2. Netlist, Inc. v. Micron Technology, Inc., Micron Semiconductor Products, Inc., and Micron Technology Texas LLC

• Court/Jurisdiction: U.S. District Court for the Eastern District of Texas, Marshall Division (Judge Gilstrap / Mag. J. Payne)
• Case No.: 2:22-cv-00203-JRG-RSP
• Filed: June 10, 2022 (Netlist asserts six patents including the '918 patent; the complaint was one of the family suits)
• Outcome/Status: The case was stayed pending PTAB final written decisions. After the PTAB invalidated all asserted claims of the six patents (including the '918), the court issued an order maintaining the stay (Order, June 13, 2024). Status: pending/stayed as of the sources reviewed.
• Sources: CourtListener Docket 2:22-cv-00203, Order #501; Docket Alarm — search on patent 11016918

3. Netlist, Inc. v. Micron Technology, Inc., et al. (second EDTX action)

• Court/Jurisdiction: U.S. District Court for the Eastern District of Texas
• Case No.: 2:23-cv-00628-JRG
• Filed: December 22, 2023
• Outcome/Status: Micron filed a "Notice of PTAB Determinations of Unpatentability" on April 4, 2024, attaching the PTAB final written decisions (including the '918 FWD). Also stayed/affected by the PTAB outcomes. Status: pending.
• Source: E.D. Tex. 2:23-cv-00628, Defendants' Notice of PTAB Determinations

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B. PTAB Proceedings Challenging the '918 Patent

4. Samsung Electronics Co., Ltd. v. Netlist, Inc. — IPR2022-00996

• Forum: USPTO Patent Trial and Appeal Board
• Case No.: IPR2022-00996
• Filed: May 17, 2022 (challenging claims 1–30 of the '918 patent)
• Outcome/Status: Final Written Decision issued December 6, 2023 — all challenged claims (1–30) held unpatentable (obviousness). Micron Technology, Inc., Micron Semiconductor Products, Inc., and Micron Technology Texas LLC were joined as petitioners (via IPR2023-00406, see below). Request for Director Review denied March 18, 2024. Netlist appealed to the Federal Circuit (No. 2024-1859, consolidated with appeals of IPR2022-00999, IPR2022-01427, IPR2022-01428, IPR2023-00882, IPR2023-00883); Federal Circuit oral argument held March 6, 2026. Status: on appeal.
• Sources: IPR2022-00996 Final Written Decision; Netlist SEC 10-K/10-Q litigation summary

5. Micron Technology, Inc. v. Netlist, Inc. — IPR2023-00406

• Forum: USPTO Patent Trial and Appeal Board
• Case No.: IPR2023-00406
• Filed: January 6, 2023
• Outcome/Status: The petition was filed together with a motion for joinder; Micron was joined as a petitioner in IPR2022-00996, and the '918 patent claims were held unpatentable in the December 6, 2023 FWD. Marked as Final Written Decision in the patent's litigation record. Status: concluded at the PTAB; subject to the same Federal Circuit appeal.
• Sources: Docket Alarm — IPR2023-00406 listing; IPR2022-00996 FWD (noting joinder of Micron)

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C. Related/Adjacent Proceedings Referenced in the Patent's Litigation Record

The Google Patents "family has litigation" record for US 11,016,918 also lists the following, which concern the same patent family (these are family-level flags; not all necessarily assert the '918 patent itself):

• Source: Google Patents — US11016918B2 "Family has litigation" record

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D. Reported Global Settlement (Verify)

A search result from Irell & Manella (Netlist's counsel) describes a strategic alliance/settlement between Netlist and Samsung licensing Netlist's complete portfolio, under which the parties settled all pending litigation between the two companies, including actions before the U.S. ITC and in the Eastern District of Texas. The page is dated "08.2026" — i.e., after today's date (April 26, 2026) — so it should be independently verified before being relied upon. If accurate, it would resolve the Samsung district-court matters and the appeals involving the '918 patent as between Netlist and Samsung. The Micron matters and the PTAB/Federal Circuit validity rulings are not necessarily resolved by a Samsung-only settlement.

• Source: Irell & Manella — "Netlist Negotiates Settlement with Samsung Over Advanced Memory Technology"

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Summary

• Yes, litigation is known involving US 11,016,918. The patent was asserted by Netlist against Samsung (E.D. Tex. 2:21-cv-00463, $303.15M verdict including $147.225M for '918/'054, now on appeal) and against Micron (E.D. Tex. 2:22-cv-00203 and 2:23-cv-00628, stayed).
• The patent's claims were invalidated by the PTAB in IPR2022-00996 (Dec. 6, 2023, all claims 1–30 unpatentable), with Micron joined as petitioner in IPR2023-00406. Those decisions are on appeal at the Federal Circuit (e.g., No. 2024-1859 and related appeals).
• Key uncertainty: Because the district-court infringement verdict (validity upheld by the jury) conflicts with the PTAB's invalidity finding, the ultimate status of the '918 patent depends on the pending Federal Circuit appeals. Note also the possible (but apparently post-current-date-dated) Netlist–Samsung global settlement that may moot the Samsung-side disputes.

If you need the precise per-claim disposition or docket entries, I recommend pulling the actual PTAB IPR2022-00996 Final Written Decision (Paper 49) and the EDTX Final Judgment (Dkt. 551) directly, as well as confirming the current status of the Federal Circuit appeals, which were pending as of the sources reviewed.

I'll start by pulling the PTAB record via web search, since the structured ODP block reports no AIA trials but the patent's own family/litigation metadata references two IPR numbers.

Two PTAB proceedings surfaced (the ODP block was empty, but the patent's own metadata and the public docket show them). Let me nail down the claim-level dispositions, panels, grounds, and appeals.

Good — the picture is emerging: one primary IPR (Samsung, with Micron joined) plus a Micron joinder petition. Let me verify institution dates, the joinder mechanics, and the appeal dispositions, including the two extra CAFC docket numbers in the patent metadata.

Proceedings overview

There are two AIA trial proceedings on file against US 11,016,918 — both inter partes reviews, both final written decisions holding all challenged claims unpatentable, both appealed, and both affirmed by the Federal Circuit on 2026-09-02. Breakdown: 0 active, 2 decided against the patent owner (all claims invalidated), 0 claims sustained, 0 settlements, 0 institution denials. Bottom line for a defendant: the Board canceled claims 1–30 of the '918 patent in the lead IPR and the Federal Circuit affirmed — if a demand letter or complaint cites the '918 patent, the asserted claims are dead, subject only to the ministerial step of the PTO issuing a certificate of cancellation after the appellate mandate.

⚠️ Data discrepancy to flag: the structured "PTAB proceedings on file" block (USPTO ODP) returns no AIA trials for this patent. That is wrong on the public record. Both proceedings below are documented in the Board's own decisions, Netlist's SEC filings, and court filings. Treat the ODP empty set as an indexing gap, not as "no PTAB activity."

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IPR2022-00996 — Samsung Electronics Co., Ltd. (joined by Micron Technology, Inc. et al.) v. Netlist, Inc.

• Type: Inter Partes Review
• Filed: 2022-05-17
• Status: Final Written Decision — all challenged claims unpatentable; appealed and affirmed (Federal Circuit, 2026-09-02). Tracked by Google Patents as "PTAB case IPR2022-00996 filed (Final Written Decision)."
• Judge panel: Patrick M. Boucher, Jon M. Jurgovan, and Daniel J. Galligan, Administrative Patent Judges; Jurgovan authored the Final Written Decision.
• Petition grounds: all five grounds were § 103(a) obviousness challenges to claims 1–30:
  • Ground 1 — claims 1–3, 8, 14, 15, 23 over Harris + FBDIMM Standards
  • Ground 2 — claims 1–30 over Harris + FBDIMM Standards + Amidi
  • Ground 3 — claims 1–30 over Harris + FBDIMM Standards + Amidi + Hajeck
  • Ground 4 — claims 1–30 over Spiers + Amidi
  • Ground 5 — claims 1–30 over Spiers + Amidi + Hajeck
  • (Exhibit correspondence from the petition: Amidi = EX1024, Spiers = EX1025, Hajeck = EX1038.)
  • No § 112 or § 102 grounds were the basis of the disposition; § 112 indefiniteness/means-plus-function arguments appeared in the parallel district court construction fight (Micron argued "converter circuit"/"at least one circuit"/"controller" were § 112 ¶ 6; the court disagreed — see E.D. Tex. 2:22-cv-00203, Dkt. 97), not in the PTAB merits.
• Institution decision: instituted on 2022-12-07 under 35 U.S.C. § 314(a) (Paper 10, 56 pages; the '054 companion, IPR2022-00999, was instituted 2022-12-06). Micron Technology, Inc., Micron Semiconductor Products, Inc., and Micron Technology Texas LLC filed a substantively identical petition in IPR2023-00406 plus a motion for joinder (filed within one month of institution) and were joined as petitioners (Paper 26). Micron was described on the record as an "understudy" to Samsung's lead petition.
• Final Written Decision: 2023-12-06 — Final Written Decision Determining All Challenged Claims Unpatentable; Dismissing Petitioner's Motion to Exclude (Paper 49, 91 pages). Disposition verbatim: "ORDERED that claims 1–30 of the '918 patent have been shown to be unpatentable." Claim-level granularity:
  • Independent claims: unpatentable. Dependent claims 2–30: unpatentable. No claim was held patentable.
  • Grounds 2 and 3 each independently disposed of all claims 1–30 ("each limitation of claims 1-30 is taught or at least suggested by the prior art combination"); claims 5, 16, and 24 (voltage-monitor / trigger-signal limitations) were specifically found taught by Harris + FBDIMM Standards + Amidi + Hajeck. The Board expressly did not reach Grounds 4 and 5 ("As we have determined that claims 1-30 are unpatentable as obvious under Grounds 1 to 3, we do not reach Grounds 4 and 5."). The Board also dismissed Petitioner's Motion to Exclude as moot because it did not rely adversely on the disputed URL materials.
  • The hearing was held 2023-09-11 (Paper 47). Note: Netlist's 10-Q states oral argument was heard 2023-09-07 — the FWD's date controls.
• Settlement / termination: No settlement. Trial ran to a final decision on the merits.
• Appeal: Director Review denied 2024-03-18 (Paper 53). Netlist's Notice of Appeal filed 2024-05-20, docketed at the Federal Circuit as No. 24-1859 (2024-05-23), consolidated with No. 24-1863 (the '054/Netlist IPR2022-00999 FWD). Issues on appeal: the Board's finding that claims 1–30 were unpatentable, claim construction, evidentiary/procedural rulings (including denial of post-sur-reply supplemental evidence), substantial-evidence challenges to motivation-to-combine and reasonable-expectation findings, and APA compliance. Disposition: AFFIRMED, per curiam/nonprecedential opinion issued 2026-09-02 in Netlist, Inc. v. Micron Technology, Inc. The court held substantial evidence supported the Board's findings that Harris + the FBDIMM standards teach receiving power through the module's edge connections, and that Harris + FBDIMM + Amidi render claims 5 and 12 obvious on overvoltage detection/response ("On this record, a reasonable factfinder could conclude that the asserted combination teaches monitoring for and responding to overvoltage conditions"), rejecting Netlist's APA arguments.
• Defensive value: This is the dispositive proceeding. Every asserted claim of the '918 patent is invalid, and the invalidity judgment has been affirmed on appeal. A demand letter or infringement count resting on the '918 patent has no viable theory left; the only open question is the date the PTO issues the certificate of cancellation.

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IPR2023-00406 — Micron Technology, Inc., Micron Semiconductor Products, Inc., and Micron Technology Texas LLC v. Netlist, Inc.

• Type: Inter Partes Review (joinder-driven follow-on petition)
• Filed: 2023-01-06
• Status: Institution and joinder granted 2023-06-23; proceeding terminated 2023-12-06. Google Patents tracks it as "PTAB case IPR2023-00406 filed (Final Written Decision)," but the merits decision on the '918 patent was rendered in the lead case, IPR2022-00996 — Micron's own petition did not produce a separate merits FWD.
• Judge panel: Daniel Galligan, Jon Jurgovan, and Patrick Boucher (per docket aggregators; the same panel that decided IPR2022-00996). Flagged as lower-confidence — derived from third-party docket trackers rather than the face of a decision I retrieved.
• Petition grounds: substantively identical to the Samsung petition — same claims (1–30), same grounds, same evidence; Micron's motion for joinder states the petition "advances the same grounds for unpatentability that were instituted in the Samsung IPR, and relies on the same evidence (including expert declarations) as the Samsung IPR."
• Institution decision: 2023-06-23 — Decision Granting Institution of Inter Partes Review and Granting Motion for Joinder (7 pages). Joinder was timely (filed within one month of the 2022-12-07 institution date) and did not unduly burden the parties; the Board found the Micron petition substantively identical, so the patentability question would be resolved once.
• Final Written Decision: No separate merits FWD. The joined Micron entities are named as petitioners on the caption of the IPR2022-00996 FWD (Paper 49, 2023-12-06), with footnote 1 recording the joinder, and the Board's order invalidating claims 1–30 binds the joined proceeding. Terminated 2023-12-06 in the tracker data, consistent with the lead-case FWD.
• Settlement / termination: No settlement; terminated via the lead-case FWD, not a settlement or adverse-judgment paper.
• Appeal: Docket aggregators associate IPR2023-00406 with the same Federal Circuit appeal as the lead case (Fed. Cir. 2024-1859 / 24-1859). Because Micron was the joined petitioner in IPR2022-00996, the appellate challenge to the '918 FWD reaches Micron's interest through the lead case.
• Defensive value: Practically a duplicate of IPR2022-00996 — it exists to lock Micron into the lead case (and into § 315(e)(2) estoppel) rather than to break new ground. For a defendant today it adds nothing beyond confirming that both Samsung and Micron are bound by the affirmed invalidation of claims 1–30.

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Strategic summary

Claim status. The Board held claims 1–30 — the entire challenged set — unpatentable, and the Federal Circuit affirmed. There are no sustained claims and no untested claims in the PTAB record: the sole IPR that reached the merits (IPR2022-00996) canceled the full claim set on Grounds 2 and 3, and the Federal Circuit affirmed. Micron's mirror petition (IPR2023-00406) generated no alternative surviving claim scope. The '918 patent is, for practical purposes, dead. The one formal step outstanding as of 2026-09-28 is the PTO's issuance of a certificate of cancellation after the appellate mandate — a defendant should verify this on PTAB E2E / Patent Center, but should not treat its absence as a live patent.

Estoppel landscape (§ 315(e)(2)). Samsung Electronics Co., Ltd. and the three Micron entities — together with their privies — are estopped in district court and the ITC from asserting that claims 1–30 are invalid on any ground they raised or reasonably could have raised in IPR2022-00996/IPR2023-00406. Samsung additionally stipulated on the record (Ex. 1074) that if the Board instituted on the petitioned grounds, it "will not pursue an invalidity defense in the Eastern District of Texas action (C.A. No. 21-463-JRG)" on those grounds. For a non-petitioner defendant, § 315(e)(2) estops no one — but the practical availability question is moot, because the claims themselves are canceled. If a defendant nonetheless needs an invalidity record (e.g., for a DJ action, indemnity posture, or an appeal-proofing memo), the strongest available § 103 theory is the one already adjudicated: Harris + FBDIMM Standards + Amidi (+ Hajeck). Notably, Grounds 4 and 5 (Spiers + Amidi, and + Hajeck) were instituted but never reached, and the Board's work-product on them remains largely untested — a fresh petitioner could build on that combination if forced to litigate validity afresh.

Pattern signals. Netlist is in a multi-front, multi-patent campaign: Samsung and Micron have filed well over a dozen IPRs against Netlist memory-module patents (IPR2022-00062/-63/-64, -00615, -00639, -00711, -00996, -00999, -01427, -01428, IPR2023-00454/-55, IPR2023-00847, IPR2025-00001/-02, among others), and the Board has invalidated asserted claims across the family — the '918 and '054 FWDs (2023-12-06), the '060 and '160 FWDs (2024-04-01), the '912 FWD (2024-04-17), and the '339 FWD (affirmed precedentially 2026-09-02 in Netlist, Inc. v. Micron Technology, Inc., Fed. Cir. 24-1707). Netlist appeals essentially every adverse FWD (24-1521, 24-1707, 24-1859/-1863, 24-2240/-2241, 24-2304, 25-1286/-1296), and has pressed Director Review requests that were denied (e.g., 2024-03-18 for the '918 and '054 FWDs). No defensive aggregator (e.g., Unified Patents) appears as a petitioner on the '918 patent — the movants are Samsung and Micron, meaning the estoppel and victory run to those accused infringers, not to the public generally. Unified Patents appears only as Google's source of the docket metadata, not as a party.

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Recommended next steps

1. Lead with the FWD, not the district court record. Cite Samsung Electronics Co., Ltd., et al. v. Netlist, Inc., IPR2022-00996, Paper 49 (P.T.A.B. 2023-12-06), whose ordering paragraph states: "ORDERED that claims 1–30 of the '918 patent have been shown to be unpatentable." Public copies: PTAB E2E portal (https://portal.unifiedpatents.com/ptab/case/IPR2022-00996) and the FWD as filed in E.D. Tex. (https://storage.courtlistener.com/recap/gov.uscourts.txed.[215248](/patent/215248)/gov.uscourts.txed.215248.345.3.pdf).
2. Quote the affirmance. Netlist, Inc. v. Micron Technology, Inc., Fed. Cir. Nos. 24-1859 (consolidated with 24-1863) — nonprecedential decision of 2026-09-02 ("For these reasons, we affirm."), reported at https://fedcircuitblog.com/2026/09/02/opinions-orders-september-2-2026/ with a copy at http://business.cch.com/ipld/NetlistIncMicronTechnologyInc918PatentFedCir20260902090326.pdf. The '918/'054 appeals were resolved on the same day the court issued its precedential Netlist memory-module decision in the '339 appeal (Fed. Cir. 24-1707, https://www.cafc.uscourts.gov/opinions-orders/24-1707.OPINION.9-2-2026_2749527.pdf) — do not conflate the two.
3. Check for a certificate of cancellation. Confirm at USPTO Patent Center / PTAB E2E that the mandate issued and the certificate canceling claims 1–30 has posted. If it has, the patent cannot support any infringement claim against your client.
4. Watch the appellate dead-ends. The 2026-09-02 judgment makes a petition for rehearing en banc due roughly 14 days after entry (extendable) and a cert petition due 90 days from entry. There is no active Board trial to track — trial-stage milestones (institution deadline, oral hearing, statutory one-year FWD deadline) are all in the past.
5. Do not over-read the ODP empty set. The structured PTAB feed in this prompt shows no proceedings; the public record shows two. Any clearance or diligence memo should state the two docket numbers (IPR2022-00996, IPR2023-00406) and the affirmed invalidation, and flag the ODP gap as a data-integrity issue.

Items I could not fully verify (do not treat as established): the precise mapping of the Google Patents family metadata's additional CAFC numbers 24-2203 and 24-2281 (I confirmed 24-1859 as the Netlist appeal from the '918 FWD; I could not confirm what the other two numbers on this patent's face address, and I am not assuming they concern '918); the exact appellee lineup in the 2026-09-02 '918 appeal (Samsung reportedly settled and withdrew in the parallel '339 appeal per IPWatchdog, but I could not confirm the same for the '918 appeal); and whether IPR2023-00406 received a separate termination paper versus being closed on the lead-case FWD (trackers show termination on 2023-12-06).

I'll research the assignment record for US11016918. Let me run several targeted searches.

Let me dig deeper into the specific assignment records and Netlist's corporate status.

Ownership & Assignment Analysis — US 11,016,918 B2 ("Flash-DRAM Hybrid Memory Module")

Scope note / data limitation. I was able to reconstruct the ownership chain from Google Patents legal events, PTAB/ITC filings, and a Plainsite mirror of the USPTO assignment record. I was not able to open the Assignment Center detail pages directly for this patent number, so some reel/frame numbers and correspondent fields are missing from the record below and are flagged as "not captured" rather than guessed. Where I have a reel/frame it is cited; where I don't, I say so.

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Inventors

Per the issued patent (US 11,016,918 B2, "Inventor" field and PTAB Exhibit 1001):

Anomalies worth flagging:

1. Inventor-set discrepancy between publication and grant. The published application US 2021/0124701 A1 (filed 2020-12-30) lists five inventors, led by Hyun Lee (Ladera Ranch, CA). The issued '918 patent lists only four — Hyun Lee is absent. Hyun Lee does appear on the immediate parent, US 9,928,186 B2 (also named "Flash-DRAM Hybrid Memory Module").
2. Name-capture error in the recorded assignment. The 2020-12-31 USPTO assignment record (per Google Patents legal events) lists assignors as "BHAKTA, JAYESH; LEE, CHI-SHE; LEE, HYUN; MILTON, SCOTT H.; SOLOMON, JEFFREY C." — i.e., five assignors. "LEE, CHI-SHE" appears to be a recordation slip for CHEN, CHI-SHE, and Hyun Lee is an assignor even though he is not a named inventor on the '918. That is a real record defect, not cosmetic: the assignor set on the recorded instrument does not match the inventor set on the face of the patent.
3. No fire-sale timing pattern. All four named inventors are long-tenured Southern-California Netlist people (Bhakta is a Netlist co-founder). There is no evidence of a post-filing inventor exodus preceding a portfolio sale; the inventors remained tied to Netlist.

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Original assignee

• Entity on the issued patent: NETLIST, INC., Irvine, CA (US) — a Delaware corporation, publicly traded (NASDAQ: NLST).
• Primary line of business: historically a designer/manufacturer of high-performance memory modules for servers (HyperCloud, NVVault NVDIMM, HyperStream/HyperVault). Netlist is a real operating company with real product history, not a registered-agent mailbox.
• Product embodying the claims: Yes, historically. The patent family (priority 2007-06-01; parents 8,301,833 / 8,874,831 / 9,928,186) covers Netlist's Flash-DRAM hybrid DIMM / NVDIMM architectures. Netlist's own investor material describes ">10 years invested … $60 MM invested in building seminal IP related to LRDIMMs and Hybrid Memory" (E.D. Tex. litigation exhibit).
• Current status: Operating, but its revenue mix is now dominated by licensing and litigation rather than product sales. Netlist has an extensive assertion history (Google, Inphi, SanDisk, Diablo, SK hynix, Samsung, Micron). No Chapter 7/11 filing was found in the sources reviewed.
• Note on self-description: Netlist's own slide deck says it has "one of the most valuable memory IP portfolios outside of the Big 4 and the Major NPEs" — Netlist positions itself as distinct from the NPE class.

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Assignment timeline

Chronological, from the records I could verify:

• Executed ~2020-12-30 / recorded 2020-12-31 — Reel not captured (Assignment Center detail page not retrievable in this session)

  • Conveyance: Assignment of Assignors' Interest ("SEE DOCUMENT FOR DETAILS")
  • Assignor: Jayesh Bhakta; Chi-She Chen (recorded as "Lee, Chi-She"); Hyun Lee; Scott H. Milton; Jeffrey C. Solomon
  • Assignee: Netlist, Inc., Irvine, CA
  • Correspondent: not captured
  • Context: Standard inventor-to-company assignment filed contemporaneously with the continuation application (17/138,766). Not a third-party transfer.

• Executed 2015-11-18 / recorded 2015-11-20 — Reel 037150 / Frame 0897 (IP Security Agreement over Netlist's IP portfolio; family-level, see caveat)

  • Conveyance: Security Agreement (Intellectual Property Security Agreement, not an assignment of title)
  • Assignor / Grantor: Netlist, Inc. (Delaware corporation)
  • Assignee / Secured Party: SVIC No. 28 New Technology Business Investment L.L.P. (a Korean LLP — Samsung Venture Investment Corporation affiliate)
  • Correspondent: not captured
  • Context: Securitization — collateral for the 2015-11-18 Senior Secured Convertible Promissory Note under the Samsung/Netlist Joint Development and License Agreement. This is a lien on the portfolio, not a title transfer. Caveat: the '918 application was filed in 2020 and would only have been captured by this instrument if it contained an after-acquired-property clause covering continuations; I could not confirm the '918 is itemized on the 037150/0897 schedule.

• Recorded 2023-11-20 — Reel 065629 / Frame 0330

  • Conveyance: Release of Assignment (release of the SVIC security interest)
  • Assignor / Releasing party: SVIC No. 28 New Technology Business Investment L.L.P.
  • Assignee: Netlist, Inc.
  • Correspondent: not captured
  • Context: Lien release — clears the 2015 security interest; consistent with the wind-down of the Samsung venture investment relationship while Netlist and Samsung were in active litigation.

• Recorded 2023-08-23 (executed 2010-08-30) — Assignment 64686/603

  • Conveyance: Assignment of Assignors' Interest
  • Assignor: Lee, Hyun; Bhakta, Jayesh R.
  • Assignee: Netlist, Inc., 3 Goddard, Irvine, CA 92618
  • Context: Confirmatory / cleanup assignment — a 2010-executed instrument recorded 13 years late. Important caveat: the Plainsite record ties this instrument to US 10,949,339 ("Memory Module With Controlled Byte-wise Buffers"), not to the '918. I list it because it demonstrates Netlist's family-level pattern of belatedly recording long-dated inventor assignments; I could not confirm instrument 64686/603 expressly covers the '918.

If the Assignment Center search for US 11,016,918 returns only the single 2020-12-31 inventor→Netlist entry plus the 2015/2023 security-interest entries, that is the complete chain — there are no intermediate holding-company links.

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Timeline diagram

timeline
    title Ownership of US 11016918
    2007 : Provisional priority date
    2008 : Parent application filed
    2015 : SVIC IP security interest recorded
    2020 : Continuation 17138766 filed
         : Assignment to Netlist recorded
    2021 : Patent US11016918 issues
         : First Samsung suit filed
    2023 : SVIC security interest released

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NPE / troll-pattern signals

1. Shell-entity transfer — NOT PRESENT.
No assignment to a "…IP / …Holdings / …Licensing / …Ventures" vehicle. The current and sole owner of record since 2020-12-31 is Netlist, Inc. itself, an operating Delaware corporation at 3 Goddard, Irvine, CA. There is no single-purpose Delaware/Texas LLC in the chain.

2. Known asserter in the chain — NOT PRESENT (narrow caveat).
None of the enumerated NPE families (Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Conversant/Mosaid, Vringo, Pendrell, Innovatio, Round Rock, etc.) appear as assignee in this chain. The only non-Netlist party is SVIC No. 28 New Technology Business Investment L.L.P. (Samsung's venture arm), and it holds a security interest, not title. Caveat: Netlist is a high-frequency plaintiff (Google, Inphi, SanDisk, Diablo, SK hynix, Samsung, Micron) and some commentators lump its monetization program with NPE activity — but that is assertion behavior, not an assignment-chain finding.

3. Repeat correspondent across the chain — UNCLEAR / INSUFFICIENT DATA.
I could not retrieve the correspondent-of-record fields for entries 037150/0897, 065629/0330, or the 2020-12-31 assignment. For context only (not a correspondent finding): prosecution counsel of record on the sibling '054 patent is Vorys, Sater, Seymour and Pease LLP; Netlist's PTAB power of attorney runs to Irell & Manella LLP (Customer No. 29000; H. Annita Zhong, Reg. No. 66,530; Jason Sheasby). Neither is a "shell-LLC-running" tell, and I will not convert litigation counsel into an assignment-correspondent signal without the reel/frame data.

4. Cascading transfers — NOT PRESENT.
One title link (inventors → Netlist). No consecutive LLC-to-LLC hops, no shared-correspondent clustering, no transfer window under 24 months. The 2015 and 2023 entries are a lien and its release, not transfers.

5. Pre-litigation transfer — NOT PRESENT (with one nuance).
The 2020-12-31 assignment precedes the first assertion of the '918 by roughly six months (E.D. Tex. 2:21-cv-00463 line of cases). But that instrument is the routine inventor-to-employer assignment for a then-pending continuation, not an arm's-length transfer to an asserter to manufacture standing or venue. The patent was asserted by the same entity that has always owned it. Nuance: Netlist has a well-documented pattern of asserting continuations issued into a live litigation campaign, but that is prosecution strategy, not an assignment-chain red flag.

6. Bankruptcy fire-sale — NOT PRESENT.
No Chapter 7/11 assignment, no trustee sale, no stalking-horse transfer found for Netlist or this family. (Netlist has had going-concern strain, but the patent never moved in a bankruptcy proceeding.)

7. Privateering — NOT PRESENT.
If anything the fact pattern runs the other direction: Samsung's affiliate (SVIC No. 28) held a security interest in Netlist's IP via the 2015 JDLA, and Netlist later sued Samsung (and Micron, and SK hynix). No operating company is using this patent offensively through a proxy.

8. Defensive aggregator (anti-NPE) — NOT PRESENT, but note the inverse activity.
The chain does not terminate at RPX, AST, LOT, Unified, or OIN. However, this patent has been a defensive-challenge target: Unified Patents filed IPR2022-00996 and IPR2023-00406 (both reaching Final Written Decisions), and Google Patents lists these as litigation events on the patent. Samsung and Micron separately petitioned (e.g., IPR2023-00405/00406 family). So the "defensive" side of the ecosystem is attacking this patent — it does not own it.

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Verdict

Operating-company assertion.

The chain is a single routine link — named inventors (2020-12-30/2020-12-31) → Netlist, Inc. — and Netlist, a NASDAQ-listed Delaware operating company at 3 Goddard, Irvine, CA, remains the owner of record; there is no shell LLC, no asserter-family assignee, and no cascading transfer. The only third-party entry is a security interest by Samsung's venture affiliate, SVIC No. 28, recorded at reel 037150/0897 (2015-11-20), released at reel 065629/0330 (2023-11-20) — a lien and release, not a title transfer. Netlist has shipped memory modules practicing this family and is asserting the '918 against genuine competitors (Samsung, Micron, SK hynix), which places it in the "operating-company assertion" box rather than the NPE boxes.

Residual uncertainty (be aware): the primary assignment's reel/frame and correspondent were not retrievable in this session, and the assignor-set/name-capture defect ("Lee, Chi-She" for "Chen, Chi-She"; Hyun Lee as assignor though not a named '918 inventor) and the Plainsite record dated 2023-08-23 (instrument 64686/603) should be verified against the live Assignment Center pages.

Verify at:

• https://assignment.uspto.gov/patent/index.html (search: 11016918)
• https://assignmentcenter.uspto.gov/
• https://patents.google.com/patent/[US11016918B2](/patent/US11016918B2)/en (legal events tab)
• Plainsite mirror of assignment 64686/603: https://www.plainsite.org/patents/assignment.html?id=[11313615](/patent/11313615)

I'll research US patent 11016918 and its cited prior art. Let me begin with targeted searches.

The patent is confirmed. Now let me dig into its specific cited references and the IPR prior art.

Let me get the specific "References Cited" list on the face of the '918 patent and the second IPR.

US 11,016,918 B2 — Verification and Prior‑Art Analysis

1. Patent identification (confirmed)

Continuity chain (per the front page / PTAB continuing‑data text): 17/138,766 ← CON of 15/934,416 (Mar. 23, 2018, ABN) ← CON of 14/840,865 (now 9,928,186) ← CON of 14/489,269 (now 9,158,684) ← CON of 13/559,476 (now 8,974,831) ← CIP of 12/240,916 (now 8,301,833) ← CON of 12/131,873 ← prov. 60/941,586.

2. Two important framing caveats before the reference‑by‑reference table

(a) "Patent citation" has two distinct meanings here, and I am giving you both. The references printed on the face of the patent ("References Cited") are only part of the story. The references that were actually used to attack this patent at the PTAB are mostly different documents, cited by the petitioner, not the examiner. I report both, and they should not be conflated.

(b) Almost none of this art was applied as §102 anticipation. The Board's final written decision in IPR2022‑00996 (Dec. 6, 2023) held claims 1–30 unpatentable as obvious under §103, in combinations (Harris + FBDIMM Standards + Amidi + Hajeck). No single reference was asserted to disclose every limitation of a claim under §102. I flag, per reference, why a standalone §102 anticipation theory is weak or incomplete, rather than inventing one. Where I state what a reference teaches, I am relying on how the Board/petitioner characterized it in the record; I have not independently read the full text of each reference, and I say so where that matters.

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3. References cited on the face of US 11,016,918 ("References Cited")

The front‑page list I could retrieve is partially garbled by OCR (the source is the patent PDF and PTAB exhibit copies), so I have marked uncertain entries. Verified entries:

U.S. Patent Documents (pre‑grant publications)

U.S. Patents (front‑page list, verified entries)

Foreign patent documents

Non‑patent literature on the face

• JEDEC Standard, Double Data Rate (DDR) SDRAM Specification, JESD79, June 2000, 77 pp. — the standard‑protocol reference underlying the specification's DDR/DDR2/DDR3/DDR4 disclosure. Used by the examiner and later by the petitioner; supports §102(b) printed‑publication status against broad "operable in accordance with DDR protocol" claims, but not against the converter/trigger architecture.
• Numerous litigation exhibits/decisions (Smart Modular v. Netlist, Sandisk v. Netlist, declarations of Maltiel/Corr, etc.), cited for disclosure/priority support rather than as prior art.

Caveat: the front‑page list is long and the OCR I obtained is incomplete and partly illegible. I could not verify every entry. I will not guess at the garbled rows.

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4. The references actually applied against the '918 claims (IPR2022‑00996, Samsung v. Netlist)

These are the "most relevant prior art" in the operative legal sense, because they are the references the Board found rendered claims 1–30 unpatentable (Final Written Decision, Dec. 6, 2023).

Grounded §102 assessment (as opposed to the §103 combinations actually run):

• Harris (2006/0174140): as the primary reference combined with the APA, Harris is the strongest standalone candidate — but on the record I have, it was not shown to disclose, in one document, the combination of (i) multiple buck converters generating distinct regulated voltages, (ii) SDRAM devices powered only from regulated rails, and (iii) a voltage monitor producing a trigger signal into a controller write to non‑volatile memory. Anticipation under §102 is therefore not established; the Board's holding was §103.
• Amidi (7,724,604): directed to memory‑module/rank architecture. It does not appear to disclose the regulated‑voltage/backup‑trigger subject matter at all; no §102 anticipation of any '918 claim is supported.
• Spiers (2006/0080515): alternative primary reference; same conclusion — §103 combination, not §102.
• Hajeck (6,856,556): discloses a voltage‑detection circuit for an over‑voltage condition. The patent owner argued (Resp. 40–42, citing Ex. 1038, 3:6–10, 3:30–57, 3:66–4:9) that Hajeck's detection does not produce a trigger causing a state transition or power‑source switch — i.e., Hajeck alone does not anticipate; it was only probative in combination.
• FBDIMM Standards (JESD82‑20 / JESD205, Mar. 2007): a standards document cannot practice a circuit; anticipation is unavailable except in unusual single‑reference circumstances. It is §103/§102(b)‑printed‑publication material.
• JEDEC JESD79 (June 2000): printed publication that could anticipate only claims reciting bare DDR‑protocol compliance, not the converter/trigger limitations.

Bottom line on §102: On the record I can verify, no single cited reference anticipates any claim of the '918 patent under §102. Every ground that invalidated claims 1–30 was an obviousness combination under §103 (Harris + FBDIMM Standards + Amidi + Hajeck).

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5. Litigation/enforcement context (useful for a prior‑art file)

• Netlist v. Samsung, E.D. Tex. (2:21‑cv‑00463 / 2:22‑cv‑00293): the '918 patent was among five patents on which Netlist obtained a ~$303.15M verdict (April 2023). Co‑asserted patents: 10,949,339; 11,232,054; 8,787,060; 9,318,160.
• IPR2022‑00996 (Samsung): Final Written Decision Dec. 6, 2023 — claims 1–30 unpatentable (obviousness).
• IPR2023‑00406: another PTAB case against this patent (Final Written Decision reached).
• Additional subsequent PTAB filings: IPR2026‑00017 and PGR2026‑00001 / PGR2025‑00071 (Samsung), filed 2025–2026, which re‑submit the Dec. 6, 2023 '918 Final Written Decision and the same prior‑art set as exhibits.
• Appeals: Fed. Cir. 24‑1859, 24‑2203, 24‑2281 (and related IPR appeals).
• US 11,232,054 B2 (the '054 patent) is a continuation of the '918 and shares most of the same specification; the "MEMORY WITH ON‑MODULE POWER MANAGEMENT" claim listing I encountered belongs to that family and should not be attributed to the '918 without checking.

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6. Explicit limitations of this analysis (so nothing here is treated as verified beyond its basis)

1. I could not retrieve a clean, complete, verbatim copy of the "References Cited" front page. Several rows are OCR‑garbled and are marked unverified above; I did not invent inventors, numbers, or dates for them.
2. I did not read the full text of Harris, Amidi, Spiers, or Hajeck. My descriptions of what each teaches are drawn from how the PTAB decision and the petition characterize them, which is the legally operative characterization but not an independent technical reading.
3. I have not auto‑corrected any number. Where two different documents share an inventor surname (Amidi), I flagged the distinction (US 7,724,604 as prior art vs. US 9,921,762 on the face of the patent).
4. Every §102 statement is my own inference from the record and is explicitly contrasted with the §103 grounds the Board actually adopted. No claim of the '918 patent was invalidated under §102 by any single reference on the record I reviewed.

If you want, I can next pull the examiner's complete "References Cited" list from the file wrapper (PatentCenter) and/or the full claim‑by‑claim limitation mapping from the Dec. 6, 2023 Final Written Decision, which would let me assign specific cited references to specific claim numbers.

I'll ground a couple of key points before writing the §103 analysis.

Obviousness Analysis of U.S. Patent No. 11,016,918 B2 Under 35 U.S.C. § 103

Building on: the Prior Art section (reference table, §3–§4) and the Patent Summary (claims 1, 16, 23) already generated. This section does not repeat the reference-by-reference descriptions; it takes them as inputs and applies the Graham/KSR framework to them.

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⚠️ Two threshold caveats (do not skip)

(1) Operative-date conflict — carried forward, still unresolved. The prompt for this task fixes the current date as April 26, 2026. The previously generated PTAB and Litigation sections report a Federal Circuit nonprecedential affirmance dated September 2, 2026 in Netlist, Inc. v. Micron Technology, Inc., Nos. 24-1859 (consw. 24-1863), reported at http://business.cch.com/ipld/NetlistIncMicronTechnologyInc918PatentFedCir20260902090326.pdf. Those two dates cannot both be right. The §103 analysis below does not depend on which is correct: the operative merits decision is the PTAB Final Written Decision of December 6, 2023 (Samsung Electronics Co., Ltd. v. Netlist, Inc., IPR2022-00996, Paper 49), which exists under either date. If April 26, 2026 is truly the operative date, the appeal is pending and the Fed. Cir. disposition has not issued; if the later date governs, the Board stands affirmed. I flag this rather than silently adopting one.

(2) Claim text is reconstructed, not verbatim. As flagged in the Patent Summary, claims 1, 16, and 23 below are assembled from the FWD, the institution decision, the Board's Appendix, and Netlist's POPR demonstratives. The limitations are well corroborated across independent documents (I now have the Board's own limitation-by-limitation treatment, quoted below), but the exact claim numbering and connecting language should be pulled from Patent Center for 17/138,766 before any filing. Where I cross-reference the sibling '054 patent's claims, I say so — the two patents share a specification and have parallel but non-identical claim sets, and several of my sources reproduce both.

(3) Statutory framework. The Board analyzed the '918 claims under pre-AIA 35 U.S.C. § 103(a) — consistent with the claimed 2007/2011 priority dates. That switch matters in one practical respect: Amidi is relied on as § 102(e) art (U.S. application filed October 25, 2006), while Harris and Hajeck are § 102(b) art and the FBDIMM standards are prior printed publications. I take the Board's statutory treatment of each reference as given rather than independently re-deriving the critical date for every reference across the CIP chain.

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I. Legal Framework

The Board applied the governing test, and quoted it on the FWD's face:

"A patent claim 'is not proved obvious merely by demonstrating that each of its elements was, independently, known in the prior art.' KSR, 550 U.S. at 418. An obviousness determination based on the teachings of multiple references requires finding both 'that a skilled artisan would have been motivated to combine the teachings of the prior art references to achieve the claimed invention, and that the skilled artisan would have had a reasonable expectation of success in doing so.'"

— IPR2022-00996 FWD at 12–13, citing KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) (https://supreme.justia.com/cases/federal/us/550/398/), Graham v. John Deere Co., 383 U.S. 1 (1966), and Intelligent Bio-Sys., Inc. v. Illumina Cambridge Ltd., 821 F.3d 1359, 1367–68 (Fed. Cir. 2016). Source: https://storage.courtlistener.com/recap/gov.uscourts.txed.[215248](/patent/215248)/gov.uscourts.txed.215248.345.3.pdf.

The four Graham inquiries map to this record as follows:

The controlling point: every limitation of every claim was found "taught or at least suggested" by a § 103 combination — no claim was invalidated by a single reference standing alone. My own § 102 assessment in the Prior Art section reaches the same end: no single reference anticipates any '918 claim. Obviousness is therefore the whole ballgame, and the analysis below is a § 103 analysis by construction.

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II. Claim Construction Touchpoints That Drive the Analysis

These constructions (FWD §§ III.C.1–2; E.D. Tex. 2:22-cv-00203 Markman) determine what the prior art must teach:

Note the tension I want to flag explicitly. The previously generated Patent Summary characterized claim 1 as requiring "one of those two amplitudes [to be] lower than the other." The Board's claim-2 treatment confirms the inequality limitation lives in claim 2, not claim 1 (FWD: "[a] first one of the first and second voltage amplitudes is less than a second one"), and the Board construed the voltage-amplitude terms as labels needing only to identify amplitude values. If claim 1 as issued recites the inequality, the combination still meets it (1.8V VDD vs. 1.5V VCC/VCCFBD under Voltage Mapping A). Either way the outcome is the same; the discrepancy is a claim-text-fidelity issue for the drafter, not a merits issue.

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III. The Prior Art Set and Each Reference's Role

(Drawn from the Prior Art section §4; roles restated here only as needed for the combination analysis.)

Sources: Hajeck — https://patents.google.com/patent/[US6856556B1](/patent/US6856556B1)/en; Harris exhibit — https://www.docketalarm.com/cases/PTAB/IPR2022-00996/Samsung_Electronics_Co._Ltd/docs/05-17-2022-Petitioner/Exhibit-1023-21-Exhibit_1023___US_Patent_Application_Publication_No_2006_0174140_to_Harris_et_al.pdf; FWD — https://storage.courtlistener.com/recap/gov.uscourts.txed.215248/gov.uscourts.txed.215248.345.3.pdf.

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IV. The Dispositive Combinations

The Board ran five grounds; Grounds 1–3 disposed of all 30 claims, and Grounds 2 and 3 each independently disposed of all 30. Grounds 4–5 were instituted but expressly not reached. Reproduced from the Board's Appendix table:

The ordering paragraph is explicit: "ORDERED that claims 1–30 of the '918 patent have been shown to be unpatentable." (https://www.courtlistener.com/docket/69849093/24/netlist-inc-v-samsung-electronics-co-ltd/)

Redundancy matters for strategy. Because Grounds 2 and 3 are independent full-claim dispositions, even if a factfinder rejected Hajeck (the over-voltage reference), Ground 2 alone invalidates all 30 claims — and vice versa. That is the single most important structural feature of this record: there is no single point of failure in the validity case.

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V. Combination 1 — Harris + FBDIMM Standards (Grounds 1 and the base of Grounds 2–3)

V.A Element-by-element mapping (independent claim 1)

V.B Why a POSITA would have combined Harris with the FBDIMM Standards

This is not the classic "two disparate references" combination. It is a single-reference-plus-standards combination with an unusually strong motivation story:

1. Harris itself names the FBDIMM as its embodiment. Harris ¶ 9 and Fig. 1A's "FBD" buffer 112 disclose the very architecture the FBDIMM standards specify. KSR teaches that where a reference "design[s] a device to implement" a known system, the design is obvious. 550 U.S. at 417. Proof of this is in the Fed. Cir. opinion itself, which quotes the Board: Harris "permissively teaches that DRAM devices 'may be powered from system board or main board voltage sources'" and "the Board relied on Harris's own disclosures identifying fully buffered DIMMs as an embodiment." (CCH copy at http://business.cch.com/ipld/NetlistIncMicronTechnologyInc918PatentFedCir20260902090326.pdf.)

2. The FBDIMM standards supply the only thing Harris left general — the number of rails. Harris says "appropriate local voltage levels"; the standards enumerate them. Where a reference discloses the genus and a second reference the species, KSR treats the selection as "the predictable use of prior art elements according to their established functions." 550 U.S. at 417.

3. The "separate converters" conclusion was supported by both sides' experts. The Board credited testimony from Petitioner's expert Dr. Wolfe and Netlist's expert Dr. Mangione-Smith that separate converters provide "sequencing the power, turning power on and off independently, saving cost, eliminating cross-coupling of noise, and solving space constraints." (Fed. Cir. opinion at *4; FWD at 14.) When the patent owner's own expert concedes the design benefits that motivate the modification, the motivation analysis is effectively over. This is Rationale A/B territory under MPEP § 2143 — combining known elements with no change in their respective functions, yielding predictable results (https://www.uspto.gov/web/offices/pac/mpep/s2143.html).

4. Same field, same problem, same ordinary skill. All references are memory-module power architecture; the ordinary artisan is defined as one "familiar with the JEDEC industry standards" (FWD at 13–14). A reference set that the POSITA is presumed to know, applied to the reference the POSITA is presumed to consult, clears KSR's "interrelated teachings" prong.

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VI. Combination 2 — + Amidi (Ground 2, all claims 1–30)

VI.A Role of Amidi

Amidi supplies the module-local fault-detection/backup dimension: power management block 510 receives system supply 520 and battery supply 530 and produces stabilized memory supply 540; it detects clock and power faults and switches to backup; and it uses buck converters to step down and boost converters to step up (IPR Ex. 1024, Fig. 5).

VI.B Motivation to combine (as the Board found it)

KSR Rationale: "us[ing] a known technique (e.g., Amidi's battery backup techniques) to improve a similar device (e.g., Harris's memory module) in the same way (e.g., to provide a backup power supply using a battery)" — Petitioner's own framing, ultimately accepted. This is the "improving a similar device in the same way" rationale, plus "known technique, known method, predictable result."

VI.C The "pre-regulated input voltage" limitation (claims 16–22, 30)

The Board construed the term to mean merely that the voltage is regulated before up/down conversion — consistent with Netlist's own proposed construction ("A pre-regulated input voltage is just a regulated voltage provided to these voltage conversion circuits"). Harris expressly discloses that the external supply "may be regulated," so Harris's 12V input meets the term; alternatively Amidi's boost-converter output to 12V pre-regulates it. Netlist's "12V ±15% is unregulated" argument failed because Netlist "does not explain what distinguishes a regulated voltage from an unregulated one" while Harris expressly uses the word "regulated." The Fed. Cir. opinion independently confirms: "Because the voltage that is received at the voltage converters has already been regulated externally, this meets our adopted construction."

Drafting lesson: the phrase "pre-regulated input voltage" reads, on this construction, essentially as "an input that is regulated upstream of the converters." That is an extremely thin limitation, and any prior art that accepts a JEDEC-specified supply voltage satisfies it.

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VII. Combination 3 — + Hajeck (Ground 3, all claims 1–30)

VII.A Role of Hajeck

Hajeck supplies, in one sentence, the over-voltage trigger the '918 asserts as its point of novelty:

"The voltage detection circuit may also be designed to generate a busy signal when the voltage exceeds a certain level …" — US 6,856,556 B1 (https://patents.google.com/patent/US6856556B1/en).

VII.B The claims this combination most clearly takes out

Claims 5–7, 9–13, 16–22, 24–27 recite (or depend from a claim reciting) that the voltage monitor circuit generates the trigger signal when the input voltage is greater than a threshold. Claims 11, 12, 18, 19, 25, 26 require actions in response to that trigger.

The Board's methodology was decisive: Netlist attacked Hajeck individually, which is "an improper approach to the obviousness analysis." The Board reasoned that Petitioner relied on Hajeck "for its teaching of detecting an overvoltage condition," while Harris/FBDIMM/Amidi "teach the voltage detection circuit configured to produce the trigger signal." The Fed. Cir. agreed: "On this record, a reasonable factfinder could conclude that the asserted combination teaches monitoring for and responding to overvoltage conditions."

VII.C Motivation to combine Hajeck

Petitioner's articulated rationale: one of skill "would have appreciated the desirability of switching to backup power in both undervoltage and overvoltage conditions." Hajeck's own stated problem — data loss, corruption, and circuit damage from host-supply irregularities — is the same problem Harris and Amidi address. KSR rationales engaged: (i) known technique (over-voltage detection) improving a similar device (a power-protected memory/storage subsystem) in the same way; (ii) predictable result; (iii) the POSITA's "ordinary creativity" in fitting references "together like pieces of a puzzle" (550 U.S. at 420).

Hajeck also cuts off Netlist's best counter-argument pattern. Netlist argued that (a) Hajeck's detection doesn't cause a state transition or power-source switch, and (b) Hajeck's charge pump protects indefinitely so data loss isn't a concern. Both were rejected as improper individual-reference attacks — the "features that Patent Owner argues are missing from Hajeck are not ones for which Petitioner relied on Hajeck."

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VIII. Independent Claim 23 — The Register-Rail Isolation Theory

Claim 23 is, on the Patent Summary's reading, the power-gating/isolation claim: SDRAMs on the first regulated rail; registers coupled to (i) the second regulated voltage, (ii) a portion of the edge connections, and (iii) the SDRAMs, with the second rail selectively switched off while the SDRAMs stay powered, such that turning the register rail off decouples the SDRAMs from the address/control signals.

The Board found claim 23 obvious over Harris + the FBDIMM Standards alone (Ground 1), reasoning:

"[T]he combination of Harris and the FBDIMM Standards discloses an S3 sleep mode that selectively switches off the second voltage to turn off the power to the one or more registers while the DRAMs remain powered on to refresh data in the DRAMs." (FWD, discussing the register limitation; parallel reasoning appears in the '054 institution decision, which I flag because the two patents' claims overlap.)

That is the classic KSR "known technique" case: register/rail power islands and S3 self-refresh were standardized, JEDEC-defined behaviors; using rail-off as the isolation mechanism is the predictable use of a known element for its established function. Netlist's counter — that "the FS (host) supplies VTT to the motherboard but not the module," and that an AMB does not need VTT — attacks only the count of rails, not the isolation mechanism, and was rejected at the rail-counting step.

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IX. The Rationale Umbrella — Why These Combinations Hang Together

Consolidating the KSR/MPEP § 2143 rationales actually deployed or available on this record:

The Rothschild/teaching-away question is where Netlist spent its best ammunition — and lost. Netlist's strongest objective argument was that Harris, "an extraordinary person of skill in the art," did not himself use four separate buck converters or a separate VTT/VDDSPD line, so "the exact thing that Harris already implements" was chosen as the combination. The Board and the Fed. Cir. treated this as an inadmissible individual-reference attack: a reference's failure to do more is not a teaching away, which requires the reference to criticize, discredit, or discourage the claimed solution. (See the hearing transcript at https://ptacts.uspto.gov/ptacts/public-informations/petitions/1549632/ — Judge Boucher's "Yes, that answers my question" follows Mr. Sheasby's Harris argument, but the ultimate FWD and the affirmance rejected it.)

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X. Secondary Considerations (§ 103 objective evidence)

Bottom line on objective evidence: on the record generated in IPR2022-00996, the secondary considerations did not overcome the prima facie case. Netlist's principal proof (the jury verdict) is procedurally incompatible with the Board's standard of proof; its technical proof (Harris's omission, board space) was rejected as directed to individual references.

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XI. The Alternative, Never-Reached Combinations — Spiers + Amidi / Spiers + Amidi + Hajeck (Grounds 4–5)

For completeness, because these were instituted but not decided, they remain the most useful fallback theories if the Harris-based grounds were ever disturbed:

• Spiers (US 2006/0080515 A1) as the primary reference, with Amidi for fault detection/backup, and optionally Hajeck for over-voltage.
• Why this is the weaker theory: the Board's preliminary record reflects Netlist's argument that "Spiers' PCI card is not a memory module" (Grounds 4–5 "fail" on the "memory module" preamble), reinforced by Dr. Mangione-Smith's unrebutted testimony that "the memory riser board is not part of that memory module" and that a memory module must "include[] memory." Netlist also argued Spiers' PCI card is not a FBDIMM and that DDR2/DDR3 would be unsuitable for Spiers' write-heavy/read-light workload.
• Practical value: because Grounds 4–5 were never reached, there is no adverse appellate ruling on the Spiers theory — a fresh challenger could develop it with a better-developed "memory module" showing. But it is strictly a backup, not a substitute for Harris + FBDIMM + Amidi (+ Hajeck).

I flag a data caveat here: several of the PTAB excerpts I retrieved intermix the '918 (IPR2022-00996) and '054 (IPR2022-00999) records, and the CAFC 24-1859 Appendix contains both FWDs. The grounds table and the claims 1–30 unpatentable order quoted above are from the '918 FWD; some claim-number-specific quotations may originate in the '054 record. Verify per-claim citations against Paper 49 before filing.

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XII. Bottom-Line Assessment

On the record, every claim of the '918 patent (1–30) is obvious under § 103.

1. No single reference anticipates. The patent survives § 102 on this record; its exposure is entirely § 103.
2. Two independent, full-claim § 103 combinations exist (Harris + FBDIMM + Amidi, and that combination + Hajeck). Either alone disposes of all 30 claims — so the invalidity case is not vulnerable to the failure of any single reference.
3. The motivation analysis is unusually strong because (a) Harris names the FBDIMM architecture, so the combination is closer to a single-reference "implement the reference" case than a true mosaic; (b) both parties' experts agreed separate converters provide concrete design benefits; and (c) the FBDIMM standards require the multiple rails the claims recite and define the S3 register-power behavior claim 23 relies on.
4. Netlist's counter-arguments are individual-reference attacks, which the Federal Circuit has repeatedly held cannot defeat a properly articulated combination (the FWD cites Merck and Keller for exactly this point).
5. The jury's contrary validity verdict does not change the § 103 merits; it changes only the standard of proof and the forum. The Board found by preponderance; the jury required clear and convincing.

Confidence levels:

• That the Board held claims 1–30 unpatentable over Harris + FBDIMM Standards + Amidi (+ Hajeck): high — verified across the FWD order paragraph, the FWD's grounds table, the Fed. Cir. opinion, and Netlist's own filings.
• That the Federal Circuit affirmed as of September 2, 2026: high for the source, flagged for the date conflict with the April 26, 2026 operative date.
• That the combination analysis itself is sound (each limitation mapped, motivation articulated with rational underpinning): high, but built on the Board's record, not on my own independent reading of Harris/Amidi/Hajeck full texts — a limitation I carried forward from the Prior Art section.
• The exact claim text of claims 1, 16, 23 and the precise claim-number-to-limitation mapping for the dependent claims: moderate — reconstructed from the FWD, institution decision, and Netlist demonstratives; pull the issued claims from USPTO Patent Center for 17/138,766 before any filing.

What I could not verify (do not treat as established): (i) whether Netlist petitioned for rehearing en banc or certiorari after the 2026-09-02 (or, if the April 2026 date governs, the then-pending) judgment; (ii) whether the PTO has issued the certificate of cancellation for claims 1–30; (iii) the appellee lineup in the '918-specific appeal given reports of a separate Netlist–Samsung settlement in the parallel '339 appeal; and (iv) whether the '918's independent claim 1 recites the "one amplitude less than the other" limitation or whether, as the Board's claim-2 treatment indicates, that inequality resides only in dependent claim 2.

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Key sources for this section

• IPR2022-00996 Final Written Decision, Paper 49 (Dec. 6, 2023) — https://storage.courtlistener.com/recap/gov.uscourts.txed.215248/gov.uscourts.txed.215248.345.3.pdf and https://www.courtlistener.com/docket/69849093/24/netlist-inc-v-samsung-electronics-co-ltd/
• Fed. Cir. nonprecedential opinion (24-1859, consw. 24-1863) — http://business.cch.com/ipld/NetlistIncMicronTechnologyInc918PatentFedCir20260902090326.pdf
• KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) — https://supreme.justia.com/cases/federal/us/550/398/ ; Cornell summary — https://www.law.cornell.edu/supct/cert/04-1350
• MPEP § 2143 (exemplary obviousness rationales) — https://www.uspto.gov/web/offices/pac/mpep/s2143.html
• Harris, US 2006/0174140 A1 (IPR Ex. 1023) — https://www.docketalarm.com/cases/PTAB/IPR2022-00996/Samsung_Electronics_Co._Ltd/docs/05-17-2022-Petitioner/Exhibit-1023-21-Exhibit_1023___US_Patent_Application_Publication_No_2006_0174140_to_Harris_et_al.pdf
• Hajeck, US 6,856,556 B1 — https://patents.google.com/patent/US6856556B1/en
• Netlist POPR/hearing demonstratives (IPR2022-00996 / -00999) — https://ptacts.uspto.gov/ptacts/public-informations/petitions/1549632/