US 10937880

Here is a concise summary of US patent 10937880:

US Patent 10,937,880 B2

• Title: Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
• Current Assignee: Oak Ip LLC
• Original Assignee: Acorn Semi LLC
• Inventors: Daniel E. Grupp, Daniel J. Connelly
• Filing Date: May 12, 2020 (This patent is a continuation of application Ser. No. 15/929,592, filed May 12, 2020)
• Issue Date: March 2, 2021
• Abstract: An electrical device is described, featuring an interface layer placed between and in contact with a conductor and a semiconductor.

Plain-Language Overview of Independent Claims:

• Claim 1: This claim describes an electrical device that includes a semiconductor, a metal, and an interface layer positioned between them. This interface layer is designed to achieve two main goals: (1) "depin" the Fermi level of the semiconductor (meaning it prevents the Fermi level from being fixed by surface effects), and (2) still allow electrical current to flow between the metal and the semiconductor when the device is under electrical bias. A key characteristic is that the device has a specific contact resistance of less than approximately 10 Ω-μm². The interface layer can consist of a single passivation layer or a combination of a passivation layer and a separation layer.
• Claim 11: This claim also describes an electrical device, featuring a silicon-based semiconductor, a conductor, and an interface layer situated between them. This interface layer is designed to make the Fermi level of the conductor (i) align with the conduction band of the semiconductor, (ii) align with the valence band of the semiconductor, or (iii) be independent of the Fermi level of the semiconductor. Importantly, the interface layer is thin enough to allow current flow with a specific contact resistance of less than or equal to approximately 10 Ω-μm². The interface layer is formed by heating the semiconductor in the presence of a nitrogenous material (like ammonia, nitrogen gas, or plasma-generated nitrogen) within a vacuum chamber.
• Claim 17: This claim outlines a method for creating an electrical junction that "depins" the Fermi level of a semiconductor. The method involves placing an interface layer between a surface of the semiconductor and a conductor. This interface layer is specifically designed to (i) be thick enough to reduce the effects of metal-induced gap states (MIGS) in the semiconductor, and (ii) passivate the surface of the semiconductor (terminate dangling bonds). Despite the presence of this layer, the method ensures that significant current can flow between the conductor and the semiconductor because the interface layer's thickness is chosen to achieve a minimum (or near minimum) specific contact resistance for the junction. The interface layer can be a passivating material like a nitride, oxide, oxynitride, arsenide, hydride, and/or fluoride.

USPTO and CAFC 2026 Docket Information:

As of April 26, 2026, general searches for US patent 10937880 on public patent databases indicate its legal status as "Expired - Fee Related". The search for CAFC 2026 dockets did not return any specific litigation cases directly involving US Patent 10937880.