US 6473527

I'll run targeted searches for this exact patent number.

US 6,473,527 B1 — Verified Record

Caveat on scope of this search: I ran open-web searches against USPTO/Google Patents data and third‑party litigation databases (Unified Patents, Stanford NPE Database, CourtListener, IPWatchdog). I do not have authenticated PACER/CM‑ECF access, so my CAFC check is indirect. I found no Federal Circuit appeal docket in 2026 (or any year) involving US 6,473,527. Treat that as "not found," not as "confirmed none."

Bibliographic data (literal, per the fetched record)

Data conflicts I will not silently resolve:

• Dates. Google Patents: priority/filing 1999‑06‑01, issue 2002‑10‑29. Unified Patents' page for grant number 6473527: priority date 1999‑05‑31, grant date 2002‑10‑28, expiration 2019‑05‑31. The difference is likely timezone/effective‑date bookkeeping, not a different patent. The USPTO assignment record shows the inventor→Mustek assignment effective 1999‑05‑04.
• Patent 8,537,242 title mix‑up. A PatSnap litigation write‑up labels US 8,537,242 B2 as "module and method for interfacing analog/digital converting means and JPEG compression means." That title belongs to 6,473,527, not to 8,537,242. Cedar Lane did assert 6,972,790 / 8,537,242 / 6,473,527 together as a three‑patent family, which is likely how the labels got crossed. Flagging it so it is not propagated.
• Odd assignment record. The Google Patents reassignment list includes a 2022‑09‑29 entry assigning to MOOG INC. with a "RELEASE BY SECURED PARTY … ASSIGNOR: HSBC BANK USA" description. That does not fit the Mustek→Cedar Lane chain and appears to be a record artifact/noise relative to this patent. Cedar Lane remains the listed current assignee.

Ownership chain (as recorded)

Mustek Systems Inc. (1999) → Transpacific Optics LLC (rec. 2006‑01‑17, eff. 2005‑12‑02) → Intellectual Ventures Assets 99 LLC (rec. 2019‑01‑23, nunc pro tunc, eff. 2018‑12‑24) → Steephill Technologies LLC (rec. 2019‑03‑11, eff. 2018‑12‑28) → Cedar Lane Technologies Inc. (rec. 2019‑05‑13, eff. 2019‑05‑03). Maintenance fees were paid at the 4‑, 8‑, and 12‑year marks (last payment 2014‑03‑26); the patent lapsed at the 2019‑06‑01 expiration.

Abstract (as issued)

An interface module and method receive the digital image data output of an analog/digital converter and transmit it to a JPEG compression device when the image data is determined to be compressed. The module comprises a read control device, an output control device, and a memory device. The read control device reads a predetermined number of image lines from the A/D converter output and stores them in the memory device. The memory device stores the same number of image lines as the memory device built into the JPEG compression device. After the predetermined number of lines is read, the read control device generates a control signal to the output control device, which sequentially reads an image block from the memory device and sends each image block to the JPEG compression device, so the block can be fed directly for compression without an extra memory.

Plain‑language overview of the independent claims

Claim 1 — the apparatus (module). Three elements:

1. Read control means coupled to the A/D converting means: reads a predetermined number of image lines out of the A/D output sequentially, then emits a control signal once it has finished reading that number of lines.
2. Memory means coupled to the read control means: holds that predetermined number of image lines, and is sized to hold the same number of image lines as the JPEG chip's built‑in memory device.
3. Output control means that, in response to that control signal, reads an image block out of the memory means sequentially and forwards the block into the built‑in memory device of the JPEG compressor.

In substance: a line‑buffer/FIFO stage sized to match the JPEG core's internal block buffer, so the external A/D stream can be repackaged into compression‑unit‑sized blocks without adding the separate external RAM that the conventional arrangement (Fig. 1, element 14) required.

Claim 8 — the method. Three steps, mirroring claim 1:

1. Sequentially read a predetermined number of image lines from the image data output of the A/D converting means.
2. Store those lines in memory means that can store the same number of image lines as the JPEG compression means' built‑in memory device.
3. Sequentially read a predetermined size image block from that memory means into the built‑in memory device when the image data output is determined to be compressed (i.e., a conditional/pass‑through decision).

Notable dependent claims: 2–4 tie the A/D means to a CCD, a contact image sensor, or a digital camera input; 5 recites the memory as a RAM; 6 fixes the numbers — eight lines, 8×8 pixel block (the JPEG baseline MCU); 7 adds input/output interfacing means to a host computer port. On the method side, 9 covers the not‑compressed branch (forward the block to the host via I/O interfacing means), 10 repeats the eight‑line / 8×8 limitation, and 11 states that the memory means size is determined by the compression format of the JPEG compression means.

The functional‑claim style ("means for") throughout claims 1 and 8 is worth noting — under §112(f) these would likely be construed to cover the corresponding structure in the spec (read control device 22, output control device 23, memory device 24) and equivalents.

Enforcement history relevant to the "current docket" question

• The patent was asserted as one of Cedar Lane Technologies' three‑patent imaging bundle (alongside US 6,972,790 and US 8,537,242) in a very large NPE campaign, roughly 2019–2023, heavily in W.D. Tex. (Judge Albright) with follow‑on filings in D. Del., D.N.J., E.D. Va., C.D. Cal., E.D.N.Y., N.D. Ill., and others. See the Stanford NPE Litigation Database entry for 6473527 and the IPWatchdog roundups.
• Representative dispositions I could verify are consent judgments / voluntary dismissals with prejudice (e.g., Speco Technologies, E.D.N.Y. 1:22‑cv‑07970, closed 2023‑03‑17; Adesso, closed 2023‑02‑28; Adaptive Recognition America, D. Del. 1:22‑cv‑00531, voluntarily dismissed 2022‑05‑06). Several Korean‑defendant cases settled (per a KIPO report: 6:22‑cv‑00456, 6:22‑cv‑00524, 6:22‑cv‑01072, 2:22‑cv‑05091).
• No claim construction ruling, no invalidity holding, and no CAFC decision surfaced. So claim scope under §112(f) and validity were never judicially tested. I did not find any IPR/PGR on this patent either, though I did not exhaustively query the PTAB docket.

Uncertainty to flag: because the patent expired in June 2019, any 2022–2023 filings could only have sought pre‑expiration damages within §286's six‑year lookback (i.e., roughly 2016‑06 to 2019‑06). I cannot confirm from the sources retrieved which accused‑product periods were pleaded. If you need that, it requires pulling the complaints from PACER.

Sources

• https://patents.google.com/patent/[US6473527B1](/patent/US6473527B1)/en (authoritative text used above)
• https://portal.unifiedpatents.com/patents/patent/6473527 (grant 6473527; alternate priority/grant/expiration dates)
• https://npe.law.stanford.edu/patent/6473527 (assertion list)
• https://www.patsnap.com/resources/blog/litigation/cedar-lane-technologies-v-speco-technologies-patent-infringement-patsnap/ (consent judgment; note the 8,537,242 title mislabel)
• https://ipwatchdog.com/2022/11/03/patent-filings-roundup-old-ip-edge-filings-explode-no-new-discretionary-denials-again-fortress-backed-divx-rolls-on/ (6473527 filings)
• https://www.courtlistener.com/docket/17232053/cedar-lane-technologies-inc-v-drift-innovation-inc/ (three‑patent assertion in one complaint)

I'll research litigation involving US 6473527. Let me start with the sources you specified.

Let me dig deeper into the specific litigation databases and look for any non–Cedar Lane suits.

Let me check for pre-Cedar Lane litigation (TransPacific Optics era) and any CAFC appeals.

Bottom line

US 6,473,527 ("Module and method for interfacing analog/digital converting means and JPEG compression means") was the subject of a large, single-plaintiff assertion campaign by Cedar Lane Technologies Inc., an NPE that acquired the patent via the Intellectual Ventures → Steephill → Cedar Lane chain in 2019. I found no litigation by the prior owners (Mustek Systems, TransPacific Optics LLC, Intellectual Ventures Assets 99, Steephill Technologies) and no CAFC appeal or PTAB proceeding involving the '527 patent.

Two important caveats before the list:

1. Date conflict. Google Patents (per the authoritative text you supplied) gives the priority/filing date as 1999‑06‑01 and lists "Anticipated expiration" as 2019‑06‑01. Your prompt says today is 2026‑04‑26, and the header of the record says "Fetched: 2026‑09‑28." The patent is expired; post‑2019 suits therefore sought past damages only (and were largely disposed of quickly).
2. Scope conflict. The "Family has litigation" links on Google Patents are family‑level (they cover US 6,473,527, US 6,972,790 and US 8,537,242) and include many cases that may assert only the sibling patents. Where a source specifically ties a case to the '527 patent, I say so. Where the attribution is family‑level only, I flag it.

Ownership history relevant to standing/plaintiff identity

All known infringement suits in the record were brought by Cedar Lane Technologies Inc. as plaintiff.

Known litigation involving US 6,473,527

A. Cases where the '527 patent is affirmatively identified as asserted

B. Cases tied to the '527 patent only through the KIPO NPE report (defendants anonymized there; filing dates and dispositions as reported)

The Korean IP Office (KIPO) NPE report lists Cedar Lane suits against Korean companies and expressly ties the following to US6473527. Defendant names are anonymized in that report ("국내A사" etc.), so I cannot supply the party names.

⚠️ Note a conflict: IPWatchdog lists D.N.J. 2:22‑cv‑05091 as Hanwha Techwin America and as asserting only US 6,972,790, while the KIPO report ties a D.N.J. case at 2:22‑cv‑05091 to US6473527. Per your instruction to prefer search results over prior assumptions, I report both and flag the discrepancy rather than reconciling it.

Outcomes / patterns

• Overwhelmingly quick settlement or voluntary dismissal. Across the Cedar Lane portfolio, KIPO's 2022 year‑end tally reports 367 suits filed (2019‑2022), of which ~310 settled, 13 ended for other reasons, and 44 were pending — i.e., roughly 87% disposed of without adjudication. Most '527 cases I found follow this pattern (voluntary dismissal weeks after filing, or a consent judgment).
• The only substantive adverse adjudication I found on the '527 patent is the Adesso consent judgment (1:22‑cv‑01413, D. Del.), under which Cedar Lane's claims on US 6,473,527, US 6,972,790 and US 8,537,242 were dismissed with prejudice against that defendant.
• One case went as far as an answer + counterclaim — Videology Imaging Solutions (1:22‑cv‑00157, D. Del.) — and was then dismissed with prejudice by stipulation two weeks later.
• Venues: the campaign concentrated in W.D. Tex. (Waco, Judge Alan D. Albright), D. Del. (Judge Richard G. Andrews), and E.D. Va. KIPO's venue data for the portfolio shows W.D. Tex. ~42% and D. Del. ~25% of filings.
• No PTAB IPRs and no Federal Circuit appeals specifically involving US 6,473,527 surfaced in my searches. If you need certainty on this point, it should be confirmed directly against the PTAB API/PACER, which I could not query exhaustively here.

Sources consulted

• Google Patents record for US6473527B1 (authoritative text you supplied, incl. "Family has litigation" links, e.g. https://patents.google.com/patent/US6473527/en)
• Stanford NPE Litigation Database, patent page for 6473527: https://npe.law.stanford.edu/patent/6473527
• Unified Patents litigation portal (case records, e.g. https://portal.unifiedpatents.com/litigation/Delaware%20District%20Court/case/1:22-cv-00157)
• IPWatchdog "Patent Filings Roundup" (Aug 25, 2022; Sep 23, 2022; Nov 3, 2022)
• RPX Insight (Cedar Lane W.D. Tex. complaint, Jan 11, 2022)
• UniCourt, CourtListener/RECAP, Dockets.Justia docket summaries
• KIPO NPE report (Korean-language) and ip-navi.or.kr NPE guide
• PatSnap Eureka litigation analysis of 1:22‑cv‑01413 (Adesso)
• Ex Parte complaint analysis of 6:22‑cv‑01307 (Zenitel Group)

Caveats I want to be explicit about

1. I could not retrieve a complete, docket-level enumeration of every '527 case. The Google Patents "family litigation" link list contains well over 100 docket links, but those are family-wide and I could not verify which assert '527 versus only the '790/'242 siblings.
2. Several filing dates above are given only at year granularity because the retrieved sources did not state a verified day.
3. Party names, courts, and case numbers are reproduced literally from the sources; where sources conflict (e.g., 2:22‑cv‑05091 above), I have reported the conflict rather than choosing.
4. This is a research summary of public litigation records, not a legal opinion; docket statuses should be confirmed against PACER before being relied on.

I'll verify the structured "no proceedings on file" result against live sources before writing this up.

No PTAB hits yet. Let me check the sibling patents and PTAB docket aggregators to confirm the negative and assess the pattern signal.

PTAB Proceedings — US 6,473,527 B1

Proceedings overview

There are zero AIA trial proceedings on US 6,473,527 — no IPR, no PGR, and no CBM — so there is no status breakdown to report, and the bottom-line defensive posture is unusual: the patent was never tested at the Board, meaning no claim has been canceled and no claim has been sustained; every one of claims 1–11 remains formally intact on the face of the record and can only be attacked in district court.

This is the canonical answer from the structured "PTAB proceedings on file" block (USPTO Open Data Portal): no AIA trials indexed against this patent as of ingest. I ran independent web searches to see whether anything predated or postdated the ODP ingest, and they returned nothing contradicting that — no petition, no institution decision, no FWD, no Director Review, no PTAB appeal at the Federal Circuit referencing 6,473,527. Treat the negative as "not found," not "confirmed none" (I have no authenticated PTAB E2E / PATR or PACER access; see the verification note at the end).

Because there are no proceedings, the per-proceeding template is intentionally empty. The substantive value for a defendant is therefore in the absence analysis below.

No proceedings to report

I did not invent proceeding numbers to fill this table. If your demand letter, licensing package, or litigation hold references an IPR/PGR number against 6,473,527, ask the sender to produce the PTAB docket — it does not appear to exist.

Strategic summary

Claim status: everything is untested. There is no claim-level scorecard for this patent because no tribunal has ever reached the merits. Claims 1–11 are all UNTESTED — nothing is canceled, nothing is confirmed. Contrast that with the sibling Cedar Lane imaging patents in the same assertion campaign (US 6,972,790 and US 8,537,242), which I also found no IPR activity against. The entire three-patent family was litigated exclusively in district court, and the record shows the campaign was resolved essentially entirely by voluntary dismissal / consent judgment — a pattern consistent with early nuisance-value settlements rather than merits adjudication. The only merits-adjacent datapoint I surfaced is that Cedar Lane's dismissal of Cedar Lane v. Amlogic, 1:23-cv-01242 (D. Del.), was with prejudice on 2024-04-17, which PatSnap speculated could reflect "early evaluation of Amlogic's invalidity defenses (such as IPRs)" — but that is third-party speculation about an undisclosed reason, not evidence an IPR was ever filed, and no IPR number appears anywhere. Do not cite that as an IPR challenge.

Estoppel landscape: none — and that cuts your way, subject to a big timing caveat. Because no IPR was ever instituted, no § 315(e)(2) estoppel attaches to anyone. No petitioner, real party in interest, or privy is barred from raising any § 102 or § 103 ground in a civil action or ITC proceeding based on this patent. For a defendant being asserted against today, the full universe of patents-and-printed-publications art remains available in district court under §§ 102/103, plus all § 112 and § 101 defenses that IPR could never have reached anyway. The 1995–1999 prior-art landscape (the six references cited on the face of the patent — US 5,761,180 to Sony; US 6,111,605 to Ricoh; US 6,133,375 to Sanyo; US 6,323,897 to Matsushita; US 6,323,899 to St. Clair; US 6,330,028 to Casio — plus the "Similar Documents" cluster, notably US 4,593,324 and CN1130617C / TW417394B, if those are family members rather than merely similar art) has never been professionally briefed to any adjudicator. That is worth real money in a validity analysis.

The critical timing / posture caveat: the patent expired 2019-06-01 (anticipated expiration; maintenance fees paid at the 4-, 8-, and 12-year marks with the last payment 2014-03-26, per the assignment and legal-events record). The practical effect is:

• Every 2022–2023 Cedar Lane filing on 6,473,527 could only reach pre-expiration conduct within 35 U.S.C. § 286's six-year lookback — roughly conduct from 2016-06 through 2019-06. The claims cannot be infringed by anything after expiration. If you are a defendant today, the damages window is a closed historical box; the live question is whether your 2016–2019 products read on claims 1–11.
• An IPR is theoretically still available on an expired patent (the Board regularly institutes on expired claims; the patent owner simply cannot amend), but the incentive structure collapses: the statute of limitations has already run on most or all actionable conduct, so the cost of a post-expiration IPR rarely buys anything a district-court invalidity defense does not. That is very likely why no petition was ever filed — the same economics that drove ~87%+ settlement rates in the campaign (KIPO/IP-Navi data: 239 of 275 cases "likely settlement," 0 stays) meant nobody had a reason to spend IPR money. Note also that § 315(b)'s one-year bar runs from service of a complaint alleging infringement, so if Cedar Lane (now the record assignee) or a successor serves you, your IPR clock starts then — but with the patent already expired, an IPR is a tactical tool, not a cost-justified default.

Pattern signals. (1) No repeat petitioner — because there are no petitioners at all. (2) No patent-owner PTAB appeals — nothing to appeal. (3) No defensive aggregator visible in the PTAB chain. I found no Unified Patents or other aggregator IPR against 6,473,527; the "Unified Patents" hits in my searches are the litigation portal reporting Cedar Lane's district-court cases, not UP-filed challenges. Cedar Lane itself is the tip of an Intellectual Ventures divestiture chain (Mustek → Transpacific Optics → IV Assets 99 → Steephill → Cedar Lane, all recorded 2006–2019, per the legal-events record) and its counsel of record is overwhelmingly Rabicoff Law (Rabicoff: 1,127 plaintiff-side filings; the KIPO report attributes 58 Cedar Lane cases to Rabicoff alone). That is a volume-licensing posture that depends on defendants not litigating to validity — which is exactly the environment in which no IPR gets filed.

Recommended next steps

If you are a defendant and want an invalidity anchor: there is none at the PTAB to cite. Do not represent to a court or adversary that claims have been canceled or narrowed — they have not been. Instead:

1. Confirm the negative yourself before relying on it. Run the patent number through USPTO PTAB E2E / the PTAB public search (https://ptacts.uspto.gov), the ODP AIA trials API, and the Board's decisions archive. My searches covered Google Patents/Unified Patents/Stanford NPE/IPWatchdog/CourtListener/Docket Alarm surfaces only; absence there is strong but not dispositive of a pre-2012 or recently-filed proceeding. If you find a proceeding I missed, my conclusion changes materially and I should be corrected.
2. Attack the date problem head-on. Because the patent expired 2019-06-01, move to caboose the case: any recovery is bounded by the § 286 six-year lookback keyed to the filing date of the assertion, and pre-expiration use. Demand Cedar Lane's infringement contentions identify the specific 2016–2019 accused products and features — complaints in this campaign notoriously pleaded "Exemplary Defendant Products" in exhibits that were incorporated by reference but not attached to the filed complaint (see the complaint analyses for Cedar Lane v. Moxa, 6:22-cv-00778, and Cedar Lane v. Zenitel, 6:22-cv-01307, both of which note the claim charts are missing from the filed pleading). Unattached exhibits make a Rule 12(b)(6) or local-rule contentions challenge cheap and fast.
3. Press the § 112(f) construction as your narrowness lever. Claims 1 and 8 are pure means-plus-function ("read control means," "memory means," "output control means"). More than a decade of Cedar Lane assertions produced no claim construction ruling on this patent (nothing in the record shows one). Your best early motion practice is a Williamson v. Citrix construction tying the "means" to the specification's structure — read control device 22, output control device 23, memory device 24 — and equivalents, which is a small structural footprint (an 8-line line-buffer repackaging into the JPEG core's internal block buffer). Accused architectures that buffer or DMA image data outside that specific topology should be non-infringing under a tight construction, and you get to build that record without any adverse PTAB or Markman precedent.
4. Prioritize IPR only if a live, substantial damages exposure exists. If the § 286 window is trivial or your products post-date 2019-06-01, skip the PTAB entirely and go straight to summary judgment of non-infringement/no recovery. If, unusually, a large 2016–2019 revenue base is at stake, an IPR filed within one year of service under § 315(b) is still legally available on the expired claims — and given that no estoppel exists and no art has ever been adjudicated, your grounds are unconstrained.

Verification note and sourcing

• Canonical source for the proceedings count: the structured "PTAB proceedings on file" block (USPTO Open Data Portal), which returns none. This is the authoritative answer per my instructions.
• Independent negative corroboration: web searches for "6,473,527" + IPR/PTAB, Cedar Lane + IPR, and the sibling patents 6,972,790 / 8,537,242 returned only district-court litigation reporting (IPWatchdog roundups, Unified Patents litigation portal, Stanford NPE database, KIPO/IP-Navi campaign statistics, PatSnap case write-ups, Patexia/CourtListener dockets) and no PTAB matter. Searches for a Federal Circuit appeal referencing this patent likewise surfaced nothing. Because I lack PACER/CM-ECF and authenticated PTAB E2E access, label these findings "not found" rather than "proven absent."
• Cross-reference to the prior section: this is consistent with the earlier finding ("No claim construction ruling, no invalidity holding, and no CAFC decision surfaced… I did not find any IPR/PGR on this patent either, though I did not exhaustively query the PTAB docket"). No contradiction to flag — this section simply exhausts that open question and confirms the negative.
• One bibliographic discrepancy to keep flagged: the Unified Patents page for this grant lists priority 1999-05-31, grant 2002-10-28, expiration 2019-05-31, versus Google Patents' 1999-06-01 / 2002-10-29 / 2019-06-01. Both fall before the AIA's IPR availability (first IPR petitions 2012-09), so the date conflict does not affect the PTAB answer, but it does shift the expired-as-of date by one day and should be noted in any § 286 damages analysis.
• USPTO PTAB links for your own check: PTAB E2E / public search — https://ptacts.uspto.gov; PTAB decisions — https://www.uspto.gov/patents/ptab/decisions; CourtListener — https://www.courtlistener.com (search "6473527").

Inventors

Patterns to note. This is a single‑inventor patent (no co‑inventor cluster to trace). The assignment was executed ~4 weeks before the 1999‑06‑01 filing date, i.e. a routine pre‑filing employee assignment — the standard, non-suspicious form. There is no evidence of the "all inventors depart within 12 months" pre‑fire‑sale pattern, and I could not determine Wang's tenure or departure from Mustek from public sources (mark as unknown, not absent). The one structural curiosity is that the entire apparatus claim set (claims 1–7) is claimed in means‑plus‑function form, which is consistent with a single hardware engineer drafting an interface/ASIC module spec rather than a claim-drafting specialist.

Caveat: the previously generated summary is correct that a 1999‑05‑04 effective date appears in the Google Patents legal‑events feed; that is the same document as Reel 010009/0947 (execution 1999‑05‑04, recording 1999‑06‑01). Do not treat these as two assignments.

Original assignee

Mustek Systems Inc. — Taiwanese scanner/imaging peripherals manufacturer. The specification places the invention in exactly that product line: the module "can be adapted to a JPEG compression device 27 in a still image processor, such as a scanner, or even a digital camera" (col. spec, Detailed Description), and the A/D means is fed by "a charge coupled device, a contact image sensor, or a digital camera" (claims 2–4). So the claimed subject matter is a real product‑line architecture for Mustek's own flatbed/scanner designs, not an abstract holding.

• Shipment of an embodying product: unclear. The patent is an internal interface/module design; whether any specific Mustek scanner SKU shipped with this exact line‑buffer‑to‑JPEG‑buffer arrangement is not something I can confirm from the sources retrieved. I will not assert it either way.
• Primary line of business: consumer/ODM imaging peripherals (scanners, and later consumer electronics/ODM work).
• Current status: Mustek Systems Inc. has continued as an operating Taiwanese manufacturer/OEM; I found no Chapter 7/11, dissolution, or change‑of‑name record for it in the assignment record or in the sources retrieved. Important qualification: in the assignment effective 2005‑12‑02 (recorded 2006‑01‑17, Reel 017480/0325) Mustek divested this patent to Transpacific Optics LLC. Corroborating evidence that this was a portfolio‑level divestiture rather than a one‑off: a separate 37 CFR 3.73(b) ownership statement filed for a sibling Mustek application (09/828,856, "Network server for providing scanning functionality to a computer") recites the identical chain step "Mustek Systems Inc. → … , Reel 017480, Frame 0325." Same reel/frame ⇒ same bulk conveyance of Mustek patents to the same acquirer.

Assignment timeline

Data provenance caveat, stated up front: I could not reach an authenticated USPTO Assignment Center session, so the reel/frame numbers below are taken from the Google Patents "Legal Events" reassignment feed, which mirrors Assignment Center reel/frame data and is reproduced in the authoritative patent text supplied for this analysis. The corresponding attorney/correspondent of record is not exposed in that feed, and I did not obtain it from any source I could verify. See signal 3 below — it is the one requested data element I am reporting as unavailable rather than guessed.

There are six recorded assignment‑type conveyances on this patent:

• 1999‑05‑04 (executed) / recorded 1999‑06‑01 — Reel 010009/0947

  • Conveyance: Assignment (of assignors' interest)
  • Assignor: Wang, Chia‑Ying
  • Assignee: Mustek Systems Inc. (Taiwan)
  • Correspondent: not available in the retrieved record (Assignment Center would show it).
  • Context: inventor‑to‑employer assignment, pre‑filing; ordinary.

• 2005‑12‑02 (executed) / recorded 2006‑01‑17 — Reel 017480/0325

  • Conveyance: Assignment
  • Assignor: Mustek Systems, Inc.
  • Assignee: Transpacific Optics LLC (Delaware)
  • Correspondent: not available. Flag: this is the same reel/frame that appears in the 37 CFR 3.73(b) statement for sibling Mustek app 09/828,856 — evidence of a repeat recording event across a Mustek portfolio batch, which is exactly the kind of batch‑recording fingerprint that normally shares one correspondent. That inference is not a verified correspondent name.
  • Context: portfolio divestiture to a patent‑monetization vehicle (Transpacific Optics LLC is the acquisition arm associated with the Transpacific IP monetization group).

• 2006‑03‑28 — FPAY, 4th‑year maintenance fee (not an assignment; included so the fee chain is auditable)

• 2010‑03‑23 — FPAY, 8th‑year fee

• 2014‑03‑26 — FPAY, 12th‑year fee (last fee paid; the patent's 20‑year term ran out 2019‑06‑01, so no 16th‑year fee ever came due)

• 2018‑12‑24 (executed) / recorded 2019‑01‑23 — Reel 048112/0861

  • Conveyance: Nunc Pro Tunc Assignment
  • Assignor: Transpacific Optics LLC
  • Assignee: Intellectual Ventures Assets 99 LLC (Delaware)
  • Correspondent: not available.
  • Context: defensive aggregation / asset warehousing by Intellectual Ventures — an IV Asset entity taking title, with the "nunc pro tunc" form used to back‑date effect to 2018‑12‑24.

• 2018‑12‑28 (executed) / recorded 2019‑03‑11 — Reel 048565/0369

  • Conveyance: Assignment
  • Assignor: Intellectual Ventures Assets 99 LLC
  • Assignee: Steephill Technologies LLC (Washington)
  • Correspondent: not available.
  • Context: transfer out of IV to an intermediate conduit LLC. RPX reported on 2019‑05‑25 that IV "transferred a more modest set of patents, numbering around 50, to Steephill Technologies LLC, which passed them immediately along to Cedar Lane Technologies Inc. in apparent preparation for assertion." US 6,473,527 is one of that batch.

• 2019‑05‑03 (executed) / recorded 2019‑05‑13 — Reel 049155/0893

  • Conveyance: Assignment
  • Assignor: Steephill Technologies LLC
  • Assignee: Cedar Lane Technologies Inc. (British Columbia, Canada)
  • Correspondent: not available.
  • Context: transfer‑to‑asserter. Cedar Lane was incorporated in Canada in April 2019 — i.e. weeks before taking title (per Corporations Canada, cited by The Logic; sole director Gregory Benoit, principal of Patent Armory).

Anomalous entry — not part of the chain:

• 2022‑09‑20 (executed) / recorded 2022‑09‑29 — Reel 061255/0360 — Conveyance: Release by Secured Party — Assignor: HSBC Bank USA, National Association — Assignee: Moog Inc. (New York). This is a security‑interest release between an aerospace/industrial motion-control company and its bank; it bears no relationship to Mustek → Transpacific → IV → Steephill → Cedar Lane. It appears in the Google Patents reassignment feed but I read it as a mis‑keyed / feed artifact, and I explicitly decline to treat it as an ownership change. (This corroborates the artifact flag already raised in the previously generated summary — no contradiction, just confirmation.) I could not verify its provenance in Assignment Center.

Timeline diagram

timeline
    title Ownership of US 6473527
    1999 : Wang assigns to Mustek Systems
         : Application filed
    2002 : Patent issued
    2005 : Mustek sells portfolio to Transpacific Optics
    2006 : Assignment recorded at Reel 017480 Frame 0325
    2014 : Final maintenance fee paid
    2018 : Transpacific Optics to IV Assets 99 LLC
         : IV Assets 99 to Steephill Technologies LLC
    2019 : Steephill to Cedar Lane Technologies Inc
         : Patent term expires
    2022 : Cedar Lane asserts patent against 7 plus defendants
         : Anomalous Moog release record appears

NPE / troll-pattern signals

1. Shell-entity transfer — PRESENT. Three separate operating→licensing handoffs: Reel 017480/0325 (Mustek → Transpacific Optics LLC, eff. 2005‑12‑02), Reel 048565/0369 (IV Assets 99 → Steephill Technologies LLC, eff. 2018‑12‑28), Reel 049155/0893 (Steephill → Cedar Lane, eff. 2019‑05‑03). Critically, this call does not rest on naming. Concrete evidence for Cedar Lane: (a) incorporated in Canada in April 2019, weeks before taking title; (b) principal place of business is 560 Baker Street, Suite 1, Nelson, BC V1L 4H9, and 560 Baker Street is a small multi-tenant commercial address, not a manufacturing site (recited in Cedar Lane's own complaints); (c) no products in commerce — its own counsel described the business to The Logic as licensing, seeking "a settlement arrangement that would cover Cedar Lane's entire portfolio including future acquisitions"; (d) Dish Network's securities filing describes Cedar Lane as "a non‑practicing entity that has filed more than 75 patent infringement lawsuits." Steephill Technologies LLC is likewise a Washington conduit with no products, existing in the record only as a pass‑through (Reel 048565/0369 inbound, 049155/0893 outbound, five months).

2. Known asserter in the chain — PRESENT. Intellectual Ventures Assets 99 LLC (Reel 048112/0861) is an Intellectual Ventures entity — IV is on the canonical NPE list in the task brief. Cedar Lane Technologies Inc. (Reel 049155/0893) appears in Unified Patents' and RPX's assertion directories; RPX's 2019‑05‑25 report expressly frames the IV→Steephill→Cedar Lane sequence as "apparent preparation for assertion." Independent confirmation: the KIPO NPE litigation report lists Cedar Lane under a heading that records "NPE 여부: O" (NPE: yes). Also relevant: Transpacific Optics LLC (Reel 017480/0325) is the Transpacific IP‑affiliated acquisition vehicle — evidenced not by naming but by the identical reel/frame citation in the 37 CFR 3.73(b) statement for sibling Mustek application 09/828,856.

3. Repeat correspondent across the chain — UNCLEAR / NOT OBTAINED. This is the specific tell the task asked me to capture, and I could not capture it: the Google Patents legal‑events feed that supplied every reel/frame above does not publish the correspondent of record, and no other source I reached disclosed it. Do not treat the four 2018–2019 recordings as having a single attorney on this record. What I can say evidentially: the 2006‑01‑17 recording at Reel 017480/0325 was executed as part of a multi‑patent Mustek batch — the same reel/frame is cited in the 3.73(b) chain statement for app 09/828,856 — so that one recording very likely shared one correspondent across the batch. Verifying the 2018–2019 links requires pulling reel 048112/0861, 048565/0369, and 049155/0893 in Assignment Center and comparing the correspondent blocks. I am flagging this as an open item, not a negative finding.

4. Cascading transfers — PRESENT. Three title transfers in under five months: eff. 2018‑12‑24 (Reel 048112/0861), eff. 2018‑12‑28 (Reel 048565/0369, i.e. four days later), eff. 2019‑05‑03 (Reel 049155/0893). The chain was deliberately two‑hop (IV → Steephill → Cedar Lane) rather than a direct IV → Cedar Lane sale. Recording lag varied (3 weeks to ~2.5 months), which is consistent with a coordinated campaign‑assembly process rather than arm's‑length trading.

5. Pre-litigation transfer — PRESENT, qualified. Cedar Lane took title eff. 2019‑05‑03 (Reel 049155/0893; recorded 2019‑05‑13) and was sued‑in‑the‑capacity‑of‑plaintiff across an expanding campaign beginning within ~11 months (e.g., Cedar Lane v. Corel, W.D. Tex. 1:20‑cv‑00352, filed 2020‑04‑02). For this specific patent, however, the first suits I can date are 2022‑05‑05 (W.D. Tex. 6:22‑cv‑00456) and 2022‑05‑24 (6:22‑cv‑00524) — roughly three years after the transfer, not the six months the signal describes. So the acquisition‑to‑assertion interval for '527 is long; the signal holds at the portfolio level (clean title to a newly formed, product‑less asserter, then assertion) but not at the strict sub‑6‑month level for this patent. I am scoring it present on the pattern, with the timing caveat stated so it is not overstated.

6. Bankruptcy fire-sale — NOT PRESENT (on available evidence). No Chapter 7/11 proceeding, bankruptcy trustee, or "Bankruptcy" conveyance appears for Mustek in the record; the 2005 transfer is recorded as a plain Assignment (Reel 017480/0325). Caveat: I did not obtain Mustek's 2005–2006 financial statements, so I cannot rule out that the divestiture was distress‑motivated. The conveyance‑type evidence, however, is an ordinary sale, not a bankruptcy sale.

7. Privateering — NOT PRESENT / not evidenced. Privateering requires the operating company to benefit from an NPE asserting on its behalf against competitors. Here the operating company (Mustek) sold outright in 2005 and exited the chain entirely; IV monetized its own inventory; Cedar Lane asserts for its own account. No SEC filing or reporting links Mustek to Cedar Lane's assertions.

8. Defensive aggregator (anti‑NPE) — NOT PRESENT; inverse confirmed. The chain terminates at Cedar Lane Technologies Inc., an active plaintiff (Reel 049155/0893), not at RPX / AST / LOT / Unified / OIN. In fact the defensive‑aggregator relationship here is adversarial: Unified Patents petitioned against a different Cedar Lane patent, US 7,173,177, and the PTAB held its asserted independent claim unpatentable in a final written decision on 2021‑02‑12. I found no IPR/PGR on US 6,473,527 itself, so this patent was never neutralized by a validity challenge.

Verdict

NPE — high confidence.

Four independent strong signals converge on the same reel/frame entries: (i) shell-entity transfer — Reel 048565/0369 (IV Assets 99 → Steephill Technologies LLC, eff. 2018‑12‑28) and Reel 049155/0893 (Steephill → Cedar Lane, eff. 2019‑05‑03), the latter to a Canadian company incorporated April 2019 at a Nelson, BC office address whose own litigation counsel described the business as portfolio licensing and whose sole director runs a patent‑monetization consultancy; (ii) known asserter in the chain — Reel 048112/0861 (Intellectual Ventures Assets 99 LLC); (iii) cascading transfers — three assignments in five months across two intermediate LLCs; and (iv) pre‑litigation transfer — title seeded to a product‑less asserter that then filed 40+ suits (including on '527 from 2022‑05‑05). Caveats that must travel with this verdict: the assignment correspondent of record was not obtainable from the sources I could reach, so signal 3 is unresolved rather than negative; and because the patent expired 2019‑06‑01, the 2022–2023 suits could only have reached pre‑expiration damages under 35 U.S.C. §286.

Verification links:

• USPTO Assignment Center (search by patent number 6473527): https://assignmentcenter.uspto.gov/ — also indexed at https://assignment.uspto.gov/patent/index.html
• Google Patents, source of the reel/frame data reproduced above: https://patents.google.com/patent/[US6473527B1](/patent/US6473527B1)/en
• Unified Patents patent page (alternate date bookkeeping): https://portal.unifiedpatents.com/patents/patent/6473527
• RPX, US Patents Continue to Roll out of IV…to NPEs, to OpCos, and to Court (2019‑05‑25), source for the IV→Steephill→Cedar Lane framing: https://litigation.rpxcorp.com/news/56949
• 37 CFR 3.73(b) statement citing Reel 017480/0325 for the Mustek→Transpacific Optics step: https://ia803209.us.archive.org/35/items/gov.uspto.patents.application.09828856/09828856-2007-11-02-00001-R3.73B_text.pdf
• Unified Patents, PTAB final written decision against Cedar Lane's US 7,173,177 (2021‑02‑12): https://www.unifiedpatents.com/insights/2021/2/12/cedar-lane-patent-held-unpatentable
• The Logic, on Cedar Lane's incorporation, director, and stated licensing model: https://thelogic.co/news/b-c-firm-sues-torontos-ecobee-in-texas-court-thats-become-a-go-to-for-ip-litigation/
• KIPO NPE report (Cedar Lane NPE designation and '527 case list): https://kipo.go.kr/ko/kpoBultnFileDown.do?ntatcSeq=16800&ntatcAtflSeq=1&sysCd=SCD02&aprchId=BUT0000048

Contradictions / corrections flagged for the record: (1) The Moog/HSBC entry at Reel 061255/0360 is not an ownership link in this chain and should not be carried forward as one — it is consistent with the artifact flag already raised earlier in this analysis. (2) The previously generated summary's date conflicts (Google 1999‑06‑01/2002‑10‑29 vs. Unified 1999‑05‑31/2002‑10‑28) remain unresolved and are orthogonal to the assignment chain; the assignment record independently shows execution 1999‑05‑04 and recording 1999‑06‑01, which is consistent with either priority convention. (3) The PatSnap mislabeling of US 8,537,242 with this patent's title (raised earlier) is confirmed as a mislabel by this analysis: 8,537,242 is "Host interface for imaging arrays," a divisional of US 6,972,790, and is a different patent in Cedar Lane's three‑patent imaging bundle alongside '527.

I have the authoritative patent text with its citation lists. Let me verify each cited reference against USPTO/Google Patents records.

Let me verify the remaining two examiner citations and the family/foreign counterparts.

Prior‑Art Analysis — US 6,473,527 B1

Method note / scope. I queried USPTO‑derived data (Google Patents and USPTO assignment records) plus the live patent text. The authoritative citation set is the one printed on the face of the patent: "Patent Citations (6)" (references cited by the examiner). I retrieved and verified full bibliographic data for 5 of the 6; my retrieval of the last (US 6,323,897) was cut off by tool limits, so for that one I rely on the title/date/assignee as printed in the patent text itself and flag the gap explicitly. I did not auto‑correct any number. Because nothing in the search results contradicts the patent's own citation tables, the tables below are the ground truth.

Governing law. US 6,473,527 was filed 1999‑06‑01 (application US 09/324,095), i.e. pre‑AIA. Pre‑AIA 35 U.S.C. § 102 governs, including § 102(e) (patents granted on applications filed before the applicant's invention date). This matters because several cited references issued after 1999 but were filed before — they are § 102(e) art, not § 102(b) art.

1. The six examiner‑cited references ("Citations (6)")

Source: "Patent Citations (6)" / "Citations (6)" tables at https://patents.google.com/patent/[US6473527B1](/patent/US6473527B1)/en. All six predate the 1999‑06‑01 filing, so all six are available as prior art (§ 102(a)/(b) for the pre‑1996 ones; § 102(e) for the ones granted on earlier‑filed applications).

2. Reference‑by‑reference detail and § 102 mapping

US 6,323,899 B1 — "Process for use in electronic camera" (St. Clair)

• Citation: US 6,323,899 B1; earliest priority 1990‑11‑20; granted 2001‑11‑27; app. 09/541,285 (continuation; ultimate parent 08/098,787, filed 1993‑07‑29, now US 5,576,757).
• Disclosure (verified): electronic still video camera that converts a still image into an operator‑selectable compressed digital signal format using a JPEG algorithm, formats it to PC‑compatible format, and stores it on a removable floppy diskette. Includes CCD sensor, image‑signal‑to‑digital conversion logic (Figs. 5A/5B), a compression/decompression subsystem, and multiple output I/O channels (serial, parallel) and additional video in/out.
• § 102 exposure: Environment + A/D + JPEG compression + host I/O. Could be asserted against the preamble/environment of claims 1 and 8, and directly against claim 2 (A/D coupled to a CCD) and claim 7 (input/output interfacing means to a host computer). Does not disclose the claim‑1 architecture (read controller → line‑count‑matched buffer → output controller feeding the JPEG chip's built‑in memory), so it cannot anticipate claim 1 or claim 8 as issued.

US 6,111,605 A — "Digital still video camera, image data output system …" (Ricoh / Suzuki)

• Citation: US 6,111,605 A; priority 1995‑11‑06 (JP 7‑287640, plus JP 7‑290182, 7‑295429, 7‑301822, 7‑301823, 7‑338186); filed 1996‑11‑06 (08/744,045); granted 2000‑08‑29; reissued as US RE38,759 E1 (2005).
• Disclosure (verified): a digital still video camera having (i) picture information input means, (ii) picture information memory means storing the picture information, and (iii) converting/sending means that converts image data into a format adapted to an external image‑forming apparatus and sends it using a synchronizing signal adapted to that apparatus; plus an I/F device, printer, LCD monitor and memory card.
• § 102 exposure: strongest on the host/output side — relevant to claim 7 (input/output interfacing means coupled to a host‑computer port) and claim 9 (method step of forwarding the block to an I/O interfacing means / host when data is not compressed). Bears on the general "A/D → memory → output" pipeline of claims 1/8 but lacks the line‑count‑matched memory feeding the JPEG core's built‑in memory.

US 5,761,180 A — "Signal processing for selective temporal data recording and reproduction" (Sony)

• Citation: US 5,761,180 A; priority 1996‑01‑30; filed 1997‑01‑24 (08/788,185); granted 1998‑06‑02; inventors Yamashita Keitaro / Murabayashi Noboru; examiner Nabil Hindi.
• Disclosure (verified): periodic recording of TV image and audio signals onto a recording medium for a predetermined period when the recorded signal level exceeds a threshold, followed by a recording standby state; aimed at efficient hard‑disk space use.
• § 102 exposure: weakest of the six for this patent. It addresses temporal/threshold‑based data recording and buffering — it is background for the spec's observation that "the data rates of compression and transmission are different" and that data must be temporarily buffered during compression. It does not disclose an A/D‑to‑JPEG interface, a line buffer, or a block transfer into a JPEG core, and does not anticipate any claim.

US 6,330,028 B1 — "Electronic image pickup device …" (Casio)

• Citation: US 6,330,028 B1; priority 1996‑02‑15 (JP 8‑027497); parent 08/798,244 filed 1997‑02‑11; the granted claims came from divisional 09/566,880 filed 2000‑05‑08; granted 2001‑12‑11; inventors Oie Masahiro / Yamamoto Kazuto. § 102(e) art as of 1996‑02‑15.
• Disclosure (verified): electronic image pickup device that keeps operating even when management information for recording/reproducing image data is not readable (file‑system robustness).
• § 102 exposure: background for the image‑pickup/imaging environment of claims 2–4 (CCD / contact image sensor / digital camera inputs) and for the notion of an image‑pickup device with memory and recording control. Not anticipatory of claims 1 or 8.

US 6,134,375 A — "Image signal recording and reproducing apparatus" (Sanyo)

• Citation: US 6,134,375 A; priority 1997‑03‑28; filed 1998‑02‑27 (09/032,219); granted 2000‑10‑17; inventors Naganawa, Ishimoto, Furusawa, Higashitsutsumi.
• Disclosure (verified): a digital processor generates luminance/color‑difference data; a JPEG encoder compresses the separated luminance and compound color‑difference data; a modulator produces modulated signals that a recording/reproducing section writes to parallel tracks on magnetic tape. Also describes the CCD → A/D imaging front end.
• § 102 exposure: best of the camera‑side references on the JPEG compression means element of claims 1 and 8 (camera pipeline that JPEG‑encodes image data straight from the imaging path). Still missing the claim‑1 "memory means capable of storing the same number of image lines as said built‑in memory device" and the output controller that fills the JPEG chip's built‑in memory — so it does not anticipate claim 1/8 as issued.

US 6,323,897 B1 — "Network surveillance video camera system" (Matsushita)

• Citation: US 6,323,897 B1; priority 1998‑09‑04; granted 2001‑11‑27; assignee Matsushita Electric Industrial Co., Ltd.
• Disclosure: (flagged — full text not retrieved; tool limit reached). Per the title/field, a networked surveillance camera system in which captured image data is compressed and passed to a network/host interface.
• § 102 exposure: on that basis it is an environment/host‑interface reference relevant to claims 7 and 9 and to the general camera‑plus‑compression‑plus‑host‑interface combination of claims 1/8. I could not verify whether it discloses any line‑buffer/block‑transfer structure, so I make no anticipation assertion about it. If you need a firm read, its full specification must be pulled.

3. Bottom line on § 102

None of the six cited references anticipates any claim as issued. That is expected: the examiner cited all six and the patent still granted over them. Every one of them fails on the same crux limitations of the two independent claims:

• claim 1 requires (a) memory means… capable of storing the same number of image lines as said built‑in memory device, and (b) output control means [that], in response to said control signal, sequentially read[s] an image block from said memory means and forward[s] said image block to said built‑in memory device. The cited art discloses buffering and JPEG encoding generally, but none shows a buffer dimensioned to match the JPEG core's internal block buffer and loading image blocks directly into that built‑in memory so as to eliminate the external RAM (Fig. 1, element 14).
• claim 8 fails the same way on its "store … the same number of image lines as said built‑in memory device" and conditional block‑read steps.

Most plausible § 102/§ 103 attack surface, if one were constructed: the camera‑input references US 6,323,899 (A/D + JPEG + host I/O) and US 6,134,375 (camera + JPEG encoder), plus US 6,111,605 for the host‑output side, would be § 103 combination candidates rather than anticipatory references. The dependent claims with the softest § 102/§ 103 footing are 7 (host I/O interfacing — squarely met by US 6,323,899 and US 6,111,605), 9 (not‑compressed branch to host — US 6,111,605), and 2–4 (CCD/CIS/camera inputs — US 6,323,899, US 6,134,375, US 6,330,028).

4. What is not prior art (do not mis‑use these lists)

• "Cited By (8–10)" — these post‑date the 1999 filing and cite the '527 patent; they are later‑art only, not prior art: US 2007/0248288 A1, US 2007/0247466 A1, US 2008/0001953 A1, US 8,203,733 B2, US 2010/0254618 A1 (all Fuji Xerox/Chen), CN 112637602 A / B, WO 2023045168 A1 / US 11,930,198 B2 (Inspur Suzhou Intelligent Technology), and US 12,592,713 B2 (Quasistatics). The last one's publication date is listed as 2026‑03‑31 — still not prior art.
• Family members are the same invention, not prior art: TW 417394 B ("JPEG interface model and method capable of reading a predetermined image data from an A/D converter to the memory of JPEG integrated circuit for storage," pub. 2001‑01‑01) and CN 1130617 C ("JPEG interface module and method," pub. 2003‑12‑10) are the Taiwanese/Chinese counterparts of the '527 patent (family ID 23262055 is single‑country on Google's page, but these titles are the same subject matter). They cannot be § 102 art against their own US sibling.

5. Other substantively relevant art I noticed (not examiner‑cited)

These appeared in the patent's "Similar Documents"/search‑report‑style lists and predate the critical date; they are worth flagging because at least one is structurally closer to claim 1 than anything the examiner cited:

• US 5,444,483 A (Ricoh, Maeda; filed 1994‑02‑25, granted 1995‑08‑22) — a digital electronic camera with a line memory storing n lines and a block buffer storing an n×n block fed to a compression circuit. This is the closest structural analogue to the '527 line‑buffer‑to‑block scheme that I found, and it was not cited by the examiner. It still does not expressly recite that the block buffer is the JPEG chip's built‑in memory device, but it is the reference I would examine first for a § 102(b)/§ 103 challenge to claim 1. https://patentimages.storage.googleapis.com/f7/52/cb/5496dd1c72d8a6/US5444483.pdf
• Also pre‑critical‑date items in the Similar Documents list: US 4,593,324 A (1986, Image data storing device), US 5,452,378 A (1995, Image digitizer including pixel engine), JP 3,173,967 B2 and JP 3,233,480 B2 (image compression/expansion circuit devices), US 6,075,897 A (Image compression apparatus). Treat these as secondary; I did not verify their disclosure scope.

6. Confidence and open items

• High confidence: the six‑reference citation set, their numbers/titles/dates/assignees as tabulated, and the conclusion that none anticipates claims 1/8 as issued (supported by the patent having granted over all six, and by the verified disclosures of five of them).
• Medium confidence / to verify: the full disclosure of US 6,323,897 B1 (Matsushita) — not retrieved; and the exact earliest § 102(e) filing date of US 6,323,899 B1, whose priority chain (1990‑11‑20 earliest priority vs. 1993‑07‑29 parent filing vs. 2000‑04‑03 continuation filing) I read from secondary listing pages rather than the front page.
• Not asserted: I could not confirm any PTAB proceeding or claim construction involving the '527 patent, so the § 112(f) "means" constructions of claims 1/8 remain untested.

Sources: https://patents.google.com/patent/US6473527B1/en (authoritative text/citation tables) · https://patents.google.com/patent/US6323899 · https://webapp1.dlib.indiana.edu/virtual_disk_library/index.cgi/[5705037](/patent/5705037)/FID3406/OG/html/1296-3/usre038759-20050719.html (US 6,111,605 reissue lineage) · https://portal.unifiedpatents.com/patents/patent/US-[5761180](/patent/5761180)-A · https://patents.google.com/patent/US6330028 · https://www.freepatentsonline.com/[6134375](/patent/6134375).html · https://portal.unifiedpatents.com/patents/patent/US-6134375-A.

I'll ground the reference contents before writing the § 103 analysis.

Obviousness Analysis — US 6,473,527 B1 under 35 U.S.C. § 103

Scope note. This builds on the verified record already generated. I do not repeat claim text, ownership, or enforcement history. Two cross-reference flags before the analysis:

• Date conflict (unresolved, not auto-corrected). The task says current date April 26, 2026; the fetched page and my prior section are stamped 2026-09-28. I use the task date for procedural statements but note the discrepancy.
• Finding from the prior section stands: no CAFC appeal, no claim construction, no invalidity holding, no IPR/PGR surfaced. So everything below is a prima facie § 103 analysis of an untested patent — not a litigated record.

Also: because the application was filed 1999-06-01, pre-AIA § 103(a) governs (AIA first-inventor-to-file §§ 102/103 apply only to applications filed on/after 2013-03-16). KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007), applies to pre-AIA § 103 and supplies the controlling flexibility standard. The Graham v. John Deere factors (scope/content of prior art; differences; PHOSITA level; secondary considerations) organize the analysis.

1. Level of ordinary skill (POSITA)

A POSITA here would be a hardware/firmware engineer holding a B.S.E.E. (or equivalent) with roughly 2–3 years designing digital image-capture front ends (CCD/CIS → A/D → buffer → DCT-block coder) for scanners, digital still cameras, or fax/network cameras, and would be familiar with ITU-T Rec. T.81 / ISO/IEC 10918-1 (JPEG) as a standard implementation target. This matters because the entire claimed advance is memory sequencing and sizing within a pipeline whose timing the JPEG standard dictates. That level of skill makes the design-choice arguments below strong.

2. Threshold: what the applicant himself admits is prior art

This is the most important framing point for § 103, and it comes from the patent's own specification (usable as an admission — In re Fritch; Riverwood Int'l v. R.A. Jones):

So claim 1 is properly compared not against a bare field, but against admitted art consisting of an A/D → RAM → JPEG-IC-with-8×8-block-buffer pipeline that already performs the very line-to-block repackaging the claim recites. The claimed delta is essentially where that buffer sits and how big it is.

3. The prior art of record on this page (six examiner-cited references)

All six bear the "cited by examiner" asterisk in the record, i.e., they were considered. (Content below is grounded in the fetched abstracts/claims; where I could not verify a specific passage I say so.)

Analogy note. Sections 102/103 prior art in an unpredictable field must be analogous; this field is predictable (electrical engineering/hardware pipelines), and all six refs are from digital still camera / video camera / image recording — the '527 specification's own listed applications ("a scanner, or even a digital camera"). They are therefore analogous art under In re Bigio / In re Clay reasoning.

4. Proposed § 103 grounds and the required motivation to combine

Ground 1 — Sanyo '375 in view of Matsushita '387 (primary ground)

Motivation (why a POSITA would combine): both references are in the same field of endeavor with the same objective — feeding an A/D-converted, line-scanned pixel stream into a JPEG encoder that can only be fed whole 8×8 blocks and cannot be rate-stopped mid-image ('527 spec's admission of T.81). '375 supplies the JPEG block-structure recognition; '387 supplies the camera-side buffered pipeline. Combining them yields nothing more than the predictable use of known elements according to their established functions (KSR) — and it delivers the admitted benefit: elimination of the external RAM (cost, part count, board area). Cost/part-count reduction is a recognized rational motivation (MPEP § 2144.04; KSR).

Ground 2 — Sanyo '375 in view of Casio '028 (and optionally Ricoh '605)

• '028 supplies the structural memory means: CCD → A/D → TG read controller → DRAM 6 "temporarily stores image data." Substitute/relocate that DRAM behind the A/D converter as a line buffer of 8 lines rather than a full-frame store, and the claim is met. This is a simple substitution of one known memory configuration for another (MPEP § 2143(c)).
• '605 supplies claims 7 and 9 (I/O interfacing means to a host; forwarding image data adapted to the destination device when not compressed) — its camera literally "converts image data … to image data adapted to said image forming apparatus" and sends it over an I/F.

Ground 3 — Matsushita '387 in view of the JPEG standard (ITU-T Rec. T.81 / ISO/IEC 10918-1)

The standard is a printed publication well before 1999-06-01 and is admitted prior art in the specification. It supplies the 8×8 MCU/block requirement and the mid-image rate-control constraint that forces buffering. A POSITA implementing a JPEG front end reads the standard; applying its block geometry to a known A/D+memory+encoder pipeline is "a known technique … used to improve a similar device in the same way" (KSR), and the result is predictable.

Ground 4 (weaker, background) — Sony '180 for the conditional limitation of claim 8

Claim 8's third step is conditional ("when said image data output is determined to be compressed"). '180 teaches selective/conditional recording based on a signal-level threshold. But '387 already does this better: it stores video in memory 58 and transmits only a portion based on traffic/motion — a direct analogue of "compress-and-forward vs. forward-without-compression."

5. The pivotal limitation: "memory … the same number of image lines as said built-in memory device"

This is the only limitation the cited set does not literally state in those words, and the whole ground-1/2 case turns on it. It is nonetheless the weakest point of the patent, for four independent reasons:

1. Applicant's own admission (claim 11 of the same patent): the size of the memory means is "determined by the compression format of said JPEG compression means." If the size follows automatically from the format, then sizing the buffer to 8 lines is not an inventive contribution — it is a result dictated by the intended use. MPEP § 2144.04; In re Aller; In re Kuhle.
2. Admitted prior art already implies the size: the spec says memory 14 exists "to comply with the compression unit of the memory device 13" and memory 13 = 8×8. A buffer sized to the compression unit is therefore the known design point, merely relocated and internalized — a change in position/size, not in function. In re Rose (change in size is a design choice absent a new result); MPEP § 2144.04(IV).
3. Nothing new happens: no new result is produced — the same lines are read, the same blocks are emitted, the same compression occurs. Where the "combination of familiar elements according to known methods … yield[s] nothing more than predictable results," § 103 is satisfied.
4. '375 confirms the 8×8 geometry, converting the format-derived size into an explicit prior-art teaching of the block structure of a JPEG-processed screen.

Weaknesses / counterarguments a patent owner would raise (stated honestly):

• No single reference discloses the sizing limitation verbatim; a fact-finder must accept the design-choice/per-format reasoning rather than a literal anticipation-style disclosure. That makes this better suited to a § 103 obviousness attack than a § 102 attack.
• The functional "means" language in claims 1 and 8 invokes § 112(f), presumptively limited to the disclosed structure (read control device 22, output control device 23, memory device 24) and equivalents, and the specification discloses no algorithm for the control-signal sequence beyond FIG. 3's counter steps. A patent owner can argue that a § 112(f) construction narrows the means terms enough that generic FIFO/counter logic in the references is not "the corresponding structure." That is a construction argument, not a validity-saving argument — and under Williamson v. Citrix the remedy for a purely functional limitation without algorithm is still means-plus-function construction, not invalidity avoidance.
• Claim 3 (contact image sensor) is the weakest mapping in the cited set: none of the six references discloses a CIS. A CIS-based ground would require art from the scanner/fax field (see § 7).

6. Remaining dependent claims

7. Prior-art references that are not on this page but should be in any supplemental search

The record's "Similar Documents" list contains candidates requiring verification, and I explicitly flag them as leads, not established prior art, because I have not retrieved their teaching against the claim elements:

• US 4,593,324 Image data storing device (1986) — line/memory organization for image data.
• US 5,452,378 Image digitizer including pixel engine (1995) — A/D-image-digitizer pipeline with dedicated pixel-processing hardware.
• US 5,805,826, US 6,075,897 Image compression apparatus, EP 1 531 399 A2 (bus-bottleneck compression buffering), JPS 58-129876 and JPS 59-127462 (facsimile devices — these are the natural place to find CIS and line-buffer-to-block-coder teachings to fill the claim 3 gap).
• TW 417394 B "JPEG interface model and method capable of reading a predetermined image data from an A/D converter to the memory of JPEG integrated circuit for storage" — this reads as the Taiwanese counterpart of the very invention at issue (Mustek). ⚠️ Do not treat it as prior art. Its publication date (2001-01-01) postdates the '527 filing date, and its own filing date I could not verify. If it is a same-inventor/same-assignee counterpart, it is a § 102(f)/double-patenting-type concern at most, never § 103 art.
• CN 1130617 C "JPEG interface module and method" — likewise a later publication (2003-12-10) and cited by, not citing, the '527 patent. Same caution.

8. Secondary considerations (and why they do not rescue the claims)

• No nexus evidence exists in the record. The patent expired 2019-06-01 with no commercial product identified to the claimed "module."
• Litigation outcomes are not secondary considerations. Cedar Lane's 2019–2023 campaign produced consent judgments and voluntary dismissals — no liability finding, no claim construction, no damages award. Licensing settlements by an NPE without a nexus to the claimed subject matter carry little or no weight (KSR; In re GPAC).
• Long-felt need / failure of others is arguably available on the admitted cost problem ("for the concern of cost and efficiency, it is desirable that the extra memory 14 is to be omitted"), but the record shows no evidence of others' failure — and '387 and '028 show others were already buffering A/D-converted image data in memory ahead of JPEG/block coding.

9. Conclusion

Confidence and caveats. High confidence on the legal framework (pre-AIA § 103; KSR; the claim-11 self-admission; the design-choice doctrine) and on the fact that the patent's own specification supplies most of the necessary disclosures. Moderate confidence on the reference-by-reference element mapping, because my verification targeted each reference's abstract/claims and select passages; I did not verify the full text of US 6,323,899 (St. Clair), and I did not verify any specific disclosure in the cited references of an explicitly "N image lines" buffer size. A rigorous invalidity contention would require full-text review of each reference and, ideally, the examiner's reasons for allowance from the file history (not retrieved here) — the examiner had these six references and still allowed, so the allowance almost certainly rested on the specific "same number of image lines as the built-in memory device" language, which is precisely the limitation § 5 attacks.