Invalidity dossier
US 11326942
Optical sensor arrangement and method for light sensing
Current assignee: Ams International AG
Added 9/24/2026, 5:13:58 PM
Active provider: DeepSeek · deepseek-v4-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
I'll search for this specific patent and any related litigation activity.
Let me search for the remaining claims and any litigation involving this patent.
Let me check for any PTAB proceedings or litigation specifically naming this patent.
US Patent 11,326,942 — Analysis Summary
Search scope note: I ran targeted web/USPTO-style searches for the exact identifier "11326942"/"11,326,942." Searches surfaced the patent document and related ams family documents, but I found no CAFC 2026 docket entry, PTAB trial, or district-court case specifically naming this patent. The closest litigation in results (e.g., Greenthread LLC v. ams-OSRAM/ams Sensors USA, E.D. Tex., consolidated lead case 2:23-cv-00212-JRG) asserts different patent numbers — U.S. 8,421,195; 9,190,502; 10,510,842; 10,734,481; 11,121,222; 11,316,014 — and does not list 11,326,942. I cannot confirm the absence definitively, since my searches are not a direct PACER/CAFC docket query. Treat "no litigation found" as a qualified finding, not a certainty.
Bibliographic data (from the patent record)
| Field | Value |
|---|---|
| Patent number | US 11,326,942 B2 |
| Title | Optical sensor arrangement and method for light sensing |
| Inventor | Gonggui Xu |
| Original / current assignee | Ams International AG |
| Application no. | US 16/632,616 (national stage of PCT/EP2018/068521, filed Jul. 9, 2018) |
| Priority dates | U.S. provisional 62/537,101 (Jul. 26, 2017); EP 17188487.7 (Aug. 30, 2017) |
| Filing date (as recorded) | Jul. 9, 2018 |
| Pre-grant publication | US 2020/0200603 A1 (Jun. 25, 2020) |
| Issue date | May 10, 2022 |
| Claims | 15 (3 independent: claims 1, 11, 15) |
| Status | Active; adjusted expiration listed as Jan. 3, 2039 |
| Classifications | G01J 1/42, 1/44, 1/46; H03M 1/12; H04N 25/57, 25/77, 25/772 |
Abstract (verbatim summary)
An optical sensor arrangement comprises a photodiode (11) and an analog-to-digital converter (12). The analog-to-digital converter (12) comprises an integrator (13) having an integrator input (15) coupled to the photodiode (11), a comparator (14) having a first input coupled to an output of the integrator (13) and a digital-to-analog converter (39) coupled to a control terminal of the comparator (14).
Plain-language overview of the independent claims
Claim 1 — Optical sensor arrangement (apparatus).
A light-sensing circuit pairing a photodiode with an analog-to-digital converter. The ADC contains: (a) an integrator whose input is coupled to the photodiode; (b) a comparator whose first input connects to the integrator output and whose second input connects to a reference voltage terminal; and (c) a digital-to-analog converter (DAC) wired to a control terminal of the comparator. The DAC feeds an analog input signal to that control terminal, and the comparator's offset is controlled by that analog input signal. In plain terms: the DAC is used to program/tune the comparator's switching threshold so it can be calibrated, improving measurement accuracy (especially for low light).
Claim 11 — Method for light sensing.
A method comprising: (a) providing an analog input signal via a DAC to a control terminal of a comparator, where the comparator's offset is controlled by that analog input signal; (b) generating a sensor current with a photodiode and feeding it to an integrator input; (c) generating an output voltage with the integrator and feeding it to a first input of the comparator (second comparator input coupled to a reference voltage terminal); and (d) determining a digital value of the sensor current as a function of the comparator's output signal. In plain terms: the calibration-then-measure sequence — set the comparator's offset via the DAC, then count/compute the photocurrent-derived digital result. (Dependent claim 12 adds that the analog input signal is determined in a calibration phase and held constant during a subsequent measuring phase.)
Claim 15 — Optical sensor arrangement (apparatus, amplifier-offset variant).
A photodiode plus an ADC that has an integrator, a comparator (first input to the integrator output), and a calibration DAC. The integrator includes an amplifier with a first amplifier input connected to the integrator input, a second amplifier input, a control terminal, and an amplifier output coupled to the integrator output. The calibration DAC is coupled to the amplifier's control terminal, generates an analog signal, and applies it there, with the amplifier's offset depending on that analog signal. In plain terms: a separate calibration DAC trims the amplifier's offset (distinct from the comparator-offset DAC of claim 1).
Technical context (from the specification)
- The arrangement is described as an ambient light sensor (ALS), using a charge-balancing ADC; the photocurrent is integrated and one charge packet CP = C_REF · V_GAIN is removed per count, with ADC_COUNT = (T_INT · I_P)/(C_REF · V_GAIN).
- It uses two offset calibrations (amplifier input offset via calibration DAC 37; combined amplifier output/comparator input offset via DAC 39) plus a sub-count residue digitization scheme (SAR-based regrouping of multiple integrating capacitors, e.g., 2^n equal capacitors for n-bit sub-count).
- The stated goal is first-count accuracy for weak light under dark glass, and the design deliberately makes parasitic switch charge injection consistent between the initialization and subsequent count generations rather than eliminating it.
Uncertainty flags
- Litigation: I could not verify any CAFC 2026 appeal or active litigation involving US 11,326,942 specifically; the ams/Greenthread matters in my results concern other patents. If you need a definitive docket confirmation, a direct PACER/Docket Navigator or CAFC docket query is required.
- Assignee naming: The record lists "Ams International AG" (not the later "ams-OSRAM" naming seen in some related documents). I have not auto-corrected this; the patent record as fetched shows Ams International AG.
- Filing-date nuance: The patent is a national-stage entry of PCT/EP2018/068521; the "2018-07-09" filing date above is the PCT filing date as recorded, with the earliest priority being the Jul. 26, 2017 U.S. provisional.
Generated 9/29/2026, 4:01:00 PM
Cases on file (0)
Specific litigation cases in our database that name US patent 11326942. The free-form analysis below may also discuss cases beyond this list.
No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
I'll search for litigation involving US patent 11326942.
Let me run more targeted searches on litigation databases.
Litigation Search Results for US Patent No. 11,326,942
Bottom line: I found no known litigation (district court, Federal Circuit, ITC, or PTAB) involving U.S. Patent No. 11,326,942.
I must also report that my search coverage was incomplete — I was cut off before I could complete queries against the Unified Patents litigation portal, PACER, and Docket Navigator directly. So the statement below is limited to what I could actually retrieve, not an exhaustive sweep of all litigation databases.
What the patent is (for identification purposes)
Per the authoritative full text:
- US 11,326,942 B2, "Optical sensor arrangement and method for light sensing," inventor Gonggui Xu, original/current assignee ams International AG (ams AG / ams-OSRAM group).
- Application No. US 16/632,616; PCT/EP2018/068521 filed July 9, 2018; priority July 26, 2017; granted May 10, 2022; Google Patents lists status as Active, adjusted expiration January 3, 2039.
- Pre-grant publication: US 2020/0200603 A1.
Cases that are NOT about this patent (explicitly excluded)
Because the search surfaced near-miss identifiers, I flag these so they are not misattributed:
| Result | Why it is not relevant |
|---|---|
| Greenthread, LLC v. ams-OSRAM AG, OSRAM GmbH, ams Sensors USA Inc. (E.D. Tex., Lead Case No. 2:23-cv-00212-JRG) and related Greenthread cases v. OmniVision, Texas Instruments | This is real ams-related patent litigation, but the asserted patents are 8,421,195; 9,190,502; 10,510,842; 10,734,481; 11,121,222; and 11,316,014 — a different set. Notably, 11,316,014 is a different patent number from 11,326,942, and I am not substituting one for the other. |
| ams AG v. Melexis, EP 0 916 074 B1 (Düsseldorf, decision Dec. 20, 2017) | European patent, unrelated number; Melexis prevailed. |
| SEC EDGAR item with identifier "11326942" (Form SC 13G/A, 2003) | An internal filing/accession identifier, not the patent number. Coincidental numeric match. |
| UK Companies House "EAGLECREST TELECOMS LIMITED 11326942" | A UK company registration number. Coincidental numeric match. |
| IPRs filed by ams against 511 Innovations (IPR2016-01788, -01792, -01793, -01804, -01810, -01818, -01819) | Different patents; predate the 2017 priority date of the '942 patent. |
Requested case fields
Because no case was identified, I cannot supply plaintiff(s), defendant(s), jurisdiction, case number, filing date, or outcome for any case involving US 11,326,942.
Suggested next steps / verification sources
No litigation is known to me, but that is not the same as certainty. To confirm, I would check:
- Unified Patents litigation portal: https://portal.unifiedpatents.com/litigation/caselist
- USPTO Patent Trial and Appeal Board (PTAB) proceedings search for the patent number and its assignee
- PACER / CourtListener RECAP docket search on "11,326,942" and on ams International AG / ams-OSRAM as a party
- The patent family's European counterpart (from EP 17188487.7) for any EPO oppositions — ams is an active participant in European oppositions, and a European member of this family could face opposition even with no U.S. litigation.
Caveat: I did not find a case, and I am not asserting with high confidence that none exists. The absence of results here may reflect my incomplete search rather than the absence of litigation.
Generated 9/29/2026, 4:00:56 PM
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
I'll start by verifying the structured data against live sources, since the ODP block reports no AIA trial proceedings.
Those results are unrelated. Let me run more targeted queries to confirm the negative.
Let me run a few more confirmatory checks, including the patent's litigation history and the ams sensor portfolio.
Proceedings overview
Zero AIA trial proceedings on file. The USPTO Open Data Portal structured block reports no IPR, PGR, or CBM proceeding for US 11,326,942, and my independent web checks surfaced nothing contradicting that — so the breakdown is 0 active / 0 claims invalidated / 0 claims sustained / 0 settled / 0 institution denials. Bottom line for a defendant: the patent is completely untested at the PTAB, and no part of its claim set has been canceled. There is no IPR record to exploit — no FWD to cite, no cancellation to hang a non-infringement or invalidity argument on, and no § 315(e)(2) estoppel constraining you. Every invalidity theory you can build is still on the table, and you would be the first challenger, not a follower.
⚠️ False-positive warning — do not confuse this patent with a similarly-numbered one. My searches repeatedly returned materials for U.S. Pat. No. 10,326,942 (Corephotonics, dual-aperture camera zoom), which was the subject of IPR2020-00860, Apple Inc. v. Corephotonics, Ltd. That is a different patent — "10,326,942" vs. "11,326,942." Anyone running a sloppy docket search on "…26942" will surface Corephotonics/Apple papers (including a Patent Owner's Preliminary Response and Sur-Reply on Docket Alarm) and may wrongly attribute that IPR history to this patent. It is not related. I verified the disagreement in patent number and patent owner (Corephotonics, Ltd. vs. ams International AG) and excluded it.
No proceedings to profile
Because the canonical proceedings list is empty, there are no entries to render in the ### {PROCEEDING_NUMBER} template. Stating this explicitly rather than padding the section: I found no petition number, no institution decision, no FWD, no termination, no appeal, and no panel for US 11,326,942. Any proceeding number I printed here would be fabricated, so I am printing none.
Two caveats on the negative finding, stated honestly:
- Indexing lag. The ODP datum is "as of the most recent ingest." A petition filed within roughly the last few months could be docketed at PTAB E2E but not yet reflected in ODP, and PTAB filings are frequently sealed or public-only-after-accorded-filing-date. I could not fully rule this out because my search budget was exhausted before I could query PTAB E2E and Patent Center directly. Treat "zero" as high-confidence but not absolutely verified.
- Owner profile. The patent owner is ams International AG (now part of ams-OSRAM) — a large operating semiconductor company with ~13,600 patents/applications, not a monetization entity. Its portfolio patents (siblings include US 11,438,006 and US 11,143,553) are generally used defensively and cross-licensed rather than asserted in campaigns. That structural fact makes the absence of IPRs unsurprising rather than merely lucky — patents attract IPRs when they are asserted, and there is no public evidence of an assertion campaign driving one here.
Strategic summary
Claim status: 100% untested, 100% intact. US 11,326,942 issued 2022-05-10 with 15 claims (claim 1 is the sole independent claim visible in the granted text; it recites a photodiode plus an AD converter comprising an integrator having an integrator input coupled to the photodiode, a comparator with a first input coupled to the integrator output and a second input coupled to a reference voltage terminal, and a digital-to-analog converter coupled to a control terminal of the comparator). None of claims 1–15 has ever been before the Board. There is no narrowing, no certificate of correction-driven claim change to rely on, and no substitute claim in the record. The patent is Active with an adjusted expiration of 2039-01-03 (per the ODP legal-status field) and a priority date of 2017-07-26 — meaning the § 102/§ 103 prior-art window you get to search runs from roughly mid-2016 (post-AIA 102(a)(1) grace/bar rules) up to 2017-07-26, and the § 112 written-description/enablement attack surface is fully open because no examiner rejection or IPR has stress-tested the claims.
Estoppel landscape is maximally favorable to a defendant. With no prior petitioner, no § 315(e)(2) estoppel attaches to anyone, and there is no General Plastic / Fintiv follow-on-petition problem for you: you would be the first filer, so the Board's discretion to deny a follow-on petition under § 314(a) and General Plastic simply doesn't engage. Conversely, your own § 315(b) one-year clock runs from service of an infringement complaint on you — so the clock is a live risk the moment you are served, and it is the single most important date to diarize. The absence of any IPR also means there is no SAS-style partial-institution precedent on these claims and no Board claim construction (no Phillips constructions on "integrator," "control terminal of the comparator," or "reference capacitor circuit") binding you.
Pattern signals: none. No repeat petitioner, no serial filer, no defensive aggregator (no Unified Patents, RPX, or similar) in the chain — my searches returned no Unified Petitions filing against any ams International optical-sensor patent. No CAFC appeal exists because there is no agency decision to appeal. This is a clean slate, not a battle-scarred patent.
Recommended next steps
- Do not cite an FWD — there isn't one. If opposing counsel or a demand letter implies the patent has been "upheld by the PTAB," that is inaccurate. The patent has never been challenged. The correct characterization is "untested," and an untested claim set carries more uncertainty, not less, for a defendant.
- Confirm the negative directly before you rely on it. Query PTAB E2E / the PTAB Decisions portal under "Patent Number 11326942" and check Patent Center for the application's transaction history (US 16/632,616). My finding is high-confidence but was not exhaustively verified against E2E due to search-budget limits.
- If you are a defendant facing assertion: (i) calendar the § 315(b) one-year bar from the date you were served; (ii) build your § 102/§ 103 grounds on pre-2017-07-26 art, since the claims are broad, functional, and entirely unconstrued; (iii) consider a § 112 attack, as the specification's offset-calibration and sub-count SAR digitization disclosure may not support the full scope of claim 1's "control terminal of the comparator" limitation; and (iv) note that a parallel IPR is worth more here than usual, because there is no existing Board record to leverage.
- If you are the patent owner: the absence of IPRs is a genuine asset in licensing — you can truthfully say the claims have never been canceled or even reviewed by the Board. Consider whether pre-emptive ex parte reexamination, if it confirmed the claims, would further harden them.
Sources: US 11,326,942 on Google Patents (authoritative text, status, and priority data); USPTO PTAB E2E and USPTO PTAB Decisions (to verify the empty proceedings list); CourtListener (to confirm no CAFC appeal, which would be a null set); PTAB Open Data Portal (source of the canonical proceedings list).
Generated 9/29/2026, 4:01:05 PM
Ownership chain (1)
Asserters network →Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.
? · recorded 2020-02-26 · Assignment
XU, GONGGUIAMS INTERNATIONAL AG
routine inventor-to-employer assignment
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
I'll start by pulling the available public records on this patent's ownership and any assertion activity.
Let me dig into the assignment records specifically and check the current owner's corporate status.
Assignment Record Reconstruction — US 11,326,942 B2
Patent: US 11,326,942 B2 — "Optical sensor arrangement and method for light sensing"
App. No.: 16/632,616 (national stage of PCT/EP2018/068521, filed 2018-07-09)
Priority: 2017-07-26 (US 62/537,101); 2017-08-30 (EP 17188487.7)
Issued: 2022-05-10 · Legal status: Active, adjusted expiration 2039-01-03
Source note / limitation. The authoritative patent text supplied in this task, plus Google Patents legal events, are the sources I could reach. USPTO Assignment Center (assignmentcenter.uspto.gov) and the legacy assignment.uspto.gov interface are JavaScript-driven and did not return record-level data to me in this session. No reel/frame number and no correspondent of record are exposed in the sources I could retrieve, so I am reporting them as unavailable rather than reconstructing them. Verify at https://assignmentcenter.uspto.gov/ (search by patent number 11326942) before relying on any reel/frame citation.
Inventors
| Inventor | Employer at filing | Basis |
|---|---|---|
| Gonggui Xu (sole named inventor) | ams group — US-based (ams' US affiliate is ams-TAOS USA Inc., a wholly owned ams subsidiary; employment not confirmed in a primary record I could reach) | Face of US 11,326,942 B2 |
- No unusual inventor pattern. Xu is not a one-off name assembled for this filing: he is listed as inventor on earlier ams AG applications with 2013-era priority (e.g. WO 2014/029573, "Circuit électrique d'une source de courant commutable," deposant AMS AG, inventor XU GONGGUI — INPI record), and on the ams optical-sensor family published as US 2015/0083896. That span (≈2013–2017 filings) is consistent with continued employment rather than a departure-then-fire-sale pattern.
- I found no evidence of inventors departing the original assignee within 12 months of filing. Equity here is a single inventor who assigned to his corporate employer — the ordinary case.
Original assignee
ams International AG — also the current assignee per Google Patents. It is the Swiss intellectual-property/holding entity of the ams group (ams AG, renamed/localised as ams-OSRAM AG after the 2020 acquisition of OSRAM; listed on SIX Swiss Exchange, ticker AMS).
- Primary line of business: operating semiconductor company — optical sensors, ambient-light/proximity sensors (inherited in part from the 2008 acquisition of Texas Advanced Optoelectronic Solutions, TAOS), plus, post-OSRAM, LED and emitter products. ams-OSRAM reported >€3bn revenue in 2024/2025 and >12,000 patent filings, i.e. a genuine manufacturer with an R&D-scale portfolio.
- Product embodying the claims: the claims recite a charge-balancing photodiode ADC with a comparator-offset-calibrating DAC — the architecture of an ambient-light sensor (ALS). ams/ams-TAOS is one of the world's principal shippers of ALS parts, so the claims are plausibly embodied in shipped product. I did not verify a specific part number against these claims — treat "ships product" as well-supported at the corporate level, unverified at the SKU level.
- Current status: operating, publicly listed. No bankruptcy, no dissolution, no insolvency proceeding found for the assignee or its parent.
Assignment timeline
Exactly one recorded assignment is associated with this patent in the sources I could reach, and it is the original employment assignment. There is no post-issuance chain.
2017-07-26 (priority filing) / recorded 2018-07-09 — Reel unavailable (not exposed in retrievable sources)
- Conveyance: application/priority filing (not an executed assignment document)
- Assignor: n/a
- Assignee: ams International AG (applicant of record on PCT/EP2018/068521 / US 16/632,616)
- Correspondent: unavailable
- Context: initial filing by the corporate applicant; no separate conveyance recorded.
2020-02-26 (recorded) — Reel unavailable; execution date not shown in retrieved events
- Conveyance: Assignment — USPTO event text: "ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS)"
- Assignor: XU, GONGGUI (the sole inventor)
- Assignee: AMS INTERNATIONAL AG
- Correspondent: unavailable — cannot be reported, and therefore cannot be cross-checked for recurrence
- Context: routine inventor-to-employer assignment securing title in the corporate applicant prior to grant. Recorded after national-stage entry (2020-02-26) and before issuance (2022-05-10).
2022-05-10 — granted to ams International AG. No re-recorded assignment on grant.
No Assignment Center records beyond the single 2020-02-26 inventor assignment were found. There is no shell-entity transfer, no licensing entity, no security interest, no merger deed, and no change-of-name filing recorded against this patent in the retrievable data. Note the tension worth verifying on Assignment Center: the group's public identity changed to ams-OSRAM AG (2020 onward), yet the patent's assignee of record still reads "ams International AG" — if a merger/renaming occurred, it has not been recorded against this patent. That is a title-hygiene gap, not an NPE signal.
Timeline diagram
timeline
title Ownership of US 11326942
2017 : First priority application filed
2018 : PCT application filed by ams International AG
2020 : Inventor Xu assigns to ams International AG
: ams acquires OSRAM and rebrands group
2022 : Patent issues to ams International AG
2026 : Still held by ams International AG
NPE / troll-pattern signals
1. Shell-entity transfer — not present. The only recorded assignee is ams International AG, the Swiss IP entity of a publicly traded operating semiconductor group (SIX: AMS). No "IP / Patents / Licensing / Holdings / Ventures" suffix, no registered-agent address, no single-member Delaware/Texas LLC. The single recorded conveyance (2020-02-26) runs from the inventor to his employer, the opposite direction from an NPE stockpiling transfer. A corporate group using a Swiss IP-holding subsidiary for genuine R&D output is not a shell-entity transfer on these facts.
2. Known asserter in the chain — not present. Neither ams International AG nor any other assignee matches Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, or any Spangenberg entity. The directional evidence runs the other way: ams-OSRAM has been a defendant/target of the NPE Greenthread, LLC (E.D. Tex., Consol. Lead Case 2:23-cv-00212-JRG, involving Greenthread's US 8,421,195 / 9,190,502 / 10,510,842 / 10,734,481 / 11,121,222 / 11,316,014 — note these are Greenthread's patents, not US 11,326,942). ams-OSRAM also affirmatively sues competitors on its own patents (2025–2026 horticultural-LED actions against Nature Fresh Farms and Meizhi) — the profile of an operating-company enforcer, not an NPE.
3. Repeat correspondent across the chain — unclear. Only one recorded link exists, and the correspondent of record is not exposed in the sources I could reach. With one link and no correspondent name, the recurrence test cannot be run at all. This is a genuine data gap, not a negative finding, and it is the single most valuable thing to pull manually from Assignment Center.
4. Cascading transfers — not present. One recorded conveyance in roughly three years of pendency, executed/recorded 2020-02-26, with no chained LLCs, no shared correspondent address, and no common principals in evidence.
5. Pre-litigation transfer — not present. I found no infringement action naming US 11,326,942 in any of the litigation, PTAB, or press material retrieved. With no suit, there is no 6-month pre-suit assignment to point to. (An earlier ams/ams-TAOS success against Intersil — ~$77M judgment, reported by Der Standard — concerns different ams patents/entities and does not involve this patent.)
6. Bankruptcy fire-sale — not present. No Chapter 7/11 filing, receivership, or asset sale involving ams AG / ams-OSRAM AG / ams International AG appears in the record. The group remains listed and operating.
7. Privateering — not present. No transfer of this patent to any third-party assertion vehicle, and no SEC 10-K/8-K or press coverage indicating ams seeded an NPE to litigate on its behalf.
8. Defensive aggregator — not present. The chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. The patent remains with the original operating-company group.
Verdict
Insufficient data — the assignment record for US 11,326,942 consists of only the original assignment: inventor Gonggui Xu → ams International AG, recorded 2020-02-26, with no reel/frame and no correspondent retrievable and no post-issuance transfers whatsoever.
The affirmative finding is that no NPE pattern exists on the evidence available: eight of the eight listed signals are either not present or unassessable, the assignee is a publicly traded operating semiconductor group (SIX: AMS) that ships ambient-light-sensor product, and the only recorded conveyance is a garden-variety employment assignment. The single unresolved item — and the reason this is "insufficient data" rather than a clean defensive/operating-company call — is that the correspondent of record and reel/frame could not be read, so the repeat-correspondent test could not be run. Confirm at https://assignmentcenter.uspto.gov/ (patent number 11326942; legacy interface at https://assignment.uspto.gov/patent/index.html) — and while there, check whether any merger/change-of-name filing has ever been recorded moving title from "ams International AG" to "ams-OSRAM AG," since none is recorded in the data I retrieved.
Generated 9/29/2026, 4:01:18 PM
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
I'll research US patent 11326942 and its cited prior art references.
Let me look for the specific citation list for this patent.
Let me search for the specific citation listings on the patent pages.
US 113,269,42 B2 — Prior-Art Citation Analysis
1. Patent identification (verified against the authoritative text)
| Field | Value |
|---|---|
| Patent no. | US 11,326,942 B2 (application US 16/632,616) |
| Title | Optical sensor arrangement and method for light sensing |
| Inventor | Gonggui Xu |
| Assignee | Ams International AG |
| Priority | 2017-07-26 (US 62/537,101) and 2017-08-30 (EP 17188487.7) |
| PCT filing | PCT/EP2018/068521, filed 2018-07-09 |
| US grant | 2022-05-10; adjusted expiration listed as 2039-01-03 |
Caution on identifiers. I kept every number literal. Note that search results also surfaced US 11,326,832 B2 (same 2022-05-10 publication date, appeared in the WO2023237059A1 family annex) — this is a different patent number from US 11,326,942 and must not be conflated with it.
2. Direction-of-citation finding (critical caveat)
The authoritative full text you supplied (Google Patents fetch, 2026-09-24) contains no "References Cited" / "Patent Citations" section at all. The fetched content runs Classifications → Definitions → Abstract → Description → Claims. Google Patents typically renders "Citations" and "Cited By" blocks that were evidently dropped from this fetch.
This matters because the phrases are routinely confused:
- Backward citations = references cited in US 11,326,942 (these are the only ones that can anticipate or render obvious its claims).
- Forward citations = later patents that cite US 11,326,942 (these cannot anticipate it, because they post-date its 2017 priority).
I was unable to retrieve a verified backward-citation list for US 11,326,942 within the search budget. I will not invent one.
3. Forward citations verified in search results (patents that cite US 11,326,942)
Both of the following list "11326942 | May 10, 2022 | Xu" in their own Referenced Cited tables:
| Citing patent | Citation entry as listed | Date listed | Subject matter |
|---|---|---|---|
| US 11,714,437 B2 (Nippon Telegraph and Telephone Corp.) | 11326942 — Xu | May 10, 2022 | Variable reference voltage source |
| US 11,438,006 B2 (Ams — "Method to operate an optical sensor arrangement with improved conversion accuracy and optical sensor arrangement") | 11326942 — Xu | May 10, 2022 | Optical sensor arrangement, integration amplifier/comparator amplifier, residue phase |
Sources: justia.com/patent/11714437 ("Referenced Cited") and justia.com/patent/11438006 ("Referenced Cited").
US 11,438,006 is a close sibling (same technical family — charge-balancing optical sensor with residue/precharge search algorithm), which is why it cites US 11,326,942.
§ 102 assessment for these two: None. Both published after the 2017-07-26 priority date of US 11,326,942 and therefore cannot be § 102 prior art against any of claims 1–15. They are relevant only as evidence of the field / possible obviousness context for their own examination, not as anticipatory art for US 11,326,942.
4. Claim set to be analyzed (from the authoritative text / Justia)
- Claim 1 (independent): photodiode + ADC comprising (a) integrator with integrator input coupled to the photodiode, (b) comparator with first input coupled to integrator output and second input coupled to a reference voltage terminal, and (c) a digital-to-analog converter coupled to a control terminal of the comparator, wherein the DAC provides an analog input signal to the comparator control terminal and an offset of the comparator is controlled by the analog input signal.
- Claims 2–15 (dependent): input switch (2); further input switch to reference potential (3); reference-capacitor charge-packet circuit (4); control logic at comparator output (5); amplifier + first integrating capacitor (6); calibration DAC at amplifier control terminal (7); first switch/first reference switch (8); second integrating capacitor/switch/reference switch (9); and the residue-digitization and multi-capacitor dependent features that follow.
The single most novelty-critical limitation is the DAC-driven comparator input-offset calibration of claim 1, with claim 7's second (calibration) DAC for the amplifier offset as the principal dependent fallback.
5. What I could not verify, and what to check next
I could not confirm any specific § 102 reference against US 11,326,942, because:
- The authoritative text contains no cited-references list.
- The analogous-art documents surfaced in search (e.g., WO 2009/064597 A3 "Proximity Sensors and Methods for Sensing Proximity," US 2015/0083896 A1 "Optical sensor arrangement" with current-source calibration) are thematically adjacent but I have no evidence they are listed as citations of US 11,326,942, so asserting a § 102 mapping to claims 1–15 would be fabrication.
- The record area that is documented is the PCT/EP2018/068521 international search, whose result I likewise could not retrieve.
Recommended verification (high confidence these will surface the real list):
- USPTO PatentCenter / Patent Full-Text (patft) for 11,326,942 — "References Cited" box.
- Google Patents
/patent/US11326942B2/en→ "Citations" and "Cited By" sections. - The WO publication of PCT/EP2018/068521 and its PCT/ISA/210 search report, which will carry the examiner's X/Y category citations mapped to claim numbers (the usable § 102/§ 103 record).
If you can supply the USPTO "References Cited" list (or the PCT search report for PCT/EP2018/068521), I will build the full per-reference table — full citation, publication/filing date, brief description, and claim-by-claim § 102 mapping — immediately.
Generated 9/29/2026, 4:01:04 PM
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
I'll gather the prior-art references associated with this patent before running the §103 analysis.
Let me dig for the specific prior-art list attached to this patent and the closely related ams family art.
Let me try to pull the actual "References Cited" list from the granted patent's front page.
Obviousness Analysis — U.S. Patent No. 11,326,942 B2
"Optical sensor arrangement and method for light sensing" (ams International AG; inventor Gonggui Xu)
0. Evidentiary basis and a mandatory caveat
You asked me to use "the results from the Prior Art section of this page." I must flag a limitation up front rather than paper over it:
- The authoritative full text I was given contains a "Prior art keywords" block — input, integrator, comparator, output, amplifier — but the fetched record does not include the front-page "(56) References Cited" list or the post-grant citations list. So I do not have the examiner's actual cited art in front of me.
- My search budget for this step was exhausted partway through, so the reference set below is what I could retrieve and verify by snippet, not an exhaustive review of the patent's citation record.
Therefore: the §103 grounds below are constructed from (a) the closest art I could retrieve and verify, (b) the classification/prior-art-keyword signal on the record (G01J 1/42, 1/44, 1/46; H03M 1/12; H04N 25/57, 25/77, 25/772), and (c) POSITA-level knowledge, clearly labeled as such. Any ground asserted in a real IPR or invalidity contention must be re-run against the actual References Cited list and, ideally, against the EPO search report for the family member (the record shows an EP counterpart, EP 3 435 046 B1, priority 2017-07-26, granted 2019-12-25 — see the Google Patents entry surfaced in search). I flag every unverified assumption inline.
1. The claim set and where the novelty actually lives
From the granted claims (verified text via the Justia record of the '942 patent):
| Claim | Substance | Where the inventive weight sits |
|---|---|---|
| 1 (indep.) | Photodiode + ADC: integrator (input coupled to photodiode); comparator (1st input ← integrator output, 2nd input ← reference voltage terminal); DAC coupled to a control terminal of the comparator, DAC provides an analog input signal, and an offset of the comparator is controlled by the analog input signal | Entirely in the last element — the "DAC-controlled comparator offset" limitation |
| 2–9 | Input switch; further input switch to reference potential; reference-capacitor charge-packet circuit; control logic; amplifier + first integrating capacitor; calibration DAC to the amplifier control terminal; first switch + first reference switch; second integrating capacitor + second switch + second reference switch | Log-jam of conventional switched-capacitor / charge-balancing ADC furniture |
| 11 (indep., method) | DAC → comparator control terminal (offset controlled thereby); photodiode current → integrator; integrator output → comparator; digital value from comparator output | Same core as claim 1, in method form |
| 12 | Analog input signal determined in a calibration phase and held constant during the following measuring phase | Calibration sequencing |
| 13–14 | Residue/sample-and-hold and residue-digitization follow-ons | Sub-count digitization |
| 15 (indep.) | Photodiode + ADC with integrator/amplifier (first amplifier input, second amplifier input, control terminal, amplifier output) and calibration DAC coupled to the amplifier control terminal — amplifier offset depends on that analog signal | A second, distinct offset-trim DAC on the amplifier |
Key observation for the entire §103 analysis: claims 1 and 11 are, structurally, a textbook charge-balancing ambient-light ADC plus one added element — a DAC wired to a comparator trim/control input. Claims 6–10, 12–14, 15 are conventional integrator/switched-capacitor/calibration features. Almost the whole case therefore turns on whether "trim the comparator's switching point/offset with a DAC" was a known, predictable technique in this exact art.
2. Person of ordinary skill in the art (POSITA)
For a 2017 priority date, a POSITA here is:
- a B.S. in EE (or equivalent) with ~3–5 years designing analog/mixed-signal ICs, or an M.S. with ~1–2 years; and
- working familiarity with (i) charge-balancing / integrating ADCs for photodiode front-ends (the ALS architecture in the specification), (ii) switched-capacitor circuits and switch charge injection, (iii) comparator offset-trimming (auto-zero, chopping, trim-DACs, current-mirror imbalance programming), and (iv) SAR / capacitor-array gain-and-residue digitization.
This is a routine, highly predictable, incremental art. That matters: it is the posture in which KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) and MPEP §2144.04 (design choice / routine optimization) most strongly favor obviousness.
3. Retrieved prior art (what each reference actually teaches)
3.1 US 2015/0083896 A1 — ams AG ("Optical sensor arrangement and method for light sensing")
Retrieved content confirms:
- "the AD converter comprises an integrator… The integrator may comprise the amplifier and the integrating capacitor."
- "the AD converter comprises a reference capacitor… designed for providing a charge package to the input of the amplifier."
- "the AD converter further comprises a comparator. The comparator couples an output of the integrator to an input of the digital control circuit."
- A calibration arrangement: "selectively providing a calibration current of a current source or a sensor current of a light sensor to an input of an AD converter"; "The trim control signal… is determined in the production phase and/or in the calibration phase"; "the value stored in the control memory… may be changed at the end of the calibration phase and is used in the measurement phase that follows the calibration phase."
- Consumer-electronics/ALS/display-management application language.
Effect: '896 discloses essentially every element of claim 1 except the DAC-coupled-to-comparator-offset element, and it discloses the calibration-phase-then-measurement-phase sequencing of claim 12 and the reference-capacitor charge-packet circuit of claim 4.
3.2 US 2015/0102209 A1 / EP 2 863 192 (ams AG) — "Optical sensor arrangement and method for light sensing"
Retrieved content confirms (this appears to be the amplifier/comparator architecture figure the patent family reuses):
- converter arrangement 12 with amplifier 15, integrating capacitor 20, and "a comparator 22 having a comparator input 23 that is connected to the amplifier output 21";
- "A further comparator input 24 … is realized as an inverting input. A reference voltage source 25 connects the further comparator input 24 to the reference potential terminal 19";
- reference capacitor 29 coupled via reference switch 30, charge package QREF = VREFIN·CREF;
- digital control circuit 26 that "counts the pulses of the comparator output signal SCOM";
- and a second conversion phase: "determining a digital value of the sensor current … in a charge balancing operation in a first phase and in another conversion operation in a second phase."
Effect: a near-verbatim structural read on claim 1's first three elements (photodiode, integrator, comparator with reference-voltage second input) and on claims 4, 5, 6, 8. Its "second phase" conversion is also directly relevant to claims 13–14 (residue digitization).
3.3 US 9,608,132 B2 — ams AG ("Optical sensor arrangement and method for generating an analog output signal")
Retrieved content confirms:
- "the optical sensor arrangement comprises a digital-to-analog converter, abbreviated to DA converter. The value of the source current is controlled by the DA converter. The output of the DA converter is coupled to a control terminal of the current source. … The DA converter may generate the converter output signal for adjusting the source current."
Effect: same assignee, same field, same circuit vocabulary — establishes that using a DAC's analog output to program an analog control terminal of a block inside the light-sensing signal chain was routine in this very architecture. This is the strongest "motivation to combine" scaffolding I retrieved: it is not a remote analogy, it is the same designer's toolbox applied to the same type of ALS front-end.
3.4 US 8,692,200 B2 — auto-zeroed/chopper-stabilized optical front-end
Retrieved content confirms: "differential amplifier 62 … is also chopper-stabilized to eliminate offset errors… may include an initial auto-zero or calibration cycle… the auto zero value can then be used to adjust measurement values."
Effect: establishes that calibrating the analog front-end's offset (amplifier/comparator) during an initial, light-off/calibration interval, then using the stored value during measurement, was a longstanding, standard technique in optical sensing — i.e., the concept behind claims 12, 15 (calibration DAC on the amplifier) and the calibration-phase structure.
3.5 US 6,031,217 — Texas Instruments ("Apparatus and method for active integrator optical sensors")
Retrieved content confirms active-integrator optical sensor arrays with integration and output conditioning, plus discussion of passive vs. active integrator tradeoffs.
Effect: background evidence that active integrators with comparators and A/D conversion in optical sensors long predate the '942 patent. Useful as a general-art reference, less so as a claim-1 knockout.
3.6 AmS post-2017 documents (flagging, and not relying on them)
- US 2020/0225086 A1 and US 2021/0105020 A1 (ams) describe closely related light-to-digital architectures with calibration phases, first/second charge packages, and DAC-generated comparator reference levels ("A VCOM digital-to-analog converter (DAC) that generates the voltages vcomp, vmid, and vlift… The vcomp output will have other values during offset correction").
- Status caution: on the publication dates retrieved (2020/2021) these most likely have post-July-2017 priority and therefore do not qualify as prior art to the '942 patent. I did not verify their priority dates. They are cited here only as evidence of how ordinary DAC-programmed comparator level/offset control was in this art, and I flag that any use of them as §102/§103 art requires priority-date verification.
- CN 109642819 A ("Optical sensor arrangement and method for optical sensing") — retrieved text shows a charge-balance converter with integrating condenser 53, comparator reference voltage VREFC, counter 64, control logic 56; it looks like a national-phase publication of a related ams application. Its priority date is unverified, so I do not rely on it.
4. Ground 1 — Claims 1–9 obvious over ams '209/'896 in view of DAC-programmed comparator threshold/offset trimming
This is the primary ground, and it is a classic "known base architecture + known technique to solve the exact stated problem" combination.
Claim chart (claim 1):
| Claim 1 limitation | Disclosure | Reference |
|---|---|---|
| Photodiode | photodiode/light sensor generating sensor current | '209 ('896 likewise) |
| ADC comprising an integrator having an integrator input coupled to the photodiode | converter arrangement 12: amplifier 15 + integrating capacitor 20, input 14 coupled to photodiode 11 (via photodiode switch in the two-phase embodiment) | '209 |
| Comparator, first input coupled to integrator output | comparator 22, input 23 connected to amplifier output 21 | '209 |
| Second input coupled to a reference voltage terminal | further comparator input 24 connected through reference voltage source 25 to reference potential terminal 19 | '209 |
| DAC coupled to a control terminal of the comparator; DAC provides an analog input signal; an offset of the comparator is controlled by the analog input signal | Not found as such in '209/'896 | gap — supplied by secondary art / POSITA knowledge (below) |
Filling the gap. Two independent lines close it:
The "adjustable comparator decision level" line. Programming a comparator's effective decision threshold with a DAC output is a pervasive, decades-old technique in ADC design (trim/offset DACs in comparators, auto-zeroed comparators, programmable reference ladders, trim-current injection into a comparator's input pair). A DAC output applied to a comparator's control/trim node is an offset-control mechanism as a matter of function. The '942 specification itself concedes the mechanism is conventional: the comparator is a two-stage MOSFET comparator and the "offset can be controlled by the DA converter 39 by programming the gate voltage of the control input transistor 67," whose "current … will be reflected back at the two inputs of the comparator as its programmed input offset." Injecting a trim current into one leg of the input pair to shift the trip point is standard practice, not an invention.
The "it's a design choice where you inject the trim" line. Whether the DAC shifts the trip point by (a) driving the reference input, (b) driving a trim transistor in the input stage, or (c) driving an auxiliary current-mirror branch, is a routine implementation choice with a predictable result (a shifted switching point). MPEP §2144.04 / KSR: "a particular known technique … to a known device ready for improvement to yield predictable results."
Motivation to combine (the KSR/MPEP §2143 factors, all present here):
- Same field, same problem, same assignee. '896/'209/'132 are all ams optical-sensor/ALS documents; '132 already uses "a DA converter … coupled to a control terminal" of a block in the same signal path. A POSITA optimizing the '209 architecture would have looked straight to the assignee's own DAC-trimming practice.
- The problem to be solved is explicit and pre-existing in the art. '896/'209 already address accuracy of a charge-balancing ALS, and the '942 patent's own background frames the problem as: "the state of the optical sensor arrangement at a start of a measuring phase has an influence on the accuracy." Comparator input offset at the start of the measuring phase is exactly that problem. Once the problem is "first-count accuracy limited by comparator offset," trimming that offset with a DAC is the predictable solution.
- Reasonable expectation of success. Adding a trim DAC to a comparator's input stage is a well-understood, low-risk incremental change; it does not require redesign of the integrator, the charge-packet circuit, or the counting logic.
- Art-recognized advantage. '896 already stores a calibration value in a control memory and applies it in the measuring phase; adding a comparator-trim DAC merely extends an existing calibration pipeline to one more block.
Conclusion (Ground 1): claims 1–9 are, in my assessment, more likely than not obvious under §103 — provided the secondary art establishing DAC-trimmed comparator offset/threshold in ADC front-ends is properly cited and its dates verified.
5. Ground 2 — Claim 11 (method) obvious over the same combination
Claim 11 is the method mirror of claim 1 (plus "generating a sensor current by a photodiode" and "determining a digital value … as a function of the comparator output signal"). Both limitations are expressly disclosed in '209/'896:
- sensor current generation/integration: "The photodiode 11 generates a sensor current IPD … integrated on the integrating capacitor 20" ('209);
- digital value from the comparator output: the digital control circuit "counts the pulses of the comparator output signal SCOM and provides the result as a digital output signal SDO" ('209); '896 likewise (the counter/result-signal structure).
The only added method step — "providing an analog input signal by a digital-to-analog converter to a control terminal of a comparator … an offset of the comparator is controlled" — falls with Ground 1 for the same reasons.
Claim 12 (value determined in a calibration phase, held constant during the measuring phase) is squarely met by '896: "the value stored in the control memory for determining the trim control signal may be changed at the end of the calibration phase and is used in the measurement phase that follows the calibration phase." That is the identical sequence recited in claim 12, applied one block over (charge-packet/current trim rather than comparator-offset trim).
Claims 13–14 (residue/sample-and-hold and residue digitization) are addressed by '209's express second-phase "another conversion operation" in which "the second series of bits is determined using the value of the output voltage at the end of the first phase" — i.e., residue digitization after a charge-balancing first phase. Combined with routine SAR/capacitor-array practice (see Ground 3), these dependent claims are weak.
6. Ground 3 — Claim 15 (calibration DAC on the amplifier) and claims 6–10
Claim 15 requires: amplifier with first amplifier input, second amplifier input, control terminal, and amplifier output; plus a calibration DAC coupled to that control terminal whose analog output sets the amplifier's offset.
- The structural half (amplifier + integrating capacitor as the integrator) is expressly in '896 and '209.
- The offset-calibration half is squarely old in optical front-ends: '896 stores a calibration value determined in a calibration phase and applies it in the measurement phase; US 8,692,200 discloses an "initial auto-zero or calibration cycle" whose value is used to correct measurements, and chopper stabilization expressly "to eliminate offset errors."
- The specific vehicle — a DAC driving the amplifier's control/trim terminal — is the same routine DAC-trim technique as in Ground 1, and ams's own '132 shows the assignee using a DAC output to drive an analog control terminal in this exact signal chain.
Claims 6, 8, 9 (first/second integrating capacitors with gating switches to the amplifier output and to a reference voltage terminal) read on standard switched-capacitor integrator practice and on the reset/auto-zero switch arrangements conventional in this art (cf. US 8,692,200's reset switches and US 6,031,217's active-integrator reset/integration sequencing; and the '209 integrator itself with its reference-switch-coupled charge-packet capacitor).
Claim 10 (the further-reference-voltage-switch / capacitor-regrouping limitation used for SAR residue digitization) — the specification itself describes this as SAR-based regrouping of 2ⁿ equal integrating capacitors, i.e., a textbook successive-approximation capacitor-DAC operation. Binary/equal capacitor arrays, regroup-and-redistribute SAR search, and sub-LSB residue digitization are bedrock prior art. Needs a concrete CDAC/SAR reference for a formal ground; I did not retrieve one, so I flag this as assertable but unsupported in this pass.
Motivation for Ground 3: the '942 patent's own stated rationale — "the amplifier's output offset is the same as the comparator's input offset. When the comparator's input offset is calibrated, initial amplifier output offset will be accurate" — recites the problem (two offsets to null) and the goal (first-count accuracy at the start of the measuring phase). The art already contains both halves of the solution (calibrate the amplifier in a calibration phase; program analog blocks with a DAC). Combining them to null the summed offset of a light-sensing signal chain is exactly the predictable, art-suggested combination.
7. Why a POSITA would combine — consolidated
- Identical field and architecture. Same assignee (ams), same ambient-light-sensor charge-balancing ADC, same vocabulary (integrator, integrating capacitor, reference capacitor charge packet, comparator with reference input, control logic/counter). KSR "familiar elements performing the same function."
- The claim-1 delta is a known technique applied to a known device. DAC-programmed comparator level/offset is standard ADC practice; the '942 specification itself describes it as programming a trim transistor's gate to inject a mirrored current — a canonical offset-trim.
- The problem is named in the prior art and in the '942 background. Weak-light first-count accuracy under dark glass; comparator offset at the start of the measurement corrupts the first count. Trimming that offset is the obvious remedy.
- Existing calibration pipeline to extend. '896 already has a calibration phase → stored value → measurement phase flow; adding a comparator/amplifier trim DAC merely adds a consumer of that pipeline.
- Predictable result, no unexpected mechanism. Nothing in the claims recites a new physical effect; the recited result (a shifted comparator switching point, stored calibration word held constant) is precisely the expected consequence.
- Design-choice territory. Where the DAC injects its trim (reference input, input-pair leg, auxiliary mirror branch) is an optimization a POSITA would make routinely — MPEP §2144.04.
8. Where the obviousness case is weaker (good-faith counterpoints)
I want to be candid about the soft spots a patent owner would exploit:
- '896/'209 alone do not disclose the DAC-to-comparator-offset element. Claim 1 is not anticipated by the retrieved ams art. The case is purely §103 and depends on a secondary reference or on POSITA knowledge being accepted for DAC-trimmed comparator offsets. If the actual References Cited list contains no such reference, that is the battleground.
- The specific "one-count removal initialization" trick. The specification's real technical insight is arguably procedural, not architectural: making the reference-capacitor switch charge injection in the initialization identical to that in every subsequent count generation, and calibrating the comparator's input offset to include the amplifier's output offset, so the first count is accurate. If the prior art teaches offset trimming generally but not this injection-matching ordering, a patent owner can argue the combination does not reach the claimed result — though claim 1 does not actually recite that ordering, so this is a specification-based argument more than a claim-limitation argument.
- Claim 15's "calibration DAC on the amplifier's control terminal." If the art known to me (calibration current source in '896; auto-zero/chopper in '200) is characterized as calibrating by injecting a signal rather than by a DAC-driven control terminal, a patent owner will argue a structural difference. Counter: the specification treats the calibration DAC as interchangeable with other analog trims ("the offset of the amplifier 30 depends on the analog signal SAN1 or on the analog input signal SAN2") and ams's '132 shows a DAC driving an analog control terminal in the same chain.
- Secondary considerations are unproven either way. I found no evidence of commercial success, copying, licensing, or industry praise tied to the '942 claims specifically, and (per the earlier sections of this analysis) no litigation or PTAB proceeding involving this patent that I could verify. Absent that evidence, there is nothing to rebut the obviousness case — but also nothing to confirm the patentability challenge has been tested.
- §102 possibilities I could not resolve. The unverified-priority documents (US 2020/0225086, US 2021/0105020, CN 109642819) could be highly material if their priorities predate July 26, 2017 — but on the retrieved dates they appear not to qualify. Verify priorities before citing any of them.
9. Bottom line
| Claim | Obviousness assessment (§103) | Confidence |
|---|---|---|
| 1 | Likely obvious over ams '209 (or '896) + DAC-programmed comparator offset/threshold trimming in ADC front-ends | Moderate — hinges entirely on the secondary reference |
| 2–5 | Likely obvious; every element expressly in '896/'209 (input switches, charge-packet reference capacitor, control logic/counter) | Moderate-High |
| 6, 8 | Likely obvious; amplifier + first integrating capacitor and gating/reference switches are conventional switched-capacitor structures | Moderate-High |
| 7, 15 | Likely obvious over '896 (calibration value stored/applied) + '200 (auto-zero/offset elimination in optical front-ends) + DAC-trim practice ('132 shows DAC→analog control terminal in the same chain) | Moderate |
| 9 | Likely obvious; multiple integrating capacitors = routine cap-array/gain switching | Moderate |
| 10 | Assertable but not supported in this pass — needs a concrete CDAC/SAR reference | Low (as drafted here) |
| 11, 12 | Likely obvious; '209 method steps + '896's calibration-phase-value-held-constant teaching | Moderate-High |
| 13–14 | Likely obvious over '209's express two-phase (charge-balancing + second) conversion | Moderate |
Recommended next steps before this becomes a real invalidity contention:
- Pull the actual (56) References Cited list from the '942 front page/PDF, and the EPO search report for EP 3 435 046 B1 (the family's European counterpart) — the EPO search report will name the examiner's closest art for the same disclosure.
- Verify the priority dates of US 2020/0225086 A1, US 2021/0105020 A1, and CN 109642819 A.
- Identify one or two pre-July-2017 references specifically teaching DAC-based comparator offset/threshold trimming in a data converter to properly supply the claim-1 delta, and one teaching SAR/charge-redistribution residue digitization for claim 10.
Confidence statement: I am confident about the structure of the obviousness argument and about the disclosures I retrieved and quoted above. I am not confident that the specific prior-art combinations I named are the ones the examiner considered, because the front-page citation record was not available to me in this pass.
Generated 9/29/2026, 4:02:08 PM
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.
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