US 9871061

I'll search for authoritative information on this specific patent number, including any litigation/docket activity.

Let me check for any litigation or docket activity and verify the key bibliographic details.

Let me do one final targeted check for any court docket or PTAB activity specific to this patent.

Patent Analysis: US 9,871,061 B2

Note on scope: You asked specifically about patent number 9871061. I searched for this exact number against USPTO-style sources (Google Patents, Justia, Patents-Review) and for CAFC 2026 / district court / PTAB docket activity. I found no litigation, PTAB (IPR/PGR), or CAFC 2026 docket record naming this patent. All bibliographic and technical data below is drawn from the authoritative full patent text provided (Google Patents, fetched 2026-09-24), which takes precedence over search snippets. Where I lack authoritative data, I say so explicitly.

Bibliographic Data

Abstract (as published)

"A display substrate and its fabricating method have been disclosed. In a horizontal-field-mode liquid crystal display device, while maintaining five mask processes, additional direct contact has been formed to implement a narrow bezel."

Technical Subject Matter

The invention is an array/display substrate for a horizontal-field (Plane-to-Line Switching, PLS) mode LCD. Its stated goal is to add a direct contact part (D-CNT) to achieve a narrow bezel while keeping the existing five-mask (5M) fabrication flow unchanged. Key structural/process points:

• A lower common electrode (TCO: ITO/IZO) is deposited over the entire substrate and is not patterned — which the specification says reduces static-electricity defects.
• The gate mask (1st mask) simultaneously forms the gate electrode and a common-electrode contact part (com-CNT) and a direct contact part (D-CNT) in the same gate-metal layer.
• A gate insulating layer, then a separately patterned semiconductor layer (2nd mask) — done separately so an "HT mask" is not needed at the source/drain step.
• A 3rd mask opens first and second contact holes over the com-CNT and D-CNT (dry etch).
• A 4th mask forms the source/drain electrodes and a first conductive layer (to the common electrode) and a second conductive layer (to the direct contact part), using a Cu / TCO (ITO or IZO) barrier stack; the TCO barrier remains as the pixel electrode where the Cu is wet-etched away.
• A 5th mask patterns a passivation layer to open the pixel part.

Plain-Language Overview of the Independent Claim (Claim 1)

Claim 1 is the sole independent claim (claims 2–12 depend from it). It claims a display substrate having the following stacked structure:

1. Common electrode on a substrate.
2. Insulating layer on that common electrode.
3. A gate electrode sitting on the insulating layer, plus a common-electrode contact part and a direct contact part located on the same insulating layer and spaced apart from the gate electrode.
4. A gate insulating layer over the structure, with a semiconductor layer on it.
5. A pixel part spaced apart from the semiconductor layer.
6. Source and drain electrodes on the gate insulating layer/semiconductor, each built as a first lower barrier + first metal layer.
7. A first conductive layer that touches a side of the common-electrode contact part and an upper surface of the common electrode (built as a second lower barrier + second metal layer).
8. A second conductive layer resting on and coupled to the direct contact part (built as a third lower barrier + third metal layer).
9. A passivation layer over the source/drain and both conductive layers.

Key functional limitations in Claim 1:

• The 2nd and 3rd lower barriers are the same material as the 1st lower barrier (i.e., all TCO-based).
• The 2nd and 3rd metal layers are the same material as the 1st metal layer (i.e., Cu).
• The pixel part is the same material as the drain's first lower barrier and extends from the drain electrode (i.e., the TCO barrier is left in place to serve as the pixel electrode).
• The second lower barrier contacts the common-electrode contact part, and the third lower barrier contacts the direct contact part — establishing the electrical connection to the direct contact part that enables the narrow bezel.

Literal-text caveat: As granted, claim 1 recites "the second conducive layer comprising a third lower barrier…" — I read this as a typographical rendering of "conductive," but per your instruction I am flagging it literally rather than silently correcting it.

Dependent claims (brief)

• 2: common electrode wholly deposited, not patterned.
• 3: common electrode and pixel part are TCO-based.
• 4: insulating and gate insulating layers are Si-based (SiNx/SiOx/SiONx).
• 5–6: gate electrode metal selection (Cu, Al, Mo, W, Ti, Cr, single or alloy) and multi-layer gate.
• 7–8: barriers are TCO-based; Cu metal with ITO/IZO barriers.
• 9–10: com-CNT and D-CNT are the same material / formed simultaneously.
• 11: bottom surfaces of com-CNT and D-CNT directly on the insulating layer.
• 12: com-CNT formed simultaneously with the gate electrode and disposed on the insulating layer.

Family / Related Applications (context)

• US 9,704,890 B2 — "Display substrate including direct contact part and method of fabricating the same" (Appl. 14/725,993, same inventor/applicant, same Aug. 27, 2014 priority) — a closely related sibling patent, with similar claim language ("source and drain electrodes comprise copper and a copper lower barrier comprising the TCO wire; the pixel part comprises only the TCO wire").
• Pre-grant publications US 2016/0064414 A1 and US 2016/0064412 A1 (both Samsung Display, filed same day/priority) are co-pending family members.
• The patent's "Non-Patent Citations" reference office actions in U.S. Appl. Nos. 14/753,867 and 14/725,993 — confirming these were examined as related cases.

Litigation / Docket Findings (explicit uncertainty)

• CAFC 2026 dockets: A targeted search returned no results tying US 9,871,061 to any Federal Circuit 2026 appeal.
• District court / ITC / PTAB: No docket or IPR/PGR naming this patent was found. The only Samsung Display–related patent litigation surfaced in search was a Tau Ceti NPE campaign against LG, HP, and Samsung (reported in industry press) — and this patent was not identified in that reporting. Because that reporting is secondary and does not name the patent, I cannot confirm any connection.
• Conclusion on status: I have no authoritative evidence that US 9,871,061 has ever been asserted or challenged in litigation or post-grant proceedings. This is a negative finding from limited search, not proof of absence; a definitive check would require a dedicated litigation database (e.g., Docket Navigator, RPX, or PACER/Docket Alarm) queried by patent number, which was not available here.

Bottom line: US 9,871,061 is a Samsung Display array-substrate patent (inventor Young-Joo Choi) claiming a PLS-mode display substrate with a stacked Cu/TCO source-drain scheme in which the TCO barrier doubles as the pixel electrode and dedicated common-electrode and direct-contact parts are formed in the gate layer — enabling a narrow bezel within a five-mask process. Its only independent claim is claim 1, and I found no litigation or CAFC activity for it.

I'll search for litigation involving US patent 9871061.

Initial searches returned no relevant results. Let me search specific litigation resources.

Let me try more targeted litigation-specific searches.

Summary of Findings

No litigation involving U.S. Patent No. 9,871,061 ("9871061") was found. Interpreting the number literally and searching specifically for that patent, I could not identify any district court case, ITC investigation, PTAB proceeding, or Federal Circuit appeal in which US 9,871,061 was asserted, challenged, or otherwise at issue.

What I searched

• General web searches for "9871061" and "9,871,061" combined with litigation/lawsuit terms — the only numeric hits were unrelated (a Flygt pump serial number, an Australian ACCC parts register document, and an O-ring catalog), i.e., not the patent.
• Targeted searches combining the patent's title ("Display substrate and method of fabricating the same") and assignee (Samsung Display Co., Ltd.) with infringement/lawsuit terms — the results involved other patents, not this one.
• A search of the Unified Patents litigation ecosystem — no record tied to this patent number.

Notable negative indicators

• A third-party family listing (szpa.org) for the Korean family KR1020160025672A | US20160064420A1 | US9871061 reports "诉讼案件数 0" (number of litigation cases: 0), consistent with my finding of no litigation.
• The Google Patents page for US 9,871,061 shows no litigation events and no assertion in its "Cited By" / legal-events sections. Note that Samsung Display is a frequent patent litigant (e.g., Samsung Display v. BOE, E.D. Tex./ITC; Neodron v. Samsung Display; Bishop Display v. Samsung; Solas OLED v. Samsung), but none of those matters assert US 9,871,061 — they involve different patents ('803, '683, '578, '599, '593, '009, '898, '502, '747, '106, '377, '706, '347, '047, '830, '449, '311, '338, '450, etc.).

Required disclosures / caveats

• I cannot rule out litigation with certainty. My patent-number searches returned no relevant hits, and the required search steps were exhausted before I could complete a full sweep of PACER, the CAFC docket, and the Unified Patents caselist. This answer reflects a good-faith search rather than an exhaustive clearance.
• I did not verify this directly against PACER or the Unified Patents litigation caselist (https://portal.unifiedpatents.com/litigation/caselist), which I was unable to query to completion. A confirmatory PACER/Unified Patents docket search is recommended before relying on the "no litigation" conclusion.
• Per your instruction, I have not auto-corrected any identifiers; US 9,871,061 was searched as written, and results for similar-but-distinct numbers were excluded.

Bottom line: On the evidence available, there is no known litigation involving U.S. Patent No. 9,871,061. The closest related activity in the record is the patent's issuance (2018-01-16) to Samsung Display Co., Ltd., and the maintenance-fee payments in 2021 and 2025 — administrative events only, not litigation.

PTAB AIA Trial Proceedings — US 9,871,061 B2

Patent: US 9,871,061 B2 — "Display substrate and method of fabricating the same"
Inventor: Young-Joo Choi | Assignee: Samsung Display Co., Ltd.
Filed: 2015-06-04 (priority KR 10-2014-0112348, 2014-08-27) | Granted: 2018-01-16 | Claims: 12 | Status: Active, adjusted expiration 2035-07-10
Source: Google Patents US9871061B2

Proceedings overview

There are zero AIA trial proceedings on file against US 9,871,061. The USPTO Open Data Portal returns no IPR, PGR, or CBM for this patent as of the most recent ingest, and targeted web searches (PTAB E2E/public petition documents, CourtListener, Docket Alarm, and general press) surfaced no petition, institution decision, Final Written Decision, or Federal Circuit appeal naming this patent. The breakdown is therefore: active — 0; claims invalidated — 0; claims sustained — 0; settled — 0; institution denied — 0. The bottom-line defensive posture is "the patent is completely untested at the Board." All 12 claims are live and legally intact, no § 315(e) estoppel attaches to anyone, and a defendant has a full, clean slate on which to file a first-ever IPR — but also no free shot: nothing about this patent has been knocked out, and its claims have never been construed by an APJ panel.

Caveat on the structured data: Per the governing instruction, the ODP "PTAB proceedings on file" block is canonical and it lists nothing. I found no contradicting evidence of an older or recently-filed proceeding through web search, but I cannot rule out a very recently filed, not-yet-indexed petition filed within the last few weeks. Verify directly on PTAB E2E before relying on the negative, especially if you're within a § 315(b) window: PTAB E2E / Patent Trial and Appeal Board End-to-End.

No proceedings to enumerate

There are no proceeding entries to present in the per-proceeding format. I will not manufacture numbers, panels, or dispositions. For completeness, here is what I affirmatively checked and what I did and did not find:

Do not confuse this patent with its siblings in the same family. The '061 patent's prosecution family and its same-day filings are frequently mis-cited and they are not PTAB proceedings on the '061 patent:

• US 9,704,890 B2 — "Display substrate including direct contact part and method of fabricating the same" (a separate patent, related subject matter)
• US 2016/0064420 A1 — the pre-grant publication of the '061 patent itself (published 2016-03-03)
• US 2016/0064414 A1 and US 2016/0064412 A1 — same-day Samsung Display filings, separate applications (these correspond to the Office Actions in U.S. Appl. No. 14/725,993 and 14/753,867 listed in the '061 file's "Non-Patent Citations")

Those Office Actions are ex parte prosecution events, not AIA trials, and they are not estoppel-generating proceedings.

Strategic summary

Claim status: all 12 claims are UNTESTED and live. Because no petition was ever filed — let alone instituted — there is no claim-level "canceled vs. sustained" table to build. Claim 1 (the sole independent claim; claims 2–12 are dependent) has never been construed by the Board, and no Certificate of Cancellation under 35 U.S.C. § 318(b) has issued for any claim. Practically: if you receive a demand letter citing any of claims 1–12 of the '061 patent, every claim cited is enforceable as issued and you cannot point to a prior PTAB cancellation as a defense. This is the opposite of the "troll with a dead patent" scenario.

Estoppel landscape: a clean field for any defendant. Because no petitioner has been through an AIA trial on this patent, no § 315(e)(2) estoppel exists against anyone as to this patent. There is no prior petitioner to piggyback on and no privity trap. Every prior-art ground that can be raised under § 102 (patents and printed publications) and § 103 (same) remains available — including the TCO/ITO/IZO barrier-and-metal-layer, five-mask PLS-mode art that would be the natural attack vector given the specification's emphasis on Cu/ITO-IZO source/drain bilayers, an entirely-deposited unpatterned common electrode, and a direct contact part (D-CNT) formed in the same first-mask gate-metal step. The realistic procedural gates on a new IPR here are: (1) § 315(b) one-year bar — runs from service of a complaint alleging infringement, so the clock is the single most important fact you must confirm; and (2) § 325(d)/Fintiv-type discretion — non-issues unless there is parallel litigation. Note the other AIA windows are closed: the PGR window (9 months post-issuance) closed 2018-10-16, and CBM review is unavailable both because the program sunset for new petitions on 2020-09-16 and because a display-substrate fabrication patent is not a "covered business method."

Pattern signals: none present. No serial petitioner, no defensive aggregator (no Unified Patents filing surfaced), and no patent-owner PTAB appeal aggression — because there has been no proceeding to appeal. The absence of IPRs is a genuine signal here and worth reading carefully: US 9,871,061 is a Samsung Display portfolio patent on a manufacturing method (five-mask PLS-mode TFT-array fabrication), not an NPE-asserted licensing patent. It appears never to have been asserted — the family record for the Korean sibling KR1020160025672A reports zero litigation cases, and no U.S. complaint asserting the '061 patent surfaced. Companies tend not to IPR a patent nobody is asserting; the corollary is that if you are the first target, you would likely be the first petitioner, with no roadmap from a prior challenger.

Recommended next steps

• First, confirm the negative directly. Pull the patent's "Continuous Prosecution Data" / trial tabs on Patent Center and search PTAB E2E by patent number. A brand-new petition (last 30–60 days) may not yet be reflected in the ODP extract that seeded this report.
• If you are a defendant already served: calendar the § 315(b) one-year deadline from the complaint service date — that is the controlling date for any IPR you intend to file, and there is no other petitioner's timeline to lean on.
• Preserve the full ground set now. With no estoppel and no prior FWD, you can (and should) build IPR grounds cumulatively — multiple references, § 103 combinations — without the redundancy/discretion risk of a second-challenger scenario. Focus on the claim 1 limitations most vulnerable to printed art: the "second lower barrier / third lower barrier comprise a same material as the first lower barrier" TCO-barrier limitation and the "pixel part comprises the same material as the first lower barrier of the drain electrode and extends from the drain electrode" limitation.
• If a demand letter cites claims 1–12: there is no FWD to link to — the patent has no adverse PTAB record. Do not assert that any claim is canceled, and do not rely on § 315(e)(2) estoppel arguments against the patent owner. Your only validity leverage is a ground you affirmatively raise (IPR, or § 101/§ 112/§ 102/§ 103 in district court).
• Watch parallel CAFC/docket activity. No appeal exists today; monitor CourtListener and the CAFC docket if an IPR is later filed, since any FWD would be appealable within 63 days under 37 C.F.R. § 90.3.

Bottom line: the absence of any PTAB proceeding on US 9,871,061 is itself the finding. The patent is un-narrowed and fully intact; treat it as a live 2035-expiry asset and plan your invalidity case from scratch rather than from a prior petitioner's work product.

I'll research the assignment record for US 9871061, starting with the source data I have and supplementing with searches.

Let me verify litigation history and any post-issuance transfers.

Let me attempt to pin down the recording correspondent and confirm no later transfers.

I have enough to reconstruct the chain. Note upfront: the only ownership event on record is the original inventor→employer assignment. All searches for later transfers, litigation on this patent, or NPE activity returned nothing.

Inventors

• No unusual departure pattern surfaced. There is a single inventor; no co-inventor group to track for mass departures. The assignment was executed before the US filing (effective 2015-02-24 vs. US filing 2015-06-04), which is the normal "assign-then-file" sequence for a Samsung in-house filing, not a fire-sale precursor.
• Korean priority: KR 10-2014-0112348, filed 2014-08-27.

Original assignee

Samsung Display Co., Ltd. — the assignee on the issued patent (and current assignee).

• Line of business: Manufacturer of LCD and OLED display panels — the 2012 spin-off of Samsung Electronics' display business. Samsung Display is a global merchant supplier of smartphone/tablet panels (e.g., to Apple and Samsung Electronics) and the originating owner of the PLS (Plane-to-Line-Switching) horizontal-field LCD technology this patent covers.
• Product embodying the claims: Yes — the patent is a fabrication method for a PLS-mode display substrate with a direct contact part (D-CNT) for a narrow bezel. Samsung Display mass-produces PLS-mode panels, so the claims read on its commercial process line. This is a process/manufacturing patent, not a discrete product.
• Enforcement posture: Samsung Display is an active patent enforcer (e.g., ITC Inv. No. 337-TA-1351, AMOLED panels, asserted against BOE and repair-screen vendors). Critically, US 9,871,061 is not among the asserted patents in that action — the assertion is operating-company-vs-competitor behavior, but on other family members.
• Current status: Operating, solvent, no bankruptcy. Maintenance fees paid on this patent 2021-06-28 (4th year) and 2025-06-23 (8th year); legal status Active, adjusted expiration 2035-07-10.

Assignment timeline

One recorded assignment (confirmed via Google Patents legal events and cross-checked searches; no post-issuance transfers found):

• 2015-02-24 (executed/effective) / recorded 2015-06-04 — Reel 035791 / 0439
  • Conveyance: Assignment (Assignment of Assignors Interest — the standard 37 CFR 1.63(e)-style inventor assignment filed with the application)
  • Assignor: Choi, Young-Joo (individual inventor)
  • Assignee: Samsung Display Co., Ltd. (95, Samsung 2 Ro, Giheung-gu / #1 Samsung-ro, Giheung-gu, Yongin-si, Gyeonggi-do, Republic of Korea)
  • Correspondent: Not exposed in the fetched records. The Google Patents legal-event entry records the assignor/reel/frame but no attorney or firm. I could not verify the correspondent for reel 035791/0439 and will not fabricate one. Contextual note only (not authoritative for this reel): parallel Samsung Display recordings at the USPTO are commonly filed through Knobbe Martens Olson & Bear, LLP, submitted by Paul C. Steinhardt (Irvine, CA) — e.g., reel 033308 / 0763 (U.S. App. 14/330,992). That is a Samsung's-own-firm pattern, i.e., outside prosecution counsel for a large operating company, not an NPE repeat-correspondent tell. Do not treat it as verified for this patent.
  • Context: Initial inventor-to-employer assignment (internal/employment), not an acquisition, securitization, or transfer to an asserter.

No other recorded assignments exist. No security agreements, no mergers, no name changes, no licenses, no releases, no corrections, and no transfers to any NPE/LLC are on record. Family members (KR 10-2221845, KR 10-2227519, KR 10-2232258) remain with Samsung Display as well — these are Korean family filings, not ownership changes.

If the Assignment Center returns no additional records when you search "9871061," that confirms the above: the original assignee still owns the patent outright.

Timeline diagram

timeline
    title Ownership of US 9871061
    2014 : KR priority filed by Samsung Display
         : Inventor Choi Young-Joo
    2015 : Assignment to Samsung Display
         : Reel 035791 frame 0439
         : US application filed
    2018 : US 9871061 granted
    2021 : Maintenance fee paid year 4
    2025 : Maintenance fee paid year 8

NPE / troll-pattern signals

1. Shell-entity transfer — not present. No transfer off the operating assignee. The sole recording (Reel 035791/0439) moves rights to Samsung Display, the operating manufacturer, not to any "IP / Holdings / Licensing / Ventures" entity. No registered-agent address, no single-purpose LLC.

2. Known asserter in the chain — not present. Neither the original assignee (Samsung Display Co., Ltd.) nor any successor appears on the Acacia / Marathon / IV / Wi-LAN / Conversant / Vringo / Pendrell / Round Rock rosters. No assignee change has occurred, so no asserter ever entered the chain.

3. Repeat correspondent across the chain — not present / unclear. The chain contains exactly one recording, so recurrence is structurally impossible. The recording's correspondent is not published in the sources fetched. The recurring Knobbe Martens / Paul C. Steinhardt appearances seen on other Samsung Display reels (e.g., 033308/0763) are that company's outside IP filing firm and carry no NPE significance — a large operating company using one firm repeatedly is normal, not a tell.

4. Cascading transfers — not present. No chained LLC transfers; zero post-issuance assignments in ~11 years.

5. Pre-litigation transfer — not present. No infringement suit naming US 9,871,061 has been identified. Samsung Display's ITC/competitor actions (337-TA-1351, the 2025 EDVA action vs. BOE) assert other patents ('803, '683, '578, '599, '593). The 2020 Neodron v. Samsung Display matter was Samsung Display being sued, on Neodron's touchscreen patents — unrelated to this patent's ownership.

6. Bankruptcy fire-sale — not present. Samsung Display has no Chapter 7/11 event; the patent has been maintained (fourth- and eighth-year fees paid).

7. Privateering — not present. No operating-company → NPE transfer, no SEC disclosure of a shell divestiture, no EFF/Patent Progress coverage tying this patent to a proxy assertion.

8. Defensive aggregator (anti-NPE) — not present. The chain does not terminate at RPX, AST, LOT, Unified Patents, or OIN. Ownership remains with an operating company.

Verdict

Insufficient data — using the rubric's literal definition ("no records, or only the original assignment").

Justification: the complete ownership record for US 9,871,061 consists of a single entry — the inventor assignment to Samsung Display Co., Ltd. at Reel 035791 / Frame 0439 (effective 2015-02-24, recorded 2015-06-04) — with no post-issuance assignments, no security interests, and no NPE transfers, and the patent remains Active with fees paid through 2025-06-23. Because there is no second link, none of the eight NPE signals can be established, and the substantive finding is the inverse of a troll pattern: a clean, never-divested operating-company asset held by the original assignee. (If you want the single most informative takeaway: the absence of any assignment after issuance over 11 years is itself the evidence that Samsung Display still owns it.)

Verify at the USPTO Assignment Center: https://assignmentcenter.uspto.gov/ (search patent number 9871061) — and the Google Patents legal-events view: https://patents.google.com/patent/[US9871061B2](/patent/US9871061B2)/en

Data caveats: (a) the recording correspondent for reel 035791/0439 was not retrievable from the sources I could access, so I did not state one; (b) the "execution date" shown (2015-02-24) is the effective date of record — the signature date may differ slightly; (c) any future reappearance of this patent in an NPE chain would most plausibly originate from a Samsung Display divestiture, which would generate a new recording not present today.

I'll search for the specific patent and its cited prior art to ground my analysis.

Let me look up a few of the specific cited references to characterize them accurately.

Prior-Art Analysis — US 9,871,061 B2

A. Identification of the patent (searched and confirmed)

Caveat I must state up front: I could retrieve the patent document and its citation lists, but I could not retrieve the actual USPTO file-wrapper office actions for Application 14/731,272. The § 102 mappings below are therefore my own element-by-element assessment against the references' disclosed subject matter, not a quotation of an examiner's rejection. I have flagged confidence levels accordingly.

Governing law. With a 2014-08-27 priority date (post-March 16, 2013), AIA 35 U.S.C. § 102 applies — meaning the operative provisions are § 102(a)(1) (patented/published/publicly used before the effective filing date) and § 102(a)(2) (U.S. patents and application publications naming another inventor, effectively filed before that date), with the § 102(b)(2)(C) common-ownership exception available for commonly owned subject matter. This is important: several of the cited documents are Samsung Display's own materials and may be excepted from § 102(a)(2), and one is this very application's own publication.

B. Claim 1 element checklist (used for the anticipation mapping)

Claim 1 requires, in combination:

1. common electrode on a substrate (below the TFT level — "lower common electrode");
2. insulating layer on the common electrode;
3. gate electrode on that insulating layer;
4. a common electrode contact part and a direct contact part (D-CNT) on the insulating layer, spaced from the gate electrode;
5. gate insulating layer; semiconductor layer;
6. pixel part spaced from the semiconductor layer;
7. source/drain electrodes = first lower barrier + first metal layer;
8. first conductive layer contacting the side of the common-electrode contact part and the upper surface of the common electrode = second barrier + second metal;
9. second conductive layer on the direct contact part = third barrier + third metal;
10. passivation layer;
11. same-material limitations (2nd/3rd barriers ≡ 1st barrier; 2nd/3rd metals ≡ 1st metal); pixel part ≡ first barrier material and extending from the drain;
12. second lower barrier contacts the common-electrode contact part; third lower barrier contacts the direct contact part.

C. The 16 patent documents cited on the face of US 9,871,061

C-1. Directly relevant family / co-pending Samsung Display applications

US 2016/0064420 A1 — "Display substrate and method of fabricating the same," Samsung Display Co., Ltd., priority 2014-08-27, published 2016-03-03.
This is the pre-grant publication of Application 14/731,272 itself. It is not prior art to claim 1 (same inventive entity, same effective filing date). Its presence in the citation list is an artifact of the citation table.

US 2016/0064414 A1 and US 2016/0064412 A1 — "Display substrate and method of fabricating the same," Samsung Display Co., Ltd., priority 2014-08-27, published 2016-03-03.
Sibling applications filed the same day, same subject area (the '414 reference granted as US 9,704,890 B2, "Display substrate including direct contact part"). Under § 102(a)(2) they would need to name another inventor and be effectively filed before 2014-08-27; they share the same 2014-08-27 priority date and are commonly owned by Samsung Display. As such they are not § 102 prior art to claim 1; § 102(b)(2)(C)/(a)(2) and same-date considerations exclude them. They are useful primarily as evidence of the applicant's own contemporaneous disclosure, and courts/examiners also treat them as double-patenting/obviousness-type considerations rather than § 102 anticipation.

C-2. References that can qualify as § 102(a)(1) art (published before 2014-08-27)

KR 20000029304 A — "Liquid crystal display device and method for manufacturing the same," 마찌다 가쯔히꼬; priority/application 1998-10-26, published 2000-05-25. Family member US 6,414,730 B1 (Sharp).
Generic LC-display structure/method. Anticipation: none of claims 1–12. Potential § 102 relevance is limited to broad background elements (contact holes through an interlayer insulator to a lower electrode); does not disclose the lower common electrode + contact part/direct contact part architecture of claim 1.

US 6,414,730 B1 — "Liquid crystal display device and method for manufacturing the same," Sharp Kabushiki Kaisha; filed 1998-10-26 (priority), published/issued 2002-07-02. Most relevant substantive teaching: a metal layer formed by stacking a titanium film and an aluminum film, with contact holes (through holes) formed through an interlayer insulation film to expose the drain extraction electrode, and an ITO pixel electrode covering the through hole; it expressly discusses the problem of ITO contacting Al/multilayer metal.
Potential § 102 relevance: claims 5, 6, 7, 8 (gate/source-drain multi-layer stacks, barrier/metal construction, transparent-conductive contact). Does not anticipate claim 1 — no lower common electrode underlying an insulating layer carrying a spaced gate pattern, and no "direct contact part" as claimed.

KR 20030058237 A — "Method for fabricating inplane switching mode liquid crystal display device," 엘지.필립스 엘시디 주식회사 (LG.Philips LCD); 2001-12-29 / published 2003-07-07.
IPS-mode array fabrication. Anticipation: none. Background art only (IPS horizontal-field context); no teaching of the barrier/metal tri-layer or the two contact-part/direct-contact-part conductive layers of claim 1.

US 2011/0024758 A1 — "Liquid crystal display device and semiconductor device," Semiconductor Energy Laboratory Co., Ltd.; 2006-05-16 / published 2011-02-03.
LCD/semiconductor structure with insulating films over an electrode, TFT, and pixel electrode. Anticipation: none of claim 1. Possibly background-relevant to claim 4 (Si-based insulating layers) and general stacked-electrode architecture, but no common-electrode-contact-part/direct-contact-part pair.

US 2008/0136990 A1 — "Liquid crystal display device and electronic device," Semiconductor Energy Laboratory Co., Ltd.; 2006-10-31 / published 2008-06-12. (Corresponding grant: US 7,872,722 B2, issued 2011-01-18.)
This is the same family. Discloses a liquid crystal element between electrodes with an insulating layer, and a horizontal-electric-field (IPS/FFS) element. Anticipation: none. At most background art regarding insulating-layer/electrode stacking and the broad concept of a horizontal-field LC element. No teaching of the claimed same-material tri-layer barriers/metals.

US 7,872,722 B2 — "Liquid crystal display device and electronic device," Semiconductor Energy Laboratory Co., Ltd.; priority 2006-10-31, issued 2011-01-18.
Granted version of the '990 application above. Same assessment. § 102(a)(1) art but does not anticipate any of claims 1–12.

US 2011/0050551 A1 — "Liquid crystal display panel," Sony Corporation; 2009-09-02 / published 2011-03-03.
LCD panel structure. Anticipation: none. Background art only.

KR 20110040167 A — "Transflective Liquid Crystal Display," 엘지디스플레이 주식회사 (LG Display); 2009-10-13 / published 2011-04-20.
Transflective LCD electrode design. Anticipation: none. Not directed to the claimed contact-part architecture.

US 2011/0310341 A1 — "Array substrate for fringe field switching mode liquid crystal display device and method of manufacturing the same," Jeong-Oh Kim; LG Display Co., Ltd.; filed 2011-06-22, published 2011-12-22 (family: US 8,790,941; US 8,933,460; KR 101772511 B1).
Discloses an FFS array substrate with a gate line (optionally at least two layers) connected to the gate electrode, a data line, an insulating layer with an opening over the TFT, a pixel electrode on the insulating layer connected to the exposed drain, a passivation layer, and a plurality of common electrodes on the passivation layer. Also discloses source/drain electrodes as "a single layer of ITO or a multi-layer of copper and ITO."
Potential § 102 relevance: this is one of the closer structural disclosures and is relevant to claims 3, 5, 6, 7, 8, 11 (multi-layer gate, Cu/ITO barrier-metal source/drain, transparent-conductive electrode, bottom surfaces resting on an insulating layer). It does not anticipate claim 1: the common electrode there sits above a passivation layer over the pixel electrode (FFS upper common), not as a lower common electrode disposed under an insulating layer with a spaced gate pattern plus a common-electrode contact part and a distinct direct contact part as claimed. Stronger as a § 103 combination reference than as § 102 art.

KR 20120125823 A — "Liquid crystal display device and Method of manufacturing the same," 엘지디스플레이 주식회사 (LG Display); 2011-05-09 / published 2012-11-19.
LCD and fabrication method. Anticipation: none. General background; may support § 103 combination on contact-hole formation.

US 2013/0119392 A1 — "Organic light-emitting display device and method of manufacturing the same," Samsung Mobile Display Co., Ltd.; 2011-11-14 / published 2013-05-16.
OLED display structure/fabrication. Anticipation: none. Different device type (organic EL rather than horizontal-field LCD); not directed to lower common electrode/contact-part architecture. Background art on contact structures only.

US 2015/0235585 A1 — "Display device and manufacturing method thereof," Samsung Display Co., Ltd.; priority/filing 2014-02-18, published 2015-08-20 (family: KR 1020140018653 A → KR 102182428 B1).
This is the most chronological-relevant third-party-type reference in the list: its effective filing date (2014-02-18) precedes the subject patent's 2014-08-27 priority date, so it is nominally a candidate for § 102(a)(2) (U.S. application publication naming another inventor, effectively filed before). It discloses a display device and manufacturing method with contact/connection structures and commonly owned Samsung Display subject matter.
Two important caveats: (i) publication occurred 2015-08-20, i.e., after the subject priority date, so it cannot be § 102(a)(1) art — it can only be § 102(a)(2) art; and (ii) because it is commonly owned by Samsung Display, the § 102(b)(2)(C) common-ownership exception may remove it from prior art entirely. On the merits it does not appear to disclose the full claim-1 combination (lower common electrode + insulating layer + spaced gate pattern + common-electrode contact part + direct contact part with same-material tri-layer barriers). Anticipation of claim 1: unlikely; best characterized as a § 103/§ 112-family companion.

US 2016/0062198 A1 — "Display panel and manufacturing method thereof," Century Technology (Shenzhen) Corporation Limited; priority 2014-08-29, published 2016-03-03.
Critical date check: its listed effective date (2014-08-29) is two days after the subject patent's 2014-08-27 priority date, and it published 2016-03-03 (after). It therefore does not qualify as § 102(a)(1) or § 102(a)(2) prior art against claim 1 under the AIA. Anticipation: none. Included in the citation table but not a § 102 reference on these dates.

C-3. References listed among "Family Cites Families"

KR 20070052173 A — "Thin film transistor substrate and its manufacturing method," 삼성전자주식회사; 2005-11-16 / published 2007-05-21 — TFT array substrate/contact structure. § 102(a)(1) art; background only, no anticipation of claim 1.
KR 101363555 B1 — "Thin film transistor substrate and method of manufacturing the same," 삼성디스플레이 주식회사; priority 2006-12-14, issued 2014-02-19 — TFT substrate fabrication. Background only.
CN 202033562 U — "Liquid crystal display array base plate," 京东方科技集团股份有限公司 (BOE); 2011-04-29 / issued 2011-11-09 — Utility model on an LCD array base plate. Background only.

D. Ranking — most relevant prior art for US 9,871,061

E. Bottom line

• No single reference cited on the face of US 9,871,061 appears to disclose every element of claim 1, so I do not identify a high-confidence single-reference § 102 anticipation of claim 1 (or of dependent claims 2–12) among the cited documents. The distinguishing elements are the combination of (a) a lower common electrode under an insulating layer that carries a spaced gate pattern, (b) two distinct spaced structures — a common-electrode contact part (com-CNT) and a direct contact part (D-CNT) — and (c) the same-material tri-layer barrier/metal conductive layers with the first conductive layer contacting the side of the com-CNT and the upper surface of the common electrode.
• The references are best used as § 103 obviousness materials (LG Display's FFS Cu/ITO source-drain and multi-layer gate; Sharp's Ti/Al stack and through-hole contact to a lower electrode) rather than as § 102 anticipation.
• Date/status issues to keep in mind: US 2016/0064420 A1 is this application's own publication and is not prior art; US 2016/0064414 A1 and US 2016/0064412 A1 are same-date, commonly owned siblings; US 2015/0235585 A1 is only § 102(a)(2) art if it names another inventor and if the common-ownership exception does not apply; and US 2016/0062198 A1 (eff. 2014-08-29) is two days too late to be prior art against the 2014-08-27 priority.

If you want a definitive § 102 chart, the next step would be pulling the actual file-wrapper office actions and the examiner's cited-art rejections for Application 14/731,272 from USPTO Patent Center — I could not retrieve those here, so the claim mappings above are my independent assessment and should be verified against the prosecution record.

I'll gather details on the key prior-art references cited on this patent's page so I can ground the §103 analysis in the actual references rather than guesswork.

Let me pull details on the remaining cited references to ground the combination analysis.

Obviousness Analysis — US 9,871,061 B2 under 35 U.S.C. § 103

Building on the prior sections (bibliographic data, claim 1 element breakdown, "no litigation found"). This section adds the § 103 analysis only and does not repeat those.

0. Framework and scope of the prior-art record used

• Governing law: The application's effective filing date is Aug. 27, 2014 (KR priority) — post‑AIA. AIA §§ 102/103 and the KSR rationales apply.
• Prior art considered: the 14 references in the patent's own "Citations" list plus the 7 "Non‑Patent Citations." (I used the references as listed on the patent page, per your instruction.)
• PHOSITA: a process/array engineer with an LCD backplane background, familiar with a‑Si TFT array fabrication, photolithographic mask budgeting, FFS/PLS electrode geometry, and Cu/TCO (Cu/ITO, Cu/IZO) source‑drain stacks.

Evidentiary caveat (read before relying on this): I retrieved substantive text for only part of the cited record — principally Kim US 2011/0310341 A1 (and its LG family US 8,790,941 / US 8,933,460), Kimura US 2011/0024758 A1 (SEL), and US 2015/0235585 A1 (Samsung Display). My characterization of US 2008/0136990 A1, US 7,872,722 B2, US 2011/0050551 A1 (Sony), KR 2003‑0058237 A, KR 2000‑0029304 A / US 6,414,730 B1 (Sharp), KR 2011‑0040167 A, KR 2012‑0125823 A, and US 2013/0119392 A1 rests on titles, abstracts, family data and my general knowledge of this art space, not on verified full text. Each such statement is flagged below. Where I could not verify a limitation is taught, I say so rather than assume.

1. Element-by-element map of claim 1 to the cited art

Takeaway from the map: the architecture of claim 1 is distributed almost entirely across two references — Kim US 2011/0310341 A1 (5‑mask FFS, Cu/ITO S/D stack, TCO pixel at S/D level, bridging connection pattern through a contact hole, passivation) and the SEL/Kimura family (lower/whole-surface common electrode under the TFT, first insulating film, "reduce the number of manufacturing steps, the number of masks, and manufacturing cost"). The only limitations not squarely met are the express D‑CNT and the single-mask S/D‑plus‑pixel TCO-barrier step.

2. Combination A (primary): Kim US 2011/0310341 A1 + US 2011/0024758 A1 (+ US 7,872,722 B2)

Why combine (motivation, articulated):

1. Same field, same problem. Both are horizontal-field LCD array substrates; both are expressly directed to reducing mask count / manufacturing cost. Kim states its object is to "reduce the manufacturing processes, decrease the manufacturing costs, and improve the productivity" using a 5‑mask flow — the very 5‑mask budget this patent claims to preserve. The SEL/Kimura family states the object of "reduc[ing] the number of manufacturing steps, the number of masks, and manufacturing cost compared with a conventional one." A PHOSITA optimizing array cost would look to both.
2. Complementary, not conflicting, teachings. Kim supplies the S/D metallurgy and the FFS electrode geometry; Kimura supplies the common electrode below the TFT and the unpatterned, whole-surface common electrode. Placing an unpatterned common electrode under the gate insulator is a known technique used to improve a similar device in the same way (KSR rationale (C)): it simultaneously supplies the FFS counter-electrode and the patent's own asserted ESD benefit ("decreas[ing] static electricity according to a decrease in a potential difference between the gate line and the data line").
3. Predictable result. Stacking common electrode → insulating layer → gate → gate insulator → semiconductor → Cu/TCO S/D is a simple, ordered layer build with no new physics; the electrical function (fringe field between common and pixel electrodes) is unchanged.

Coverage: Combination A meets every structural limitation except the express "D‑CNT" and the merged S/D‑plus‑pixel mask step. The bridging first/second conductive layers ("coupled with a side of the common electrode contact part and an upper surface of the common electrode") find their closest support in Kim's connection pattern through a contact hole.

⚠️ Caveat on Combination A: neither Kim nor Kimura, as I verified them, expressly discloses the wet-etch-Cu-then-leave-TCO-barrier single-mask pixel step, nor a "direct contact part." I cannot, on this record, assert those two elements are expressly taught; they are argued as obvious design choices in §4–§5.

3. Combination B: US 2015/0235585 A1 + US 2011/0024758 A1

Why combine:

1. US 2015/0235585 A1 (Samsung Display) is expressly aimed at "simplifying a manufacturing process by reducing the number of photomasks used when a display device in which a pixel electrode and a common electrode are included on one display panel is manufactured" (verified) — the identical problem statement as this patent.
2. It teaches the exact contact-assistant architecture of claim 1: a first contact hole through two insulating layers exposing an underlying signal electrode; a contact assistant connecting the signal electrode through the hole and contacting an upper surface of the common (first) electrode; and "a third signal electrode positioned below the first insulating layer and separated from the first signal electrode," with the second electrode contacting both signal electrodes through one hole. That maps onto claim 1's first conductive layer (side of com‑CNT + upper surface of common electrode) and second conductive layer (on the D‑CNT), and onto dependent claims 9/10/12 (contact features formed simultaneously).
3. Kimura supplies the unpatterned lower common electrode (claim 2).

Coverage: Combination B supplies nearly the full claim 1 stack including the multi-contact/hole architecture, plus the pixel/common-on-one-panel geometry, with the same cost-reduction motivation.

⚠️ Serious caveat — § 102(b)(2)(C) common ownership. US 2015/0235585 A1 is a US pre-grant publication effectively filed Feb. 18, 2014 (before this patent's Aug. 27, 2014 priority), which makes it prima facie § 102(a)(2) art. But its assignment to Samsung Display Co., Ltd. was recorded with an effective date of June 13, 2014 (verified from the record), i.e., before the critical date — and this patent is also Samsung Display. Under AIA § 102(b)(2)(C), commonly owned subject matter is disqualified as § 102(a)(2) prior art. If common ownership as of Aug. 27, 2014 is confirmed, US 2015/0235585 A1 cannot be used in a § 103 combination here. The same disqualification applies to the sibling publications US 2016/0064414 A1 and US 2016/0064412 A1 (same applicant, same Aug. 27, 2014 priority, listed in the Citations) and to US 2016/0064420 A1, which is this patent's own pre-grant publication. In other words, several of the "Citations" entries are the applicant's own family and are not available as § 103 art — a point worth verifying before this combination is relied on.

4. The "direct contact part" element — why it does not defeat obviousness

The D‑CNT is the feature the specification touts ("implements a narrow bezel by additionally forming the direct contact part (D‑CNT) while maintaining five mask processes"). Its obviousness case:

• The patent's own disclosure makes it a same-mask, same-material duplication of the com‑CNT. The spec says the "common electrode contact part 141 and the direct contact part (D‑CNT) 142 … are also formed of the same material" and "may be formed together with the gate electrode by using photoresist exposed through a first mask." This is the classic KSR rationale (A) — duplicating a known part of the device (a contact land patterned in the gate metal) to obtain a predictable result. Claims 9, 10 and 12 (same material / formed simultaneously / formed simultaneously with the gate electrode) are the direct recitation of that duplication and are the weakest claims in the set.
• Adding a routing/via land in a metal layer is a routine design choice. Kim US 2011/0310341 A1 already forms the gate line and auxiliary contact features in the first mask; US 2015/0235585 A1 provides redundant/duplicate contact features ("a third signal electrode … separated from the first signal electrode"). A PHOSITA seeking to route a signal vertically to shrink the peripheral (bezel) region would add a gate-level pad and a via over it as a matter of ordinary backplane design.
• The stated benefit is a design incentive, not an unexpected result. Narrow bezel / higher aperture are recognized, predictable consequences of moving interconnect into a via rather than routing it laterally — the same incentive Kim and Samsung state ("improve the productivity," "reducing the number of photomasks").

5. The one genuinely contestable limitation: single-mask S/D + TCO-barrier pixel

Claim 1 requires the pixel part to be the same material as the drain's first lower barrier (TCO) and to extend from the drain electrode, with the second/third barriers and metal layers being the same materials as the S/D stack. Framed as method, this is the "deposit Cu/TCO over the pixel, wet-etch only the Cu, leave the TCO barrier as the pixel" step.

• What the record supports (verified): Kim's S/D may be a Cu/ITO multi-layer; Kim's family claims a "dummy transparent conductive layer pattern" left at the side wall (TCO residue after metal etch); Kim's pixel electrode is a TCO layer at the S/D level extending from the drain; Kimura's upper/pixel electrode is a transparent conductive film. Combining these, a PHOSITA would find it obvious to use the barrier TCO as the pixel, because it (i) removes one mask, (ii) requires no new material, and (iii) was already the practice in Cu/TCO FFS stacks.
• What the record does not show on my verification: an express teaching that the pixel and the S/D electrodes are patterned in one mask by selectively wet-etching only the Cu. ⚠️ I could not retrieve full text for US 2013/0119392 A1 (Samsung Mobile Display, OLED — a plausible source for metal/ITO-stack selective etching), US 2011/0050551 A1 (Sony), KR 2012‑0125823 A, or KR 2011‑0040167 A, so I cannot assert they teach it. On this limited record, this is the strongest non‑obviousness argument the patentee could make; it is nonetheless an optimization of a known Cu/TCO stack that a PHOSITA would pursue with a reasonable expectation of success.

6. Dependent claims (2–12) — all likely obvious over the same combinations

7. Counterarguments the patentee could raise, and responses

1. "No reference discloses a direct contact part." — True on verified text. Response: it is a contact land duplicated from the com‑CNT in the same mask with the same material, justified by the same cost/bezel incentive; claims 9/10/12 recite precisely that duplication.
2. "The references each use 5 masks but achieve different structures." — Response: this patent itself sells the result as preserving the existing five masks; the delta over the art is a reallocation of features within the same mask budget, which is a design choice.
3. "Secondary considerations." — Per the earlier section, no litigation, IPR/PGR or assertion of this patent was found, so there is no evidence in the record of copying, licensing, industry praise, or unexpected results. Absent such evidence, the KSR "predictable results" and "design incentive" rationales control.
4. Common-ownership disqualification (my §3 caveat) actually helps the patentee against Combination B; a challenger should therefore lead with Combination A (Kim + Kimura), whose references are third‑party (LG Display and Semiconductor Energy Laboratory), and use the Samsung reference only to show the state of the art/background if it is disqualified as § 102(a)(2) art.

8. Bottom line

• Strongest § 103 combination: Kim US 2011/0310341 A1 (5‑mask FFS, Cu/ITO S/D stack, TCO pixel at the S/D level, bridging connection pattern through a contact hole, passivation) in view of US 2011/0024758 A1 / US 7,872,722 B2 (common electrode below the TFT, whole-surface unpatterned common electrode, express mask/cost-reduction motivation). This renders claims 1–12 obvious, with the caveat that the express "D‑CNT" and the single-mask Cu/TCO pixel step are argued as design choices rather than express disclosures on the text I could verify.
• Secondary combination: US 2015/0235585 A1 + US 2011/0024758 A1 — nearest on the contact-assistant architecture, but likely disqualified by § 102(b)(2)(C) common ownership (Samsung Display, assignment effective June 13, 2014).
• Weakest claims: 9, 10, 12 (simultaneous same-material formation of com‑CNT and D‑CNT) and 11 (bottom surfaces on the insulating layer) — these read directly on the disclosed first-mask step and are close to inherently disclosed by any same-mask gate-metal contact scheme.
• Explicit limits of this analysis: (i) I verified full/abstract text for only three references; characterizations of the Sony, Sharp, and the Korean LG/Samsung references are provisional; (ii) I did not auto-correct any identifier — US 9,871,061 and all cited numbers were treated literally; (iii) the "second conducive layer" typo in granted claim 1 (flagged earlier) does not affect this analysis, as it plainly reads on "conductive."