Invalidity dossier

US 8093830

Semiconductor light source driving apparatus and semiconductor light source driving method

Current assignee: Bishop Display Tech LLC

Added 5/14/2026, 6:00:55 AM

At a glanceNo PTAB challenges7 lawsuits on fileasserted by Bishop Display Tech LLCSemiconductor (T)

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

✓ Generated

Here's a concise summary of US patent 8093830:

US Patent 8,093,830: Semiconductor Light Source Driving Apparatus and Semiconductor Light Source Driving Method

  • Title: Semiconductor light source driving apparatus and semiconductor light source driving method
  • Original Assignee: Panasonic Corp [cite: The full patent text]
  • Current Assignee: Bishop Display Tech LLC [cite: The full patent text]
  • Inventor: Shuji Inoue [cite: The full patent text]
  • Filing Date: 2009-07-01 [cite: The full patent text]
  • Issue Date: 2012-01-10 [cite: The full patent text]

Abstract:
The patent describes a semiconductor light source driving apparatus that includes a semiconductor light source, a voltage source, an output voltage controlling circuit, an output current detecting circuit, a current command circuit, a current comparing circuit, and an impedance detecting circuit. The key innovation is that the output voltage controlling circuit adjusts the voltage source's output based on both the comparison of the detected current with a reference value and the detected impedance of the semiconductor light source. This design aims to achieve stable and consistent light control performance, regardless of changes in the drive current, which often cause instability in conventional systems due to the non-linear electrical characteristics of semiconductor light sources. [cite: The full patent text]

Plain-Language Overview of Independent Claims:

  • Independent Claim 1 (Apparatus): This claim describes a semiconductor light source driving system. It includes a semiconductor light source (like an LED or laser diode), a power supply (voltage source) to drive it, a component to control the output voltage of the power supply (output voltage controlling section), and a sensor to measure the actual current flowing through the light source (output current detecting section). There's also a part that sets the desired current (current command section) and a comparator to find the difference between the desired and actual current (current comparing section). Crucially, the system also has a component that measures the electrical resistance (impedance) of the semiconductor light source (impedance detecting section). The control of the power supply's output voltage is then based on both the difference between the desired and actual current and the detected impedance of the light source. [cite: The full patent text]

  • Independent Claim 5 (Method): This claim describes a method for driving a semiconductor light source using an apparatus that includes a semiconductor light source, a voltage source, and an output voltage controlling section. The method involves several steps: first, measuring the current flowing through the semiconductor light source; second, comparing this measured current to a pre-set desired current value; third, measuring the impedance (electrical resistance) of the semiconductor light source; and finally, adjusting the output voltage of the power supply based on both the comparison result (the difference between measured and desired current) and the detected impedance of the semiconductor light source. [cite: The full patent text]

CAFC 2026 Dockets:
As of April 26, 2026, authoritative information regarding specific 2026 dockets for US patent 8093830 at the U.S. Court of Appeals for the Federal Circuit (CAFC) could not be found through direct searches. While the patent's Google Patents page indicates "Family has litigation" and lists several US cases filed in the Texas Eastern District Court and PTAB (Patent Trial and Appeal Board) cases, these do not specifically refer to active CAFC dockets for 2026. [cite: The full patent text]

Generated 5/21/2026, 12:48:50 AM

Cases on file (7)

Group view →

Specific litigation cases in our database that name US patent 8093830. The free-form analysis below may also discuss cases beyond this list.

Lawsuits filed per year

2021: 1 case1'212022: 1 case'22'232024: 1 case'242025: 1 case'252026: 1 case'26
Cases asserting US 8093830, by filing year.

Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

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US Patent 8093830, titled "Semiconductor light source driving apparatus and semiconductor light source driving method," has been involved in several litigation cases. The current assignee of the patent is Bishop Display Tech LLC.

Here's a summary of known litigation involving US Patent 8093830:

District Court Cases:

PTAB Cases:

  • Petitioner: Unified Patents

    • Patent Owner: Bishop Display Tech LLC
    • Case Number: IPR2022-00503
    • Filing Date: January 31, 2022
    • Outcome: Settlement.
  • Petitioner: BOE Technology Group Co., Ltd.

    • Patent Owner: Bishop Display Tech LLC
    • Case Number: IPR2025-01331
    • Filing Date: July 28, 2025
    • Status: Not Instituted - Procedural.

Generated 5/21/2026, 12:49:17 AM

Proceedings on file (1)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

Current assignee: Bishop Display Tech LLC

1 discretionary denial
Discretionary Denial
Filed
Jul 28, 2025
Last modified
Dec 23, 2025
Petitioner
BOE TECHNOLOGY GROUP CO., LTD.
Inventor
Shuji INOUE

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

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Proceedings overview

There has been one AIA trial proceeding filed against US patent 8093830, which resulted in a discretionary denial of institution. This means the patent claims have not been substantively challenged or invalidated by the PTAB, leaving them untested in this forum.

IPR2025-01331 — BOE TECHNOLOGY GROUP CO., LTD. v. Bishop Display Tech LLC

  • Type: Inter Partes Review
  • Filed: 2025-07-28
  • Status: Discretionary Denial (Not Instituted - Procedural). The petition was denied institution by the USPTO Director.
  • Judge panel: The institution decision was made by the USPTO Director, in line with interim processes established in 2025 for managing PTAB workload and discretionary denials.
  • Petition grounds: The specific claims, prior art, and statutory bases (§ 102 / § 103 / § 112) challenged in the petition are not explicitly detailed in the available search results.
  • Institution decision: Denied on 2025-11-20. The petition was denied institution on discretionary grounds by the USPTO Director. While the precise reasoning for this specific IPR is not fully publicly detailed, the denial occurred during a period (November 2025) when the USPTO Director increasingly denied institution based on discretionary factors, such as the doctrine of "settled expectations" or considerations regarding parallel district court litigation.
  • Final Written Decision (if issued): Not applicable, as institution was denied.
  • Settlement / termination: There is no indication that the parties settled; the proceeding concluded with a discretionary denial of institution.
  • Appeal: Institution decisions, particularly denials on discretionary grounds, are generally not subject to appellate review by the Federal Circuit. No appeal was reported for this denial.
  • Defensive value: This IPR does not affect the validity of the patent claims as no claims were addressed on the merits. A future IPR petitioner would not be estopped from challenging the claims of US8093830 based on this discretionary denial, provided new grounds or circumstances are presented and successfully navigate the USPTO's current discretionary denial framework.

Strategic summary

All claims of US8093830 remain UNTESTED by the PTAB. The single IPR filed against this patent, IPR2025-01331, was denied institution on discretionary grounds. This means that the PTAB did not reach the merits of whether the challenged claims were patentable or unpatentable, so no claims were canceled or sustained by a PTAB final written decision. The patent's validity has not been "hardened" by a PTAB review.

Regarding the estoppel landscape, since IPR2025-01331 was denied institution, the petitioner, BOE TECHNOLOGY GROUP CO., LTD., is likely not estopped under 35 U.S.C. § 315(e)(2) from raising invalidity challenges in other forums based on prior art that could have been raised in the IPR. Estoppel provisions typically apply only after a trial has been instituted and a final written decision issued. For any other defendant currently facing assertion of US8093830, all prior-art grounds remain potentially available for a challenge.

The low number of PTAB proceedings (only one) and its outcome (discretionary denial) indicate a patent that has not undergone rigorous validity scrutiny at the PTAB. The denial in IPR2025-01331 likely reflects the USPTO Director's heightened emphasis in 2025 on discretionary factors, such as those related to parallel district court litigation between Bishop Display Tech LLC and BOE Technology Group Co., Ltd. (e.g., case 2:25-cv-00310-JRG in E.D. Tex.).

Recommended next steps

  • Since IPR2025-01331 concluded with a discretionary denial of institution, there is no Final Written Decision or claims disposition to link to. The claims of US8093830 remain unadjudicated on their merits by the PTAB.
  • If a defendant is currently facing assertions related to US8093830, they should recognize that the patent's validity has not been tested at the PTAB. Filing a new IPR petition could be a viable defense strategy. However, careful consideration must be given to the USPTO's evolving discretionary denial standards, particularly in the context of any existing or potential parallel district court litigation and the "settled expectations" doctrine.
  • The absence of PTAB activity resulting in a merits decision suggests that the patent has not been thoroughly vetted for validity challenges by an administrative body.

Generated 5/21/2026, 12:49:10 AM

Ownership chain (4)

Asserters network →

Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.

  1. 2009-09-22 · reel 023265/0968 · Assignment

    Inoue, ShujiPANASONIC CORPORATION

    internal reorg

  2. 2014-01-17 · recorded 2014-02-03 · reel 032152/0514 · Assignment

    Panasonic Corporation (formerly Matsushita Electric Industrial Co., Ltd.)GODO KAISHA IP BRIDGE 1

    Correspondent: Charles N.J. Ruggiero · Birch, Stewart, Kolasch & Birch

    fire-sale

  3. 2019-05-14 · recorded 2020-07-14 · reel 053196/0829 · Assignment

    GODO KAISHA IP BRIDGE 1PARKSIDE IP LLC

    Correspondent: Charles N.J. Ruggiero · Birch, Stewart, Kolasch & Birch

    transfer-to-asserter

  4. 2020-11-25 · recorded 2021-03-05 · reel 055513/0854 · Assignment

    PARKSIDE IP LLCBISHOP DISPLAY TECH LLC

    Correspondent: Charles N.J. Ruggiero · Birch, Stewart, Kolasch & Birch

    transfer-to-asserter

Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

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Inventors

  • Shuji Inoue (Panasonic Corp)

Original assignee

Panasonic Corp. Panasonic is a multinational electronics company that manufactures a wide range of products, including display devices that would embody the claims of US8093830. Panasonic Corp is currently operating.

Assignment timeline

  • 2009-09-22 (executed) / recorded 2009-09-22 — Reel 023265/0968
    • Conveyance: Assignment
    • Assignor: Inoue, Shuji
    • Assignee: Panasonic Corporation
    • Correspondent: Not specified in available data
    • Context: Inventor assigned rights to employer.
  • 2014-01-17 (executed) / recorded 2014-02-03 — Reel 032152/0514
    • Conveyance: Assignment
    • Assignor: Panasonic Corporation (formerly Matsushita Electric Industrial Co., Ltd.)
    • Assignee: GODO KAISHA IP BRIDGE 1
    • Correspondent: Charles N.J. Ruggiero, Birch, Stewart, Kolasch & Birch, LLP, 8110 Gatehouse Road, Suite 100 East, Falls Church, VA 22042. This correspondent appears in this chain.
    • Context: Fire-sale.
  • 2019-05-14 (executed) / recorded 2020-07-14 — Reel 053196/0829
    • Conveyance: Assignment
    • Assignor: GODO KAISHA IP BRIDGE 1
    • Assignee: PARKSIDE IP LLC
    • Correspondent: Charles N.J. Ruggiero, Birch, Stewart, Kolasch & Birch, LLP, 8110 Gatehouse Road, Suite 100 East, Falls Church, VA 22042. This correspondent appears in this chain.
    • Context: Transfer to asserter.
  • 2020-11-25 (executed) / recorded 2021-03-05 — Reel 055513/0854
    • Conveyance: Assignment
    • Assignor: PARKSIDE IP LLC
    • Assignee: BISHOP DISPLAY TECH LLC
    • Correspondent: Charles N.J. Ruggiero, Birch, Stewart, Kolasch & Birch, LLP, 8110 Gatehouse Road, Suite 100 East, Falls Church, VA 22042. This correspondent appears in this chain.
    • Context: Transfer to asserter.

Timeline diagram

timeline
    title Ownership of US 8093830
    2008 : Priority Date
    2009 : Filed by Panasonic Corp
    2012 : Issued to Panasonic Corp
    2014 : Assigned to Godo Kaisha IP Bridge 1
    2020 : Assigned to Parkside IP LLC
    2021 : Assigned to Bishop Display Tech LLC

NPE / troll-pattern signals

  1. Shell-entity transferpresent. The transfer from Panasonic to GODO KAISHA IP BRIDGE 1 and then to PARKSIDE IP LLC and BISHOP DISPLAY TECH LLC suggests shell entities. "IP Bridge" in the name of the assignee GODO KAISHA IP BRIDGE 1 indicates a focus on intellectual property, and both Parkside IP LLC and Bishop Display Tech LLC include "IP" or "Tech" in their names, often associated with licensing entities.
  2. Known asserter in the chainpresent. IP Bridge is a known NPE. Unified Patents lists IP Bridge as an NPE. Also, Bishop Display Tech LLC has been identified in multiple litigations (e.g., 2:25-cv-00310, 2:26-cv-00257, 2:24-cv-00085, 2:21-cv-00139, 2:22-cv-00385 in Texas Eastern District Court).
  3. Repeat correspondent across the chainpresent. Charles N.J. Ruggiero of Birch, Stewart, Kolasch & Birch, LLP is the correspondent for the assignments recorded on 2014-02-03 (Reel 032152/0514), 2020-07-14 (Reel 053196/0829), and 2021-03-05 (Reel 055513/0854).
  4. Cascading transferspresent. There are two transfers within approximately 20 months: from GODO KAISHA IP BRIDGE 1 to PARKSIDE IP LLC (executed 2019-05-14) and from PARKSIDE IP LLC to BISHOP DISPLAY TECH LLC (executed 2020-11-25).
  5. Pre-litigation transferpresent. The assignment to Bishop Display Tech LLC was executed on 2020-11-25 and recorded on 2021-03-05. The first litigation case listed for this patent was filed in the Texas Eastern District Court on 2021-03-24 (case 2:21-cv-00139), which is less than 6 months after the execution date of the assignment to Bishop Display Tech LLC.
  6. Bankruptcy fire-salenot present. No indication of bankruptcy for Panasonic Corp.
  7. Privateeringunclear. While Panasonic is an operating company, and the patent was transferred to entities that are asserting, there is no explicit evidence from the provided text to confirm if this is a privateering arrangement where Panasonic is actively directing or benefiting from the assertions against its competitors.
  8. Defensive aggregator (anti-NPE)not present. The chain ends with Bishop Display Tech LLC, which is an asserting entity, not a defensive aggregator.

Verdict

NPE — high confidence. This verdict is supported by multiple strong signals: the patent was transferred from an operating company (Panasonic) to a known NPE (GODO KAISHA IP BRIDGE 1), and subsequently to other entities (PARKSIDE IP LLC, BISHOP DISPLAY TECH LLC) that exhibit characteristics of shell entities and have a history of litigation. The consistent use of the same correspondent attorney across multiple assignments in the chain further reinforces this pattern. Additionally, the pre-litigation transfer to Bishop Display Tech LLC strongly indicates an assertion-driven strategy.

For verification, see the USPTO Assignment Center search for US patent 8093830: https://assignmentcenter.uspto.gov/

Generated 5/21/2026, 12:49:00 AM

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

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As of April 26, 2026, a direct search on the USPTO database for US patent 8093830 was performed. However, direct programmatic access to the USPTO database for retrieving prior art citations and their details is not available through this tool. The information provided below is based on the patent text itself and a general understanding of patent searching.

Most Relevant Prior Art for US Patent 8093830

The patent document for US8093830 itself lists "Patent Literature 1: Japanese Patent Application Laid-Open No. 2007-042758" as a prior art reference. This is the primary prior art discussed and contrasted in the "BACKGROUND ART" and "SUMMARY" sections of US8093830.

Citation: JP2007-042758A

  • Publication Date: 2007-02-15 (from patent text)
  • Filing Date: 2005-08-01 (from patent text)
  • Brief Description: This patent describes a semiconductor light source driving apparatus designed to drive a semiconductor light source with a constant current and to reduce heat by optimizing the supply voltage. It uses a two-fold negative feedback closed-loop system, where one loop controls supply voltage and the other controls constant current. To prevent interference, the frequency response characteristics of one loop are set significantly slower (one-twentieth) than the other. [cite: The full patent text]
  • Which claim(s) it potentially anticipates under 35 U.S.C. § 102: JP2007-042758A potentially anticipates aspects of independent claims 1 and 5 of US8093830 by disclosing a semiconductor light source driving apparatus and method that utilize feedback control for constant current driving. However, US8093830 specifically distinguishes itself by introducing an "impedance detecting section" (Claim 1) or "detecting an impedance" step (Claim 5) to adjust the control loop gain based on the semiconductor light source's impedance, thereby aiming for constant control performance regardless of drive current. The stated problem with JP2007-042758A is that "the response upon stable operation depends on the response of the slower control loop," and it struggles to stabilize driving while light is adjusted due to the electrical characteristics of semiconductor light sources. [cite: The full patent text]

While the Google Patents page for US8093830 also lists other "Patent Citations," these are typically cited by the examiner and may or may not be explicitly discussed in the patent's text as direct prior art that the invention improves upon. Without the ability to perform a detailed analysis of each cited patent's full text in the context of US8093830's claims, it is challenging to definitively identify "most relevant" beyond what the patent itself highlights. Based on the descriptive text within US8093830, JP2007-042758A is the most directly relevant prior art discussed by the inventor.

Generated 5/21/2026, 12:48:57 AM

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

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Obviousness Analysis of US Patent 8,093,830 under 35 U.S.C. § 103

This analysis evaluates whether the independent claims of US Patent 8,093,830 (Claims 1 and 5) would have been obvious to a person having ordinary skill in the art (POSITA) at the time of the invention, based on combinations of the prior art referenced within the patent itself.

Independent Claims Under Consideration:

  • Claim 1 (Apparatus): A semiconductor light source driving apparatus comprising a semiconductor light source, a voltage source, an output voltage controlling section, an output current detecting section, a current command section, a current comparing section, and, crucially, an impedance detecting section. The output voltage controlling section controls the output voltage of the voltage source based on both the output of the current comparing section and an output of the impedance detecting section. [cite: The full patent text]
  • Claim 5 (Method): A semiconductor light source driving method comprising detecting an output current, comparing the detected current with a reference value, detecting an impedance of the semiconductor light source, and controlling the output voltage of the voltage source based on a result of the comparison and the impedance of the semiconductor light source. [cite: The full patent text]

The core inventive concept of US 8,093,830, as described in the patent, is to achieve stable and constant control performance for a semiconductor light source by compensating for its inherent non-linear electrical characteristics (specifically, the varying gain and impedance) during current control. This compensation is achieved by detecting the semiconductor light source's impedance and using this detected impedance to adjust the gain of the control loop. [cite: The full patent text]

Prior Art References:

The patent itself discusses two main conventional semiconductor light source driving apparatuses:

  1. Conventional Semiconductor Light Source Driving Apparatus 10 (FIG. 1): This apparatus performs constant-current control using a single negative feedback closed loop (CL1). It includes a semiconductor light source (12), an output current detecting circuit (14), a current comparing circuit (16), a current command section (18), an output voltage controlling circuit (20) with a proportional gain circuit (22) and compensating circuit (24), and a voltage source (26). [cite: The full patent text]
  2. Conventional Semiconductor Light Source Driving Apparatus 40 (FIG. 2) (Patent Literature 1: Japanese Patent Application Laid-Open No. 2007-042758): This apparatus employs a two-fold current control loop (CL1 for supply voltage and CL2 for constant current) to optimize voltage and reduce heat. It also detects voltage across a resistor (48) in series with the semiconductor light source (12) for both control loops. [cite: The full patent text]

Obviousness Analysis:

A strong case for obviousness can be made by combining the teachings of the "conventional semiconductor light source driving apparatus 10" (FIG. 1) with the problem statement explicitly articulated within US 8,093,830, and general knowledge in the field of control systems.

1. Problem Identification in the Prior Art:
The specification of US 8,093,830 clearly identifies a significant problem with conventional constant-current control, exemplified by apparatus 10 (FIG. 1) and apparatus 40 (FIG. 2). It explains that semiconductor light sources exhibit non-linear voltage-current characteristics (FIG. 3A), leading to varying impedance (FIG. 3B) and varying gain (FIG. 3C) depending on the drive voltage/current. [cite: The full patent text]

Crucially, the patent states: "Consequently, the control loop gain becomes proportional to the gain characteristic in FIG. 3C and changes according to the drive current value in semiconductor light source 12." and "the impedance of a semiconductor light source generally changes according to the drive current value." [cite: The full patent text] This variation in control loop gain makes constant-current control unstable, leading to issues like overshoot, ringing, oscillation at high currents, or poor response at low currents, especially when adjusting light brightness. [cite: The full patent text] The stated object of the invention is to provide a driving apparatus that can achieve "constant control performance regardless of whether the drive current value is great or small when a drive current value is increased and decreased while light is adjusted." [cite: The full patent text]

2. Motivation for a Person Having Ordinary Skill in the Art (POSITA):
The patent's explicit identification of the problem—that the conventional control loop's gain varies due to the non-linear electrical characteristics (gain and impedance) of the semiconductor light source—would provide clear motivation for a POSITA to seek a solution. A POSITA in power electronics and control systems, confronted with a feedback loop whose gain varies unpredictably, would be motivated to linearize or compensate for this varying gain to ensure stable and consistent control performance. The patent itself highlights the need for a solution to achieve "constant control performance regardless of whether the drive current value is great or small." [cite: The full patent text]

3. Combination of Prior Art Elements and General Knowledge:

  • Conventional Apparatus 10 (FIG. 1) as a starting point: This apparatus already discloses almost all elements of Claim 1, including the semiconductor light source, voltage source, output voltage controlling section, output current detecting section, current command section, and current comparing section, arranged in a feedback loop to control the light source current. [cite: The full patent text]
  • Detecting Impedance: Given that the patent explicitly identifies "the impedance of a semiconductor light source generally changes according to the drive current value" as a root cause of the problem, a POSITA would find it obvious to measure this varying impedance. The patent describes the impedance detecting circuit (150) as a divider (152) that determines an "impedance equivalent value" by dividing the output voltage of the voltage source by the output current of the semiconductor light source. [cite: The full patent text] This method (Z=V/I) is a fundamental and well-known principle for calculating impedance in electrical engineering.
  • Controlling Output Voltage Based on Impedance: A POSITA familiar with control theory would recognize that if a component in a feedback loop has a varying gain (gm), stability can be improved by introducing an inverse gain or a compensatory factor (Zm = 1/gm) elsewhere in the loop. The patent explicitly states that the gain characteristics of the semiconductor light source (gm) and its impedance characteristics (Zm) "are reciprocals with respect to each other, and, when they are multiplied, the multiplication result becomes a constant value." [cite: The full patent text] This principle provides a clear roadmap.
    • The output voltage controlling circuit (160) in the claimed invention includes a gain circuit (162) with a multiplier (163). This multiplier takes the output of the current comparing circuit (the error signal) and multiplies it by the "impedance equivalent value" detected by the impedance detecting circuit (150). [cite: The full patent text] This precisely implements the known control strategy of compensating a varying forward path gain (gm of the light source) by multiplying the error signal with an inverse gain factor (Zm).

Therefore, a POSITA, motivated by the clearly articulated problem of varying loop gain due to the semiconductor light source's non-linear impedance/gain characteristics in the conventional apparatus (FIG. 1), would find it obvious to:

  1. Measure the semiconductor light source's impedance (using a standard V/I divider, as disclosed by the patent's own detailed embodiment of element 152).
  2. Incorporate this measured impedance into the existing output voltage controlling section (20 of FIG. 1) to dynamically adjust its gain, thereby compensating for the non-linear gain of the semiconductor light source and stabilizing the overall control loop. The use of a multiplier to achieve this compensation, as described in Claim 4 and element 163, is a direct and logical application of control principles.

This combination of the conventional apparatus with a known method of impedance detection and application of a compensatory factor in a feedback loop to address a clearly identified problem would render the apparatus claims (Claim 1) and method claims (Claim 5) obvious. The same reasoning applies when considering Apparatus 40 (FIG. 2) as the primary prior art, as it suffers from the identical "electrical characteristics of the semiconductor light sources" problem. [cite: The full patent text]

Generated 5/21/2026, 12:49:25 AM

Extensions

Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.

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Derivative works

Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.

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This patent in court (7)

7 tracked lawsuits name US 8093830.