US 7868367

I'll search for the specific patent number and any related litigation/docket information.

Let me run two more targeted checks for litigation/docket activity and the USPTO record.

US Patent 7,868,367 — Verification Summary

Search scope note: I searched Google Patents, FreePatentsOnline, Justia Patents, and general web for the exact number 7,868,367 (not similar numbers such as 7,868,317 or VLSI's unrelated '836 patent, which surfaced in a 2026 Federal Circuit opinion — see caveat below). I could not query the USPTO's legacy PatFT directly (retired) or Patent Center's authenticated docket view; the bibliographic data below is corroborated across Google Patents, FPO, and Justia.

Bibliographic data

Abstract (verbatim substance)

A system and method for sensing an image on CMOS. A CMOS image sensing pixel includes an n-type substrate (first width and thickness), a p-type epitaxy layer overlying the n-type substrate (second width and thickness, the second width associated with one or more characteristics of a colored light), an n-type layer overlying the p-type epitaxy layer (third width and thickness), a pn junction formed between the p-type epitaxy layer and the n-type layer, and a control circuit coupled to the pixel.

Plain-language overview of the independent claims

Claim 1 — CMOS image sensing pixel (apparatus). A vertical stack: an n-type substrate at the bottom; a p-type epitaxy layer on top of it; an n-type layer on top of the p-type layer; and a pn junction at the p-type/n-type layer interface, plus a control circuit coupled to the pixel. The distinguishing feature is that the second width of the p-type epitaxy layer includes an adjustable depletion region between the n-type substrate and the p-type epitaxy layer, and that depletion region is tied to the characteristics of colored light. In plain terms: reverse-biasing the substrate changes the depth/width of the far-side depletion region, and that acts as a "valve" determining which colors' carriers reach the active pixel — the color-selection mechanism.

Note on prosecution: the granted claim 1 adds the "adjustable depletion region between the n-type substrate and the p-type epitaxy layer" limitation. The published pre-grant claim 1 (US 2009/0152604 A1) lacked it, reciting only "the second width being associated with one or more characteristics of a colored light." This is a narrowing amendment worth flagging for any validity analysis.

Claim 12 — Image sensing pixel (apparatus, silicon-specific). An n-type silicon substrate, a p-type silicon layer overlying it, an n-type silicon layer overlying that, a pn junction between the p-type and n-type silicon layers, and — the point of novelty — a silicon germanium layer located inside the p-type silicon layer, positioned away from the pn junction. The SiGe layer boosts absorption of longer-wavelength (red) light without introducing an additional junction. (Claims 13–14 add that it is free of pn junctions and configured for red-light absorption.)

Claim 15 — Image sensing pixel device (apparatus). Three separate photodiodes (first/second/third), each with its own p-type region and n-type region forming a pn junction overlying its own n-type substrate, sharing a common terminal coupled to all three n-type regions. Each photodiode's n-type substrate receives its own independent bias voltage (claims 17–19 map these to blue, green, and red absorption respectively). This is a multi-pixel/multi-bias arrangement rather than the single stacked pixel of claim 1.

Litigation / CAFC 2026 docket check

No results. I found no Federal Circuit docket, district court complaint, or ITC proceeding involving US 7,868,367 in 2026 or any other year. Google Patents lists no litigation events for this patent; its citation tables show only patent-family and third-party citations (e.g., Artilux, Boly Media, Microsemi documents citing the family), which are prior-art citations, not lawsuits.

⚠️ Do not conflate: a 2026 Federal Circuit opinion locating "the '836 patent" in VLSI Technology LLC v. Intel Corp. appeared in search results. That '836 patent is not US 7,868,367; the number coincidence is superficial. I am flagging it only so it is not mistaken for activity on this patent.

Uncertainty / confidence

• High confidence on title, assignee, inventors, filing/priority/issue dates, claim set, and claim text — corroborated by the full patent document you supplied plus Google Patents, FPO, and Justia.
• Medium confidence on "active" legal status as of today: status derives from Google Patents' automated legal-status field and the last recorded maintenance-fee payment (12th year, 2022). I could not verify current fee status or any post-2022 reassignment/reexamination directly against the USPTO register.
• Explicitly unknown: I cannot confirm whether any unreported or very recent (post-search-index) 2026 litigation exists; my docket search returned nothing, so treat the "no litigation" finding as a negative search result rather than an affirmative clearance.

I'll search for litigation involving US patent 7868367.

The first result concerns U.S. Patent 9,843,786 — a different patent. Let me search more specifically for 7,868,367.

No direct hits yet. Let me try more targeted queries, including the court portals and Google Patents litigation data.

Summary of Search Results

I found no litigation involving U.S. Patent 7,868,367 in the sources I was able to search.

Patent verified (to confirm we are looking at the right asset)

• U.S. Patent No. 7,868,367 B2 — "System and method for CMOS image sensing"
• Application No. 12/136,568; filed June 10, 2008; granted January 11, 2011
• Priority: Chinese Application 200710094550.4, Dec. 13, 2007
• Inventors: Hong Zhu, Jim Yang
• Owner/Assignee: Semiconductor Manufacturing International (Shanghai) Corporation (SMIC)
• Family includes US 8,023,540; US 8,383,444; US 8,404,510, and CN 101459184B

Litigation

There are no district court, ITC, or PTAB proceedings identifying US 7,868,367 that appeared in any of my searches. Only the patent's own prosecution/grant documents and its continuation/divisional family (US 8,023,540, US 8,383,444, US 8,404,510) appeared. This is consistent with SMIC being a foundry that generally has not asserted this particular patent (it appears in the record only as a cited reference within its own family).

Important caveat — do not confuse with a different patent

A search result for the query "7868367" surfaced U.S. Patent No. 9,843,786 (the "'786 patent"), which is a different patent number and must not be reported here. That patent is asserted by General Video, LLC against Dell, HP, ASUSTeK, and Lenovo in W.D. Tex./E.D. Tex. (Case Nos. 1-24-cv-01530; 5-24-cv-00123; 5-24-cv-00126; 5-23-cv-00122). Those cases involve 9,843,786 — not 7,868,367 — and I explicitly exclude them from the answer above.

Limitations on this search

My conclusion is based only on publicly indexed web search results. I was not able to query the paywalled/portal litigation databases directly:

• Unified Patents litigation portal (portal.unifiedpatents.com/litigation/caselist)
• PACER / CourtListener / Docket Navigator
• The ITC EDIS system

A truly definitive "no litigation" conclusion requires checking those databases directly. If you want, I can run a more targeted pass against a specific one of those systems (e.g., a CourtListener or Unified Patents query by patent number) — but based on the searches performed, no litigation involving US 7,868,367 is known.

I'll verify the structured "no PTAB activity" default with targeted searches before reporting.

No proceedings surfaced. Let me run additional targeted checks on PTAB E2E/PTAB references and any assertion activity involving the patent.

Confirming no family-member proceedings exist either (a common indirect signal).

Proceedings overview

Total AIA trial proceedings on file for US 7,868,367: 0 — zero IPRs, zero PGRs, zero CBM reviews; the USPTO Open Data Portal ingest returns no AIA trial proceedings, and my independent web checks (Google Patents litigation/PTAB tables, PTAB petition-document indexes, docket-aggregator hits, and searches on the three divisional children US 8,383,444 / US 8,026,540 / US 8,404,510) surfaced nothing to the contrary. Breakdown by status is therefore all-zeros: 0 active, 0 claims invalidated, 0 claims sustained, 0 settled, 0 institution denials.

Defensive posture for a defendant: this is not a "hardened by PTAB" patent and not a "claims already canceled" patent — it is an untested patent. Every one of the 19 issued claims stands as granted, and there is no FWD, no estoppel, and no Board claim construction anywhere in the record to leverage. The practical consequence is double-edged: no free kill-shot exists, but the full prior-art universe remains available to you because no petitioner has ever burned a ground, and § 315(e)(2) estoppel is entirely absent.

{No proceedings to profile}

Because the canonical proceedings list is empty, no per-proceeding entries (type, panel, institution decision, FWD, appeal) can be reported. I will not manufacture proceeding numbers. For completeness, here is what I affirmatively checked and what I found:

Two explicit cautions:

1. Do not confuse "836" numbers. The prior section already flagged a 2026 Federal Circuit opinion involving "the '836 patent" in VLSI Technology LLC v. Intel Corp. VLSI's patents have extensive PTAB histories, so a keyword search for "836 PTAB" will drown you in irrelevant VLSI IPRs. None of them involve US 7,868,367. Likewise, US 7,868,367 is not the "'379," "'444," "'868," or "'366" patents appearing in the unrelated hits above.
2. Negative search result, not affirmative clearance. My conclusion is that the ODP register shows no AIA trial and my indexing could not surface one. I cannot rule out a very recent filing not yet ingested, or a proceeding filed under a related application number that I did not match. Verify against PTAB E2E directly before relying on this for a filing deadline or a § 325(d) / § 315(e) argument.

Strategic summary

Claim status — all 19 claims are UNTESTED. Nothing has been canceled, narrowed by the Board, or disclaimed in any AIA trial. That means the full granted claim set is live: independent claim 1 (with the post-prosecution narrowing limitation reciting the "adjustable depletion region between the n-type substrate and the p-type epitaxy layer" — see the flagged amendment from the pre-grant publication US 2009/0152604 A1), independent claim 12 (the SiGe-layer-away-from-the-pn-junction pixel), independent claim 15 (the three-photodiode, three-independent-bias device), and their dependent claims. Note also that the three divisional children are separately enforceable patents with their own claim sets (color-determination method; formation method; and a second system claim), so challenging only 7,868,367 leaves the family mortar intact.

Estoppel landscape — a clean field, for now. No petitioner has invoked IPR or PGR, so 35 U.S.C. § 315(e)(2) estoppel binds no one and no ground has been surrendered or "reasonably could have been raised" by anyone. Every § 102/§ 103 combination, every § 112 theory, and every piece of art — including the 36 references already of record (Foveon vertical-color-filter patents, US 5,965,875, Sharp's triple-junction filterless imager, US 7,419,844, and the rest) — remains fully available. That cuts both ways: your opponent cannot point to a surviving FWD as validation, but you also cannot point to an invalidating FWD as a safe harbor. The prior-art efficiency argument here would be a straightforward § 325(d) risk if you lead with art already cited on the face of the patent, so a petition should be built on art the Examiner never substantively evaluated.

Pattern signals — none to read. There is no repeat petitioner, no serial-challenge dynamic, and no defensive aggregator visible in the chain (no Unified Patents or RPX filing identified). SMIC has not had to defend this family at the Board and has shown no appetite for PTAB appellate practice on it. The absence is itself informative: a 2011-issued, 2028-expiring patent that has been in force for roughly 15 years and has never drawn a single IPR petition is a strong empirical signal that the asset has not been aggressively asserted against well-resourced defendants — or that its claims, while narrow, are not seen as commercially dangerous. That said, if you are the first to file, be aware that the current institution-policy landscape is unsettled: recent USPTO practice has layered discretionary considerations on top of the merits (including so-called "settled expectations" weighing the length of time a patent has been in force). A 15-year-old patent on the eve of expiry is exactly the fact pattern those discretionary factors were designed to address, though the doctrine's precise scope rests on secondary-source reporting and should be verified against current Board and Director guidance before you build a petition strategy around it.

Recommended next steps

• If there is no PTAB activity, say so plainly — and treat it as your starting premise. There is no FWD to quote and no disposition to link, because none exists. Any demand letter asserting claims 1, 12, or 15 is asserting claims that have never been tested for validity in any adversarial forum.
• Verify the null set yourself before you rely on it. Run PTAB E2E on all four family applications — US 12/136,568 and the three divisionals (12/953,410, 12/953,417, 12/953,414) — plus the Chinese counterpart CN101459184B. Direct links: PTAB E2E patent search at https://ptacts.uspto.gov/ptacts/public-informations/patent-search; PTAB decisions at https://www.uspto.gov/patents/ptab/decisions; Federal Circuit dispositions via CourtListener at https://www.courtlistener.com/. Cross-check https://patents.google.com/patent/US7868367/en for any litigation/PTAB event that has appeared since my fetch.
• Budget your IPR clock if you intend to challenge. Filing is § 315(b)-time-barred at one year from service of an infringement complaint on you. Because the patent has never been challenged and the art is untouched, you have a genuinely open runway — but you also have no room for a "second bite," so the petition must be complete on the first pass, with every ground and every claim you may want (including the dependent claims and, separately, the divisional claims) fully developed.
• Consider forum sequencing. For a 15-year-old patent facing no prior adjudication, a defendant's realistic toolset is (a) a first-instance IPR petition built on art the Examiner never evaluated, and/or (b) district-court invalidity under §§ 102/103/112 — keeping in mind that a "no prior proceeding has ever considered these claims" narrative is currently a favorable rather than adverse position for a challenger seeking institution.
• Flag for the client, not the record: my "no PTAB activity" finding is a negative result from indexed sources, not an affirmative USPTO register clearance. State it as such in any opinion letter.

Confidence: High that no PTAB proceeding appears in the ODP ingest or in indexed sources. Medium that none exists at all today, for the ingestion-lag reason above. I have invented no proceeding numbers, judges, or outcomes; where the record is empty, I have said so rather than filling it.

I'll research the assignment record for US 7,868,367, checking the USPTO Assignment Center and cross-referencing legal events.

Let me verify the assignment records and check for any post-issuance transfers.

Let me confirm the correspondent of record and check for any additional assignments.

I have the essential record from the patent's own legal-events data plus corroborating indexes. I was unable to open the authenticated USPTO Assignment Center reel images directly, but the recorded assignment(s) and dates are consistent across Google Patents' legal-events table, Justia/FPO, and a third-party patent database. Here is the reconstruction.

Inventors

• Both are listed as Shanghai residents (Justia: "Zhu Hong (Shanghai), Jim Yang (Shanghai)").
• Both assigned their rights to the assignee before filing — the assignment was executed 2007-08-22 to 2007-09-03, i.e., prior to both the CN priority filing (2007-12-13) and the US filing (2008-06-10). This is the standard inventor→employer pre-filing assignment used for Chinese-origin corporate filings.
• Pattern note: No unusual inventor-attrition pattern is visible. There is no evidence either inventor departed SMIC within 12 months of filing, and, more importantly, no subsequent assignment of the patent away from SMIC ever occurred — so there is no "inventors leave → portfolio fire-sale" signature here. (I could not independently verify either inventor's employment history beyond the filing; treat the departure point as no evidence either way, not as a confirmed negative.)

Original assignee

Semiconductor Manufacturing International (Shanghai) Corporation (SMIC) — the entity named on the issued patent.

• Primary line of business: pure-play semiconductor foundry (wafer fabrication), China's largest contract chipmaker; publicly listed (HKEX 0981; SSE STAR Market 688981).
• Did they ship a product embodying the claims? SMIC is a foundry service provider, not a camera/module vendor. As confirmed by its own SEC-registration-era prospectus language, SMIC offers "specialty technologies, including LCoS, and CIS" (CMOS image sensor) as part of its foundry technology portfolio — i.e., it practices CIS process technology in the ordinary course of its foundry business, rather than selling a standalone imager product. This is the closest available ground for an "operating company" characterization. [SMIC prospectus PDF, smics.com]
• Current status: Operating. SMIC continues to file and be granted US patents (third-party PatentsView aggregation shows ~1,373 granted US patents with activity through 2025) and is actively divesting peripheral equity stakes to "focus on core operations" (e.g., the 2024–2025 sale of its Ningbo Semiconductor International stake). No bankruptcy, dissolution, or acquisition of the entity.

Assignment timeline

Chronological list of every recorded assignment:

• 2007-08-22 to 2007-09-03 (executed) / recorded 2008-06-12 — Reel 021088/0642

  • Conveyance: Assignment ("ASSIGNMENT OF ASSIGNORS INTEREST")
  • Assignor: Hong Zhu; Jim Yang (the two named inventors, as individuals)
  • Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
  • Correspondent: Townsend and Townsend and Crew LLP (now Kilpatrick Townsend & Stockton LLP) — medium confidence. This firm name appears as the agent/correspondent of record alongside the assignee in an indexed patent record; I could not open the reel image itself to confirm the attorney name, so treat the attorney-of-record as unverified. Flagging it because the task asks for it: this is a general-practice IP firm, and it appears exactly once (the original filing assignment), so it is not a repeat-player NPE correspondent. No recurrence across the chain exists to flag.
  • Context: Original inventor-to-employer assignment, executed pre-filing — routine for a Chinese-origin corporate filing; not an acquisition, fire-sale, reorg, securitization, or transfer-to-asserter.

• (No other assignment is recorded.) Google Patents' legal-events table for US 7,868,367 shows only the 2008-06-12 assignment entry (it lists that same reel/frame 021088/0642 twice, which appears to be a duplicate index entry rather than two separate conveyances). Every event after that is administrative: 2010-12-22 patent grant (STCF); 2014-06-11 4th-year fee (FPAY); 2018-06-28 8th-year maintenance fee; 2022-06-29 12th-year maintenance fee. No post-issuance transfer of any kind.

Bottom line on the record: There is exactly one recorded assignment, and it is the original grant from the inventors to SMIC (Shanghai). The patent has never left the original operating assignee. Current owner = Semiconductor Manufacturing International (Shanghai) Corporation. The three divisional children (US 8,383,444; US 8,026,540; US 8,404,510) likewise remain SMIC-owned per their family records.

Timeline diagram

timeline
    title Ownership of US 7868367
    2007 : Inventors sign assignment to SMIC
    2008 : Assignment recorded reel 021088/0642
         : US application filed
    2011 : Patent issued to SMIC Shanghai
    2014 : 4th year maintenance fee paid
    2018 : 8th year maintenance fee paid
    2022 : 12th year maintenance fee paid
    2028 : Anticipated expiration

NPE / troll-pattern signals

1. Shell-entity transfer — Not present. The only assignment runs to the original operating assignee; there is no transfer to an "IP / Patents / Licensing / Holdings / Ventures" entity. No registered-agent-service address or single-purpose LLC appears anywhere in the record (reel 021088/0642 is inventor→SMIC, the opposite direction of a shell transfer).

2. Known asserter in the chain — Not present. The sole assignee, SMIC (Shanghai), appears on none of the named NPE lists (Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Spangenberg entities, etc.). It is a large, publicly listed foundry, not an assertion vehicle.

3. Repeat correspondent across the chain — Not present (and largely inapplicable). With only a single recorded assignment, there is no chain over which a correspondent could recur. The correspondent of record (Townsend and Townsend and Crew LLP, per the indexed record — medium confidence) appears exactly once and is a mainstream full-service IP firm that represents operating companies, so a single appearance is not a finding.

4. Cascading transfers — Not present. Zero post-issuance transfers; nothing resembling chained LLC transfers in under 24 months.

5. Pre-litigation transfer — Not present. No assignment within 6 months (or at all) before any infringement suit, because no infringement suit naming this patent was found in the prior docket check. The lone assignment predates issuance by roughly 2.5 years and is the original filing assignment.

6. Bankruptcy fire-sale — Not present. SMIC has not filed for bankruptcy or been the subject of a patent-sale-in-proceedings event; its recent asset sales (e.g., Ningbo Semiconductor International stake, 2024–2025) are equity divestitures, not patent fire-sales, and did not touch this patent.

7. Privateering — Not present. No operating-company→NPE transfer exists to characterize as privateering; the patent has stayed with SMIC throughout.

8. Defensive aggregator (anti-NPE) — Not present. The chain does not terminate at RPX, AST, LOT, Unified Patents, or OIN. The patent is simply retained by its original corporate owner.

Verdict

Insufficient data (no records beyond the original assignment).

Justification: The only recorded conveyance is the original inventor→employer assignment executed 2007-08-22 to 2007-09-03 and recorded 2008-06-12 at reel 021088/0642; there are no post-issuance assignments, no shell-entity transfer, no known asserter, no cascading transfers, and no litigation. That absence is itself the finding: US 7,868,367 remains owned by its original operating assignee, Semiconductor Manufacturing International (Shanghai) Corporation, which is an active (non-bankrupt, non-dissolved) operating company — so none of the eight NPE/troll signals is triggered. This is a "clean, single-owner operating-company patent" pattern, not an NPE pattern. (The formal verdict category for a patent with only its original assignment is Insufficient data; the substantive read is non-asserting operating-company ownership.)

Verification link: Search patent number 7868367 at the USPTO Assignment Center — https://assignmentcenter.uspto.gov/ (mirror index: https://assignment.uspto.gov/patent/index.html). Google Patents legal events for this patent: https://patents.google.com/patent/US7868367/en.

Caveats / confidence:

• High confidence on the single-assignment finding and its reel/frame (021088/0642) and execution/recording dates — sourced directly from the patent's own Google Patents legal-events table and corroborated by FPO/Justia/Tianyancha.
• Medium confidence on the correspondent of record (Townsend and Townsend and Crew LLP): it appears in an indexed record but I could not open the reel image to confirm the recording attorney's name. Do not treat this firm as an NPE correspondent — it appears only once.
• Explicitly unknown: I did not access the authenticated USPTO Assignment Center docket view; the "no other assignments" conclusion is based on the corroborated public legal-events record and should be read as a strong negative search result rather than a definitive clearance. I found no evidence of any transfer to a non-practicing entity, and no litigation involving this patent.

I'll search for the USPTO record of US 7,868,367 and then examine its cited prior art.

Let me verify the content of the most technically relevant cited references.

Prior-Art Analysis — US 7,868,367 B2

Record confirmed (per authoritative patent text supplied): US 7,868,367 B2, "System and method for CMOS image sensing," App. No. 12/136,568, filed 2008-06-10, priority to CN 200710094550 (2007-12-13), granted 2011-01-11, assignee Semiconductor Manufacturing International (Shanghai) Corp. Inventors Hong Zhu and Jim Yang. 19 claims; independent claims 1 (single stacked CMOS pixel with an adjustable depletion region between the n-type substrate and the p-type epitaxy layer), 12 (SiGe layer inside the p-type silicon layer, away from the pn junction), and 15 (three separate photodiodes, each over its own n-type substrate with an independent bias voltage).

Search-scope note / caveat. I confirmed the bibliographic record against Google Patents, FreePatentsOnline, Justia, and USPTO-report aggregators. I could not query the USPTO PatFT (retired) or authenticated Patent Center docket. Critically, the citation tables below are transcribed from the authoritative patent document you supplied, not independently re-pulled from the USPTO "References Cited" pane — so treat the list as reliable and the per-reference §102 characterizations as my analysis.

A threshold point that shapes everything below: the citation list is an examiner/applicant list of references considered ("References Cited"), not a set of anticipatory rejections. Under 35 U.S.C. § 102, a single reference must disclose every element of a claim as arranged. As shown below, no single cited reference appears to anticipate granted claims 1, 12, or 15 in full. Most of these references are § 103 (obviousness) material or § 102 art against narrower dependent claims. I flag the theoretical § 102 targets, but I will not overstate them.

A. The cited patent references (36 in the "Patent Citations" table)

Citation key: [B] = published/filed before the 2007-12-13 priority date (eligible § 102(a)/(b) or § 102(e) art); (e) = U.S. document whose filing date is the operative prior-art date under pre-AIA § 102(e); (post) = published after the priority date, qualifies only via earlier filing.

Non-patent citation (1): Office Action of Chinese Application No. 200710094550.4, dated Oct. 9, 2009 (7 pp.; English translation not included). Not prior art — it is the prosecution history of the priority CN case.

B. § 102 anticipation assessment — bottom line

No cited reference anticipates granted claim 1, 12, or 15 as a whole. The three potential § 102 footholds, and why each falls short, are:

1. US 2004/0133863 A1 (Chung-Shan, re: claim 1 / claim 4). Discloses a multi-junction photodiode with switches that select junctions to sense color without filters. This maps to claim 1's structure + "control circuit," and to claim 4's "color selecting component." But the granted claim 1 was amended during prosecution to require that the p-type epitaxy layer's width "includ[e] an adjustable depletion region between the n-type substrate and the p-type epitaxy layer … associated with … colored light" — the pre-grant publication (US 2009/0152604 A1) lacked this limitation. Chung-Shan selects color by switching junctions, not by a substrate-side adjustable depletion region. It therefore does not anticipate granted claim 1; it is § 103 art at best.

2. US 7,655,493 B2 (Fairchild Imaging, re: claim 1's core concept / claims 9, 17–19). Discloses biasing a semiconductor body to set the electrostatic field and thus the absorbed spectral band — the same physical "valve" idea the patent claims. Strong § 103 art against claim 1 and against the bias/color mapping of claims 9 and 17–19. Not § 102, because it is a CCD single-detector-per-site architecture rather than the recited n-substrate / p-epi / n-layer stack with a pn junction and a separate control circuit.

3. US 6,534,759 B1 (National Semiconductor, re: claim 15). Discloses three depth-separated photodiodes for RGB separation — conceptually the closest to claim 15. But claim 15 requires three photodiodes each "overlying a [respective] first/second/third n-type substrate" with three independent bias voltages. US 6,534,759 uses one structure with barrier regions, so it does not anticipate claim 15; § 103 only.

Narrower claims that are the realistic § 102 targets (if any): claims 2 and 5 (silicon p-epi / silicon substrate) and claim 3 (2–7 µm thickness) are thickness/material limitations that § 102 could reach only if a single reference states them — and, from the titles/abstracts I retrieved, none of the cited references states the 2–7 µm p-epitaxy thickness, so claim 3 likely survives on its face. Claims 13–14 (SiGe free of pn junctions / for red absorption — the claim-12 family) draw on the Foveon "semiconductor other than crystalline silicon" line (US 6,914,314) and US 6,534,759's depth-based red sensing, but again as § 103 combinations.

C. Honest limitations and flags

• Analytical, not prosecution-grade. I did not retrieve and read the full text of all 36 references; descriptions for items 1–10, 12–15, 17–36 rely on their titles, abstract-level metadata, and my field knowledge, plus full-text confirmation for US 6,534,759, US 2004/0133863, US 6,852,562, and US 7,655,493 (detailed above). A true anticipation opinion requires element-by-element mapping against each reference's full disclosure.
• § 102 is a strict, single-reference test. Rejections over Foveon (items 12, 13, 17, 18), Sharp (30, 31, 32), or the Kodak/Fairchild lines would almost certainly be § 103 combinations, not § 102. I have labeled them accordingly rather than forcing false anticipation findings.
• Non-analogous citations. US 5,965,857 ("Flotation cell row"/Baker Hughes) and US 3,996,536 (MIS phase shifter) are on the record but appear irrelevant — US 5,965,857 in particular looks like a citation error. I flag it because it is literally cited; I did not auto-correct it.
• Date eligibility. For the U.S. publications appearing after the 2007-12-13 priority date (items 14, 19, 21, 22, 25, 27, 29–36), prior-art effect depends on their earlier filing dates under pre-AIA § 102(e); those filing dates are given above. One item (US 2010/0194955 A1) is a later-published member of a 2004-priority family.
• No litigation found on 7,868,367 (consistent with the prior section); the citation tables show only family and third-party citations (Artilux, Boly Media, Microsemi, Aptina, Omnivision), which are publications citing the family — not suits. Do not conflate with the unrelated "'836 patent" that appears in docket/press material.

If you want, I can next build a formal claim-chart mapping the four strongest references (US 6,534,759; US 2004/0133863; US 6,852,562; US 7,655,493) element-by-element against granted claims 1, 9, 12, and 15.

I'll ground the analysis in the specific references cited on the patent page. Let me verify the substance of the most load-bearing prior-art references.

Let me ground the SiGe-related and multi-spectral references cited on the page.

Obviousness Analysis — U.S. Patent No. 7,868,367 under 35 U.S.C. § 103

Scope note (important): This analysis is limited to the references listed in the Prior Art section of the patent page — i.e., the "Patent Citations" table (US/foreign patents and published applications), the "Non-Patent Citations" entry, and the "Family Cites Families" table. Where a reference that is not in that section materially strengthens a rejection, I flag it explicitly as outside the page's cited set. I have not read the full text of every cited reference; where my characterization of a reference is inferential, I say so.

Governing standard (pre‑AIA § 103(a)). The application was filed June 10, 2008, with a Dec. 13, 2007 priority date, so pre‑AIA § 103(a) controls. The framework is Graham v. John Deere (scope/content of the prior art; differences; PHOSITA level; secondary considerations), as refined by KSR Int'l v. Teleflex (a combination can be obvious where the elements were known, the combination is of familiar/predictable components pursuing a known objective, and there is an articulated reason with a rational underpinning — including "obvious to try" in predictable fields). All references below are analogous art (image sensors/photodiodes), so the analogous-art threshold is satisfied.

I build on the earlier sections' claim descriptions and do not repeat them; the key point carried forward is that granted claim 1 adds the "adjustable depletion region between the n‑type substrate and the p‑type epitaxy layer" limitation that the pre‑grant claim 1 lacked — that added limitation is the crux of both the validity defense and the invalidity attack.

1. The controlling technical question for claim 1

Claim 1 is a vertical n‑substrate / p‑type‑epi / n‑type‑layer stack with (i) a front pn junction between the p‑epi and the n‑layer, (ii) a control circuit, and (iii) the distinguishing element — the p‑epi layer's "second width" including an adjustable depletion region between the n‑type substrate and the p‑type epitaxy layer, that depletion region being tied to colored-light characteristics.

So the invalidity question reduces to: did the art know (a) the n/p/n stacked filterless pixel on an n‑type substrate, and (b) that reverse-biasing the buried/back interface to widen or narrow a depletion region selects which wavelengths contribute to the signal ("valve" behavior)?

2. The prior-art landscape (as cited on the page)

Group A — Vertical / stacked filterless color separation and the effect of bias and depletion width on spectral response

Group B — The n‑substrate/p‑epi/n‑layer stacked photodiode and its control circuitry

• US 5,625,210 and US 5,903,021 (Eastman Kodak) — pinned/partially‑pinned photodiode active‑pixel sensors; the baseline 3‑transistor CMOS pixel architecture the '367 patent says it needs "only three transistors" to implement.
• US 2006/0001752 A1 (Fujitsu) — CMOS image sensor with a "control circuit" for reset/readout; supplies the claimed "control circuit" element.
• US 2007/0278544 A1 (Canon) and US 7,423,305 B2 (Canon) — amplifying MOS solid‑state image sensors with particular conductivity‑type layer stacks.
• US 2007/0218579 A1 and US 2008/0303072 A1 (Sharp Labs) — CMOS active‑pixel‑sensor circuits (readout/control).

Group C — Longer‑wavelength (red/IR) absorption via a buried low‑bandgap layer

• US 2006/0157806 A1 (OmniVision, "Multilayered semiconductor substrate and image sensor… for improved infrared response") — buried/layered absorber to capture longer‑wavelength photons, which Si absorbs poorly. This is the cited‑set teaching closest to the purpose of claim 12's SiGe layer.
• US 6,914,314 B2 (Foveon) — non‑crystalline‑Si semiconductor layer (see above).
• DE 102 004 004 765 A1 (RWE Space Solar, "Active Zones Semiconductor Structure") and US 7,653,313 B2 (IBM, deep trench buried photodetectors) — additional buried‑layer/absorber teachings in the family‑cited set.

3. Candidate § 103 rejections

3.1 Claim 1 — primary combination: Foveon vertical color filter + Chung‑Shan adaptive photodiode + a conventional CMOS APS control circuit

Mapping (substance, not form):

Why a PHOSITA would combine (articulated reasoning): The references share the same field and the same problem — the '367 patent's own background admits "three major approaches… color filter, stack junction photo diode, and junction separation," all known. Foveon and Sharp already disclose the claimed structural genus (a vertical stack that separates colors by depth, with bias affecting spectral response). Chung‑Shan already discloses that the depletion width / junction bias can be used to move the spectral response peak to a chosen color and to select among junctions with switches, expressly to eliminate color filters. A PHOSITA seeking filterless true color in a standard CMOS flow would combine Foveon/Sharp's stack with Chung‑Shan's bias‑tuned depletion mechanism — a combination of known elements yielding the predictable result of color‑selective response. Under KSR, this is at minimum "obvious to try," with a reasonable expectation of success because all references are in the same art and the relationship between depletion width and absorbed wavelength is a known physical law (the '367 patent itself relies on nothing more exotic than that). The claimed "only three transistors" (spec ¶ rationale) is an efficiency argument, not a patentable distinction — KSR and In re Graf treat a reduction in parts/transistors as an obvious design choice when function is preserved.

Weakness / counterargument (candor): The granted claim 1 was deliberately amended to require the adjustable depletion region specifically "between the n‑type substrate and the p‑type epitaxy layer" — i.e., at the buried/back interface, not merely at the front pn junction. Whether any cited reference teaches modulating the back‑side depletion (as opposed to the front junction) is the pivotal factual question, and on the cited record the best support (Foveon's "biasing conditions"; US 6,534,759's barrier regions; Chung‑Shan's process‑parameter/deletion‑width tuning) is suggestive but not airtight. The examiner allowed the claim over these references, which is itself evidence that the examiner did not find this specific point taught or suggested. A challenger would want a reference squarely showing back‑gate/back‑side bias controlling the buried depletion.

3.2 Claim 1 — alternative/stronger combination using art outside the cited set

For completeness (and flagged as not in the page's Prior Art section), the strongest single‑reference threat my search surfaced is US 6,803,557 B2 (Raytheon, "Photodiode having voltage tunable spectral response"): it claims a photodiode in which "a wavelength at which a maximum spectral response… occurs is determined at least in part by a magnitude of a reverse bias voltage applied across said p‑n junction," with a compositionally graded layer confining the depletion region, and describes a variable bias source (Bias DAC) that sets wavelength sensitivity frame‑by‑frame and per‑detector. Also relevant is US 7,135,698 (Lockheed Martin, "Multi‑spectral infrared super‑pixel photodetector"), which applies first/second/third external biases to sub‑pixel photodetectors and multiplexes the photoresponses — a near‑verbatim mapping to claim 15. These references are not on the page's citation lists, but a validity challenge (e.g., an IPR petitioner) would reasonably lead with them. I did not fully verify their combination against every limitation, so treat this as a lead, not a finished rejection.

3.3 Claim 12 (and 10–11, 13–14, 16) — SiGe layer inside the p‑type layer, away from the pn junction

Combination: Foveon US 6,914,314 + OmniVision US 2006/0157806 A1 + the known SiGe bandgap/absorption property.

• US 6,914,314 teaches a vertical color‑filter stack in which "at least one of the sensors includes at least one layer of a semiconductor material other than crystalline silicon," selected (in the Foveon scheme) to give a desired spectral response.
• US 2006/0157806 A1 teaches a multilayered substrate/buried absorber for improved longer‑wavelength (IR) response — i.e., that adding a buried narrow‑bandgap region improves collection of the weakly‑absorbed red/IR photons.
• The material property that SiGe's narrower bandgap extends absorption to longer wavelengths is basic and well known in the art (and the '367 specification itself asserts it without proof: "the silicon germanium material is used to enhance the red light absorption").

Motivation: A PHOSITA optimizing the red channel of a filterless stacked sensor, aware that Si poorly absorbs red, would place a low‑bandgap SiGe absorber in the p‑type region below the front junction (i.e., "away from the pn junction," claim 12) — precisely the claimed placement — to absorb long‑wavelength carriers without adding a junction. This is a predictable substitution of a known material for a known purpose (KSR; In re Kemps). Claims 13–14 (SiGe "free from pn junctions"; "configured for absorption of red light") and 16 are simply statements of the intended use/placement and add nothing unobvious.

Weakness: The cited set does not, on its face, disclose SiGe specifically for this placement; US 6,914,314 lists SiC, InGaN, III‑V, poly‑Si and a‑Si — not SiGe — so a challenger must bridge "non‑crystalline‑silicon semiconductor" to "SiGe" via the known bandgap property. That bridge is short but is the obviousness fulcrum, and the patent claims SiGe as a genus member with a stated purpose, which cuts against non‑obviousness.

3.4 Claim 15 (and 9, 17–19) — three photodiodes, common terminal, three independent substrate biases

Combination: Sharp US 7,470,946 + Chung‑Shan US 2004/0133863 + Fairchild US 7,655,493.

• US 7,470,946 discloses first/second/third photodiodes as a stacked multi‑junction structure on a bulk Si substrate with independent output detection per photodiode, and its n‑substrate variant gives the claimed "overlying an n‑type substrate" arrangement.
• Chung‑Shan discloses multiple PN junctions with switches used to select color responses without color filters — the functional equivalent of "a first/second/third bias voltage coupled to the first/second/third n‑type substrate" for color selection.
• US 7,655,493 (Fairchild multi‑spectral sensor) confirms multi‑spectral detection per pixel.

Motivation: Providing independent bias/readout per color diode to obtain per‑color signals, and sharing a common terminal, is the standard APS way to reduce interconnect in a multi‑diode pixel (see also the Kodak 3T/APS references). Under KSR, arranging separately‑known photodiodes to share a terminal and be individually biased is a predictable, mechanical combination. Claims 17–19 (bias voltages "configured for absorption of" blue/green/red) are expressed as intended results of the respective bias settings — a design choice tied to the known absorption‑depth ordering, which the '367 specification itself treats as given (its FIG. 2B discussion of blue decaying fastest).

Claim 9 / weighting factors: The "first/second/third weighting factors" used to compute color are a color‑correction/linear‑combination computation. Chung‑Shan expressly discusses back‑end amplifier gains applied to multiple photodiode responses and combining them to reconstruct color; using a calibrated weight matrix to convert three bias‑dependent outputs into RGB is routine signal processing. Reciting the computation in an apparatus claim (a voltage source "configured for" producing outputs "associated with" colors) does not impart patentable weight beyond the underlying hardware.

4. Dependent claims 2–8, 10–11

• Claims 2, 5 (silicon material for the p‑epi and n‑substrate): inherent/known in every cited reference — such image sensors are silicon.
• Claim 3 (p‑epi thickness 2–7 µm): a result‑effective amount recited as a range; the '367 specification gives no criticality, and Foveon/Sharp report red‑absorption depths in the ~2–3 µm regime (Sharp: red junction ~1.8–2.2 µm; substrate interface ~3.5–6 µm). Optimizing epi thickness to capture red is routine, and a claimed numeric range without demonstrated criticality is an obvious design choice (In re Aller; In re Woodruff).
• Claim 4 ("color selecting component" in the control circuit): Chung‑Shan's switches and Foveon's readout selection teach it.
• Claims 6–7 (second width associated with quantum efficiency / a color): follows directly from the Chung‑Shan depletion‑width‑vs‑wavelength relationship and Foveon's depth‑vs‑responsivity teaching.
• Claim 8 (third width associated with the front depletion region): inherent in any pn‑junction photodiode; Sharp notes depletion width controls carrier generation.
• Claims 10–11 (first epitaxy layer between substrate and p‑epi; SiGe): same analysis as §3.3.

5. Secondary considerations / objective indicia

None are available on the record. The prior sections found no litigation, no IPR/PGR, and no ITC proceeding involving the '367 patent, so there is no adjudicated objective‑indicia evidence (no nexus‑supported commercial success, licensing, or copying findings). The patent's own argument — "true color with each individual pixel" and "only three transistors" — is a statement of expected functional benefit from combining known elements, which KSR discounts as a non‑probative "advantage" rather than unexpected results. The early‑filed CN application (Office Action dated Oct. 9, 2009) and the three additional US divisional/continuation filings likewise provide no secondary‑consideration support.

6. Bottom line

Overall: The '367 patent sits in a crowded, well‑developed art, and the page's own cited references (Foveon's bias‑dependent vertical stacks, Chung‑Shan's depletion‑tuned/switchable wavelength‑selective photodiodes, Sharp's n‑substrate triple‑junction pixel, Kodak/Fujitsu APS control circuits, OmniVision's buried IR absorber) supply each element of the asserted combinations. The patent's principal defense is the narrowed claim‑1 limitation requiring the adjustable depletion region at the back (substrate) interface — a point the examiner evidently found unsupported by the art of record. The most serious invalidity risk comes from art outside the page's citation lists, specifically Raytheon US 6,803,557 (voltage‑tunable spectral response via a bias‑controlled, depletion‑confining graded layer) and Lockheed Martin US 7,135,698 (three sub‑pixel detectors with three independent biases), which map much more directly onto claims 1 and 15 respectively; I flag these as leads requiring full verification rather than as finished rejections.

Caveats: (1) I did not read the complete text of every cited reference, so element‑by‑element mappings beyond those quoted here are inferential. (2) This is an ex‑post reconstruction intended to state the best available theories with articulated KSR reasoning; it is not a legal opinion. (3) No objective‑indicia evidence exists on the public record, so the Graham factor 4 is neutral rather than adverse to the patent.