Invalidity dossier

US 7018012

Microfluid ejection device having efficient logic and driver circuitry

Current assignee: Slingshot Printing LLC

Added 9/3/2026, 6:48:56 PM

IndustryOther (O)
At a glanceNo PTAB challenges1 lawsuit on fileasserted by Slingshot Printing LLCOther (O)

Active provider: DeepSeek · deepseek-flash

Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

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I'll search for information on this specific patent number, including USPTO records and any CAFC 2026 docket activity.

Let me run additional targeted searches for CAFC activity and USPTO records.

Summary — U.S. Patent No. 7,018,012 (US7018012B2)

I verified the number against USPTO-derived records (Google Patents / Justia) and the W.D. Tex. complaint docket. US 7,018,012 B2 is the correct patent for the title below (not to be confused with similarly numbered patents such as 7,014,299 or 7,018,012-related family members).

Bibliographic data

  • Title: Microfluid ejection device having efficient logic and driver circuitry
  • Patent / Application: US 7,018,012 B2 (application no. 10/713,483; also published as US20050104928A1)
  • Inventors: J. Glenn Edelen, George K. Parish, Kristi M. Rowe
  • Original assignee: Lexmark International, Inc. (Lexington, KY) — per assignment recorded 2003-11-14
  • Later assignments: Lexmark → Funai Electric Co., Ltd. (recorded 2013-05-14); Funai → Slingshot Printing LLC (recorded 2019-03-29). Google Patents currently lists Slingshot Printing LLC as assignee, with its standard caveat that the listing may be inaccurate; the USPTO assignment record chain above is the better source.
  • Filing date: November 14, 2003 (also the priority date)
  • Issue date: March 28, 2006
  • Status: Expired – Lifetime (adjusted expiration noted as 2024-10-13; 12th-year maintenance fee paid in 2017)

Abstract (verbatim)

"A semiconductor substrate for a microfluid ejection head. The substrate includes a plurality of fluid ejection actuators disposed on the substrate. A plurality of driver transistors are disposed on the substrate for driving the plurality of fluid ejection actuators. Each of the driver transistors have an active area ranging from about 1000 to less than about 15,000 μm². A plurality of logic circuits including at least one logic transistor are coupled to the driver transistors. The driver and logic transistors are provided by a high density array of MOS transistors wherein at least the logic transistors have a gate length of from about 0.1 to less than about 3 microns."

Plain-language overview of independent claims

The patent has three independent claims (1, 13, and 22), plus dependent claims. They describe shrinking the on-chip drive/logic circuitry of microfluid (e.g., inkjet) printheads to save substrate area:

  • Claim 1 — Semiconductor substrate for a microfluid ejection head: A substrate carrying (a) fluid ejection actuators, (b) driver transistors for those actuators, each driver transistor having a small active area of about 1,000 to under 15,000 μm², and (c) logic circuits (at least one logic transistor each) coupled to the driver transistors. Both the driver and logic transistors form a high-density array of MOS transistors, with at least the logic transistors having a gate length of about 0.1 to under 3 microns. In plain terms: a printhead chip whose power transistors are individually compact and whose control transistors use small (sub-3-micron) geometry to pack more function into less silicon area.

  • Claim 13 — Microfluid ejection cartridge: Adds the cartridge context: a cartridge body with a fluid supply and an ejection head in fluid communication with it. The head has a semiconductor substrate with fluid ejection actuators, driver transistors each having an active-area width of about 100 to under 400 microns, and logic circuits (at least one logic transistor) operatively coupled to the drivers. Again, all driver and logic transistors form a high-density MOS array with at least the logic transistor at 0.1 to under 3 microns gate length. A nozzle plate is attached to the substrate to eject fluid when the actuators fire. Plainly: a replaceable ink/fluid cartridge whose printhead chip uses compact, fine-geometry transistors to save area.

  • Claim 22 — Semiconductor substrate for an inkjet printhead (DLC variant): A substrate with heater resistors that carry a protective diamond-like carbon (DLC) layer about 1,000–3,000 Angstroms thick, driver transistors for the actuators, and logic circuits (at least one logic transistor) coupled to the drivers. Driver and logic transistors again form a high-density MOS array with at least the logic transistors at 0.1 to under 3 microns gate length. Plainly: the same high-density/small-geometry transistor scheme combined with DLC-protected heater resistors for the inkjet thermal firing elements.

(Claim 11 — "A printhead for an ink jet printer containing the semiconductor substrate of claim 1" — is formally a dependent/incorporating claim rather than a fourth independent claim.)

Litigation / CAFC status

  • District court: US 7,018,012 was asserted by Slingshot Printing LLC v. HP Inc., No. 6:19-cv-00549 (W.D. Tex., Waco Division, filed 2019-09-20, Judge Alan D. Albright), where 7,018,012 is expressly listed among the patents-in-suit in the complaint. Public reporting indicates the Slingshot–HP disputes were settled and Slingshot moved to dismiss the HP lawsuits.
  • PTAB: HP filed related inter partes review petitions (e.g., IPR2020-01084/-01085/-01086/-01090) referencing these Slingshot complaints; those proceedings pertained to other Slingshot patents, and I did not find a specific IPR directed to 7,018,012 in these searches.
  • CAFC 2026: I searched for CAFC 2026 docket activity for "7018012" and found no CAFC appeal entries. I have no authoritative evidence of any pending 2026 Federal Circuit case involving this patent.

Uncertainty notes

  • I did not access the USPTO Patent Center or Public PAIR directly in these searches; bibliographic data is corroborated by Google Patents/Justia USPTO-derived records and court filings.
  • The "current assignee" (Slingshot Printing LLC) is from assignment records; the patent is expired, and Google's legal-status fields carry disclaimers.
  • No CAFC 2026 docket results were located; absence of results is not definitive proof that none exists, but I found no public record of one.

Generated 9/6/2026, 12:48:25 PM

Cases on file (1)

Group view →

Specific litigation cases in our database that name US patent 7018012. The free-form analysis below may also discuss cases beyond this list.

Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

✓ Generated

I'll search litigation databases and court records specifically for US 7,018,012.

Let me dig deeper into the specific cases and check the Unified Patents litigation portal and RPX.

Litigation Involving U.S. Patent No. 7,018,012

Scope note / caveat up front. I searched litigation-oriented sources (Unified Patents litigation portal data, CourtListener, Docket Alarm/PTAB records, RPX/insight, Law360, and the Federal Circuit's own docket) for the literal string 7,018,012. I did not have direct PACER or the Unified Patents case-list page returned in my results, so where a case is grounded in a complaint exhibit or court document I say so; where it is grounded in secondary reporting I flag it. Two housekeeping points: (1) the task header says "Current Date: April 26, 2026," while my operating context is 2026-09-24 — I note the discrepancy but it does not affect the case list; (2) searches for "7018012" return a large volume of false positives (an SRA-regulated-solicitor ID, unrelated pharmaceutical "the '012 patent" ANDA suits, and Slingshot's other printhead patents). Everything below is restricted to US 7,018,012 B2.


Summary table

# Plaintiff Defendant(s) Jurisdiction / Court Case No. Filed Asserted '012? Outcome / Status
1 Slingshot Printing LLC HP Inc. W.D. Tex. (Waco Div., Judge Alan D. Albright) 6:19-cv-00549 2019-09-20 Yes — one of 10 patents-in-suit Settled / dismissed (~2021)
2 Slingshot Printing LLC HP Inc. W.D. Tex. (Austin Div., Judge Alan D. Albright) 1:20-cv-00187 (and/or related 1:20-cv-00184 / 6:20-cv-00048) 2020 Yes (same patent family set re-filed/reassigned) Settled / dismissed (~2021)

That is the entire known district-court footprint for this patent: two dockets, one plaintiff, one defendant (HP). No other case was found asserting 7,018,012.


Case 1 — Slingshot Printing LLC v. HP Inc., No. 6:19-cv-00549 (W.D. Tex.)

Case 2 — Slingshot Printing LLC v. HP Inc., No. 1:20-cv-00187 (W.D. Tex., Austin Div.)

  • Parties: identical (Slingshot Printing LLC v. HP Inc.).
  • Jurisdiction/Court: W.D. Tex., Austin Division, Judge Albright (the "ADA" suffix in the docket number denotes the judge).
  • Case number: 1:20-cv-00187. Related docket numbers appearing in the record include 1:20-cv-00184 and 6:20-cv-00048 (the W.D. Tex. routinely reassigns/refiles and consolidates its patent cases between divisions; treat these as the same litigation cluster rather than separate adversaries — I could not, within this search, confirm the exact parent/child relationship).
  • Filing date: 2020 (exact day not confirmed in the records retrieved).
  • Patent asserted: Yes — 7,018,012 appears in the same ten-patent caption as Case 1. The complaint filed in this docket is the exhibit HP submitted into IPR2020-01086.
  • Procedural posture: Discovery-level activity; the court ordered production of "any agreements between Slingshot Printing LLC (and any affiliates) and Funai Electric Co., Ltd. (and any affiliates)" — i.e., the ownership/privateering chain for the asserted patents including 7,018,012. Outcome: settled / dismissed with HP (~2021); no merits ruling on 7,018,012.
  • Source grounding: Docket Alarm exhibit copy of the complaint — same URL as above.

What is NOT litigation over 7,018,012 (explicit exclusions — do not conflate)

Because the same patent family and the same NPE generate a lot of adjacent noise, these are the near-misses I checked and excluded:

  1. Slingshot v. Canon, E.D.N.Y. Nos. 2:22-cv-00123 and 2:22-cv-01852 — asserted US 7,152,951; 7,195,341; 7,559,629; and 7,938,523 (and related), not 7,018,012. The June/July 2026 Federal Circuit decisions (24-2127, 24-2132, 24-1956) and the "three patents invalidated" Law360 reports concern Slingshot's 7,195,341 / 7,594,708 / 7,484,823 / 7,152,951 line, not 7,018,012. Both Canon district cases have been stayed pending the IPRs.
  2. HP's IPRs against Slingshot (IPR2020-01084/-01085/-01086/-01090; IPR2020-01659) — these challenged other Slingshot patents (e.g., IPR2020-01086 is captioned as a review of US 7,014,299, which is a different patent number). No IPR petition naming US 7,018,012 was found.
  3. Pharmaceutical "the '012 patent" cases (e.g., the Lannett/ANDA complaints and the Amgen/DRL "9,012,178" counterclaims) — these are different patents that happen to be referenced as "'012" in abbreviated form. They are not US 7,018,012.
  4. US 9,012,178, US 7,920,018, US 10,311,073, US 7,020,252, etc. appearing in PTAB/petition documents — unrelated patents; excluded.
  5. The SRA "7018012" hit on sra.org.uk (a regulated-solicitor registration number) — not a patent; excluded.

Confidence and verification limits

  • High confidence: US 7,018,012 was asserted by Slingshot Printing LLC against HP Inc. in the W.D. Tex., in Case No. 6:19-cv-00549, filed 2019-09-20 before Judge Albright, as one of ten patents-in-suit — this is directly corroborated by the complaint text itself (captioned and docket-stamped) reproduced as an IPR exhibit, and by the Unified Patents litigation link on the patent's record.
  • Medium confidence: the precise status and mechanism of the 1:20-cv-00187 / 1:20-cv-00184 / 6:20-cv-00048 docket relationship, and the exact dismissal date of the HP actions. The records I retrieved support "settled/dismissed ~2021" but I did not pull the PACER docket sheet showing the dismissal order for each number.
  • Not independently verified in this session: PACER dockets, the Unified Patents case-list page (I did not receive it in results; the tool budget was exhausted), and whether any state-court or ITC § 337 action naming 7,018,012 exists. I found no such action, but absence of a search hit is not proof of absence.
  • Post-expiration context (material to "current status"): US 7,018,012 expired on its adjusted expiration date of 2024-10-13 (Google Patents legal status "Expired – Lifetime"; 12th-year maintenance fee paid 2017). There is accordingly no pending assertion of 7,018,012 known to me as of 2026 — any remaining right would be to past damages for pre-2024 conduct only, and the patent cannot support an injunction.

Bottom line

Known litigation on US 7,018,012 is limited to a single plaintiff–defendant pair: Slingshot Printing LLC (as plaintiff) against HP Inc., in two W.D. Texas dockets — 6:19-cv-00549 (filed 2019-09-20, Judge Albright, 10 patents-in-suit including '012) and the related 2020 Austin refiling 1:20-cv-00187 — both resolved by settlement/dismissal around 2021 without any merits ruling on the patent. No other case (not Canon, not ITC, not any other defendant) was found asserting this patent, and no IPR/CBM/PGR has ever named it. If you need a certified docket sheet, order PACER for 6:19-cv-00549 and 1:20-cv-00187 in the W.D. Tex. and confirm the dismissal entries; those two dockets should capture the complete litigation history of this patent.

Generated 9/24/2026, 11:21:37 AM

Proceedings on file (0)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

Current assignee: Slingshot Printing LLC

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

✓ Generated

I'll verify whether any PTAB proceedings exist for this patent, starting with the USPTO ODP data and then web searches for anything not yet indexed.

Initial searches show no IPR activity. Let me check more specifically, including the known litigation (Texas Western District Court case 6:19-cv-00549) and the Unified Patents/Slingshot chain.

I'm finding useful litigation context. Now let me specifically hunt for IPR proceedings against this exact patent — HP and Canon both litigated against Slingshot, and HP filed IPRs on several Slingshot patents. I need to confirm whether any petition named US 7,018,012.

Proceedings overview

Total AIA trial proceedings on US 7,018,012: 0 (0 active · 0 with claims invalidated · 0 with claims sustained · 0 settled · 0 institution-denied).

The USPTO Open Data Portal (ODP) block supplied in this prompt reports no AIA trial proceedings (IPR/PGR/CBM) for US 7,018,012, and my web searches did not surface any petition, institution decision, or Final Written Decision naming this patent. There is therefore no PTAB-created estoppel, no canceled claim, and no Board validity finding of any kind on this patent. For a defendant, that cuts both ways: all 30 claims remain exactly as issued and are entirely UNTESTED at the PTAB, but the patent expired by adjusted term on 2024-10-13 (status "Expired – Lifetime"), so any exposure is limited to pre-expiration damages and cannot be defeated by pointing to a prior IPR win.

Because there are no proceedings, there are no per-proceeding sections to populate. What follows is the verification trail, the adjacent-proceeding context you should know about (so you don't confuse it with this patent), and the strategic read.


Adjacent activity — NOT on US 7,018,012 (do not conflate)

The patent's Google Patents file shows heavy district-court assertion by Slingshot Printing LLC (the current assignee, which took the Lexmark/ Funai inkjet portfolio in 2019):

  • Slingshot Printing LLC v. HP Inc., 6:19-cv-00549 (W.D. Tex., Waco, Judge Albright, filed 2019-09-20) — asserted 10 patents including US 7,018,012 (along with 6,213,587; 6,575,563; 6,676,246; 6,786,575; 7,195,341; 7,290,864; 7,410,246; 7,484,823; 7,559,629). A follow-on Austin action (1:20-cv-00187) and a settlement with HP (joint dismissal, ~2021) followed.
  • HP responded with IPRs on other patents in the same Slingshot portfolio — e.g., IPR2020-01084/-01085/-01086/-01090 (IPR2020-01086 is captioned as a review of US 7,014,299, not 7,018,012) and IPR2020-01659, which was terminated on 2021-03-29 after the parties settled (settlement agreement treated as business confidential). None of these petitions, so far as the record shows, challenged US 7,018,012.
  • A 2026-07-16 Law360 headline reports the Federal Circuit affirmed PTAB decisions invalidating all challenged claims in three Slingshot patents (chips/temperature sensors in inkjet printers) in Canon-related proceedings. I could not confirm — and therefore do not assert — that US 7,018,012 is among those three patents. This is the single most important item to verify before advising a client, because if 7,018,012 were among them it would change this analysis completely; nothing in the search results places it there.

Strategic summary

Claim status. All 30 claims of US 7,018,012 (independent claims 1, 13, 22 and their dependents) are SUSTAINED by default — i.e., UNTESTED — before the PTAB. No claim has been canceled, no claim has been amended in an IPR, and no Board panel has ever construed a term of this patent. The only "narrowing" event in the file is the ordinary expiration of the term (adjusted expiration 2024-10-13; maintenance fees paid through the 12th year, large entity).

Estoppel landscape (§ 315(e)(2)). There is no petitioner and no estoppel running against anyone from an IPR on this patent. For a defendant facing assertion today, all prior-art grounds remain fully available — § 102, § 103, and § 112 challenges can be raised fresh in district court or in a new petition (subject to the § 315(b) one-year bar measured from service of this complaint, which will usually have run by now given the 2019–2020 suits). Because the patent is expired, the practical battleground is damages for pre-2024-10-13 conduct only, plus the ordinary clear-and-convincing validity defense in court.

Pattern signals. (1) No repeat-petitioner pattern exists on this patent — the serial IPR activity by HP targeted sibling portfolio patents, and those that reached termination did so by settlement, which leaves no estoppel and no precedential validity findings against the portfolio. (2) Slingshot's ownership chain (Lexmark → Funai Electric (2013) → Slingshot Printing LLC (2019)) is a monetization/NPE posture, and the patent has been asserted in at least the W.D. Tex. actions; the "Unified Patents" references on the Google Patents page are litigation-data-source attributions, not evidence Unified Patents is a party. (3) The absence of any IPR on 7,018,012 despite years of high-stakes litigation is itself a signal: challengers either valued the other portfolio patents more highly, viewed this patent as a weak damages driver, or the early settlement mooted the need. Do not read the absence as "the patent is strong."


Recommended next steps

  1. Confirm the Canon/CAFC item before anything else. Pull the 2026-07-16 Federal Circuit affirmance identified by Law360 and confirm the three Slingshot patent numbers. If US 7,018,012 is not among them (the available evidence suggests the challenged patents were different chip/temperature-sensor patents), this report's "no PTAB activity" conclusion stands.
  2. Verify directly against USPTO PTAB E2E / ODP. Run a patent-number search for 7,018,012 in the PTAB Trial Search (uspto.gov/PTAB) and the ODP API to confirm no petition has been filed that post-dates the most recent ingest in the structured block. Given the 2026 Canon-related activity in the portfolio, re-check monthly.
  3. If you are a defendant being newly served: there are no FWDs to cite and no IPR-based leverage to invoke. Your play is (a) the expired-patent limitation — damages only for acts before 2024-10-13 and no injunction; (b) full merits invalidity in court with no § 315(e)(2) estoppel constraints; and (c) if you are within one year of service, consider whether a fresh IPR is worth the cost on a patent whose remaining value is capped at pre-expiration damages.
  4. If you are evaluating the portfolio-wide threat: the HP IPRs (IPR2020-01084/-01085/-01086/-01090, IPR2020-01659) and the Canon IPRs show the PTAB is receptive to challenges on neighboring Slingshot/Lexmark inkjet patents — useful precedent and expert-witness material for any new petition, even though none of it is binding on this patent.

Bottom line, stated plainly: No IPR, PGR, or CBM has ever been filed on US 7,018,012, so no claim is dead and no claim is PTAB-hardened — the patent is simply expired and PTAB-untested. Any advice implying "the troll has no case because claims were canceled" would be wrong on this record; the accurate defensive headline is "expired patent, untested claims, no estoppel, full invalidity defense available."

Generated 9/6/2026, 12:48:57 PM

Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

✓ Generated

Inventors

  • J. Glenn Edelen — employer at filing: Lexmark International, Inc. (Lexington, KY), per the original assignment of inventors' interest.
  • George K. Parish — employer at filing: Lexmark International, Inc. (Lexington, KY).
  • Kristi M. Rowe — employer at filing: Lexmark International, Inc. (Lexington, KY).

All three executed an assignment to Lexmark on the filing date (2003-11-14), reel 014708/0465. No unusual post-filing departure pattern was found in the records retrieved; the file history and litigation record do not show inventor movement relevant to the later transfers (the 2013 and 2019 transfers were corporate portfolio transactions, not inventor-driven).

Original assignee

Lexmark International, Inc. (Lexington, Kentucky) is the entity on the issued patent and the original assignee.

  • Product embodiment: Yes. Lexmark was a major operating ink-jet printer / printhead manufacturer and shipped thermal inkjet printheads of the type claimed (driver + logic MOS transistors co-located with heater resistors on a semiconductor substrate).
  • Line of business: Imaging — printers, printheads, and supplies (ink/toner), plus software/services in later years.
  • Current status: Still operating, but restructured: taken private in 2016 by Apex/PAG consortium (delisted from NYSE), and — critically — Lexmark exited the consumer inkjet business around 2012–2013 and sold its inkjet technology and patent portfolio to Funai Electric Co., Ltd. in that process (reel 030416/0001). Lexmark therefore no longer owns this patent and no longer sells the consumer inkjet products that would embody it.

Assignment timeline

Recorded assignments for US 7,018,012 (source: Google Patents legal-events feed, which mirrors the USPTO assignment database; reel/frame numbers as recorded):

  • 2003-11-14 (executed) / recorded 2003-11-14 — Reel 014708/0465

    • Conveyance: Assignment of Assignors' Interest
    • Assignor: J. Glenn Edelen, George K. Parish, Kristi M. Rowe (inventors)
    • Assignee: Lexmark International, Inc.
    • Correspondent: not retrievable in this session (USPTO Assignment Center record was not pulled; Google Patents does not display the correspondent). No recurrence flag possible on this link without reel-level correspondent data.
    • Context: Original employer assignment from inventors to Lexmark on the filing date — standard, non-event.
  • 2013-04-01 (effective date) / recorded 2013-05-14 — Reel 030416/0001

    • Conveyance: Assignment
    • Assignor: Lexmark International, Inc.; Lexmark International Technology, S.A.
    • Assignee: Funai Electric Co., Ltd. (Japan)
    • Correspondent: not retrievable in this session (see caveat above).
    • Context: Portfolio sale — Lexmark transferred its inkjet patent assets (this patent included) to Funai as part of Lexmark's exit from the consumer inkjet business; a strategic divestiture, not a bankruptcy sale.
  • 2019-03-29 (executed and recorded) — Reel 048745/0551

    • Conveyance: Assignment
    • Assignor: Funai Electric Co., Ltd.
    • Assignee: Slingshot Printing LLC (Delaware LLC; address per complaint: 8455 Colesville Road, Suite 830, Silver Spring, MD 20910)
    • Correspondent: not retrievable in this session (see caveat above).
    • Context: Transfer of the Funai/Lexmark inkjet portfolio into a licensing/assertion LLC — the step that immediately preceded Slingshot's first infringement campaign against HP (suit filed 2019-09-20, W.D. Tex. 6:19-cv-00549, naming US 7,018,012 among ten patents).

Caveat on correspondents: The correspondent-of-record field is visible only in the USPTO Assignment Center reel images, which I could not retrieve in this session. All three reel/frame numbers above are confirmed from the Google Patents legal-events record; the correspondent names should be verified by pulling each reel at https://assignmentcenter.uspto.gov/ before relying on the "repeat correspondent" analysis. I have not fabricated any correspondent.

Timeline diagram

timeline
    title Ownership of US 7018012
    2003 : Filed by Lexmark inventors
         : Assigned to Lexmark International
    2006 : Patent granted
    2013 : Sold to Funai Electric
    2019 : Assigned to Slingshot Printing LLC
         : Slingshot sues HP in Texas

NPE / troll-pattern signals

  1. Shell-entity transfer — present. Reel 048745/0551 (recorded 2019-03-29) moved the patent from Funai (an operating electronics company) to Slingshot Printing LLC, a Delaware LLC whose only stated place of business is a single suite (8455 Colesville Road, Suite 830, Silver Spring, MD 20910, per the HP complaint). Slingshot sells no products; trade press (Actionable Intelligence) describes it as "a non-practicing entity that has the rights to a slew of inkjet printing patents that formerly belonged to [Funai/Lexmark]."

  2. Known asserter in the chain — present. Slingshot Printing LLC is a high-frequency patent plaintiff: it sued HP Inc. in W.D. Tex. (6:19-cv-00549, filed 2019-09-20, asserting US 7,018,012 among ten patents; refiled/reassigned as 1:20-cv-00187/6:20-cv-00048) and Canon in E.D.N.Y. (2:22-cv-00123 and 2:22-cv-01852, 2022). Unified Patents classifies Slingshot as "NPE (Patent Assertion Entity)" in the related IPR proceedings (e.g., IPR2022-01416). It is not on the classic Acacia/Marathon/IPNav list, but it is a confirmed, litigating NPE per Unified Patents and RPX-tracked dockets.

  3. Repeat correspondent across the chain — unclear (insufficient data). Correspondent names on reels 014708/0465, 030416/0001, and 048745/0551 could not be retrieved in this session. Note: the litigation counsel for Slingshot (Raymond W. Mort III, Ronald M. Daignault, Chandran B. Iyer, et al. on 6:19-cv-00549) is a distinct data point from the assignment correspondent, and no assignment-correspondent recurrence can be verified here. Pull the three reels at assignmentcenter.uspto.gov to complete this check.

  4. Cascading transfers — not present. Only two post-original transfers exist (Lexmark→Funai in 2013; Funai→Slingshot in 2019), separated by ~6 years. This is not a rapid chained-LLC cascade.

  5. Pre-litigation transfer — present. The Funai→Slingshot assignment was recorded 2019-03-29 (reel 048745/0551) and Slingshot's first infringement suit naming this patent — Slingshot v. HP, 6:19-cv-00549 — was filed 2019-09-20, i.e., within six months. The transfer to the asserting LLC immediately before suit is the classic standing/venue-enabling arrangement.

  6. Bankruptcy fire-sale — not present. Lexmark did not enter bankruptcy; the 2013 Funai transfer (reel 030416/0001) was a negotiated divestiture on Lexmark's exit from inkjet. (Funai's own later financial distress occurred after the 2019 Slingshot transfer and was not the cause of it; I could not independently verify Funai's later bankruptcy filings in this session.)

  7. Privateering — present (circumstantial). Funai — the operating company that owned the former-Lexmark inkjet portfolio — transferred it to Slingshot, which then asserted against operating printer competitors HP and Canon. The W.D. Tex. court ordered production of "any agreements between Slingshot Printing LLC (and any affiliates) and Funai Electric Co., Ltd. (and any affiliates)" (docket text, 1:20-cv-00184), confirming the Funai–Slingshot relationship was central and non-arm's-length in character, though the revenue-share terms themselves are not public. This is the classic privateer shape, but I cannot cite a public agreement, so weight it accordingly.

  8. Defensive aggregator (anti-NPE) — not present. The chain terminates at Slingshot, an asserting NPE; no RPX/AST/LOT/Unified/OIN involvement. (Inverse signal: patents in this portfolio have been heavily IPR-challenged — Canon IPRs such as IPR2022-01415/01416 and IPR2023-00312 — and several claims were invalidated on appeal, so the portfolio has been substantially weakened rather than "neutralized" by a defensive buyer.)

Verdict

NPE — high confidence.

Three strong, independently verifiable signals drive this: (1) the shell-entity transfer of the patent from an operating company (Funai) to a product-less Delaware LLC — Slingshot Printing LLC — at reel 048745/0551 (recorded 2019-03-29); (2) Slingshot's confirmed status as a litigating NPE, per Unified Patents' own NPE classification and its infringement suits against HP (6:19-cv-00549, naming US 7,018,012) and Canon; and (3) the pre-litigation timing — assignment recorded 2019-03-29, first suit filed 2019-09-20, within six months. The only unverified element is correspondent recurrence (signal 3), which requires pulling the reel images at the Assignment Center.

Verification links:

Generated 9/6/2026, 12:49:30 PM

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

✓ Generated

I'll verify the prior-art references against USPTO-derived sources before mapping them to § 102. Let me run targeted searches on the load-bearing citations.

§ 102 Anticipation Analysis — U.S. Patent No. 7,018,012 B2

"Microfluid ejection device having efficient logic and driver circuitry" — Appl. No. 10/713,483 · filed 2003‑11‑14 · issued 2006‑03‑28 · inventors Edelen, Parish, Rowe · original assignee Lexmark International, Inc. · now Slingshot Printing LLC · Expired – Lifetime (adjusted expiration 2024‑10‑13).

Number check (per your literal-interpretation rule). This analysis is for 7,018,012 only. It is not US 7,014,299 — that is a different Lexmark patent in the same Slingshot portfolio and is the subject of IPR2020‑01086. Any search hit, docket entry, or claim chart bearing 7,014,299 must not be carried over to this patent. I also did not treat the machine-generated "Definitions" bullets on the Google Patents page as patent text; only the claim set and specification were used.

This section builds on the earlier Obviousness (§ 103) section without repeating it. Where the earlier sections attributed a § 103 role to a reference, this section states the distinct — and much narrower — § 102 question: does one single reference disclose every limitation of a given claim?


0. Legal frame and prior-art status

The application was filed 2003‑11‑14, so pre‑AIA 35 U.S.C. § 102 governs. Nothing in the file shows a foreign priority claim, so the critical date is the U.S. filing date.

  • § 102(b) — printed publication or U.S. patent granted more than one year before 2003‑11‑14 (i.e., before 2002‑11‑14). Most of the 23 cited references fall here.
  • § 102(e) — U.S. patent granted on an application filed before the applicant's invention, by another. This is the tag for the late-publishing/late-granting references (notably US 6,666,545, filed 2002‑01‑08 and granted 2003‑12‑23).
  • § 102(a)/(b) for the JP/CN printed publications.

Critical structural point that governs the entire § 102 table below: claims 2–12 depend from claim 1, claims 14–21 depend from claim 13, and claims 23–30 depend from claim 22. A dependent claim carries every limitation of its independent claim, plus its own. Therefore a reference cannot anticipate claim 3, 5, 7, 9, 12, etc. unless it also discloses all of independent claim 1 (or 13, or 22). Because no cited reference discloses the numeric ranges of the independent claims, no dependent claim is anticipated either — this is not a defect in the search; it is a consequence of claim dependency.


1. Verified record for the patent itself

Item Value
Publication US 7,018,012 B2 (pre-grant pub. US 2005/0104928 A1, 2005‑05‑19)
Title Microfluid ejection device having efficient logic and driver circuitry
Filing / priority 2003‑11‑14 (no earlier priority)
Grant 2006‑03‑28
Claims 30 (independent 1, 13, 22)
Citations listed 23 ("Patent Citations") + 5 "Family Cites Families"
Litigation flag on record W.D. Tex. 6:19‑cv‑00549 (Slingshot v. HP)
Status Expired – Lifetime (adjusted expiration 2024‑10‑13)

Source: https://patents.google.com/patent/US7018012/en (USPTO-derived bibliographic and citation data).


2. Bottom line on § 102 (stated first, as it drives the tables)

On the verified record, none of the 23 cited references, and none of the 5 family citations, is a § 102 anticipatory reference against any of claims 1–30. Each cited reference is a § 102(b) or § 102(e) reference that discloses only some of the claimed elements, and none discloses the numeric limitations that define the independent claims:

Independent claim Numeric limitation that defeats every cited reference
1 each driver transistor active area ≈1,000 to <15,000 µm²; logic transistor gate length 0.1 to <3 µm
13 driver active-area width ≈100 to <400 µm; logic transistor gate length 0.1 to <3 µm; cartridge body + nozzle plate
22 heater resistors with DLC protective layer 1,000–3,000 Å; logic transistor gate length 0.1 to <3 µm

The only reference that comes near a numeric limitation is US 6,102,528, whose working example gives a 3 µm gate — and 3 µm is excluded by the claim language "less than about 3 microns." Notably, that 3 µm figure is for the power (driver) device, not a logic transistor, so it does not reach claim 1's "logic transistor" requirement in any event. Likewise US 6,666,545 states the driver active-region width is "usually over 400 µm," i.e., outside claim 13's "100 to less than 400 microns" (if anything, that reference points away from the claimed width window).

Consequence: the cited art's § 102 value is element-level only. Its actual invalidity force is under § 103 (see the earlier Obviousness section). The tables below therefore give, for each reference, (i) the full citation and dates, (ii) the description, and (iii) an honest § 102 mapping — including explicit "does not anticipate" entries where that is the correct answer.


3. Tier 1 — most relevant cited references (full detail)

3.1 US 6,102,528 B1 — Xerox Corporation

  • Title: Drive transistor for an ink jet printhead
  • Filed / granted: 1997‑10‑17 / 2000‑08‑15
  • § 102 status: § 102(b) (granted >1 yr before 2003‑11‑14)
  • Description (verified from the patent PDF and full text): A power MOSFET drive transistor integrally formed on p‑type silicon within a printhead that contains both the heating elements and the printhead addressing circuitry, using a pocket implant in the gate region to permit reduced source‑to‑drain spacing without loss of breakdown voltage. Background expressly states that above ~300 spi it became "difficult, if not impractical, to layout compact MOSFET drive transistor switches that fit into the space available behind each heating element without increasing the size of the silicon substrate," and that larger substrate area "driv[es] up the manufacturing cost." Enables up to 1200 spi; claims a 3 µm gate length and >65 V breakdown; pocket implant ~1 µm beyond the gate as a graded drift region.
  • § 102 mapping: Does not anticipate any claim. It discloses substrate + heaters + addressing circuitry + compact high‑voltage MOS drivers, and even a gate length figure — but (a) that figure is 3 µm (excluded by "less than about 3 microns"), (b) it is the power device, not a logic transistor, (c) no driver active-area range (1,000–<15,000 µm²) is disclosed, and (d) no DLC is disclosed.
  • What it does support: § 103 primary reference for claims 1, 5–11, 13–21; § 102(b) evidence of the motivation to shrink per‑nozzle driver area.
  • URL: https://patents.google.com/patent/US6102528

3.2 US 4,947,192 — Xerox Corporation

  • Title: Monolithic silicon integrated circuit chip for a thermal ink jet printer
  • Filed / granted: 1988‑03‑07 / 1990‑08‑07 (family EP 0401440 A1/B1)
  • § 102 status: § 102(b)
  • Description (verified): Monolithic integration of MOS transistor switches and resistive heater elements on one silicon substrate; the chip contains "active driver, logic and resistive heater elements"; transistor switches and resistors formed from a single polysilicon layer, resistors on thermally grown field oxide ~1–4 µm thick.
  • § 102 mapping: Does not anticipate any claim. Discloses the architecture of claim 1 (substrate; actuators; MOS drivers; logic coupled to drivers) but discloses none of the numeric limitations (driver active area 1,000–<15,000 µm²; logic gate length 0.1–<3 µm) and no DLC.
  • What it does support: co-primary § 103 reference; the structural framework of claim 1.

3.3 US 5,075,250 — Xerox Corporation

  • Title: Method of fabricating a monolithic integrated circuit chip for a thermal ink jet printhead
  • Filed / granted: 1991‑01‑02 / 1991‑12‑24
  • § 102 status: § 102(b)
  • Description: Companion fabrication process producing logic, driver and transducer elements on the surface of a common silicon substrate, including n⁻ drift‑layer implants for the logic and driver sections — i.e., the LDD‑type ("lightly doped drain") structures recited in dependent claims 4, 8, 16, 19, 24, 28.
  • § 102 mapping: Does not anticipate any claim. Supplies the LDD element only; carries none of the numeric ranges and no DLC. (And because claims 4/8 depend from claim 1, they cannot be anticipated by this reference standing alone.)

3.4 US 6,666,545 B2 — Industrial Technology Research Institute (ITRI)

  • Title: Driver transistor structure of inkjet print head chip and the method for making the same
  • Filed / granted: 2002‑01‑08 / 2003‑12‑23 (TW priority 2001‑10‑26; pre‑grant pub. US 2003/0081070 A1, 2003‑05‑01)
  • § 102 status: § 102(e) as to its 2002‑01‑08 U.S. filing date (granted later, but filed before the '012 filing date).
  • Description (verified): Integrated Driver Head (IDH) chip: "several MOSFET elements connected in parallel," comb/grating gate structure, with body contacts embedded in the source (BES). States each MOSFET uses a large channel W/L ratio and that "the width of the active region is over 400 µm." Express object: body contacts need not be placed in the field‑oxide region outside the active region, so "the area occupied by the driver transistor can be largely saved, which is good for minimizing the inkjet print head chip and reducing manufacturing costs."
  • § 102 mapping: Does not anticipate any claim — and as to claim 13 it points away. Its disclosed "over 400 µm" active‑region width sits outside claim 13's "100 to less than 400 microns." No driver active-area of 1,000–<15,000 µm², no logic‑transistor gate length, no DLC.
  • What it does support: § 103 motivation/reasoning for the area‑reduction ranges; § 102(e) evidentiary art.
  • URL: https://patents.google.com/patent/[US6666545B2](/patent/US6666545B2)/en

3.5 US 5,085,473 — Xerox Corporation

  • Title: Temperature control transducer and MOS driver for thermal ink jet printing chips
  • Filed / granted: 1990‑07‑26 / 1992‑01‑14
  • § 102 status: § 102(b)
  • Description (verified): TIJ chip architecture placing a MOS‑type transistor on the same chip as the transducer with an architecture allowing high‑voltage operation, to "reduce warm‑up time … with a minimal impact on … chip area"; TIJ resistor on field oxide plus a secondary diffused (n⁻) heater under the field oxide.
  • § 102 mapping: Does not anticipate any claim. Relevant to claim 1's "drivers on the same substrate as the actuators" and to claim 7's high‑voltage/on‑resistance operation, but discloses no claimed numeric ranges and no DLC.
  • URL: https://patents.google.com/patent/[US5081473](/patent/US5081473)

3.6 US 5,055,859 — Casio Computer Co., Ltd.

  • Title: Integrated thermal printhead and driving circuit
  • Filed / granted: 1989‑11‑01 (app. 07/430,885; JP priority 1988‑11‑16) / 1991‑10‑08
  • § 102 status: § 102(b)
  • Description (verified): Single‑crystal semiconductor substrate with a print driver circuit element formed by impurity implantation (MOS‑FET) and a polycrystalline‑silicon heating resistor layer on the same substrate; the driver circuit includes a shift register, a latch circuit, and a current‑supply element driving the heating resistor — i.e., per‑nozzle logic selecting a driver.
  • § 102 mapping: Does not anticipate any claim. Discloses the "logic circuits … coupled to the driver transistors" concept (relevant to claim 6/17/26) and the monolithic substrate idea, but in a thermal (contact) printhead context, and with none of the numeric ranges and no DLC. Note the claim‑dependency bar again: claim 6 carries claim 1's numeric limits.
  • URL: https://patents.google.com/patent/US5055859

4. Tier 2 — cited references supporting individual elements

Full citation Filed / published § 102 status Description § 102 anticipation of '012 claims?
US 4,308,549 — Xerox, High voltage field effect transistor 1978‑12‑18 / 1981‑12‑29 § 102(b) Circular HV FET: central drain, concentric annular field plate/gate/source; implanted source & channel; "device dimensions are varied to improve either current, voltage capability, or speed." No. Element‑level (HV driver structure; dimension/variable trade‑off) only.
US 4,472,875 — Teletype, Method for manufacturing an integrated circuit device 1983‑06‑27 / 1984‑09‑25 § 102(b) Forms a transducer and a driver circuit for a thermal printhead on a single substrate. No. Monolithic driver+transducer concept only; no ranges, no DLC.
US 4,567,353 — Sharp, High‑accuracy temperature control 1977‑04‑07 / 1986‑01‑28 § 102(b) Thermal‑head temperature regulation. No. Marginal; no claim element map.
US 5,010,355 — Xerox, Ink jet printhead having ionic passivation of electrical circuitry 1989‑12‑26 / 1991‑04‑23 § 102(b) Multi‑layer (2–3 thin film) ionic passivation of MOS circuitry exposed to ink. No — and specifically not anticipatory of claim 22/12/20: it is oxide/nitride ionic passivation, not diamond‑like carbon, and recites no 1,000–3,000 Å DLC thickness.
US 5,913,111 — Canon, Method of manufacturing an insulated gate transistor 1995‑01‑18 / 1999‑06‑15 § 102(b) Insulated‑gate transistor fabrication process. No. Process art for gate formation; nothing on the claimed ranges.
US 6,302,504 B1 — Canon, Recording head and recording apparatus using the same 1996‑06‑26 / 2001‑10‑16 § 102(b) Liquid‑jet recording head with on‑substrate drive/element control. No. On‑chip logic + drivers known; no claimed numerics, no DLC.
WO 00/61372 A1 — Olivetti Lexikon S.p.A., Drive circuit for a thermal ink jet printhead pub. 2000‑10‑19 (priority 1999‑04‑12) § 102(b) (printed pub.) Printhead drive circuit (switching/matrix addressing of heater drivers). No. Addressing/drive‑circuit element only. (Full text not retrieved — characterization from title/bibliographic data.)
US 6,365,917 B1 — Semiconductor Energy Laboratory, Semiconductor device 1998‑11‑25 / 2002‑04‑02 § 102(b) TFT/semiconductor device structure. No. Peripheral MOS device art.
US 2001/0035863 A1 — Kimura, Electronic device and driving method thereof pub. 2001‑11‑01 (filed 2000‑04‑26) § 102(b) Electronic‑device drive method. No. Peripheral.
US 2002/0125511 A1 — Mineo Shimotsusa (Canon), Semiconductor device, method of manufacturing the same and liquid jet apparatus pub. 2002‑09‑12 (filed 2001‑02‑16) § 102(b) Printhead substrate + liquid‑jet apparatus. No. Substrate/device integration only.
US 6,422,676 B1 — Hewlett‑Packard, Compact ink jet printhead 2001‑06‑19 / 2002‑07‑23 § 102(b) "Compact" thin‑film substructure/die with FET drive circuits, primitive‑select addressing, heater resistors, composite SiN/SiC + Ta passivation. No. Supplies "compact die + FET drivers + passivation," but passivation is SiC/SiN + Ta, not DLC; no claimed numerics.
US 6,478,404 B2 — Hewlett‑Packard, Ink jet printhead 2001‑01‑30 / 2002‑11‑12 § 102(b) Common‑specification sibling of '676 (compact die, FET drive array, orifice plate). No (same reasons as '676).
US 6,488,363 B2 — Hewlett‑Packard, Energy balanced printhead design 2001‑01‑30 / 2002‑12‑03 § 102(b) Heater‑energy balancing across the array. No.
US 6,523,935 B2 — Hewlett‑Packard, Narrow ink jet printhead 2001‑01‑30 / 2003‑02‑25 § 102(b)/(e) Narrow‑substrate printhead layout. No. Die/width context; no claimed driver active‑area range.
US 6,592,207 B1 — Silverbrook Research, Power distribution arrangement for an inkjet printhead 1998‑10‑16 / 2003‑07‑15 § 102(e) (filed 1998‑10‑16); § 102(a) as published Power/ground distribution on the printhead. No. Relevant only to the ground‑bus/power‑bus (96/98) disclosure of '012 FIG. 11.
JPH 02‑134256 A — Casio, Thermal head and its manufacturing method 1988‑11‑16 / 1990‑05‑23 § 102(b) (printed pub.) Japanese counterpart family member to US 5,055,859. No. Same content limits as § 3.6.
JPH 03‑205833 A — Murata Mfg., Manufacture of semiconductor device 1990‑01‑05 / 1991‑09‑09 § 102(b) (printed pub.) Semiconductor device manufacture. No. Peripheral process art.

5. "Family Cites Families" (5) — cited in the family, not the U.S. examiner list

Full citation Date Description § 102 effect on '012
US 6,398,347 B1 — Hewlett‑Packard, Energy balanced ink jet printhead filed 2000‑07‑24 / granted 2002‑06‑04 Energy‑balanced printhead. (Note: the earlier Obviousness section rendered this as "US 6,239,8347," an apparent typo; the literal identifier in the citation record is US 6,398,347 B1.) No. Heater‑energy distribution only.
CN 2457829 Y — Printer heating drive circuit and its device 2001‑10‑31 Heating‑drive circuit (utility model). No. Drive‑circuit element only; no English full text retrieved.
JP 2002‑370363 A — Canon, Substrate for inkjet recording head, inkjet recording head, inkjet recording device pub. 2002‑12‑24 Inkjet recording‑head substrate. No. Substrate integration; no claimed numerics, no DLC.
JP 2002‑370348 A — Canon, Printhead substrate, printhead and printing apparatus pub. 2002‑12‑24 Printhead substrate/printing apparatus. No. Same.
CN 1206104 C — ITRI, Drive transistor structure and manufacturing method of inkjet printing head chip granted 2005‑06‑15 Chinese family member of US 6,666,545. No (see § 3.4). Post‑dating grant means its § 102 relevance runs through the US 6,666,545 application's 2002‑01‑08 filing date.

6. Consolidated § 102 element map for the independent claims

Independent claim limitation Best single cited reference Does that reference alone anticipate?
Semiconductor substrate for a microfluid ejection head US 4,947,192; US 6,102,528 Partly (element only)
Fluid ejection actuators (heater resistors) on the substrate US 4,947,192; US 5,055,859; HP 6,422,676 Partly (element only)
Driver transistors driving the actuators US 6,102,528; US 6,666,545; US 5,085,473 Partly (element only)
Driver active area ≈1,000–<15,000 µm² (claim 1) — none — No
Driver active‑area width ≈100–<400 µm (claim 13) US 6,666,545 discloses "over 400 µm" No — teaches outside the range
Logic circuits (≥1 logic transistor) coupled to drivers US 4,947,192 ("logic"); US 5,055,859 (shift register/latch); US 6,102,528 (addressing circuitry) Partly (element only)
High‑density array of MOS transistors US 6,102,528 (parallel source/drain arrays); US 6,666,545 (parallel MOSFETs, comb gate) Partly (element only)
Logic gate length 0.1–<3 µm US 6,102,528 gives 3 µm (power device) No — 3 µm is excluded by "<3"
LDD source/drain (claims 4, 8, 16, 19, 24, 28) US 5,075,250 (n⁻ drift/LDD) Partly (element only)
DLC protective layer 1,000–3,000 Å (claims 12, 20, 22) — none — (US 5,010,355 = ionic passivation; HP '676 = SiN/SiC + Ta) No
Cartridge body + nozzle plate (claim 13) HP 6,422,676 / 6,478,404 (orifice plate, cartridge context) Partly (element only)

Reading: every row of the "does it anticipate" column that matters is a No. The cited art is a § 102(b)/§ 102(e) evidence pool, not an anticipation record.


7. Grounding / verification trail and caveats

Verified from full text or PDF in this session: US 6,102,528 (PDF + full text); US 4,947,192 (EP 0401440 A1/B1 abstract + secondary confirmation in US 6,022,482); US 5,055,859 (full text + EP 0369347 A2); US 5,085,473 (PDF + full text); US 6,666,545 (full text + USPTO Official Gazette entry). Sources: Google Patents (https://patents.google.com/patent/US…), FreePatentsOnline, and the USPTO daily‑official‑gazette HTML for the '545 grant.

Characterized from titles/bibliographic data only (flagged, not relied on for any conclusion): WO 00/61372; US 6,302,504; US 6,365,917; US 2001/0035863; US 2002/0125511; US 6,523,935; US 6,488,363; US 6,592,207; US 5,913,111; US 4,567,353; JPH 02‑134256; JPH 03‑205833; and the four CN/JP family citations. A formal opinion should pull each full text. None of the "no anticipation" conclusions depends on a reference whose text I did not retrieve, because each conclusion rests on an absent numeric limitation that no citation record attributes to those references.

§ 102 vs § 103 — do not conflate. The earlier Obviousness section correctly concluded that the combination of US 6,102,528 + US 4,947,192/US 5,075,250 + US 6,666,545 renders claims 1–21 obvious. That is § 103. It is not anticipation, and nothing in this section should be read as saying any single reference "reads on" the claims.

Contradiction flagged for the record: the Obviousness section's Combination‑A/B text refers to "US 6,239,8347." The citation record lists US 6,398,347 B1. Per the literal-identifier rule, US 6,398,347 B1 is the correct citation; the earlier rendering appears to be a typographical error, and no substantive conclusion changes.


8. One-paragraph answer

For US 7,018,012 B2, the cited prior art comprises 23 references (+5 family citations) that are overwhelmingly § 102(b) Xerox/Canon/HP/Casio/ITRI art (plus US 6,666,545 as § 102(e) art via its 2002‑01‑08 U.S. filing). The most relevant are US 6,102,528 (compact high‑voltage MOS drive transistor integrated with heaters and addressing circuitry at up to 1200 spi, 3 µm gate, to reduce substrate area), US 4,947,192 and US 5,075,250 (monolithic integration of logic, MOS drivers and heater resistors, with n⁻ LDD structures), US 6,666,545 (IDH driver MOSFETs in parallel comb gates with body contacts embedded in source to minimize chip area; active region "over 400 µm"), and US 5,085,473 / US 5,055,859 (MOS driver on the same chip as the transducer; shift‑register/latch/current‑supply logic driving polysilicon heaters). None of them, alone, anticipates any of claims 1–30, because no cited reference discloses the driver active‑area range of ~1,000 to <15,000 µm² (claim 1), the driver active‑area width of ~100 to <400 µm (US 6,666,545 in fact discloses over 400 µm, i.e., outside the range), the logic‑transistor gate length of 0.1 to <3 µm (US 6,102,528's 3 µm figure is excluded by "less than about 3 microns" and is a power device, not logic), or the 1,000–3,000 Å diamond‑like carbon protective layer of claim 22 (the closest passivation art is ionic oxide/nitride or SiN/SiC + Ta). Their genuine force is as a § 103 combination record, as set out in the earlier Obviousness section — not as a § 102 anticipation record.

Generated 9/24/2026, 11:22:31 AM

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

✓ Generated

Obviousness Analysis of US 7,018,012 B2 Under 35 U.S.C. § 103

Scope and approach

This analysis uses the 23 prior-art references listed in the "Citations" section of the Google Patents record for US 7,018,012 B2, plus the five "Family Cites" entries, which represent the art the examiner (and third parties) considered during prosecution. I supplemented the record with the full text/abstracts of the most load-bearing references (Xerox US 6,102,528; Xerox US 4,947,192; Xerox US 5,075,250; HP US 6,422,676 and US 6,478,404; ITRI US 6,666,545). For references where I could not retrieve full text (e.g., WO 00/61372, US 6,523,935, US 6,302,504, US 2002/0125511, US 6,592,207, US 6,365,917), my characterizations are based on titles, bibliographic data, and well-established state of the art, and are flagged accordingly.

The patent is expired (adjusted expiration 2024-10-13), was asserted in Slingshot Printing LLC v. HP Inc., 6:19-cv-00549 (W.D. Tex.), and was settled/dismissed (~Jan. 2021) with no IPR, no claim construction, and no final validity determination on any of its 30 claims. Accordingly, this is an untested § 103 case, and the ranges below are assessed at their ordinary meaning.


1. The claimed invention in functional terms

Independent claim Device Key recited limitations
1 Semiconductor substrate for a microfluid ejection head (a) fluid ejection actuators on substrate; (b) driver transistors, each with active area ~1,000 to <15,000 μm²; (c) logic circuits (≥1 logic transistor) coupled to the drivers; (d) driver + logic transistors = high-density array of MOS transistors; (e) at least the logic transistors have gate length 0.1 to <3 μm
13 Microfluid ejection cartridge Adds cartridge body + nozzle plate; drivers each have active-area width ~100 to <400 μm; same high-density MOS array; logic transistor gate length 0.1 to <3 μm
22 Semiconductor substrate for an inkjet printhead Heater resistors with diamond-like carbon (DLC) protective layer 1,000–3,000 Å; drivers + logic; logic transistor gate length 0.1 to <3 μm

Dependent claims add routine refinements: heater resistance 70–150 Ω (3, 14, 23); driver LDD drain (4, 16, 24); driver active-area width 100–400 μm (5, 25); logic "selects a gate" of the drivers (6, 17, 26); driver on-resistance <20 Ω (7, 18, 27); LDD source and drain (8, 19, 28); driver gate length 0.1 to <3 μm (9, 21, 29); driver channel length 0.1 to <3 μm (10, 30); DLC layer (12, 20).

What the invention actually is (and what a § 103 challenger should emphasize): not a new circuit function, not a new material, and not a new architecture — it is a dimensional/geometry optimization of an old, well-documented structure (monolithic thermal-inkjet chip with on-chip logic + MOS power drivers + heater resistors), asserting compact transistor footprints (small active area, sub-3-micron logic gates) to shrink silicon area and cost.


2. Person of ordinary skill in the art (POSITA)

A POSITA as of November 2003 would be a B.S./M.S. electrical engineer or materials scientist with ~3–5 years in (i) MOS/VLSI device design and semiconductor processing, and (ii) thermal-inkjet printhead integration (thin-film resistors, power FET drivers, on-chip addressing logic). She would be fluent in MOS scaling rules, breakdown/punch-through trade-offs for high-voltage drivers, and the economics of die-per-wafer cost. All references below are in her core literature.


3. The cited art is a ready-made obviousness record

The cited references are not disparate — they form a single, self-referencing line of development in monolithic thermal-inkjet chips, with express cross-citations and a shared problem statement:

  • US 6,102,528 (Xerox, "Drive transistor for an ink jet printhead," filed 1997, issued 2000) — the single closest reference. Its background states the problem the '012 patent claims to solve: as resolution rises above 300 spi it became "difficult, if not impractical, to layout compact MOSFET drive transistor switches that fit into the space available behind each heating element without increasing the size of the silicon substrate required," and "when the silicon area required for each printhead increases, the number of printheads which can be made from each silicon wafer decreases, thus driving up the manufacturing cost." '528 discloses a drive transistor integrally formed on p-type silicon within a printhead containing both the heating elements and printhead addressing circuitry means (i.e., logic + drivers + heaters on one chip), solves the punch-through/breakdown barrier with a pocket implant and graded drift region, "enabl[ing] production of printheads with resolutions up to 1200 spi," and gives a working example with 3 μm gate length and >65 V breakdown. At 1200 spi the nozzle pitch is ~21 μm, and at 600 spi ~42 μm — the per-driver active areas the '012 patent claims (1,000 to <15,000 μm², widths 100 to <400 μm) are precisely the sizes the geometry forces once a '528-style compact driver is placed behind each heater.
  • US 4,947,192 (Xerox, "Monolithic silicon integrated circuit chip for a thermal ink jet printer," 1990) — foundational disclosure of "a monolithic silicon semiconductor integrated chip incorporating both MOS transistor drivers and resistive heater elements" on one substrate, described in the chip as containing "active driver, logic and resistive heater elements," using polysilicon-gated MOS switches and polysilicon resistors on field oxide. Discloses all structural elements of claim 1 except the numbers.
  • US 5,075,250 (Xerox, "Method of fabricating a monolithic integrated circuit chip for a thermal ink jet printhead," 1991) — the companion process for producing "logic, driver and transducer elements on the surface of a common silicon substrate," including n− drift-layer implants for the logic and driver sections — i.e., the LDD-type structures of dependent claims 4/8/16/19/24/28.
  • US 6,666,545 (ITRI, "Driver transistor structure of inkjet print head chip," filed 2002, published 2003) — § 102(e) prior art (filed 2002-01-08, before the '012 priority date of 2003-11-14). Discloses the integrated-driver-head (IDH) chip, a large-area MOSFET made of parallel comb-gate elements behind each heater, and body contacts embedded in the source so that "the area occupied by the driver transistor can be largely saved, which is good for minimizing the inkjet print head chip and reducing manufacturing costs" — an express motivation to shrink the driver footprint. Its "active region width ... over 400 μm" example sits at the boundary of claim 13's "100 to <400 μm," and its stated goal of area minimization points directly at the claimed range.
  • US 6,422,676 / US 6,478,404 (HP, "Compact ink jet printhead" / "Ink jet printhead," 2001 filings) — disclose a "compact" thin-film substructure/die with FET drive circuits (FIG. 7), primitive-select/addressing traces, heater resistors, and a composite SiN/SiC + tantalum passivation stack, driven by the need for "a compact ink jet printhead that has a large number of ink drop generators" without increased "substrate size and/or substrate fragility."
  • US 6,302,504 (Canon), WO 00/61372 (Olivetti Lexikon), US 6,592,207 (Silverbrook), US 2002/0125511 (liquid jet apparatus) — additional evidence that on-chip driver + logic (shift registers/latches/decoders selecting driver gates per nozzle, as in '012's FIG. 4 NAND/inverter arrangement) and power distribution on printhead substrates were conventional by 2003.
  • US 6,239,8347 / US 6,488,363 / US 6,523,935 (HP, energy-balanced / narrow printheads) and US 5,085,473 (Xerox, MOS driver with temperature control) — density- and area-driven design work in the same field.
  • US 4,308,549 (Xerox high-voltage FET), US 5,010,355 (ionic passivation), US 6,365,917 / US 2001/0035863 (Semiconductor Energy Lab devices), US 5,913,111 (Canon, insulated-gate transistor process), US 4,472,875 (Teletype, IC manufacturing) — background MOS processing/scaling and passivation art, useful for the sub-3-micron-gate and passivation limitations.

Combinability evidence in the art itself: '528's background explicitly situates itself against '192, '355, 5,159,353, and '549; ITRI '545 cites '528 as its closest U.S. reference; HP '676 and '404 share a common specification. The references are cumulative improvements on the same chip architecture, which strongly supports a finding that a POSITA would treat them as a single body of knowledge.


4. Element-by-element mapping for independent claim 1

Claim 1 limitation Prior art Assessment
Semiconductor substrate for a microfluid ejection head '192; '528; HP '676/'404; '545 Fully anticipated in kind
Fluid ejection actuators on the substrate '192 (polysilicon resistors on field oxide); '676 (thin-film heater resistors 56); '528 Disclosed
Driver transistors on the substrate driving the actuators '192 (MOS switches); '528 (power MOSFET drive transistor); '676 (FET drive circuits); '545 (driver MOSFET array) Disclosed
Each driver transistor active area 1,000 to <15,000 μm² No reference recites these exact numbers — but '528 (1200-spi driver sized to fit behind a ~21 μm-pitch heater), '545 (driver area deliberately minimized), '676 (compact die) make the range the forced/obvious outcome of applying the prior art's own area-reduction teaching. The '012 specification provides no criticality data for the range — no examples, no comparative results — supporting treatment of the range as an optimization of a result-effective variable Range obvious (see § 6)
Logic circuits (≥1 logic transistor) coupled to the drivers '192 ("logic ... elements"); '250 (logic + driver on common substrate); '528 ("addressing circuitry means"); '676 (primitive select); WO 00/61372 (drive circuit); Canon '504 Disclosed
Driver + logic transistors = high-density MOS array '528 (parallel-array MOSFET layout behind heaters; 1200 spi); '545 (parallel MOSFET elements in a comb gate) Disclosed
At least the logic transistors have gate length 0.1 to <3 μm Logic runs at low voltage on the same chip, so standard MOS design rules apply; '250 fabricates the logic with n− drift LDD transistors; '528's example uses a 3 μm gate on the power device and conventional MOS logic nearby; '913,111/'636,5917/'472,875 show small-geometry MOS processes. The claimed band simply brackets the standard sub-micron-to-3-micron geometry for printhead ASICs of the era Obvious (see § 6)

Claim 13 adds a cartridge body, nozzle plate, and the driver "active-area width 100 to <400 μm." Cartridge + nozzle-plate assemblies are ubiquitous in the art (HP '676's orifice plate; Canon '504; Lexmark's own commercial cartridges). The 100–400 μm width range again follows from laying out a '528/'545-style driver strip behind heaters at a 10–84 μm pitch (the '012 specification's own FIG. 11 range) — arithmetic consequence of the density targets the prior art already pursued.

Claim 22 swaps "fluid ejection actuators" for "heater resistors having a DLC protective layer 1,000–3,000 Å." Every element except DLC maps as above. The DLC limitation is the one genuinely hard-to-map feature on this record (see § 7).


5. Specific combinations that render the claims obvious

Combination A — Primary case against claims 1, 5–11, 13–21 (all but the DLC claims)

US 6,102,528 (Xerox) in view of US 4,947,192 / US 5,075,250 (Xerox), further in view of US 6,666,545 (ITRI) and/or US 6,422,676 or US 6,478,404 (HP).

  • Claim 1: '192 and '528 give the monolithic chip with heater resistors, MOS power drivers, and on-chip addressing logic. '528 supplies the reason and the mechanism for compact drivers (pocket implant → reduced source-drain spacing → smaller silicon area at 600–1200 spi). '545 supplies body-contacts-in-source to cut further driver area and "minimizing the inkjet print head chip." HP '676/'404 supplies the compact-die design context (many drop generators on a small substrate). A POSITA combining them arrives at drivers sized within the claimed 1,000–<15,000 μm² window as a matter of course, with conventional sub-3 μm logic gates (see § 6).
  • Dependent claims: LDD drain (4) and LDD source+drain (8): '250 expressly forms n− drift "lightly doped drain structures in the logic and driver sections"; '528's graded drift/pocket implant is the same concept for the power device. On-resistance <20 Ω (7): routine sizing for a 70–150 Ω heater (3) at 8–12 V — the '012 specification itself defines driver resistance as "less than 10% of total resistance," i.e., a design target, not an invention. Driver gate/channel length 0.1 to <3 μm (9, 10): '528's 3 μm gate scaled down under its own punch-through solution. Logic "selects a gate" of the drivers (6): the '012 FIG. 4 NAND + inverter per nozzle is the standard multiplexed-address architecture of WO 00/61372, Canon '504, and HP '676's primitive select.

Combination B — Independent-support case against claims 1, 13

US 4,947,192 and/or US 5,075,250 as primary (monolithic logic + drivers + heaters), in view of US 6,102,528 (density/area-driven compact drivers) and US 6,666,545 (driver area minimization). Even if a challenger prefers the older Xerox chip as the anchor, the combination yields the same result. Note the art's own cross-citation: '528's background reviews '192, so a POSITA reads them together as a matter of course.

Combination C — For claim 13's cartridge context

HP US 6,422,676 or US 6,478,404 (compact printhead/cartridge with FET drive array, orifice plate, passivation) in view of Xerox '528 + '192/'250. HP's compact-head references already sit inside a cartridge environment (they are HP print-cartridge patents), supplying the "nozzle plate attached to the substrate" and cartridge-body context with the same driver/logic density motivation.

Combination D — For claim 22 (with the DLC caveat below)

The Combination A references, plus HP '676/'404 (heater passivation stack over the resistors) and/or US 5,010,355 (passivation of printhead circuitry). The structure of claim 22 — DLC-protected heaters + compact drivers + sub-3 μm logic — is the same combination as A. Only the specific choice of DLC as the protective material needs separate support, which is not supplied by the four corners of the cited art (see § 7).


6. Why a POSITA would have been motivated to combine — and why the numeric ranges are obvious

The prior art contains an express, documented motivation. '528's background, quoted above, is essentially a confession of the problem the '012 patent addresses: fitting MOSFET drivers into shrinking per-nozzle space at high resolution without enlarging the substrate, because substrate area drives manufacturing cost. '545 says the same for driver area. HP '676 says the same for the die overall. The claimed dimensions are not a new goal — they are the metric of a goal the cited art already pursued.

Predictable application of known techniques (KSR, 550 U.S. 398 (2007)). The combination does not change the function of any component: transistors still switch current, resistors still nucleate bubbles, logic still demultiplexes address lines. A POSITA would combine '528's compact high-voltage driver with '192/'250's monolithic logic integration and '545's area-saving layout "according to known methods" and "with a reasonable expectation of success," yielding "predictable results." Post-KSR, no teaching-suggestion-motivation test requires a reference to point at another reference.

Obvious-to-try / result-effective variable. The active-area range (1,000 to <15,000 μm²), the width range (100 to <400 μm), the pitch (10–84 μm in the '012 specification), and the sub-3 μm logic gate length are all dimension choices bounded by (i) nozzle pitch at the resolutions the art already targeted (600–1200 spi per '528) and (ii) the MOS process generations available in 2003. The Federal Circuit has long treated "a range of a result-effective variable" as obvious where the art supplies a reason to optimize (see, e.g., In re Applied Materials, 692 F.2d 1289 (Fed. Cir. 1982); In re Aller, 220 F.2d 454 (CCPA 1955)); the record here has far more — an explicit cost-driven design incentive.

No evidence of criticality or unexpected results. The '012 specification discloses no comparative data, no examples showing that 15,000 μm² (vs., say, 20,000) or a 3.0 μm logic gate (vs. 2.9 μm) makes any functional difference. "About 1,000 to less than about 15,000 μm²" and "0.1 to less than about 3 microns" read like ceiling values chosen to encompass the density targets and process nodes of the day. On this record, a patentee defending these ranges would bear the burden of showing criticality — a burden the specification never attempts.

The sub-3 μm logic-gate limitation is especially weak as a differentiator. Claim 1 does not require sub-3 μm driver gates — only logic gates, which operate at low voltage and were fabricated at sub-micron-to-2-micron geometries as a matter of course in 2003-era ASICs. Even for the dependent claims that extend the range to the drivers (9, 21, 29), '528's pocket-implant/graded-drain solution expressly permits shorter gates without breakdown loss at >65 V, and its 3 μm working example sits at the claimed boundary, trivially scaled below it. The 0.1 μm floor is far below anything a printhead power device needs and reads as a conventional "catch-all" lower bound.

The references are in the same field, address the same problem, and are complementary rather than conflicting. Combining them requires no modification of any reference's principle of operation: '528's driver fits behind a '192-style heater; '545's body contacts shrink that driver further; HP's compact die packages the result. There is no teaching away in any retrieved text (e.g., no reference discourages shrinking logic gates or embedding body contacts). Cross-citation among '528, '192, and '545 affirmatively shows the art developed as a chain of area-reduction improvements.


7. Relative strength of the case, claim by claim

Claims Obviousness strength on the cited record Explanation
1, 5–11, 13–21 (excluding 12, 20) Strong Every structural element is in the Xerox/HP/ITRI art; the ranges are optimization of an expressly motivated design goal with no criticality data
2–4, 6–10 (dependents of 1) Strong Heater resistance, LDD, gate-length, on-resistance, and logic-select limitations all map to '250/'528/'545/WO'372
22 (independent, DLC) Moderate-to-weak on this record The combination is the same as for claim 1, but none of the 23 cited references (or the 5 family cites) discloses a diamond-like-carbon protective layer over heater resistors, to the extent verifiable from this record. HP '676 uses SiN/SiC + Ta; Xerox '355 uses ionic (multi-layer oxide/nitride-type) passivation. A § 103 case on claim 22 would need DLC-teaching art outside the cited list (DLC overcoats for inkjet heaters were known in the industry by the late 1990s, but I did not verify a specific enabling reference and will not assert one without a citation). If the challenger has such a reference, claim 22 falls with the rest; if not, the DLC limitation is the most plausible surviving point
12, 20 (DLC dependents) Same caveat as 22 DLC is the entire question

Candid caveats on reference content. I verified the substance of US 6,102,528, US 4,947,192, US 5,075,250, US 6,666,545, US 6,422,676, and US 6,478,404 from full-text sources (Google Patents / FreePatentsOnline / USPTO PDFs). For WO 00/61372, US 6,302,504, US 6,523,935, US 6,488,363, US 6,592,207, US 6,365,917, US 5,913,111, US 2002/0125511, and the Japanese/Chinese references, I relied on titles and bibliographic data; a formal opinion should pull each full text before relying on the specific mapping I've assigned. None of my conclusions depends on an unverified reference — the core case rests on '528, '192/'250, and '545, whose relevant content I verified directly.


8. Secondary considerations (weak on this record)

  • No litigation-developed indicia exist: the patent was never IPR-challenged, never claim-construed, and the only assertion (Slingshot v. HP) settled before any validity finding. There is no finding of long-felt need, copying, commercial success with proven nexus to the claims, or industry skepticism — and equally no record of the contrary.
  • Commercial success nexus problem: any Lexmark-era commercial success of printheads embodying the claims would face a weak nexus argument because the claimed ranges are unproven as the driver of consumer demand versus price, resolution, and reliability.
  • The examiner allowed the claims, which is evidence of no obviousness at the time of examination, but the cited art — particularly '528 (2000) and '545 (published 2003-12-23, just after the 2003-11-14 priority date) — is precisely the kind of compact-driver art that makes the claims vulnerable now. The absence of any IPR despite years of high-stakes litigation is most plausibly explained by settlement economics, not by claim strength (as the earlier sections of this file noted).

9. Conclusion

On the cited record, US 7,018,012's core contribution — a monolithic microfluid ejection head whose per-nozzle MOS drivers occupy ~1,000 to <15,000 μm² and whose logic transistors use 0.1-to-<3 μm gates to cut silicon area — would have been obvious under § 103 over:

  1. US 6,102,528 (compact high-voltage drivers behind high-resolution heaters, expressly to reduce substrate area), in view of
  2. US 4,947,192 and/or US 5,075,250 (monolithic integration of logic, drivers, and heaters with LDD-type structures), and
  3. US 6,666,545 and/or US 6,422,676 / US 6,478,404 (further driver-area and die-area minimization in the same art line).

The motivation is documented in the art itself (per-nozzle space limits at 600–1200 spi; die area ⇒ manufacturing cost; body-contact and pocket-implant techniques to reclaim area), and the claimed numbers are unremarkable optimization of result-effective variables with no showing of criticality. Claims 1–21 (except the DLC-dependent claims 12 and 20) face a strong obviousness case. Claim 22 and its DLC-dependent claims stand or fall on whether the challenger can supply DLC-overcoat art beyond the four corners of the cited list — the cited references do not, on this record, name DLC.

Key grounding references:

Generated 9/6/2026, 6:48:31 PM

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