US 6963505

A concise summary of US Patent 6,963,505 is as follows:

Title: Method circuit and system for determining a reference voltage

Assignee: The original assignee was Aifun Semiconductors Ltd. The current assignee of record is Spansion Israel Ltd.

Inventors: Guy Cohen

Filing Date: October 29, 2003

Issue Date: November 8, 2005

Abstract:
The present invention is a method, circuit and system for determining a reference voltage. Some embodiments of the present invention relate to a system, method and circuit for establishing a set of operating reference cells to be used in operating (e.g. reading) cells in an NVM block or array. As part of the present invention, at least a subset of cells of the NVM block or array may be read using each of two or more sets of test reference cells, where each set of test reference cells may generate or otherwise provide reference voltages at least slightly offset from each other set of test reference cells. For each set of test reference cells used to read at least a subset of the NVM block, a read error rate may be calculated or otherwise determined. A set of test reference cells associated with a relatively low read error rate may be selected as the set of operating reference cells to be used in operating (e.g. reading) other cells, outside the subset of cells, in the NVM block or array. In a further embodiment, the selected set of test reference cells may be used to establish an operating set of reference cells having reference voltages substantially equal to those of the selected test set.

Plain-Language Overview of Independent Claims:

This patent contains three independent claims:

• Claim 1: Describes a method for choosing the best reference voltage level for reading a memory cell. The process involves using a number of different possible reference levels to read a set of memory cells. For each of these levels, a "read error rate" is calculated. The reference level that results in a relatively low error rate is then selected for use.

• Claim 13: Details a method for creating a "reference cell" based on a chosen reference voltage. It starts by determining the read error rate associated with various possible reference voltages. A voltage that produces a low error rate is then selected. Finally, a physical reference cell is established based on this chosen voltage.

• Claim 29: Outlines a method for operating a memory array using a selected reference voltage. This involves determining the read error rate for one or more possible reference voltages, and selecting the one with a relatively low error rate. A reference cell is then established based on this selected voltage, and this new reference cell is used for the operation of the memory array.

A search of the CAFC (Court of Appeals for the Federal Circuit) dockets for 2026 did not yield any public records of litigation involving US Patent 6,963,505. However, this does not definitively mean no litigation exists, as some case details may not be publicly accessible or may not have been docketed in the specified year.