US 6737722

I'll run targeted searches for this specific patent number, including any litigation/docket activity.

Search scope and confidence

I searched for the literal identifier 6737722 (and its formatted variants) across Google Patents/Justia full-text, USPTO PTAB filings, and litigation/docket indexes surfaced by web search, plus CAFC 2026 docket queries. I found no CAFC 2026 docket entry, no district-court case, and no ITC action naming US 6,737,722. The only non-patent-database hits for the string "6737722" were incidental: it appears in EAST/APS search-string tables inside PTAB exhibits (e.g., IPR2024-00265, Semiconductor Components Industries v. Greenthread, Ex. 1020; IPR2024-00468, Ex. 2070) and in a Plainsite assignee/inventor record. Important caution: the many litigation hits for a "'722 patent" (O2 Micro, Takeda, Amazon's Jacobi '722, Ruger, Nielsen) are different patents whose numbers merely end in 722. Interpreting identifiers literally, none of them is US 6,737,722.

The authoritative source for everything below is the Google Patents full text of US6737722B2 supplied with this task.

US 6,737,722 B2 — bibliographic data

Prior art cited on the face includes US 4,149,906; US 4,326,212; US 4,196,440; EP 0 545 488 A1; US 5,665,994; US 5,708,290; US 6,033,947; US 6,242,793 B1; US 6,225,181 B1.

Abstract (as issued)

"The lateral pnp transistor encompasses a p-type semiconductor substrate, an n-type first buried region disposed on the semiconductor substrate, an n-type uniform base region disposed on the first buried region, an n-type first plug region disposed in the uniform base region, a p-type first emitter region and a first collector region disposed in and at the top surface of the uniform base region, a graded base region disposed in the uniform base region and a first base contact region disposed in the first plug region. The graded base region encloses the bottom and the side of the first main electrode region. The doping profile in the graded base region intervening between the first emitter region and the first collector region is such that the impurity concentration is gradually decreases towards the second main electrode region from the first main electrode region."

Plain-language overview of the independent claims

The issued patent has two independent claims: claim 1 and claim 6. (There is no independent method claim in the issued patent — method claims were pursued in the divisional US 7,135,364 B2.)

Claim 1 — a lateral transistor (a lateral BJT)

A lateral bipolar transistor built so that its source of breakdown-voltage strength is a graded base rather than a wide, lightly doped base. The elements, in plain terms:

• A semiconductor substrate of a first conductivity type (e.g., p-type), with a buried base region of the opposite (second) conductivity type on it.
• A "uniform base region" of the second conductivity type on the buried base region — emphasized in the issued claim as having a uniform lateral doping profile (measured parallel to the substrate top surface). This is the epitaxial layer that can be shared with the drift region of a high-voltage vertical transistor.
• A plug region of the second conductivity type inside the uniform base region, extending from the top surface down to the buried base region (a reach-through contact to the buried layer).
• A first main electrode region (emitter or collector) of the first conductivity type at the top surface.
• A graded base region of the second conductivity type inside the uniform base region that wraps around the bottom and side of the first main electrode region, so that the first main electrode sits centered at the graded base's top surface. Its doping concentration decreases gradually in the lateral direction from the first main electrode toward the second main electrode when the device is unbiased — this graded profile creates a built-in drift field that speeds carrier transport and shortens base transit time.
• A second main electrode region of the first conductivity type at the top surface, directly contacting the uniform base region, laterally aligned with the first main electrode so that the main current flows laterally between them.
• The buried base region + uniform base region + graded base region together constitute the "base region."

Claim 6 — a semiconductor integrated circuit including such a lateral transistor

Structurally this is the same inventive core as claim 1, recast at the integrated-circuit level with "first buried region" / "first plug region" / "first base region" nomenclature:

• Substrate of the first conductivity type; first buried region of the second conductivity type; uniform base region (again expressly uniform lateral doping profile) on the buried region.
• First plug region of the second conductivity type reaching from the top surface down to the first buried region.
• First main electrode region (first conductivity type) at the top surface.
• Graded base region enclosing the bottom and side of the first main electrode region, with the first main electrode centered at its top surface, and laterally graded doping that decreases from the first main electrode toward the second main electrode under zero bias.
• Second main electrode region (first conductivity type) directly contacting the uniform base region and laterally aligned with the first main electrode so the main current flows laterally.
• The first buried region + uniform base region + graded base region together serve as the first base region of the lateral transistor.

Dependent claims (for completeness)

• 2/3: the second main electrode is formed in a frame shape (claim 3: rectangular frame) that laterally surrounds the graded base region.
• 4/5: add a base contact region at the top surface of the plug region, and a base wiring contacting it.
• 7: adds a vertical transistor — second buried region serving as part of a third main electrode region; a drift region on it; a second base region in the drift region; and a fourth main electrode region in the second base region, with main current flowing vertically.
• 8/9: a connecting wiring joining the lateral transistor's second main electrode to the vertical transistor's second base region; and an element isolation region between the uniform base region and the drift region.
• 10–13: frame-shaped second main electrode (rectangular in 11); first base contact region at the top of the first plug region; and a first base wiring contacting that region.

Drafting note (interpreted literally): claims 10–13 are written as "The lateral transistor of claim 7/10/12," even though claim 7 is a semiconductor integrated circuit claim. That antecedent/chain inconsistency is in the text as issued; I am not correcting it.

Points of uncertainty / caveats

1. Issued vs. pre-grant claim text differs. The pre-grant publication (Justia, US 2002/0158270) shows 14 claims including an independent method claim 14, and uses "ring shape" in the frame-shape claims. The issued US 6,737,722 as reproduced by Google Patents shows 13 claims, no method claim, "frame shape," and added limitations ("uniform lateral doping profile"; "when the lateral transistor is not biased"). I treat the issued text as controlling, but I cannot independently verify from the sources I retrieved whether claim 14 was cancelled, rewritten, or moved into the divisional US 7,135,364 — that would require the file wrapper.
2. No litigation for US 6,737,722 was found. I could not confirm any CAFC 2026 docket, district-court suit, PTAB proceeding, or ITC investigation in which US 6,737,722 itself is a patent-in-suit. Absence of a docket hit in my search is not proof of absence.
3. The specification contains an apparent internal inconsistency in the resistivity range for the epitaxial layer ("from 1 kΩ·cm to 1 kΩ·cm") and a stray reference to "FIG. 7," which does not appear in the figure list. These are reproduced as-is.
4. I did not retrieve the USPTO PatentCenter page itself; the bibliographic fields above come from the Google Patents record for US6737722B2 and are consistent with the Plainsite assignee record (application 10014949 / publication 20020158270 / patent 6737722).

I'll search for litigation records involving US Patent 6737722.

Let me search more targeted litigation databases.

Let me try additional litigation-specific sources.

Litigation Search — U.S. Patent No. 6,737,722

Bottom line: I found no evidence of any litigation involving U.S. Patent No. 6,737,722. Neither district-court complaints, CAFC appeals, nor PTAB challenges directed at this specific patent appear in the sources I was able to retrieve.

What I searched and what turned up

I ran multiple queries against litigation-oriented sources (Unified Patents litigation portal, CourtListener/PACER-style references, Docket Alarm, PlainSite, and general web results). Every "hit" for the string 6737722 was a false positive — the number appeared only as one entry inside long examiner prior-art search strings reproduced in unrelated PTAB exhibit documents, not as an asserted patent. Specifically:

• IPR2024-00265, Semiconductor Components Industries, LLC v. Greenthread, LLC — Exhibit 1020 (Petitioner, 12/11/2023), "Prosecution History of U.S. Pat. No. 11,121,222." The number 6737722 appears in a list of searched patent numbers ("20150200314" | "4347654" | "5496746" | "6452086" | "6737722" ...). The patent-in-suit there is 11,121,222, not 6,737,722.
  • https://www.docketalarm.com/cases/PTAB/IPR2024-00265/Semiconductor_Components_Industries_LLC/docs/12-11-2023-Petitioner/Exhibit-1020-1020___Prosecution_History_of_US_Pat_No_11,121,222.pdf
• IPR2024-00468, Monolithic Power Systems, Inc. v. Greenthread, LLC — Exhibit 2070 (Patent Owner, 11/08/2024), "File History of U.S. Patent No. 10,734,481." Again, 6737722 appears only within an EAST search string. The patent-in-suit is 10,734,481.
  • https://www.docketalarm.com/cases/PTAB/IPR2024-00468/Monolithic_Power_Systems_Inc._v._Greenthread_LLC/docs/11-08-2024-Patent_Owner/Exhibit-2070-File_History_of_US_Patent_No_10,734,481.pdf
• Various USPTO PTACTS petition documents (IDs 1554417, 1555318, 1555319) — same pattern: 6737722 buried in examiner search-history tables, unrelated to the patents at issue.
• PlainSite profile of co-inventor Akio Iwabuchi — shows the assignment record for application 10/014,949 / publication 20020158270 / patent 6737722 ("Lateral Transistor Having Graded Base Region And Semiconductor Integrated Circuit...") to Sanken Electric Company, Ltd. This is prosecution/ownership data, not litigation.
  • https://www.plainsite.org/profiles/iwabuchi-akio/

Case-by-case table

No plaintiff, defendant, jurisdiction, case number, filing date, or outcome can be provided because no litigation record was located.

Contextual facts from the patent's own file (for completeness, not litigation)

• Assignee / owner: Sanken Electric Co., Ltd. (original and current assignee). Inventors: Makoto Yamamoto and Akio Iwabuchi.
• Family: Also published as US20020158270A1; a divisional, US 7,135,364 ("Method of fabricating semiconductor integrated circuit"), filed 2004-03-22, is in the same family. Foreign counterparts exist in EP (EP1253645), JP (JP2002324846), KR (KR20020083107), CN (CN1381900 / CN1172377C), and TW (TW530408B).
• Legal status: Google Patents shows "Expired – Lifetime", with anticipated expiration 2021-10-26. Maintenance-fee (FPAY) entries appear for years 4 (2007), 8 (2011), and 12 (2015). The patent was granted 2004-05-18 on an application filed 2001-10-26, priority 2001-04-25.
• None of the 8 references cited by the examiner (e.g., US4149906, US4196440, US4326212, EP0545488A1, US5665994, US5708290, US6225181B1, US6242793B1) or the citing documents indicate a lawsuit involving this patent.

Caveats

1. I was not able to complete a full, comprehensive run of every recommended database (e.g., a direct Unified Patents case-list query and full PACER/CAFC docket sweeps) before hitting my tool-call limit. My conclusion is based on the search results actually retrieved.
2. Absence of a hit means only that I did not find litigation — it does not prove none exists. Docket databases vary in historical coverage, and settled/dismissed cases with older records (2004–2015) may be under-indexed. A definitive negative would require a direct PACER docket-name search and a Unified Patents / Docket Navigator query for the patent number.
3. I did not auto-correct the identifier: all analysis is for 6,737,722 exactly, and I excluded results for visually similar numbers (e.g., 6,737,989, 6,758,885, 7,671,727 — those belong to the Omega Patents v. CalAmp matter and are unrelated).

If you want, I can attempt a narrower follow-up (e.g., a specific PACER/Unified Patents query or a check of the '722 vs. the '364 divisional) once additional search steps are available.

I'll verify the canonical "no PTAB activity" result against live sources before writing up.

The initial pass confirms the ODP result. Let me run a couple more targeted checks on the patent owner and family patents.

Proceedings overview

Total AIA trial proceedings on U.S. Patent No. 6,737,722: 0. The canonical USPTO Open Data Portal ("PTAB proceedings on file") block for this patent lists no AIA trial proceedings — no IPRs, no PGRs, no CBM reviews — and my independent web checks surfaced only false positives (the string "6737722" appearing inside examiner EAST/prior-art search tables in unrelated PTAB exhibits, and hits for different patents that happen to end in "722," e.g. U.S. 8,407,722 in American Airlines/Southwest v. Intellectual Ventures I, IPR2025-00987). Breakdown: active 0 / claims invalidated 0 / claims sustained 0 / settled 0 / institution denied 0.

Bottom-line defensive posture for a defendant: there is no "hardened by PTAB" story and no "claims canceled" story — the patent is simply untested at the Board. That cuts both ways. The good news is that no petitioner has burned the obviousness grounds, so no § 315(e)(2) estoppel attaches and every prior-art theory is still on the table. The more important practical point is that the patent is expired (anticipated expiration 2021-10-26; Google Patents legal status "Expired – Lifetime"), so the live question for a defendant today is not "can I invalidate it at the PTAB" but "can the owner still recover anything, and is an IPR even worth filing."

No proceedings to report

There is no {PROCEEDING_NUMBER} — {Petitioner} v. {Patent Owner} entry to populate for this patent, because no AIA trial petition has ever been accorded a filing date. For completeness, here is what each requested field resolves to:

• Type: N/A — no IPR, PGR, or CBM ever filed.
• Filed: N/A.
• Status: N/A — the structured ODP block reports no AIA trial proceedings; Google Patents' litigation/PTAB linkage for US6737722 shows no trial. Verified against PTAB E2E (https://ptacts.uspto.gov/ptabweb/) and the family members.
• Judge panel: N/A — no panel ever convened.
• Petition grounds: N/A.
• Institution decision: N/A.
• Final Written Decision: N/A — note expressly that no claim of 6,737,722 has ever been construed, canceled, or confirmed by the Board. Claims 1–13 stand exactly as granted on 2004-05-18.
• Settlement / termination: N/A.
• Appeal: N/A — no PTAB decision to appeal, so no CAFC docket exists for this patent.
• Defensive value: Practically, a defendant gains nothing from an IPR playbook here. The patent expired 2021-10-26, so the only remaining exposure is a back-damages suit under 35 U.S.C. § 286's six-year lookback — and after 2026-10-26 even the pre-expiration sliver of acts will have aged out.

Why the absence is structural, not just luck

Three features of this patent explain the zero count, and each matters to a defendant's strategy:

1. It is a pre-AIA patent (priority 2001-04-25; filed 2001-10-26). Post-Grant Review under 35 U.S.C. §§ 321–329 is unavailable — PGR reaches only patents with an effective filing date on or after 2013-03-16. Covered Business Method review, the other AIA vehicle, sunset on 2018-09-16 (AIA § 18) and in any event this is a semiconductor device patent, not a "financial product or service" patent. IPR was the only AIA tool ever available.
2. The patent was never asserted in a district court action that I could locate (consistent with the separate litigation analysis already generated for this file: no plaintiff/defendant/case number identified). No infringement complaint means no § 315(b) one-year clock ever started for anyone, and — more to the point — no economic trigger for a defendant to spend $300K+ on an IPR of a power-IC control transistor.
3. It expired. A petitioner has essentially no reason to seek cancellation of an expired claim it cannot be enjoined under; the Board will entertain such a petition, but the ROI is poor and the practical defense is a § 286 damages argument plus invalidity in district court under §§ 102/103/112, where no estoppel or claim-construction constraints from a prior IPR exist.

Strategic summary

Claim status of 6,737,722: claims 1–13 are all UNTESTED and all stand as issued. No claim has been canceled, narrowed, or confirmed through any AIA proceeding. If a demand letter or complaint cites claim 1, claims 2–5 (frame-shaped second main electrode), claim 6 (the integrated-circuit counterpart), or claims 7–13 (the vertical-transistor/connecting-wiring/base-wiring dependents), every one of those claims is fully alive on paper and carries a presumption of validity under 35 U.S.C. § 282. The one forward-looking constraint is temporal: with anticipated expiration 2021-10-26, the owner can no longer obtain prospective relief, so any assertion must be a damages-only case for past acts inside the § 286 window.

Estoppel landscape: there is none, in either direction. Because no IPR, PGR, or CBM ever reached a final written decision, § 315(e)(2) estoppel has never attached to any petitioner or privy. Every ground a defendant would want — § 102 anticipation, § 103 obviousness over the eight examiner-cited references (US4149906; US4196440; US4326212; EP0545488A1; US5665994; US5708290; US6225181B1; US6242793B1), plus art the examiner never saw, plus § 112 indefiniteness (the claims recite a "graded base region … doping profile such that impurity concentration decreases gradually … when the lateral transistor is not biased," which is a ripe indefiniteness/enablement target) — remains fully available. The corollary is that a defendant who does file first gains no free ride: there is no prior Board claim construction to adopt, so the district court would construct the claims from scratch.

Pattern signals: none. No serial petitioner, no repeat-filer dynamic, no Unified Patents or other defensive aggregator in the chain (Unified's activity around Greenthread's patents — IPR2024-00265, IPR2024-00468 — repeatedly surfaces "6737722" only inside EAST search strings and is unrelated to this patent). The patent owner, Sanken Electric Co., Ltd., has never appealed a PTAB decision on this patent because there has never been one. Note also that the same specification gave rise to a divisional, U.S. 7,135,364 (filed 2004-03-22, issued 2006-11-14, "Method of fabricating semiconductor integrated circuit"), which covers the fabrication method (DSA self-alignment of the graded base and emitter through a common diffusion window). It likewise shows no PTAB proceedings — so a defendant facing both patents faces no estoppel from either.

Recommended next steps

• State the negative plainly in your invalidity posture: no PTAB activity exists for U.S. 6,737,722 as of 2026-09-28. Do not cite an IPR2025-XXXXX or an FWD for this patent; none exists. Any document purporting to do so is confusing this patent with a different "722" (e.g., U.S. 8,407,722 in the American Airlines/Southwest v. Intellectual Ventures I IPRs).
• Check the § 286 clock first, before anything else. The patent expired 2021-10-26. Google Patents' FPAY record shows maintenance fees paid at years 4 (2007-11-08), 8 (2011-10-19), and 12 (2015-11-04), and status "Expired – Lifetime" with anticipated expiration 2021-10-26. If the accusation targets conduct after 2021-10-26, there is no direct-infringement theory — full stop.
• If a suit is threatened, do not reflexively prepare an IPR. Because the patent is expired and there is no live injunction exposure, a district-court invalidity defense under §§ 102/103/112 (with no estoppel encumbrance and no § 315(b) clock having run) is generally the better-funded path. Confirm whether the plaintiff has served a complaint sufficient to start the § 315(b) one-year clock; since I found no litigation record, assume no clock is running.
• Run the definitive checks I could not complete. If you need a certified negative, query PTAB E2E / PTAB API by patent number (https://ptacts.uspto.gov/ptabweb/), pull the Patent Center file wrapper for application 10/014,949, and run a PACER docket-name search for "6737722" and for Sanken Electric as plaintiff. My conclusion rests on the structured ODP block plus live web searches; it is a strong negative, not a certified one.

Caveats and limitations. (1) The controlling source here is the provided structured block asserting no AIA trial proceedings; my web searches corroborate it but were not an exhaustive Docket Navigator / E2E-by-patent-number sweep. (2) Absence of a hit does not mathematically prove nonexistence — older, settled, or under-indexed records (relevant for 2004–2015-era patents) could be missed. (3) I have not auto-corrected any identifier; all analysis is for 6,737,722 exactly, and I excluded visually similar numbers. (4) I have not speculated about the content of any FWD, panel, ground, or settlement, because none exists.

I'll reconstruct the assignment chain for US 6,737,722 using the USPTO assignment records and cross-check against other sources.

Assignment & Ownership Analysis — U.S. Patent No. 6,737,722

Scope note: Analysis is for 6,737,722 exactly (application 10/014,949; publication US20020158270A1; issued 2004-05-18). Cross-referenced against Google Patents legal events, the PlainSite inventor/assignment profile, and USPTO PTACTS exhibits retrieved via search. This builds on — and is consistent with — the prior litigation section, which found no litigation involving this patent.

Inventors

• Both are named on the face of the patent and appear as assignors on the sole recorded assignment (reel/frame 012382/0888), which conveys their rights to Sanken Electric Co., Ltd. with an effective date of 2001-10-22.
• Both inventors are listed in Sanken Electric's assignee profile (patents-review.com), and Iwabuchi's PlainSite file shows a continuous Sanken assignment history dating back to at least 1997 (e.g., a 1997-08-18 Sanken-assigned application, "One Piece Semiconductor Device Having A Power FET And A Low Level Signal…") through the 2001 filing at issue. This is the profile of career employees of the original assignee, not inventors cycling out of a portfolio.
• Unusual-pattern check: Not present. No evidence that all (or any) named inventors departed Sanken within 12 months of filing. No fire-sale precursor signal.

Original assignee

• Entity: Sanken Electric Co., Ltd. (サンケン電気株式会社), 3-6-3 Kitano, Niiza-shi, Saitama 352-8666, Japan.
• Status: Operating. Publicly listed on the Tokyo Stock Exchange Prime Market (securities code 6707). As of 2025 it remains an independent power-electronics supplier (power devices, power modules, GaN), having divested part of its Allegro MicroSystems stake (Aug 2024, deconsolidated) and restructured Polar Semiconductor (PSL). It posted FY2025 (year ended March 2025) net income of ~¥50.9 bn on ~¥121.6 bn revenue. No bankruptcy, dissolution, or acquisition of Sanken itself.
• Product use of the claims: The patent claims a lateral pnp transistor with a graded base region and a monolithic power-IC embodying it (an integrated power transistor + control circuit). Sanken's core business is exactly this class of device — power ICs and power semiconductors — so the claims read on products in Sanken's own commercial line. This is consistent with an operating-company patent, not a licensing asset.
• Family/related asset: Divisional US 7,135,364 ("Method of fabricating semiconductor integrated circuit") is in the same family; foreign counterparts in EP (EP1253645), JP (JP2002324846), KR (KR20020083107), CN (CN1381900/CN1172377C), TW (TW530408B).

Assignment timeline

Chronological list of every recorded assignment found for this patent:

• 2001-10-22 (executed) / recorded 2001-10-26 — Reel 012382/0888
  • Conveyance: Assignment
  • Assignor: Makoto Yamamoto; Akio Iwabuchi (joint inventors)
  • Assignee: Sanken Electric Co., Ltd.
  • Correspondent: Not retrievable from the sources I was able to access. The Assignment Center cover-sheet correspondent field was not surfaced in the search results; I will not guess a name. (The Google Patents legal-event record reproduces only ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YAMAMOTO, MAKOTO;IWABUCHI, AKIO;REEL/FRAME:012382/0888, effective 20011022.)
  • Context: Original inventor-to-employer assignment at filing; standard corporate ownership record, not a transfer, securitization, or reorg.

That is the only recorded assignment. No security agreement, merger, change-of-name, license, release, correction, or post-issuance transfer appears for US 6,737,722 in any of the sources checked.

Supporting legal-status facts (not assignments):

• Maintenance fees (FPAY) paid for year 4 (2007-11-08), year 8 (2011-10-19), and year 12 (2015-11-04) — all paid by the original owner; no lapsed-then-revived pattern that would suggest a mid-life transfer.
• Status: Expired – Lifetime; anticipated expiration 2021-10-26. The patent is expired, which further moots assertion.

Note on the litigation section: it flagged that the string "6737722" appears inside examiner prior-art search tables in several unrelated PTAB exhibits (e.g., IPR2024-00265 / IPR2024-00468 Greenthread matters). Those are false positives — this patent is not the subject of those proceedings.

If you need the correspondent name and reel/frame verification, the definitive check is the Assignment Center search page below — I could not complete a direct record retrieval in my available steps:

• https://assignment.uspto.gov/patent/index.html (search "6737722")
• https://assignmentcenter.uspto.gov/

Timeline diagram

timeline
    title Ownership of US 6737722
    2001 : Inventors Yamamaoto and Iwabuchi assigned rights
         : Recorded at reel 012382/0888 to Sanken Electric
    2004 : Patent granted
    2007 : Maintenance fee year 4 paid
    2011 : Maintenance fee year 8 paid
    2015 : Maintenance fee year 12 paid
    2021 : Patent expired

Note: only the single 2001 event is a recorded assignment; the remaining entries are legal-status events included for completeness.

NPE / troll-pattern signals

Verdict

Insufficient data (only the original assignment).

Justification: The entire recorded chain for US 6,737,722 consists of a single inventor-to-employer assignment executed 2001-10-22 and recorded 2001-10-26 at reel 012382/0888, naming Makoto Yamamoto and Akio Iwabuchi as assignors and Sanken Electric Co., Ltd. as assignee. There are no post-issuance assignments — no security interests, no LLC transfers, no asserter in the chain — and maintenance fees for years 4, 8, and 12 were all paid by the original owner before the patent expired 2021-10-26. This matches the definitional trigger for "Insufficient data (no records, or only the original assignment)" [Update: although the assignee is plainly an operating company, the category "Operating-company assertion" requires an actual assertion, which is absent — hence this category] and drives a clean NPE-pattern-negative finding across all eight signals.

Verify at: https://assignment.uspto.gov/patent/index.html (search 6737722).

I'll research the specific prior art citations for US 6,737,722. Let me search for the key references.

Let me search the remaining key citations.

Prior-Art Analysis — US 6,737,722 B2

Patent under analysis: US 6,737,722 B2 — "Lateral transistor having graded base region, semiconductor integrated circuit and fabrication method thereof"

• Application US 10/014,949, filed 2001-10-26; priority 2001-04-25 (JP 2001-128187); granted 2004-05-18.
• Inventors: Makoto Yamamoto, Akio Iwabuchi. Assignee: Sanken Electric Co., Ltd.
• Status: Expired – Lifetime (anticipated expiration 2021-10-26).
• Pre-AIA statute applies (filed 2001), so the governing provisions are pre-AIA §102(a)/(b)/(e).

Methodology & sourcing note: Per my operating rules I treat the fetched full patent text as authoritative for the citation lists. The examiner-cited art appears under "Patent Citations (9)" and the secondary art under "Family Cites Families (13)" in that text. I web-verified the four structurally most important references (US 4,149,906; US 4,196,440; US 4,326,212; US 6,225,181; US 5,665,994). Search tool limits were reached before I could independently re-fetch the remaining citations, so descriptions for those are taken from the patent's own citation table and my prior knowledge — flagged where confidence is lower.

⚠️ Contradiction flag with the earlier-generated litigation section. That section stated "8 references cited by the examiner" and listed US4149906, US4196440, US4326212, EP0545488A1, US5665994, US5708290, US6225181, US6242793. The authoritative full text shows 9 under "Patent Citations (9)." The omitted ninth reference is US 6,033,947 A (Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, "Driving circuit…"). The full-text count governs; the earlier "8" is an undercount.

A. The claims being mapped

The distinguishing limitation versus essentially all cited art is the combination in claim 1 of (i) a uniform base region with a uniform lateral doping profile and (ii) a separate graded base region whose impurity concentration decreases laterally toward the second main electrode in the unbiased state, enclosing the bottom and side of the first main electrode.

B. Examiner-cited references ("Patent Citations (9)")

1. US 4,149,906 A — Process for fabrication of merged transistor logic (MTL) cells

• Assignee: International Business Machines Corp. Filing/priority: 1977-04-29. Publication: 1979-04-17.
• Description (verified): Fabrication process for MTL/I²L cells. An n⁺ substrate (common emitter) carries a low-doped n-type epitaxial layer; a p-type diffusion simultaneously forms (a) the emitter region of the lateral PNP and (b) the collector/base of the PNP/vertical NPN. The lateral PNP is biased as a current source driving the vertical NPN. Emphasizes injection efficiency and controlling emitter/base doping ratio for high beta.
• §102 relevance (pre-AIA §102(b) — >1 yr before priority): Discloses a lateral PNP formed in an n-type epitaxial base, with emitter/collector in the epi layer — this reads on the general architecture of claim 1/claim 6. However, it does not disclose a graded base region enclosing the emitter with a laterally decreasing doping profile, nor a uniform-lateral-profile base region as a separate recited element. → Does not anticipate claim 1 or 6; strongest as background/general-art for the "lateral PNP in epitaxial base" concept and possibly as §103 art.

2. US 4,326,212 A — Structure and process for optimizing the characteristics of I²L devices

• Assignee: IBM. Filing/priority: 1977-11-30. Publication: 1982-04-20.
• Description (verified): Improves an I²L/MTL structure by imposing a concentration-gradient-induced electric field in the intrinsic base region to sweep out free charges, reducing charge storage and emitter diffusion capacitance in the upward-injecting vertical NPN, and increasing the collector efficiency of the merged double-diffused lateral PNP. A buried P implant (described as "the essence of this invention") tailors the base profile.
• §102 relevance: This is the single closest cited reference to the "graded base / built-in drift field" concept recited in the patent's own background discussion of graded base regions. But note the gradient here is applied to the vertical NPN intrinsic base / buried region, not as a discrete lateral graded base region enclosing a first main electrode of a lateral transistor that directly contacts a uniform base region. → Potentially relevant to claim 1's "graded base region having a doping profile such that impurity concentration decreases" element, but does not anticipate claim 1 in full. Best characterized as §103 art in combination.

3. US 4,196,440 A — Lateral PNP or NPN with a high gain

• Assignee: IBM (inventors Anantha et al.). Filing/priority: 1978-05-25. Publication: 1980-04-01.
• Description (verified): A lateral PNP (or NPN) with improved beta, formed in an N-type epitaxial base over an N⁺ buried region, using dielectric isolation with reactive-ion-etched undercut of the buried high-conductivity region. Emitter and collector are simultaneously formed; the emitter sits over the undercut dielectric so there is no vertical junction between the emitter and the buried region, suppressing the parasitic vertical action that degrades gain. Distinguishes injection into region 1 (collected → high gain) from the vertical junction at region 2 (excessive base current → low gain). Companion US 4,264,382 covers the RIE method.
• §102 relevance (§102(b)): The most structurally analogous lateral-transistor reference — lateral emitter/collector in an epitaxial base, base contact, buried region, dielectric isolation. It addresses the same problem (low lateral beta) the '722 patent addresses. But it does not teach or suggest (a) a separate graded base region enclosing the emitter with a laterally decreasing dopant profile, nor (b) the claimed uniform-lateral-profile base region recited as an element, nor (c) the frame-shaped second main electrode of claims 2/3. → Does not anticipate claim 1; strong §103 art.

4. EP 0 545 488 A1 — Semiconductor device comprising at least one power transistor and at least one control circuit with dynamic insulation circuit integrated monolithically in the same chip

• Assignee: STMicroelectronics S.r.l. Filing/priority: 1991-12-05. Publication: 1993-06-09.
• Description (from the patent's citation table; my re-fetch was blocked): Monolithic co-integration of a power transistor with a control circuit using a dynamic (junction-based) insulation/isolating circuit on the same chip.
• §102 relevance: Directed at the power-IC integration subject matter of claims 6–9 (merging a power device with control circuitry), not at the graded-base lateral-transistor structure. → No anticipation of claims 1–5; weak relevance to claims 6/7 (integration context only). Confidence: medium (description not independently re-verified).

5. US 5,665,994 A — Integrated device with a bipolar transistor and a MOSFET transistor in an emitter switching configuration

• Assignee: Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno. Filing/priority: 1993-09-17. Publication: 1997-09-09.
• Description (verified): Monolithic structure with a vertical bipolar power transistor and a vertical MOSFET in emitter-switching configuration, built in N/N⁻ epitaxial layers over an N⁺ substrate; buried P base region, P⁺ isolation/deep base contact, buried N⁺ emitter, and an integrated MOSFET drive transistor.
• §102 relevance: Concerns vertical devices and power-IC integration, not a lateral transistor with a graded base. → No anticipation of any claim's graded-base limitation; possible peripheral relevance to claim 7's "vertical transistor" concept, but claim 7 requires the lateral transistor of claim 6 as a base element and a specific drift-region/second-buried-region arrangement not shown here. Confidence: high (verified).

6. US 5,708,290 A — Driving circuit for electronic semiconductor devices including at least a power transistor

• Assignee: Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno. Filing/priority: 1994-10-27. Publication: 1998-01-13.
• Description (from citation table; not independently re-verified): A driving/control circuit for semiconductor power devices.
• §102 relevance: Circuit/control subject matter, not device structure. → Does not anticipate any structural claim (1–13).

7. US 6,033,947 A — Driving circuit for electronic semiconductor devices including at least a power transistor (the reference missing from the earlier litigation summary)

• Assignee: Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno. Filing/priority: 1994-10-27. Publication: 2000-03-07. (Same family as US 5,708,290.)
• Description: Continuation/family member of the same driving-circuit disclosure.
• §102 relevance: Same as #6 — no structural anticipation.

8. US 6,242,793 B1 — Method and a circuit for improving the effectiveness of ESD protection in circuit structures formed in a semiconductor

• Assignee: STMicroelectronics S.r.l. Filing/priority: 1997-12-31. Publication: 2001-06-05.
• Description (from citation table; not independently re-verified): ESD-protection methodology/circuitry for integrated circuit structures.
• §102 relevance: Unrelated to the graded-base lateral-transistor structure. → No anticipation of any claim. (Appears to be a peripheral §102(a) citation.)

9. US 6,225,181 B1 — Trench isolated bipolar transistor structure integrated with CMOS technology

• Assignee: National Semiconductor Corp. (inventor Haydn J. Gregory). Filing/priority: 1999-04-19. Publication: 2001-05-01.
• Description (verified): A vertically isolated bipolar (PNP) transistor formed in a well above a buried collector layer, with an isolation layer and dielectric-filled trenches ("inter-device isolation structures") integrated into a CMOS flow; also forms an N⁺ base contact region self-aligned to an oxide spacer on a polysilicon emitter.
• §102 relevance: Directly relevant only to the process/isolation aspects — e.g., the element isolation region of claim 9 and trench isolation generally. It is a vertical device; it discloses no lateral transistor, no graded base region, and none of the claim 1 limitations. → No anticipation of claims 1–8, 10–13; at most §103 material for claim 9's isolation feature, and even there the '722 claim 9 requires the isolation to sit specifically between the uniform base region and the drift region of the lateral/vertical pair. Confidence: high (verified).

C. Secondary art — "Family Cites Families (13)"

These are references cited during prosecution of family members (e.g., the JP priority application / foreign counterparts) rather than the "Patent Citations" set. The structurally most probative are the lateral-transistor items:

D. Ranked assessment of the most relevant prior art

Most relevant (structural, lateral transistor):

1. US 4,196,440 — lateral PNP/NPN with high gain in an epitaxial base + dielectric isolation. Closest overall structural analog.
2. US 4,326,212 — explicitly a concentration-gradient (drift-field) base optimization in an I²L/MTL structure — closest to the "graded base region" concept, but applied to a vertical device.
3. US 4,149,906 — lateral PNP in an epitaxial base within an MTL cell.
4. US 5,326,710 (secondary set) / JPH 07-235546 / JPS 55-22875 — lateral-transistor and lateral-PNP fabrication art.

Relevant to integration / isolation claims (6–9):
5. US 6,225,181 — trench isolation + bipolar (claim 9).
6. EP 0 545 488 A1 and US 5,665,994 — monolithic power-transistor/control-circuit integration.

Peripheral / non-structural:
7. US 5,708,290 / US 6,033,947 (driving circuits), US 6,242,793 (ESD), and the general device/process references in the secondary set.

E. §102 conclusions (with caveats)

1. No single cited reference anticipates claim 1 or claim 6. Under pre-AIA §102, anticipation requires that one reference disclose every limitation. Each examiner-cited reference lacks at least the conjoined limitations of (a) a uniform base region with a uniform lateral doping profile and (b) a distinct graded base region enclosing the bottom and side of the first main electrode, whose impurity concentration decreases laterally toward the second main electrode in the unbiased state, while the second main electrode directly contacts the uniform base region. That is consistent with the patent having issued over this art.
2. Closest single-reference candidate for the "graded base" element: US 4,326,212 (gradient-induced drift field) — but for the vertical device, so even it does not, standing alone, anticipate the lateral-transistor claims.
3. Closest single-reference candidate for the lateral-transistor architecture: US 4,196,440 — but it lacks the graded base region and the uniform-lateral-profile limitation, and lacks the frame-shaped second electrode of claims 2/3.
4. Candidates for dependent-claim anticipation / obviousness, not independent-claim anticipation: US 6,225,181 (isolation, claim 9 context); US 5,665,994 and EP 0 545 488 (power-IC integration context for claims 6–7); US 4,110,126 (self-aligned NPN/PNP processing for the process aspects described in the specification).
5. Most realistic rejection vector is §103, not §102: e.g., US 4,196,440 (lateral PNP in epitaxial base) + US 4,326,212 (gradient/drift-field base) + optional isolation art (US 6,225,181).

Caveats:

• The four structurally most probative references (US 4,149,906; US 4,196,440; US 4,326,212; US 5,665,994; US 6,225,181) were web-verified against their full texts. Descriptions for EP 0 545 488 A1, US 5,708,290, US 6,033,947, US 6,242,793, and the secondary-set items rely on the patent's own citation table and my background knowledge; I was unable to independently re-fetch them before reaching the search-step limit — treat those descriptions as medium confidence.
• The patent is expired (2021-10-26); §102/§103 analysis is therefore historical/validity-oriented rather than enforcement-driven at this date. As noted in the earlier litigation section, I found no litigation involving this patent.
• I did not auto-correct any identifier: all analysis is for 6,737,722 exactly, and its cited art as listed in the authoritative full text.

If you want, I can next attempt targeted re-fetches of the four medium-confidence references (EP 0 545 488; US 5,708,290; US 6,033,947; US 6,242,793) to upgrade the descriptions, or search for additional non-cited art directed specifically at graded-base/drift-field lateral PNP devices.

I'll research the key prior-art references before building the § 103 analysis.

Obviousness Analysis — U.S. Patent No. 6,737,722 under 35 U.S.C. § 103

Scope note. This section builds on the previously generated litigation summary (which found no litigation and confirmed the patent is Expired–Lifetime). Nothing in that section contradicts what follows. Here I analyze the claims against the "Prior Art" material on the Google Patents page for US 6,737,722 — the examiner citations, the "Family Cites Families" references, and the "Similar Documents" list — and against the applicant's own admission of prior art in the Background. All identifiers are reproduced literally as they appear.

1. The claim set to be analyzed

The novelty of claim 1 therefore reduces to a small structural combination: (i) an as-grown epitaxial layer serving as a uniformly doped lateral-PNP base; (ii) a locally graded, emitter-enclosing base pocket; and (iii) a collector that contacts the uniform (ungraded) base directly rather than through the graded pocket.

2. The prior art available on the page (verified content)

Verified from full text retrieved:

Listed but full text not retrieved in this session (I will not attribute specific disclosures to these beyond their titles/abstracts): EP 0 545 488 A1 (STMicroelectronics — power transistor and control circuit with dynamic insulation monolithically in the same chip), US 5,665,994, US 5,708,290, US 6,033,947 (Co.Ri.M.Me. — bipolar + MOSFET emitter-switching device; driving circuit for power transistors), US 6,225,181 B1 (National Semiconductor — trench isolated bipolar transistor structure integrated with CMOS technology), US 6,242,793 B1 (STMicroelectronics - ESD protection), JPS 55-22875 A (Mitsubishi — manufacturing method of semiconductor integrated circuit device with lateral transistor), JPS 56-60049 A (Hitachi), JPH 05-74790 A (Fujitsu), JPH 05-166820 A (Matsushita), JPH 07-235546 A (Oki — lateral transistor), JPH 09-275154 A (Toshiba), KR 100479883 B1 (Fairchild Korea), JP 2000-031160 A (Sony), JP 2000-183306 A (Fujitsu). All are pre-25 April 2001 and therefore § 102(a)/(b)/(e) art; I flag them as corroborating earlier-art evidence, not as the load-bearing references of my combinations.

Not usable as prior art: the "Cited By" list (US 2006/0049464 A1, the Greenthread/Skyworks/Silanna families, etc.) post-dates the 25 April 2001 priority date and cannot be combined.

3. Combination A (strongest) — US 4,196,440 + US 4,149,906

Claim 1. US 4,196,440 supplies almost the entire shell of claim 1 for a lateral PNP: P-type substrate, N+ buried region, N epitaxial layer serving as the base ("uniform base region"), lateral emitter and collector at the surface of that epitaxial base, and a heavily doped N+ base contact reaching the buried region (the "plug"). See https://patents.google.com/patent/US4196440.

The only element missing from that shell is the graded base pocket enclosing the emitter, and US 4,149,906 supplies it as a design rule: feature (5), "the base doping profile should decrease from emitter to collector so that an aiding electric field is set up which reduces the transit time of injected carriers across the base region." Because in a lateral PNP the main current path is lateral, this teaching maps directly onto claim 1's limitation that the graded base region's concentration "decreases gradually along the lateral direction towards said second main electrode region from said first main electrode region." US 4,326,212 independently confirms the concept in a lateral PNP ("the net p-type base region profile is thus graded") and confirms the reason to do it ("increasing the collector efficiency and overall current gain of the PNP").

Motivation to combine (KSR / MPEP § 2143). The applicant's own Background supplies the motivation that would otherwise be needed: because the lateral-PNP base and the vertical-NPN drift region "are constructed … with the same epitaxial layer having the same thickness and the same impurity concentration," the base doping "must be set to a relatively low value, since the vertical npn transistor is required to operate with a higher maximum operating voltage," which forces the designer to "make a base width Wb … larger relatively in order to suppress … 'the depletion-layer punch-through'"; but "when the base width Wb is increased … the current gain decreases … Further, the occupied space of the lateral pnp transistor increases." Recognizing a problem in the primary reference (US 4,196,440) and applying a known solution (a graded/drift base, well known since the 1950s graded-base transistor) with a reasonable expectation of the predicted benefit — higher gain, shorter transit time, narrower base — is textbook obviousness. The same shared-epi/trade-off problem is expressly discussed in US 4,149,906 (lightly doped epi dictated by the vertical device) and US 4,326,212 (the "compromise" of the two-device process).

The "uniform lateral doping profile" and "directly contacting the uniform base region" limitations. Both are met inherently by an as-grown epitaxial layer (US 4,196,440's N epi 12/34; US 4,149,906's epi 7), which is uniformly doped in the lateral direction as deposited. The "direct contact" of the collector with the ungraded epi is the natural geometry when the graded pocket is confined around the emitter — the very structure '722's specification describes ("the graded base region 5 is not necessary to reach the first collector region 7").

Combination B (alternative primary reference). US 4,149,906 or US 4,326,212 alone can be taken as the primary reference (each shows a merged double-diffused lateral PNP sharing an N epi base with a vertical NPN and each expressly teaches base grading); US 4,196,440 then supplies the dielectric/trench isolation and buried-region base-contact structure. The result is the same.

4. Dependent claims 2–5 (and 10–13)

• Claims 2–3 (frame/rectangular-frame collector surrounding the graded base): enclosing/ring-shaped collectors are the conventional lateral-transistor geometry for collecting carriers injected in all lateral directions. US 4,149,906 describes a "n+ guard ring 4 [that] reduces the loss of holes injected through the outer sidewall 5 of the lateral emitter 8," and the double-diffused lateral PNP that the same reference discusses uses the surrounding structure to capture laterally injected holes. Choosing a closed rectangular frame instead of an open guard is a mere change of shape with no unexpected result — obvious.
• Claims 4–5 / 12–13 (base contact region in the plug; base wiring): US 4,196,440 shows the N+ base contact diffusion to the buried region and the metal base contact; US 4,326,212 shows "ohmic contact to the PNP base." Pure routine design.
• Claims 10–11: same reasoning as 2–3.

5. Claims 6–9 (integrated circuit + vertical transistor)

• Claim 6 is claim 1 restated in IC context, and is obvious for the reasons in Part 3.
• Claim 7 (vertical NPN sharing the substrate/process): US 4,149,906, US 4,326,212 and US 4,196,440 each disclose a lateral PNP and a vertical NPN on the same chip, with the N+ buried region/vertical path serving the vertical device and the N epi serving as the lateral-PNP base. See US 4,149,906 (lateral PNP "biased to function as a current source to drive the vertical NPN device"); US 4,196,440 (FIG. 6, "a vertical NPN and lateral PNP transistor structures formed by the method"). The unretrieved EP 0 545 488 A1 and US 5,665,994, on their titles, confirm the general practice of merging a power transistor and its control circuit on one chip. Motivation: monolithic integration of a control lateral PNP with a power vertical NPN is the stated purpose and admitted context of the '722 disclosure itself.
• Claim 8 (connecting wiring from the lateral-PNP collector to the vertical-NPN base): this is precisely the merged/injection coupling of US 4,149,906 (lateral PNP driving the vertical NPN; PNP collector merged with NPN base) and of the '722 Background itself ("The connecting wiring 12 serves as a first collector wiring and is connected to the base electrode of the vertical npn transistor").
• Claim 9 (element isolation between the uniform base region and the drift region): US 4,196,440 (dielectric isolation pockets) and, on its face, US 6,225,181 B1 ("trench isolated bipolar transistor structure integrated with CMOS technology") supply this. Nothing more than conventional device isolation.

6. Corroborating art found outside the page's lists (usable in reexam/IPR, additional to the page)

While verifying the examiner citations I retrieved two IBM documents that recite the self-same graded-base/lateral-PNP technique, both decades pre-dating 2001, and the art they themselves cite:

• IBM Technical Disclosure Bulletin, Vol. 13, No. 6, p. 1457 (Nov. 1970) — as characterized in the background of IBM's EP 0 385 906: it "shows a method of fabricating a lateral PNP transistor wherein an N type diffusion is performed in an N⁻ type epitaxial region before emitter and collector regions are formed. The emitter and collector regions are diffused into the N diffused epitaxial region so as to form a graded base region there-between." This is, almost verbatim, the structure of '722 claim 1 including the diffusion-order/self-alignment aspect of the specification. (Retrieved via http://data.epo.org/publication-server/rest/v1.2/patents/EP0385906NWA2/document.xml)
• IBM TDB Vol. 21, No. 10 (Mar. 1979), Wieder, "Processing for a Lateral PNP Transistor in the Submicron Range" and IBM TDB Vol. 22, No. 8 (Feb. 1980), Yeh, "Self-Aligned Integrated NPN (vertical) and PNP (lateral) Structures", both cited in the specification of IBM's EP 0 039 411 B1 (https://patentimages.storage.googleapis.com/72/ed/dd/f0ed960170b971/EP0039411B1.pdf). The Yeh title addresses the self-aligned vertical-NPN + lateral-PNP integration of claim 7; the Wieder title addresses submicron-width lateral PNP bases, which is the express purpose of '722's graded base.
• Also relevant (cited in the same EPO documents): US 4,283,236 (Sirsi) — "double-diffused type lateral transistors, showing a lateral PNP … having base and emitter regions both diffused through the same aperture"; and US 4,005,451 (Martinelli) — lateral transistor with emitter/collector configurations selected to promote current flow away from the device surface.

These references are not in the page's prior-art tables, so I flag them as additional art, not part of the combinations above; they materially strengthen, rather than change, the conclusion.

7. Anticipated counter-arguments and why they likely fail

1. "Grading the lateral-PNP base would short emitter to collector." Some contemporaneous art did warn that grading the intrinsic base of a lateral PNP is dangerous (e.g., the discussion in IBM's EP 0 002 191 of the German application P 28 13 154.6: tailoring the intrinsic-base profile "would be equivalent to a short circuit between the collector and emitter of the lateral PNP"). But this argument does not reach '722's claim 1: the claimed graded region encloses the bottom and side of the first main electrode and the second main electrode directly contacts the uniform base region — i.e., grading is confined around the emitter, exactly as in the IBM TDB 1970 structure. There is no teaching away from that structure, and the applicant's own specification concedes the graded region "is not necessary to reach the first collector region 7."
2. "Unexpected result — simultaneously higher BV_ceo and higher gain." The specification asserts both benefits, but the mechanism (a doping gradient creating an aiding drift field; higher local base doping suppressing punch-through) is the expected consequence of a known technique, and no comparative data are reported. Under KSR, a result that is the predictable product of a known technique is not a basis for patentability absent evidence of a difference in kind.
3. Secondary considerations. None are available here: the patent expired 2021, no litigation was found (per the prior section), and there is no evidence of record linking any commercial success to the claimed structure with a nexus.

8. Flags and caveats

• Claim-drafting inconsistencies to note (not § 103 issues, but relevant to any validity challenge): claims 10, 12 and 13 recite "The lateral transistor of claim 7/12" although claim 7 is drawn to a semiconductor integrated circuit; and claim 5 depends from claim 2, which does not itself recite a base contact region (that region first appears in claim 4), creating an apparent antecedent-basis/dependency defect. These are § 112 grounds to be raised alongside the § 103 challenge.
• My verification is asymmetric. I retrieved and read the full text of US 4,149,906, US 4,326,212, US 4,196,440 and (in part) US 5,326,710. I did not retrieve the full text of EP 0 545 488 A1, US 5,665,994, US 5,708,290, US 6,033,947, US 6,225,181 B1, US 6,242,793 B1, or the Japanese/Korean/other family citations; the assertions I make about those rest on their titles/abstracts as listed on the page and should be confirmed before they are relied on in a filing.
• I did not auto-correct any patent number. All identifiers (including US 4,149,906, US 4,199,440 vs. 4,196,440, and the '722/'364' pair) are reproduced exactly as located.

9. Conclusion

Claims 1–13 are, on the record available, likely invalid under 35 U.S.C. § 103. The strongest combination is US 4,196,440 in view of US 4,149,906 (optionally adding US 4,326,212), which together disclose (a) a lateral PNP whose lightly doped, laterally uniform epitaxial layer serves as the base over an N+ buried region with a base-contact plug, and (b) the express design rule that a lateral transistor's base doping should decrease from emitter toward collector to create an aiding drift field. The applicant's own Background supplies the motivation — preserving the high-voltage vertical NPN's epi doping while fighting punch-through and low gain in the merged lateral PNP — making the combination a predictable application of a known technique to a known device ready for improvement. The dependent claims (frame collector, base contact/wiring, integrated vertical NPN, connecting wiring, element isolation) recite conventional structural flourishes well documented in the same references (US 4,149,906's guard ring and merged NPN/PNP; US 4,196,440/US 6,225,181's dielectric/trench isolation), and the corroborating IBM TDB art of 1970–1980 shows the very graded-base lateral PNP claimed.