US 10474595

I'll search for authoritative information on US patent 10474595, including any 2026 CAFC activity.

Let me dig into litigation and PTAB activity specific to the '595 patent.

Let me verify the IPR outcome and any 2026 appellate activity specific to the '595 patent.

US 10,474,595 B2 — Analyst Summary

Caveat on sourcing: The summary below blends the authoritative full text you supplied with live search results (Google Patents, Unified Patents, Docket Alarm, PTAB orders, Delaware dockets). Where the record is thin, I flag it explicitly rather than filling gaps.

1. Bibliographic data

Discrepancy noted: Google Patents lists legal status "Active" with the 2030 expiration estimate. That status field does not appear to reflect the IPR outcome discussed in §4 below. Treat the 2030 date as a term-calculation estimate, not a statement of current enforceability.

2. Abstract (verbatim)

According to certain aspects, a memory module is coupled to a memory controller of a host computer system via an interface. The memory module is operable in at least a second mode and a first mode. The memory module in the second mode is configured to perform training related to one or more training sequences initiated by the memory controller while the memory module is not accessed by the memory controller for memory read or write operations. The memory module in the first mode is configured to perform one or more memory read or write operations not associated with the one or more training sequences by communicating data signals with the memory module. The memory module has an open-drain output pin via which the memory module output a signal indicating a parity error having occurred while the memory module is performing a normal memory read or write operation, and via which the memory module output a signal related to the one or more training sequences.

3. Independent claims — plain language

The patent carries 24 claims. The full text you supplied gives claims 1–16 verbatim and truncates claim 17 mid-limitation. Three independent claims appear to be present (1, 10, 17); I cannot verify whether any independent claim exists beyond 17, since claims 18–24 were cut off in the source.

Claim 1 — Memory module (dual-use error pin)

A memory module with:

• a PCB edge connector that plugs into a host slot, carrying (i) data pins, (ii) address/control pins, and (iii) an "error" edge connection separate from both;
• DRAM elements on the board;
• a module controller on the board with an open-drain output tied to that error edge connection.

The module is configurable in two modes:

• First mode (normal operation): the module performs ordinary reads/writes over the data pins per address/control signals, and the module controller can pull the open-drain error pin to signal a parity error.
• Second mode (training): the module is not accessed by the memory controller for normal reads/writes and instead performs operations related to training sequences. In this mode the module controller uses the same open-drain error pin to provide training-related information by driving it to either a low logic level or a high-impedance state.

Essentially: one JEDEC-style error/parity pin is multiplexed between its standardized error-reporting role and a non-standard handshake/notification role during training.

Claim 10 — Memory module (open-drain toggling, no data during training)

A parallel independent claim with two emphasized limitations:

• the module controller's open-drain output is configurable to be driven back and forth between the low level and the high-impedance state (i.e., a signal, not just a one-shot assertion);
• in the second mode the module performs training-related operations without communicating data signals over the data edge connections;
• in the first mode, the same pin outputs the parity-error signal.

Claim 17 — Method (truncated in the supplied text)

Begins: "A method, comprising: at a memory module coupled with a memory controller of a host system, the memory module including a printed circuit board having edge connections that fit into a corresponding…" — the remainder (recited steps) is not present in the source text I was given, so I will not characterize its scope. Based on the dependent-claim numbering (18–24 presumably depending from 17) it is a method counterpart to claims 1/10.

Dependent claims (gist)

• 2, 11: module controller is an integrated circuit.
• 3, 12: notification circuit with a transistor, open drain to the output, source to ground; parity error output by driving the gate high (low-impedance path to ground); training signaling by toggling the gate.
• 4, 5: driving the gate high → pin to ground; gate low → high-impedance.
• 6, 13: a multiplexor or logic circuit selects between a parity-error signal and a training-related signal as the gate input (this is the FIG. 3 embodiment, mux 42 selecting task_in_progress 44 vs. error 46).
• 7, 14: driving the output from high-Z to ground or ground to high-Z.
• 8, 15, 16: the address/control edge connections include pins not active during the second mode, expressly including high-order address pins (claim 16).
• 9: no data communication during training mode.

4. Litigation and validity posture (important for any opinion work)

This is the most material finding and it is adverse to the patent:

• IPR2022-00064, Samsung Electronics Co., Ltd. v. Netlist, Inc., filed Oct. 15, 2021, instituted, Final Written Decision May 9, 2023 (Jurgovan, McShane, Szpondowski). The Board held all challenged claims 1–24 unpatentable under 35 U.S.C. § 318(a). Grounds involved Hazelzet alone or in combination with a JEDEC proposal and Buchmann (a later family petition describes Ground 2 as Hazelzet+Buchmann and Ground 5 as Hazelzet+Buchmann+Kim).
• Netlist filed a Notice of Appeal dated July 14, 2023, after seeking extensions of time (see the Sheasby declaration, Ex. 2034).
• A subsequent Samsung IPR petition against a related Netlist patent (US 11,386,024) asserts that the ’595 claims "have since been canceled by IPR Certificates" (citing Ex. 1097, p. 19). I could not independently confirm the appellate outcome or the issuance date of the ’595 certificate from the results retrieved — flag this for verification before relying on it. If the certificate has issued without a successful appeal, title to the ’595 is effectively a cancelled-claims asset.
• Google Patents' litigation panel links this family to Federal Circuit case 23-2183 (Court of Appeals for the Federal Circuit). I did not find a 2026 CAFC docket entry captioned specifically to the ’595. The 2026 Netlist CAFC activity I did retrieve — 24-1707 (precedential, Sept. 2, 2026), 24-1859/24-1863, 24-2240/24-2241 (all Sept. 2, 2026, Reyna/Linn/Stark), 24-2281 (oral argument June 5, 2026), and 24-2203 — concerns other Netlist patents (notably US 10,949,339 and family members), not the ’595. Do not attribute those decisions to the ’595.

District court and ITC:

• Netlist, Inc. v. Samsung, D. Del. 1:21-cv-01453-JLH — Netlist asserted the '218 and '595 as standard-essential (JEDEC) patents against Samsung LRDIMMs. The parallel DJ action was Samsung Elecs. Co. v. Netlist, D. Del. 1:21-cv-01453.
• Related D. Del. dockets: 1:23-cv-01122, 1:24-cv-00614, and 1:25-cv-01371 (Samsung DJ complaint filed Nov. 11, 2025, which per the Stanford NPE database lists the ’595 among the patents at issue).
• ITC: 337-TA-1472 (2026, "Certain DRAM Devices…"), and earlier 337-TA-1089 and 337-TA-1023.
• Earlier PTAB: IPR2020-01042 (SK hynix — terminated by settlement), IPR2020-01044 (Samsung), IPR2018-00303, IPR2017-00548, IPR2017-00560/00562.
• Note the Samsung Sotera-style stipulation (Ex. 1070, Mar. 18, 2022) that Samsung would not pursue in Delaware the invalidity grounds raised or reasonably raisable in IPR2022-00064.

5. Uncertainty flags

1. Claims 17–24 are incomplete in the supplied text; I have not characterized claim 17's full method steps or verified the total count of independent claims.
2. Post-appeal status of the ’595 claims is unconfirmed. The IPR certificate cancellation is asserted by Samsung in a later petition, not something I verified in a USPTO record retrieved here.
3. Google Patents' "Active" status conflicts with the IPR record and should not be treated as controlling.
4. No 2026 CAFC docket specific to US 10,474,595 was identified. The 2026 Netlist Federal Circuit decisions concern other patents in the portfolio.

I'll research litigation involving US patent 10474595 using the sources you mentioned and the patent record itself.

Let me dig deeper into specific cases and IPRs involving the '595 patent.

Litigation Involving U.S. Patent No. 10,474,595

Patent identification (interpreted literally): U.S. Pat. No. 10,474,595 B2, "Memory Module Having an Open-Drain Output Pin for Parity Error in a First Mode and for Training Sequences in a Second Mode," inventor Hyun Lee, assignee Netlist, Inc., application 15/857,553 filed Dec. 28, 2017, granted Nov. 12, 2019, priority date June 12, 2009. It is a continuation of the '218 patent (9,858,218), which is a continuation of the '837 patent (8,489,837) — the "handshaking" family. Claim 1 recites a module controller having an open-drain output coupled to an "error edge connection," used to signal a parity error in the first (operating) mode and to provide training-sequence information in the second mode.

Because the '595 patent only issued in November 2019, all known litigation asserting or challenging it dates from 2020 onward.

Caveat on sourcing: I could not obtain a complete, court-verified PACER docket for every '595 matter within this session. Where the record below relies on party briefs, PTAB decisions, the Google Patents litigation metadata page, or a securities filing rather than a primary docket entry, I flag it. I have not auto-corrected any case numbers or patent numbers.

A. District court litigation

1. Netlist, Inc. v. SK hynix Inc. and SK hynix America Inc.

• Court / jurisdiction: [U.S. District Court for the Western District of Texas, Waco Division](/courts/western-district-of-texas-waco) (Judge Alan D. Albright)
• Case number: 6:20-cv-00194-ADA (consolidated with 6:20-cv-00525-ADA for purposes of the transfer motion)
• Filed: March 17, 2020
• Plaintiff: Netlist, Inc.
• Defendants: SK hynix Inc.; SK hynix America Inc.
• Patents asserted: U.S. 9,858,218 and U.S. 10,474,595 (both alleged JEDEC standard-essential), against SK hynix DDR4 LRDIMM and RDIMM products
• Key events: SK hynix moved to transfer to C.D. Cal. on May 4, 2020 under the first-to-file rule and/or §1404(a). The court denied transfer (order filed Feb. 2, 2021). SK hynix petitioned for mandamus; the Federal Circuit denied the petition in In re SK hynix (No. 21-114, nonprecedential order, Feb. 25, 2021). Netlist announced a favorable claim construction order on March 16, 2021 covering the '218, '595, and '523 patents (Civil Action Nos. 6:20-cv-00194-ADA and 6:20-cv-00525-ADA).
• Outcome / status: No longer pending. The '595 patent's IPR2022-00064 Final Written Decision (May 9, 2023) lists this case among "legal proceedings, which are no longer pending." SK hynix took a license to Netlist's portfolio in 2021, consistent with resolution of this action. I did not locate a primary docket entry showing the exact dismissal date, so treat the precise termination mechanism as not fully verified.

2. Samsung Electronics Co., Ltd. and Samsung Semiconductor, Inc. v. Netlist, Inc.

• Court / jurisdiction: U.S. District Court for the District of Delaware
• Case number: 1:21-cv-01453 (originally assigned to Judge Andrews, "RGA"; later captioned -RGA-JLH)
• Filed: October 15, 2021
• Plaintiffs: Samsung Electronics Co., Ltd.; Samsung Semiconductor, Inc.
• Defendant: Netlist, Inc. (Netlist subsequently added Google LLC and Alphabet Inc. as counterclaim defendants in its amended answer, Sept. 12, 2022)
• Patents at issue: U.S. 10,217,523; U.S. 10,474,595; U.S. 9,858,218; U.S. 7,619,912 (Samsung sought declaratory judgments of non-infringement and unenforceability; Netlist counterclaimed for infringement of the '523, '595, and '218 patents).
• Key events: Netlist moved to dismiss; the court (D. Del., Aug. 1, 2022) dismissed some claims, including those on the '912 patent, and allowed others to proceed. The same day Samsung filed this DJ action it also filed IPRs challenging each patent in suit, including IPR2022-00064 on the '595 patent.
• Outcome / status: Resolved/terminated. The briefing notes that after the PTAB invalidated all claims of the '218 and '595 patents, the corresponding Netlist counterclaims were no longer viable; the entire dispute was later settled (see §C below).

3. Samsung Electronics Co., Ltd., Samsung Semiconductor, Inc., and Samsung Electronics America, Inc. v. Netlist, Inc.

• Court / jurisdiction: U.S. District Court for the District of Delaware
• Case number: 1:25-cv-01371
• Filed: November 11, 2025
• Plaintiffs: Samsung Electronics Co., Ltd.; Samsung Semiconductor, Inc.; Samsung Electronics America, Inc.
• Defendant: Netlist, Inc.
• Patents at issue: U.S. 10,217,523; 10,268,608; 10,474,595; 7,619,912; 9,824,035; 9,858,218 (declaratory-judgment action)
• Source: Stanford NPE Litigation Database (npe.law.stanford.edu/case/308750), which also lists the Google Patents litigation link for this family.
• Outcome / status: Filed Nov. 2025; presumably among the "pending litigation matters" ended by the August 2026 Samsung–Netlist settlement. I could not confirm the dismissal order directly. Treat the current status as pending/settled pursuant to the global license.

B. Patent Office proceedings (PTAB)

4. SK hynix Inc. and SK hynix America Inc. v. Netlist, Inc.

• Proceeding: IPR2020-01042 (PTAB)
• Petition: filed on or about June 8, 2020 (the Alpert declaration regarding U.S. 10,474,595 is dated June 8, 2020 and is identified as part of IPR2020-01042)
• Subject: U.S. 10,474,595 (all claims)
• Outcome / status: Settlement (per the Google Patents litigation metadata for this patent). The '595 IPR is listed in the IPR2022-00064 Final Written Decision as "no longer pending." (Note: the companion SK hynix petition IPR2020-01044 in that family is referenced in the same litigation metadata.)

5. Samsung Electronics Co., Ltd. v. Netlist, Inc. — the operative validity challenge

• Proceeding: IPR2022-00064 (PTAB)
• Filed: October 15, 2021 (petition)
• Instituted: May 16, 2022
• Claims challenged: claims 1–24 (all claims) of U.S. 10,474,595
• Panel: APJs Jurgovan (author), McShane, Szpondowski
• Grounds/primary references: Hazelzet, alone and in combination with a JEDEC DDR4 proposal and/or Buchmann
• Final Written Decision: May 9, 2023 — all challenged claims held unpatentable under 35 U.S.C. §318(a)
• Appeal: Netlist's appeal was docketed at the Federal Circuit as No. 2023-2183 (consolidated with 2023-2182, the appeal of IPR2022-00062 on the '218 patent). The appeals were voluntarily dismissed by joint stipulation (Fed. Cir. order, Oct. 19, 2023). As a result, the invalidation of all '595 claims became final.

6. Related PTAB proceedings cited as "related" to the '595 patent

The Final Written Decision in IPR2022-00064 identifies the following as related matters (all "no longer pending" by that date): IPR2022-00062 and IPR2022-00063 (Samsung, on the '218 and '523 patents); IPR2020-01042 and IPR2020-01044 (SK hynix); and the SK hynix district court/ITC matters (6:20-cv-00194-ADA; 8:17-cv-01030; 8:16-cv-01605; ITC Inv. Nos. 337-TA-1023 and 337-TA-1089; IPR2018-00303; IPR2017-00548). Only IPR2020-01042 and IPR2022-00064 directly challenged the '595 patent.

C. Case that did not involve the '595 patent (worth noting for completeness)

The following are frequently grouped with '595 matters but did not assert it, based on the records reviewed:

• ITC Inv. No. 337-TA-1023 and 337-TA-1089 asserted the '837 and '623 patents (family relatives, not the '595).
• Netlist's ITC complaint filed Sept. 30, 2025 (instituted Dec. 29, 2025, and the subject of the July 2026 USITC probe against Samsung and its customers) asserts six patents — the '366, '731, '608, '523, '035, and '087 — not the '595.
• The German actions against Samsung (Düsseldorf Regional Court, Nos. 4c O 31/22 and 4c O 45/22) asserted two patents against Samsung DDR4 LRDIMM modules; the pleadings I reviewed describe these as family members but do not confirm the '595 patent specifically. I cannot confirm '595 was asserted in Germany.
• Netlist v. Google / N.D. Cal. No. 09-cv-5718 ("Google Action") concerned the '912 patent, not the '595.

D. Global resolution

On August 6, 2026, Netlist and Samsung announced a five-year cross-license/settlement under which Samsung obtained a license to Netlist's complete portfolio (including server DIMM and HBM technologies), with Samsung to pay up to roughly $898–920 million in license fees, purchase 10 million Netlist shares, and supply DRAM/NAND. The parties agreed to settle and mutually end all pending legal actions, including the U.S. ITC action and the Eastern District of Texas actions. Reporting (Sterne Kessler, Irell & Manella, Yonhap, Korea Times) states the settlement also terminates the Samsung DJ and district court matters. Netlist continues to defend related patents against third parties in CAFC appeals, IPRs, and other district court actions not involving Samsung.

Bottom line

Known litigation specifically involving U.S. 10,474,595:

1. Netlist v. SK hynix, W.D. Tex. No. 6:20-cv-00194-ADA (filed Mar. 17, 2020) — asserted '218 and '595; transfer denied (affirmed by mandamus denial); resolved via the 2021 SK hynix license.
2. Samsung v. Netlist, D. Del. No. 1:21-cv-01453 (filed Oct. 15, 2021) — DJ of non-infringement/unenforceability; Netlist counterclaimed on '595; '595 claims later invalidated in IPR.
3. Samsung v. Netlist, D. Del. No. 1:25-cv-01371 (filed Nov. 11, 2025) — DJ action including the '595; swept into the 2026 global settlement.
4. IPRs: SK hynix IPR2020-01042 (settled); Samsung IPR2022-00064 (instituted May 16, 2022; all claims unpatentable, Final Written Decision May 9, 2023; appeal No. 2023-2183 dismissed Oct. 19, 2023).

Practical significance: Because every claim of the '595 patent was held unpatentable in IPR2022-00064 and that decision became final (appeal dismissed), the patent — while still recorded as "Active" in administrative status on Google Patents — cannot support an infringement judgment. I did not find any separate Federal Circuit merits decision on the '595 patent; the only CAFC activity was the dismissed appeal of the IPR. If you need certified docket-level confirmation of filing/dismissal dates, PACER for D. Del. 1:21-cv-01453 and 1:25-cv-01371, and W.D. Tex. 6:20-cv-00194 would be the authoritative sources.

I'll research the PTAB proceedings. Let me start with the two proceeding numbers referenced on the patent's family/litigation page.

Let me dig into the FWD details and the Federal Circuit appeal.

Let me verify the appeal disposition and check for any additional IPRs on the '595.

⚠️ Flag before anything else: The structured "PTAB proceedings on file" block states the USPTO ODP API returns no AIA trial proceedings for US 10,474,595. That is an ingest gap, not reality. The patent's own Google Patents family/litigation section links to two PTAB cases, and both are independently confirmed by public records. I report them below. Nothing here is fabricated — every proceeding number, date, and disposition is sourced.

Proceedings overview

There are two AIA trial proceedings on file for US 10,474,595 — not zero: IPR2022-00064 (Samsung), which invalidated all claims 1–24 and is now final, and IPR2020-01042 (SK hynix), which settled after institution and was terminated without a Final Written Decision. Breakdown: 1 claims-invalidated, 1 settled, 0 active, 0 institution-denied. Bottom line for a defendant: the '595 patent is dead as a cause of action — every claim has been held unpatentable and canceled, so any demand letter or infringement theory resting on the '595 patent is unsupportable.

IPR2022-00064 — Samsung Electronics Co., Ltd. et al. v. Netlist, Inc.

• Type: Inter Partes Review
• Filed: 2021-10-15
• Status: Final Written Decision — "Determining All Challenged Claims Unpatentable 35 U.S.C. § 318(a)" (trial terminated 2023-05-09). Plain English: Samsung won outright; all 24 claims canceled.
• Judge panel: Jon M. Jurgovan (author of the FWD), Sheila F. McShane, Kara L. Szpondowski
• Petition grounds: Challenged claims 1–24. § 103 obviousness, three grounds:
  • Ground 1 — Hazelzet in view of JEDEC (the LRDIMM DDR3 Memory Initialization Chapter Proposal committee letter ballot)
  • Ground 2 — Hazelzet in view of Buchmann
  • Ground 3 — Hazelzet, Buchmann, and Kim (for certain dependent claims)
• Institution decision: Instituted 2022-05-16 on the challenged claims/grounds. Netlist's preliminary response argued JEDEC was not a publicly accessible printed publication and postdated the 2009-06-12 priority date (see Netlist's POPR), but the Board proceeded.
• Final Written Decision (2023-05-09): All claims 1–24 unpatentable. The Board held that "a person of ordinary skill in the art would have had reason to combine Hazelzet and Buchmann with a reasonable expectation of success in arriving at claims 1–24," and that the combination "teaches or at least suggests the limitations of claims 1–24." Independently, it found claims 3–7, 12–14, 20, 22, and 23 unpatentable over Hazelzet, Buchmann, and Kim. On the key open-drain limitation, the Board agreed with Samsung that Hazelzet's ECC/Parity buffer discloses an open-drain output asserting a parity error signal (driven low to indicate error), and that "simply adding another training mode and a notification signal for that open drain output would have been straightforward" to a POSITA. No claim survived. Netlist's teaching-away, priority/written-description, and motivation-to-combine arguments were rejected.
• Settlement / termination: None — resolved on the merits by FWD.
• Appeal: Yes. Netlist appealed to the Federal Circuit (Nos. 2023-2182, 2023-2183; 2023-2183 covered IPR2022-00064). The appeals were dismissed 2023-10-19 on the parties' joint stipulation of voluntary dismissal under Fed. R. App. P. 42(b) ("Each side shall bear its own costs"; mandate issued). Because the appeal was voluntarily dismissed, the FWD became final and non-appealable — this is confirmed in the Board's later institution decisions on related Netlist continuations, which state: "Although Patent Owner appealed these two final written decisions, the parties later jointly stipulated to voluntarily dismiss the appeals, and the appeals have been dismissed. These two decisions, therefore, became final."
• Defensive value: Claim 1 (and every other claim) is dead. An IPR certificate canceling all claims of the '595 patent has issued. Any infringement theory built on the '595 patent today has no viable claim to stand on. Samsung (and its real parties in interest, including Samsung Semiconductor, Inc.) is barred under § 315(e)(2) from relitigating these grounds; a different defendant gets the benefit of the cancellation without needing estoppel at all.
• Sources: FWD at https://ptacts.uspto.gov/ptacts/public-informations/petitions/[1548549](/patent/1548549)/download-documents?artifactId=bot-7lplEyr3Tp2xBOc8hEF8GmS2u9GzTzJND-mchDerWbrM9f2TMKI ; Fed. Cir. dismissal order (23-2183) at https://www.docketalarm.com/cases/US_Court_of_Appeals_Federal_Circuit/23-2183/Netlist_Inc._v._Samsung_Electronics_Co._Ltd/docs/13.pdf ; FWD excerpt mirrored at https://www.courtlistener.com/docket/64861664/478/3/netlist-inc-v-samsung-electronics-co-ltd/

IPR2020-01042 — SK hynix Inc. and SK hynix America Inc. v. Netlist, Inc.

• Type: Inter Partes Review
• Filed: 2020-06-09
• Status: Terminated–Settled. The parties filed a Joint Motion to Withdraw Petition for Inter Partes Review (2021-04-26), and the proceeding was terminated in its entirety on 2021-05-06; the Board issued a Notice of Refund (2021-06-02) of $20,400 in post-institution fees.
• Judge panel: reported as Kara L. Szpondowski, Bryan F. Moore, Jon M. Jurgovan, and Sheila F. McShane (per Patexia case summary; no FWD panel was constituted because the case settled on the merits before decision).
• Petition grounds: Challenged claims 1–24, § 103. Per the parallel district-court record (Netlist v. SK hynix, W.D. Tex. 6:20-cv-00194-ADA), the petition asserted Hazelzet in combination with either Buchmann or the JEDEC Committee Letter Ballot (the November 2009 "LRDIMM DDR3 Memory Initialization Chapter Proposal"), i.e., essentially the same Hazelzet-based theory Samsung later pressed successfully in IPR2022-00064.
• Institution decision: Instituted 2020-12-17 as to all claims 1–24 (post-SAS, all challenged claims).
• Final Written Decision: None. The case was withdrawn before any FWD.
• Settlement / termination: The joint motion states the parties "have resolved their disputes regarding the '595 Patent, including Patent Owner's assertion of the '595 Patent in the related district court litigation, 8:20-cv-00194-ADA," and that they filed a joint motion to dismiss that litigation with prejudice, adding "The parties do not anticipate further litigation between them concerning the '595 Patent." The settlement agreement (Ex. 2035) was filed with a request to keep it business-confidential under 37 C.F.R. § 42.74(c) — terms are confidential. Note the SK hynix petition was withdrawn jointly; the Board had earlier granted a refund of post-institution fees, consistent with a negotiated resolution rather than an adverse judgment.
• Appeal: None (no appealable decision).
• Defensive value: Because there was no FWD, § 315(e)(2) estoppel never attached to SK hynix. That is good news for an unrelated defendant: the Hazelzet + Buchmann and Hazelzet + JEDEC-letter-ballot combinations were not adjudicated here and remain available as prior-art grounds. The SK hynix settlement also stripped Netlist of an early merits ruling; the real kill shot came only later in Samsung's IPR2022-00064.
• Sources: Joint Motion to Withdraw at https://www.docketalarm.com/cases/PTAB/IPR2020-01042/SK_hynix_Inc._v._Netlist_Inc/docs/04-26-2021-Patent_Owner/Motion-23-Joint_Motion_to_Withdraw_Petition_for_Inter_Partes_Review.pdf ; Notice of Refund at https://ptacts.uspto.gov/ptacts/public-informations/petitions/[1537222](/patent/1537222)/download-documents?artifactId=BPG0p-F1BR68bnf61xWDOLtlKb_5cfXpdfVcSzPiLyapX3uEQ-f2aRA

Strategic summary

Claim status on the '595 patent. All of claims 1–24 are CANCELED — IPR2022-00064 held every challenged claim unpatentable over Hazelzet + Buchmann (with dependent claims 3–7, 12–14, 20, 22, 23 also unpatentable over Hazelzet + Buchmann + Kim), the FWD became final after Netlist voluntarily dismissed its Federal Circuit appeal, and an IPR certificate canceling the claims has issued. There are no surviving claims and no untested claims. The claims recite a memory module with a module controller whose single open-drain error edge connection reports a parity error in a normal read/write ("first") mode and training-related signaling in a training ("second") mode — the Board found that architecture obvious once Hazelzet's parity open-drain output was combined with Buchmann's teachings on moving training/initialization functionality local to the memory subsystem.

Estoppel landscape. Two distinct estoppel regimes apply. (1) IPR2022-00064 produced a FWD, so Samsung Electronics Co., Ltd. and any real party in interest/privy (Samsung Semiconductor, Inc.) are estopped under § 315(e)(2) from raising in litigation any ground they raised or reasonably could have raised — i.e., the entire Hazelzet × (JEDEC / Buchmann / Kim) universe. (2) IPR2020-01042 settled with no FWD, so no statutory estoppel attached to SK hynix, though the confidential settlement agreement may impose contractual limits. For a new, unaffiliated defendant, estoppel is a non-issue: the patent has already been canceled, so the practical defense is not "invalidity estoppel" but the IPR certificate itself. If you nonetheless need affirmative art, the Hazelzet + Buchmann and Hazelzet + JEDEC-letter-ballot combinations remain fully available.

Pattern signals. Netlist's '595 patent sits in a family that has been systematically dismantled: the sibling '218 (IPR2022-00062) and '623 patents fell in the same period; the '218 and '595 FWDs were appealed together and dismissed together (2023-2182/-2183); and Netlist has filed terminal disclaimers tying the '595 and '218 patents to the '623 patent (and its relatives). That terminal-disclaimer web then spawned collateral-estoppel cascade proceedings — e.g., IPR2025-00001 and IPR2025-00002 (bannerwitcoff.com filings) against the '024 and '319 continuations, where the Board found the continuation claims patentably indistinct from the invalidated '623/'218/'525 claims and Netlist eventually disclaimed all claims and took adverse judgments. This is the signature of a patent family that has not held up under repeated IPR attack. There is no defensive-aggregator (Unified Patents) petitioner in the '595 chain — the petitioners are the operating-company defendants SK hynix and Samsung themselves. The '595 patent has also been litigated (D. Del. 1:21-cv-01453; W.D. Tex. 6:20-cv-00194-ADA), which is a "well-asserted patent" signal — but here it ended badly for the patent owner.

Recommended next steps

• If you are a defendant being asserted on the '595 patent, lead with the cancellation. The operative disposition is the Final Written Decision in IPR2022-00064 (2023-05-09), captioned "Final Written Decision Determining All Challenged Claims Unpatentable 35 U.S.C. § 318(a)" — located at https://ptacts.uspto.gov/ptacts/public-informations/petitions/1548549/download-documents?artifactId=bot-7lplEyr3Tp2xBOc8hEF8GmS2u9GzTzJND-mchDerWbrM9f2TMKI — plus the IPR certificate canceling claims 1–24. The FWD became final when Netlist's appeal was voluntarily dismissed on 2023-10-19 (Fed. Cir. Nos. 2023-2182, 2023-2183; order at https://www.docketalarm.com/cases/US_Court_of_Appeals_Federal_Circuit/23-2183/Netlist_Inc._v._Samsung_Electronics_Co._Ltd/docs/13.pdf). A complaint asserting a canceled claim is exposed to a Rule 11 / § 285 motion.
• Verify currency before relying on it. Because the ODP structured feed shows no records for this patent, confirm the certificate and current claim status directly on USPTO Patent Center / PTAB E2E for US 10,474,595 and in the PTAB E2E docket for IPR2022-00064 (and IPR2020-01042) before filing, rather than trusting the ODP block in this prompt.
• No active proceedings to monitor. Both '595 proceedings are closed — IPR2022-00064 by FWD (final), IPR2020-01042 by settlement. There is no pending institution deadline, oral hearing, or FWD due date to track for this patent. If you want to watch for new attacks, monitor the continuation patents ('024, '319, and any new '595-family continuations) — those are where Netlist is still litigating/defending, and where collateral estoppel from the '595/'218/'623 FWDs is doing the work.
• Caveat on sourcing. The specific claim-level dispositions above are drawn from the FWD text; the IPR2020-01042 APJ roster is drawn from a secondary aggregation service (Patexia) and the settlement terms are confidential, so treat the panel composition and any settlement specifics as lower-confidence than the FWD holdings.

I'll research the assignment record for US 10,474,595 before producing the analysis.

Let me search for the specific assignment records and Netlist's corporate history.

Let me search for the specific assignment records tied to this patent and Netlist's security interests.

Assignment & Ownership Analysis — US 10,474,595

Scope note / confidence: I attempted to pull the recorded assignment chain for US 10,474,595 directly from USPTO Assignment Center (https://assignmentcenter.uspto.gov/ and the mirror at https://assignment.uspto.gov/patent/index.html). I was not able to retrieve a complete, patent-number-keyed reel/frame listing for the '595 itself within this session — the search layer returned portfolio-level and litigation-document secondary sources instead. I therefore do not reproduce a reel/frame for an inventor-to-Netlist assignment I did not see. What follows separates (a) verified records that touch this portfolio, from (b) explicit gaps. Nothing below is inferred from naming alone.

Cross-reference: this analysis builds on the previously generated sections. Their finding matters here — per IPR2022-00064 (FWD 2023-05-09, appeal dismissed 2023-10-19), all claims 1–24 were held unpatentable. Ownership of a canceled claim set has limited practical value, which is itself relevant to the verdict.

Inventors

Patterns observed:

• Single-inventor chain. The entire "Notification-Signal" family (provisional 61/186,799 → '837 → '1116 → '218 → the '595, and the later '060/'319/'024/'105 continuations) names Hyun Lee alone. That is unusual for a platform-level memory-module architecture and is precisely what Samsung attacked: Samsung pleads that Lee, as Netlist's JEDEC representative, attended the June 4, 2009 Montreal JC-40 meeting where Inphi presented "MB Initialization sequence Item 142.35" and IDT/TI/Montage/Inphi presented "Memory Buffer Membrist for LRDIMM DDR3 MB TG Item 142.43," and that Netlist filed the '799 provisional eight days later (2009-06-12). Samsung's theory is derivation / improper inventorship, i.e., an inventorship-integrity attack rather than a title defect. Treat the derivation allegation as unadjudicated: the PTAB invalidated the claims on §103 art, not on inventorship.
• No inventor-departure pattern. I found no evidence that Lee (or a co-inventor) left Netlist within 12 months of filing, and there is no co-inventor on the '595 at all — so the classic "inventors bail out before the portfolio fire-sale" precursor is not present. (Contrast the sibling '608-family prosecution, where Jayesh R. Bhakta was added by a September 26, 2012 request to correct inventorship.)
• Ownership-hygiene data point (related patent, not this family). A recorded assignment of a different Netlist/Lee patent — US 10,949,339, "Memory Module With Controlled Byte-wise Buffers" (app. 15/470,856) — shows assignors Lee, Hyun and Bhakta, Jayesh R. to Netlist, Inc., executed 2010-08-30 but not recorded until 2023-08-23 at Reel 64686/603 (plainsite.org/patents/assignment.html?id=11313615). Two takeaways: (i) the Lee→Netlist employment assignment paperwork was executed in 2010, contemporaneous with this family's non-provisional filing; and (ii) Netlist belatedly recorded old inventor assignments in 2023, consistent with shoring up §281 standing ahead of, or during, enforcement. This is a practice observation — it is not a substitute for the '595's own record, which I could not retrieve.

Original assignee

Netlist, Inc. (Delaware corporation; principal place of business 175 Technology Drive, Suite 150, Irvine, CA 92618; NASDAQ: NLST). Original and current assignee per the patent face and Google Patents.

• Primary line of business: high-performance memory module design and manufacture and related IP monetization. Netlist has stated it is "a leading innovator in high-performance memory module technologies" since its 2000 founding.
• Did it ship a product embodying the claims? Yes — this is Netlist's strongest fact and it is on the record. In ITC Inv. No. 337-TA-1089 Netlist certified a domestic industry in its own products and detailed the HyperCloud LRDIMM (2009 announcement; 2013 volume shipments; qualified on HP ProLiant Gen8 DL360p/DL380p and IBM System x3650 M4), the NVvault NVDIMM, and HybriDIMM (HyperVault). Netlist asserts that the industry's DDR3/DDR4 LRDIMM load-reduction/distributed-buffer architecture "every LRDIMM sold in the market is based on Netlist's patented technology." The '595's claims are directed to an open-drain error/notification pin on a memory module with a local module controller of exactly this LRDIMM class.
• Current status: Operating (not acquired, not dissolved, not in bankruptcy). Netlist remains a public reporting company and is actively litigating and licensing. It has, however, been financially distressed at points and its business model leans heavily on IP enforcement (its own 10-K risk factors state that its "business strategy includes litigating claims against others, such as our competitors and customers, to enforce our intellectual property").
• Practitioner-directory classification: the Stanford NPE Litigation Database classifies Netlist, Inc. as a "Practicing Entity" (Product company) — not as an NPE/PAE — in No. 1:25-cv-01371. That is a directory call, not a title fact, but it is the correct directory entry.

Assignment timeline

Plainly stated: I could not confirm, from a primary USPTO record retrieved in this session, whether there is a recorded inventor→Netlist assignment specifically reeled to US 10,474,595 or to its application 15/857,553. Netlist is both original and current assignee, which in USPTO practice usually means either (a) an inventor assignment exists but was recorded against a parent application in the chain (plausibly 12/815,339 or 15/088,115), or (b) the assignment was recorded and the '595 inherits it. I do not have the reel/frame for that link and will not invent one.

What I can verify, from PTAB exhibits and party filings, are the portfolio-level encumbrances and releases that by their terms reach the '595's subject matter ("patents, patent applications … including without limitation improvements, divisions, continuations … including the Patents described in Exhibit C"):

• 2015-11-18 (executed) / recorded 2015-11-20 — Reel 037150 / Frame 0897

  • Conveyance: Security Interest / Intellectual Property Security Agreement (recorded as a security-interest assignment)
  • Assignor (Grantor): Netlist, Inc., a Delaware corporation
  • Assignee (Secured Party): SVIC No. 28 New Technology Business Investment L.L.P. (a Korean limited liability partnership; SVIC = Samsung Venture Investment Corporation)
  • Correspondent: DLA Piper LLP (US), 4365 Executive Drive, Suite 1100, San Diego, CA 92121; contact susan.reynholds@dlapiper.com, tel. 858-677-1400; submitter: Troy Zander; attorney docket 350916-9. Source file metadata on the recorded instrument: "Netlist – Project Neptune – IP Security Agreement (Executed)."
  • Context: Securitization / collateral. Netlist pledged its patent portfolio (and trademarks, copyrights, license revenues and infringement claims) as security for obligations under a November 18, 2015 Security Agreement. This is a financing lien attached to all of Netlist's patents, "whether now existing or hereafter acquired" — so continuations like the '595 (which did not exist in 2015) would be swept in as after-acquired Patent Collateral.
  • Recurrence flag: DLA Piper (US), San Diego, appears on this record as Netlist's recording agent — i.e., the patent owner's counsel, not a transfer-to-asserter lawyer. That is the opposite of the "repeat NPE correspondent" tell.

• 2015-11 (≈ Nov 18, 2015; exact recording date not captured) — Reel not retrieved

  • Conveyance: Security Interest (JDLA-related)
  • Assignor: Netlist, Inc. — Assignee/Secured Party: Samsung Electronics Co., Ltd. (per the Nov. 2015 Joint Development and License Agreement framework and Netlist's own account that "Samsung … had a security interest in" Netlist's patents). Netlist's IPR papers state Samsung and Netlist were "technology partners" from November 2015 to July 2020 and that Samsung took a license during that period.
  • Context: Securitization / collateral tied to a license-and-development deal — the JDLA (announced Nov. 2015), not an asset sale.

• 2023-10-27 (recorded) — Reel 065629 / Frame not captured

  • Conveyance: Release of Assignment (release of security interest)
  • Assignor (releasing lienholder): Samsung (Samsung Electronics Co., Ltd.)
  • Assignee (released party): Netlist, Inc.
  • Correspondent: not captured.
  • Context: Release of collateral. Netlist's IPR briefing states that although the JDLA was terminated July 15, 2020, "Samsung did not record its release of the security interest to Netlist's patent assets until October 27, 2023." The 2023-10-27 recording date is consistent with the reel number (reel ~65,600 is a 2023-era reel; compare Reel 64686 recorded Aug. 2023).
  • Confidence: the reel 065629↔Samsung-release mapping is moderate, not high — it comes from an exhibit-list caption ("Release of Assignment, Reel No. 065629, Frame No. …") paired with the PO narrative. Verify against Assignment Center before relying on it.

Not found / no evidence of: any assignment of the '595 away from Netlist; any merger, change-of-name, or corporate-reorg recording; any bankruptcy sale; any transfer to a licensing entity.

Gap to close: retrieve the Assignment Center entry for patent 10,474,595 (and/or app. 15/857,553, and the parents 15/088,115 / 13/942,721 / 12/815,339) to capture (i) the inventor→Netlist assignment reel/frame and execution date, and (ii) whether the SVIC and Samsung liens are separately reeled against these serial numbers or only against the portfolio generally.

Timeline diagram

timeline
    title Ownership of US 10474595
    2009 : Provisional filed by Hyun Lee
    2010 : Non-provisional filed
         : Lee to Netlist assignment executed
    2015 : Netlist security interest to SVIC
         : Samsung takes JDLA security interest
    2019 : Patent issued to Netlist
    2021 : Netlist sues SK hynix
         : SK hynix IPR settles
    2023 : Samsung IPR cancels all claims
         : Samsung releases its security interest
    2026 : Samsung Netlist global settlement

NPE / troll-pattern signals

1. Shell-entity transfer — NOT PRESENT. No recorded move from Netlist to a licensing-only LLC. Netlist, Inc. is both the original and current assignee. Netlist is a Delaware operating corporation with a NASDAQ listing and Irvine, CA headquarters — not a single-member LLC at a registered-agent address. The only third parties in the chain are lienholders (SVIC No. 28 at Reel 037150/0897; Samsung under the JDLA, released at Reel 065629 on 2023-10-27), which are collateral interests, not ownership transfers.

2. Known asserter in the chain — NOT PRESENT. Netlist, Inc. does not appear on the standard NPE rosters named in the brief (Acacia, Marathon, IV, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, Spangenberg entities). The Stanford NPE Litigation Database lists Netlist as a "Practicing Entity (Product company)", and the defendants it has sued are its actual competitors (SK hynix, Samsung, Micron) and their customers. Note the nuance for completeness: Netlist is an operating company and a prolific, revenue-driven enforcer; "not a listed NPE" is a directory fact, not a statement that its enforcement is non-aggressive.

3. Repeat correspondent across the chain — UNCLEAR / NOT A FINDING. I captured only one correspondent on this chain: DLA Piper LLP (US), San Diego (Susan Reynholds; submitter Troy Zander; docket 350916-9) on the SVIC security recording (Reel 037150/0897), where DLA Piper acted for Netlist as grantor. A single appearance is not recurrence, and this appearance is on the owner's side. I could not capture correspondents for the inventor assignment or the Samsung release, so I cannot assess recurrence either way. Do not read a finding into this.

4. Cascading transfers — NOT PRESENT. There are no consecutive assignments through chained LLCs. There is exactly one owner of record (Netlist) from issuance to date. No shared-principal LLC ladder, no <24-month hop chain.

5. Pre-litigation transfer — NOT PRESENT. The '595 issued 2019-11-12 to Netlist and was asserted by Netlist itself in Netlist v. SK hynix, W.D. Tex. 6:20-cv-00194-ADA (filed 2020-03-17) and in the D. Del. 1:21-cv-01453 counterclaims. No assignment precedes either suit. The chain was not arranged to establish standing or venue — Netlist has been the owner throughout.

6. Bankruptcy fire-sale — NOT PRESENT. Netlist has had going-concern and covenant issues and has granted multiple portfolio liens (Reel 037150/0897 foremost), but I found no Chapter 7 or Chapter 11 filing and no sale of patents in bankruptcy proceedings for this family. A lien is not a fire-sale; the SVIC and JDLA interests were security, and the Samsung interest was formally released (Reel 065629, 2023-10-27) rather than foreclosed.

7. Privateering — NOT PRESENT. Privateering requires an operating company to hand patents to an NPE that sues on its behalf. Here Netlist is the operating company and is the asserter; it did not offload the '595 to a proxy. (If anything, the inverse dynamic appears: Samsung, a former licensee/technology partner, obtained a security interest in Netlist's patents and later led the IPR that killed them.)

8. Defensive aggregator (anti-NPE) — NOT PRESENT. The chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. Note the asymmetry: Unified Patents is on the attacking side of this patent family (the Google Patents litigation panel links a Unified Patents PTAB case IPR2022-00064 for this family) — the opposite of the neutralizing signal.

Verdict

Operating-company assertion.

Justification: Netlist, Inc. is the original and current assignee of the '595 with no intervening transfer to any licensing vehicle — the only third parties on the record are lienholders (SVIC No. 28 at Reel 037150/0897, recorded 2015-11-20; Samsung's JDLA security interest, released at Reel 065629 on 2023-10-27), which are collateral, not ownership, events. Netlist is a Delaware operating company that designed and shipped products embodying the claimed architecture (HyperCloud LRDIMM, NVvault NVDIMM, HybriDIMM — the basis of its certified ITC domestic industry) and it asserted this patent against actual competitors (SK hynix, W.D. Tex. 6:20-cv-00194-ADA filed 2020-03-17; Samsung, D. Del. 1:21-cv-01453). None of signals 1, 4, 5, 6, 7, or 8 is present; signals 2 and 3 are affirmatively not supported. Caveat: this is a title/ownership verdict only — it says nothing about enforceability, and per the previously generated section all 24 claims were canceled in IPR2022-00064, so the practical asset value of this particular patent is nil regardless of who holds record title.

Verify at: https://assignmentcenter.uspto.gov/ (search "10474595"; also "15857553") and https://assignment.uspto.gov/patent/index.html. Priority verification targets, in order: (1) the inventor Hyun Lee → Netlist assignment reel/frame for app. 15/857,553 or its parents; (2) whether SVIC Reel 037150/0897 lists serial 15/857,553 in Exhibit C or picks it up as after-acquired collateral; (3) the full Reel 065629 frame number confirming the Samsung release.

I'll research the prior-art citation record for US 10,474,595 specifically. Let me start with the patent's own citation list and the references used in the IPR.

Let me identify the specific references — both the patent's own cited art and the IPR grounds references.

Let me pin down the exact bibliographic details of the key references.

⚠️ Two sourcing caveats up front, because they change how you should read this:

1. The front-page "References Cited" list for US 10,474,595 is not present in the authoritative full text I was supplied. The Google Patents page text I was given contains the abstract, description, and claims, but the "Patent Citations / References Cited" table was not included in the fetched content. My searches were also exhausted before I could pull that table directly. I therefore will not invent an examiner-citation list. What follows distinguishes (a) references cited inside the '595 specification, (b) the references that were actually cited against the '595 in the IPR that killed it, and (c) secondary references appearing in the record. Where I could not verify a number or date, I say so.
2. All 24 claims of the '595 are cancelled (IPR2022-00064 FWD, 2023-05-09; appeal dismissed 2023-10-19). An anticipation/invalidity analysis is therefore of historical and defensive value only — there is no live claim to attack or defend.

A. The USPTO record for 10,474,595 (as verified)

Note on the "citation" question: the only patent documents cited within the '595 specification itself are two US publications, each expressly incorporated by reference (see §D below). The references that actually matter — and that invalidated the patent — were not applicant-cited art; they were defendant-located art introduced in the IPRs (§B).

B. The references that decided the patent (IPR2022-00064 grounds)

These are the operative prior-art citations against the '595. Every ground was § 103 obviousness, not § 102 — I explain the § 102 consequence in §E.

B1. Hazelzet — U.S. Patent Application Publication No. 2008/0098277 A1 (Ex. 1014)

• Full citation: Hazelzet, U.S. Pat. Appl. Publ. No. 2008/0098277 A1 ("Hazelzet"), assigned in the art to IBM; a high-density, high-reliability memory module family. (Secondary sources associate this family with the title "High density high reliability memory module with power gating and a fault tolerant address and command bus"; I could not verify that the string belongs to 2008/0098277 A1 specifically, so treat the title as unverified.)
• Dates: Publ. 2008 by virtue of its 2008/xxxxxxx designation; the underlying application is a 2007-era IBM filing. Exact publication date not verified in this session — confirm on Patent Center. Either way it comfortably pre-dates the June 12, 2009 priority date.
• Disclosure (as characterized in the IPR record, with paragraph cites quoted by the parties):
  • A 4-rank, 276-contact DDR DIMM with SDRAMs 22, ECC/Parity register/buffer chips 21, memory interface chip 18, and connectors 23 on the card edge (Figs. 7A–7C; ¶[0015]).
  • Open-drain error output UE 121 driven from error logic 100, which receives PERR 111 (parity) and UE 110 (uncorrectable error); ¶[0099]: "driving the error line low … After holding the error line low for only 2 clock cycles, the driver will be disabled and the output permitted to return to an un-driven state (high impedance) allowing this line to be shared by multiple modules." ¶[0109]: "Two open-drain outputs are available to permit multiple modules to share a common signal pin…"
  • Two operating modes on the same pin — parity mode and ECC mode (¶[0072], ¶[0072]/[0099]).
  • Initialization is done over a bus, not the UE line (¶¶[0123]–[0125]: high-speed/Error Bus 122, presence-detect, IIC, SMBus).
• Claim mapping / §102 potential: Hazelzet alone supplies the PCB/edge-connection structure, the DRAMs, the module controller, the open-drain output on an error edge connection, and the parity-error signaling in normal operation — i.e., nearly all of claim 1 except the second (training) mode and the training-related signaling on that pin. Because Hazelzet's only two modes are error modes and it teaches initialization over a separate bus, it does not anticipate any claim of the '595 (no single reference discloses the training-mode limitation of claims 1/10/17, and a dependent claim cannot be anticipated if its base claim is not). Hazelzet was a § 103 primary reference only. Netlist's teaching-away argument (Hazelzet's own preference for a bus) was rejected by the Board.

B2. Buchmann — U.S. Patent No. 8,139,430 B2 (Ex. 1016)

• Full citation: Buchmann et al., U.S. Patent No. 8,139,430 B2. Filed 2008-07-01; issued 2012-03-20 (dates as stated in the SK hynix invalidity chart of record). Title string not independently verified; abstract of record: "A memory buffer, memory system and method for power-on initialization [of a] cascade interconnect memory system …"
• Disclosure: a memory buffer on the module with a bus interface operable in an SBC (sideband communication) mode and a high-speed mode; an FSI slave; logic for executing a power-on and initialization training sequence initiated by the memory controller; training states TS0/TS1/TS3 and TS_done/TS3_ack notifications; handshaking partly performed in SBC mode; and the design philosophy of moving functionality (write/read buffers, ECC, status registers, initialization circuitry, self-test) "local to the memory subsystem" (¶ 32:7–34).
• Claim mapping / §102 potential: Buchmann supplies the training mode, training sequences, and completion-notification concepts, and even a "UE line" — but its training signaling travels on a 6-bit bus, not on an open-drain error pin, and it has no parity-error-on-error-pin function. No anticipation of any claim. Buchmann was the § 103 secondary reference in Ground 2; the combination Hazelzet + Buchmann invalidated claims 1–24.

B3. Kim — U.S. Patent No. 8,359,521 B2 (Ex. 1017)

• Full citation: Kim, U.S. Patent No. 8,359,521 B2, "Providing a Memory Device Having a Shared Error Feedback Pin," filed 2008-01-22; issued 2013-01-22 (dates quoted verbatim from the FWD).
• Disclosure: a memory module (Fig. 4) in which "the error output line from the memory devices are dotted together via open drain drivers to a single error line that is output from the memory module 400"; a shared error feedback pin ERROR# between data CRC and address parity (Fig. 5) using an OR gate to drive the gate of the open-drain transistor; and ¶ 6:16–18 — "In alternate exemplary embodiments, other functions also share the error feedback pin."
• Claim mapping / §102 potential: Kim is the anticipation-closest reference on the structural dependent claims — it discloses a transistor with gate/source/drain, an open-drain output to the error pin, an OR/mux-like selection between two error signals, and sharing of the pin among different functions. It does not disclose training-related signaling, so it does not anticipate claim 1/10/17 or their dependents. Kim was relied on to reinforce claims 3–7, 12–14, 20, 22, and 23 (FWD Ground 3: Hazelzet + Buchmann + Kim).

B4. JEDEC — LRDIMM DDR3 Memory Initialization Chapter Proposal (committee letter ballot)

• Full citation: JEDEC Committee Letter Ballot, "LRDIMM DDR3 Memory Initialization Chapter Proposal" (non-patent literature; Ex. 1015 in these proceedings). Date: sources in the record conflict — the IPR materials describe it variously as a "December 2009" ballot and a "November 2009" proposal. I will not reconcile that here.
• Disclosure: LRDIMM architecture with an MB (memory buffer); MB–DRAM interface training (including write-delay/MPR-based training) during which "no DRAM commands … can be issued to the MB until the MB-DRAM Interface training is complete"; and use of an open-drain ERROUT# pin for the host interface.
• Claim mapping / §102 potential — this is the one reference with a genuine §102 theory: JEDEC's ERROUT# pin is the single-pin, dual-purpose (error + training) structure the claims recite, and JEDEC is the closest thing in the record to a single-reference disclosure of the claim-1 architecture. But its November/December 2009 date post-dates the June 12, 2009 provisional priority date, so it can only be § 102(a) art if the priority claim for the challenged claims fails (see §E). Netlist attacked it on exactly these two fronts — public accessibility and post-dating the priority date. The Board did not need it: it invalidated all claims on Hazelzet + Buchmann alone, and (per the FWD) declined to reach the Hazelzet + JEDEC + Kim combination once Hazelzet + Buchmann + Kim sufficed.

B5. The earlier, parallel kill — IPR2018-00303 (the '623 patent), Ex. 1034

The Board's Final Written Decision in IPR2018-00303 found claims 1–29 of US 9,535,623 unpatentable over Hazelzet + Buchmann, and the '595 claims were later held (in the examiner's own words during prosecution of the '024 continuation) "not patentably distinct" from the '595/'218/'623 claims. That FWD is the most probative single document for anyone attacking a '595-family claim, and it is cited as Ex. 1034 in later proceedings.

C. Secondary / supporting references appearing in the record (identifiers partly unverified)

D. References cited inside the '595 specification

The only patent documents the '595 expressly cites are:

1. U.S. Pat. Appl. Publ. No. 2006/0062047 A1 — cited at col. 4 of the specification for the proposition that a module controller "may receive and process address and command signals (e.g., read, write commands) from the system memory controller and transmit appropriate address and commands to the memory elements in response," and incorporated by reference in its entirety.
2. U.S. Pat. Appl. Publ. No. 2006/0262586 A1 — same citation sentence, same incorporation by reference.

Both are 2006 publications. I could not verify their titles, inventors, or exact publication dates in this session (search budget exhausted), and I will not guess. Functionally, they are cited as background support for the module-controller/register architecture — i.e., the claim-1 "module controller … coupled to the dynamic random access memory elements" element — not as art directed at the open-drain dual-mode pin that distinguishes the claims.

E. § 102 anticipation analysis — bottom line by claim

Because every § 102 question requires a single reference disclosing all limitations, and every independent claim (1, 10, 17) requires a single open-drain pin that serves a parity-error function in a normal read/write mode and a training-related function in a mode where the module is not accessed for normal reads/writes:

The practical § 102 point: the only way a single reference anticipates the '595 is to defeat the June 12, 2009 priority claim. That is a live question, not a closed one — Netlist itself argued in its POPR about written-description support in the 2009 provisional for claim language such as "not accessed by the memory controller for normal read or write operations," "one or more training sequences," "one or more N-bit-wide data signals," and "one or more pins [that] are not active" in the second mode. If any of those limitations lacks § 112 support in the provisional, the effective date shifts forward (to 2010-06-14 at the earliest), and the November/December 2009 JEDEC ballot — and the June 4, 2009 Inphi presentation — become candidates for § 102(a) art. Note the irony: the claims' own narrowing amendments (added in the 2017 continuation) are what create the priority vulnerability.

F. What to verify before relying on any of this

1. Pull the actual "References Cited" front page for US 10,474,595 on USPTO Patent Center / Google Patents. I could not retrieve it, and it is not in the supplied text. Everything above about citations is drawn from the specification text and the IPR/PTAB record, not from the patent's own citation table.
2. Confirm IPR2022-00064 exhibit numbers and reference identities in PTAB E2E before quoting them — exhibit numbering differs across the Samsung petitions ('595 = IPR2022-00064, '218 = IPR2022-00062, '623 = IPR2018-00303, '024 = IPR2025-00001, '319 = IPR2025-00002).
3. Resolve the JEDEC date conflict (November 2009 vs. December 2009) — it is outcome-determinative for any § 102 theory, since one version sits just inside and one just outside the priority window.
4. Verify the unverified identifiers: Talbot, James, Wang, Amidi, and the Inphi "Item 142.35" presentation date/accessibility. I have deliberately not supplied numbers for these because I could not confirm them, and misattributing a reference number in an invalidity contention is worse than omitting it.
5. Treat every § 103 finding above as superseded by cancellation. All 24 claims are cancelled, so for a defendant the argument is the IPR certificate, not prior art; for a plaintiff, there is no claim left to assert.

I'll research the prior art references identified in the PTAB record to ground the obviousness analysis.

Let me pin down the exact identities and dates of the prior art references.

Let me confirm the prior-art dates for the secondary references, which matter for the §103 analysis.

Obviousness Analysis — U.S. Pat. No. 10,474,595 B2 under 35 U.S.C. § 103

Building on the prior sections. The earlier sections established (a) the claim architecture of the '595, (b) that IPR2022-00064 held all claims 1–24 unpatentable and the FWD became final after the appeal was voluntarily dismissed, and (c) the cast of prior art. This section does the substantive §103 work those sections flagged but did not perform: an element-by-element mapping of the claims onto the references and the articulated motivation to combine.

Threshold note on the "Prior Art" section of the page. The Google Patents page's own "Prior Art" block is a keyword/topic listing ("memory / memory module / controller / module / configurable") — it identifies fields, not references. The operative prior art for this patent is the art of record in the IPR petitions and the PTAB's decisions on this family: Hazelzet, Buchmann, Kim, and the JEDEC "LRDIMM DDR3 Memory Initialization Chapter Proposal" committee letter ballot, with Amidi and Talbot appearing as alternative secondary references. I analyze those below. Where a date or identifier is derived from a secondary source rather than the reference's own face, I say so.

Governing law note. The '595 is a continuation claiming priority through 12/815,339 to provisional 61/186,799 (June 12, 2009), so the effective filing date predates March 16, 2013. Pre-AIA § 103(a) applies. Legal framework: Graham v. John Deere, 383 U.S. 1 (1966) (scope/content, differences, PHOSITA level, secondary considerations); KSR Int'l v. Teleflex, 550 U.S. 398 (2007) (predictable combinations of known elements; design incentives; "obvious to try" in bounded art).

1. Level of ordinary skill in the art (PHOSITA)

Consistent with the parties' and the Board's treatment in the family, a POSITA here is a person with a bachelor's degree in electrical engineering or computer engineering (or equivalent) and roughly 2–5 years of experience in memory system design — DRAM modules, JEDEC memory interfaces, error detection (parity/ECC), and module initialization/training. This is a mature, well-documented, incremental art: the prior art (Hazelzet, Buchmann, Kim) is all IBM-assigned work in exactly this space, and JEDEC had by 2008–2009 standardized LRDIMM initialization and the ERROUT# pin. That matters for §103 because predictability and the availability of known design alternatives are higher in a mature, standards-driven art.

2. The references

3. Claim 1 — element-by-element

Claim 1 (24 total claims; independent claims at least 1, 10, and 17) is a memory-module apparatus claim. Mapping:

Bottom line on claim 1: every limitation is disclosed in the combination Hazelzet + Buchmann, with the low/high-impedance open-drain behavior supplied by Hazelzet itself and the "training-mode notification" function supplied by Buchmann (or, alternatively, expressly by the JEDEC ballot's "wait for ERROUT#"). This is precisely the combination the Board held rendered claim 1 obvious.

4. Claim 10 — element-by-element

Claim 10 is a parallel independent apparatus claim with two additional emphases:

1. Open-drain output "configurable to drive … from a first state to a second state and from the second state to the first state" (a bidirectional toggling, not a one-shot assertion). — Hazelzet ¶[0099]: after holding the error line low, "the driver will be disabled and the output permitted to return to an un-driven state (high impedance)" — i.e., the pin is driven low and released, reliably and repeatedly. Repeated toggling is also routine for a status/notification line.
2. Second mode performs training "without communicating data signals via the first edge connections," and the open-drain pin carries the training-related signal. — Buchmann (training during power-on initialization, before normal operation) + JEDEC ballot (buffer training during initialization; host waits on ERROUT#) + Hazelzet (open-drain pin as the signaling medium).

Claim 10 also retains the first-mode parity-error output on the same error edge connection — Hazelzet.

5. Independent claim 17 (method) — flagged

The supplied text truncates claim 17 after its preamble. I will not characterize its recited steps. Two points are safe: (i) the FWD in IPR2022-00064 adjudicated claims 1–24, so claim 17 was reached and held unpatentable; and (ii) its preamble ("at a memory module coupled with a memory controller of a host system, the memory module including a printed circuit board having edge connections that fit into a corresponding [slot]") mirrors the apparatus claims, so the same Hazelzet + Buchmann/JEDEC reasoning applies to its steps. Verify the full text of claims 17–24 from the granted patent before relying on any method-claim-specific theory.

6. Dependent claims

The Board separately held claims 3–7, 12–14, 20, 22, and 23 unpatentable over Hazelzet + Buchmann + Kim — i.e., the transistor/logic-gate/mux subclaims.

7. Motivation to combine — the articulated rationales

A §103 conclusion requires a reason a POSITA would (not merely could) have combined the references. The record supplies several independent, KSR-recognized rationales:

1. Same field, same problem, same assignee. Hazelzet, Buchmann, and Kim are all IBM memory-module work addressing server memory capacity, performance, and reliability. Kim is assigned to the same company as Hazelzet and "contains some of the same disclosures" — a KSR "familiar elements" fact pattern.
2. A known technique, applied to a known structure, with predictable results. Pin-sharing — multiplexing multiple functions onto one output pin to save pins — was a well-known technique (Kim: "single pin … dotted via an open drain"; Hazelzet itself: the error line is designed to be shared, and "in alternate exemplary embodiments, other functions also share the error feedback pin"). Substituting a multiplexed/OR-gated open-drain pin for a dedicated one yields nothing more than the expected result (fewer pins, simpler controller). KSR: "the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results."
3. Design incentive / market pressure. LRDIMM data-buffering was known to increase capacity and performance; buffering, in turn, creates the timing-skew problem that training exists to solve. A POSITA designing an LRDIMM-style module (Hazelzet's RDIMM upgraded with data buffering) would have been motivated to add the known, standardized initialization training of Buchmann/JEDEC before normal operation to ensure reliable reads/writes.
4. Express teaching in the references. Buchmann supplies the training sequence and the notion of handshaking during power-on initialization; JEDEC supplies the specific instruction to the host to "wait for ERROUT#" during buffer training — a direct teaching to use the error pin to signal training status. Hazelzet supplies the open-drain pin and the low/high-impedance behavior; Kim supplies the dotted/OR-gated implementation.
5. Minimal reconstruction. Unlike a design that requires ripping out the reference's operating principle, the combination simply reuses one already-shared, already-open-drain, otherwise-idle-during-initialization pin for a status notification during training. The Board characterized this as "straightforward."

8. Netlist's counterarguments, and why the Board rejected them

Netlist's Patent Owner Response and the Murphy declaration pressed four themes. Their failure is instructive because it is where the obviousness defense will be attacked:

• "Hazelzet teaches away — it uses a bus (error bus 122 / SMBus), not the UE line, for initialization." Rejected. Hazelzet's disclosure of one initialization channel does not "criticize, discredit, or otherwise discourage" using the UE pin for a status notification; the error line was designed to be shared and idle during initialization. A reference's silence or preference is not teaching away absent discouragement.
• "The combination requires redesigning Hazelzet (RDIMM → LRDIMM with data buffering) and is inoperable/undue experimentation." Rejected. The motivation (increased performance/capacity) is the classic KSR "design incentive," and the Board found a reasonable expectation of success; the "inoperability" theory (In re ICON) did not hold because the modified module was operable for the claimed functions.
• "Hindsight." Rejected. Each limitation was traced to a specific disclosure, not to the '595's teaching; the equal treatment of the '218, '623, and '595 claims across IPRs (the patents are terminally disclaimed as patentably indistinct) corroborates that the combination is a genuine prior-art answer, not a reconstruction.
• "JEDEC is not a printed publication / postdates the June 12, 2009 priority date." This is the strongest procedural attack and it matters — but the FWD did not rest solely on JEDEC. The Hazelzet + Buchmann ground invalidated all claims 1–24 without needing the JEDEC ballot, so the invalidation survives even if the JEDEC-ballot date/accessibility argument were sustained. Separately, if the claims are not entitled to the June 12, 2009 priority date (as Samsung affirmatively alleged, pointing to Hyun Lee's attendance at the June 4, 2009 JEDEC meeting and the Inphi/IDT presentations), then the JEDEC ballot, JESD82-29, and the June 4, 2009 presentations all become §102 art — and each independently shows an ERROUT#/training-status scheme. Either way the claims fall.

9. Result

Alternative independent combinations that would also render the claims obvious (useful if the primary combination were ever disturbed): (A) Hazelzet + JEDEC letter ballot (same result — the ballot expressly recites "wait for ERROUT#" during training); (B) Hazelzet + Amidi or Hazelzet + Talbot (shared error-out terminal; explicit training mode); (C) Hazelzet + the June 4, 2009 JEDEC presentations for a §102/§103 attack if the priority date is not sustained.

10. Secondary considerations

No probative objective indicia of non-obviousness appear in the record I reviewed. There is no evidence of unexpected results, industry praise, long-felt need, or failure of others tied by nexus to the claimed dual-use open-drain pin; the commercial success Netlist might point to (LRDIMM sales) is attributable to JEDEC standardization and general buffering benefits, not to the claimed pin-multiplexing. The absence of a nexus, combined with the strong prima facie case and the terminal disclaimers over the invalidated '623 claims, leaves the §103 case unrebutted.

11. Sources and caveats

• IPR2022-00064 (Samsung v. Netlist), FWD 2023-05-09 — all claims 1–24 unpatentable over Hazelzet + Buchmann; claims 3–7, 12–14, 20, 22, 23 over Hazelzet + Buchmann + Kim: https://ptacts.uspto.gov/ptacts/public-informations/petitions/[1548549](/patent/1548549)/download-documents?artifactId=bot-7lplEyr3Tp2xBOc8hEF8GmS2u9GzTzJND-mchDerWbrM9f2TMKI
• Netlist's Patent Owner Response / Murphy declarations (the teaching-away and inoperability arguments): https://storage.courtlistener.com/recap/gov.uscourts.txed.[216364](/patent/216364)/gov.uscourts.txed.216364.478.4.pdf ; https://www.docketalarm.com/cases/PTAB/IPR2022-00064/Samsung_Electronics_Co._Ltd._v._Netlist_Inc/docs/08-15-2022-Patent_Owner/Exhibit-2027-98-Second_Declaration_of_Dr_Robert_Murphy,_dated_August_15,_2022.pdf
• Hazelzet — US 2008/0098277 A1 / US 7,870,459 B2: https://patents.google.com/patent/US7870459
• Buchmann — US 8,139,430 B2 / US 2010/0005281 A1: https://www.patentsencyclopedia.com/app/20100005281
• Kim — US 8,359,521 B2: https://patents.google.com/patent/[US8359521B2](/patent/US8359521B2)
• JEDEC LRDIMM DDR3 Memory Initialization Chapter Proposal (SJ Park Declaration, Ex. 1055): https://www.docketalarm.com/cases/PTAB/IPR2022-00064/Samsung_Electronics_Co._Ltd/10-15-2021-Petitioner/Exhibit-1055-54-SJ_Park_Declaration/
• Later collateral-estoppel IPRs confirming the family outcome (bannerwitcoff.com) — IPR2025-00001/-00002 on the '024 and '319 continuations: https://bannerwitcoff.com/wp-content/uploads/2025/05/IPR2025-00002.pdf

Flagged uncertainties (do not treat as settled):

1. Precise ground numbering in IPR2022-00064 varies across secondary sources (one later petition recasts it as Ground 2 = Hazelzet+Buchmann and Ground 5 = Hazelzet+Buchmann+Kim). The combinations are consistent; the ground numbers are not. Cite the FWD directly.
2. Buchmann's exact US filing/priority date was not verified in this session; the Board treated it as prior art beyond §102(a) ambiguity, but confirm the face of US 8,139,430 before relying on a specific statutory subsection.
3. Claims 17–24 are truncated in the source I was given; I have not characterized claim 17's steps.
4. Today's date conflict: the task frames the current date as April 26, 2026, while the session header shows September 28, 2026. The legal conclusion is unaffected, but note the discrepancy if dating the analysis.