US 6331049

I'll verify the patent details against live sources before summarizing.

Let me check for any litigation or Federal Circuit activity involving this patent.

Search scope and caveats

I searched the open web (Google Patents full text, the USPTO/EPO-family records mirrored there, and EPO publication-server records) for the exact identifier 6331049. Note one important literal-matching caveat: the bare number "6331049" also resolves to an unrelated Japanese patent, JP 6331049 B2 (2018-05-30, Panasonic IP Management, "Display device and manufacturing method thereof," application 特願2016-228230). That is a different document and is not the subject of this summary. The US patent is US 6,331,049 B1, and everything below refers only to it.

I found no authoritative evidence of any CAFC 2026 docket or active litigation involving US 6,331,049. It is an expired patent, so that is not surprising, but I want to be explicit: I could not verify CAFC docket activity from a primary court source, and I am not asserting that none exists.

Bibliographic data — US 6,331,049 B1

Family note: the EP member is titled "Printhead having varied thickness passivation layer" and published as EP 1 034 932 A2 (2000-09-13), A3 (2001-01-03), B1 (2005-12-21). The JP member is JP 3326152 B2 (2002-09-17), titled (in translation) "Print head device."

Abstract (verbatim)

"A printhead for an inkjet or like printing apparatus having a passivation layer of varied thickness. The passivation layer is relatively thin over the ink expulsion element to reduce the energy required to expel ink. The passivation layer is relatively thick over other regions of the substrate, particularly those regions in which circuitry or the like is provided. The increased thickness over the circuitry protects against capacitive coupling and the like. Methods of forming the varied thickness passivation layer are also disclosed."

Technical problem and solution

The patent frames a trade-off: turn-on energy (TOE) scales with passivation-layer thickness (thicker layer → more energy to nucleate a bubble), but a thin layer cracks over the topological steps at the conductor edges near the resistor, and thin passivation also permits capacitive coupling into on-die logic beneath surface conductors. The stated solution is to spatially vary the passivation thickness — thin over the expulsion element (~0.2 µm target, <0.38 µm preferred; thinning from 0.75 µm to 0.38 µm is reported to give ~22% TOE reduction), thick elsewhere (~1.0–1.5 µm, or as thick as needed), so a single die gets both low TOE and robust circuit protection. A related teaching is use of straight (vertical) conductive-layer edges 113/115 instead of beveled edges 13/15, since photolithographic edge placement is tighter, giving a more precisely defined resistor. Two fabrication routes are described: (1) deposit one thick passivation layer and selectively etch it thinner over the resistor (Fig. 2); (2) fully etch the passivation off the resistor and refill with a thin layer (Fig. 3), which gives better thickness control at the cost of extra masking steps. A collateral benefit noted is front-side protection of the substrate during TMAH ink-conduit etching.

Independent claims in plain language

Claim 1 — apparatus (broadest, single-extra-layer form). A printhead apparatus comprising: a substrate; a fluid expulsion element on the substrate; a first passivation layer over at least part of the substrate; a second passivation layer over part but not all of the first passivation layer (so the two layers overlap in some areas only); and a fluid well over the expulsion element. The second layer is thinner than the first, and the second layer is located proximate the fluid expulsion element and in contact with it. In practical terms: a thin top passivation layer sits directly on the heater/resistor, and the underlying thicker passivation extends elsewhere — the "varied thickness" idea expressed as two discrete layers rather than a single etched-to-two-thicknesses film. Dependent claims add: processing logic in the substrate under the first layer (2); second layer ≈0.4 µm or less (3); first layer ≈0.6 µm or more (4); SiN and/or SiC material (5); a protection layer with a cavitation surface over the expulsion element (6); thermal actuation (7); and a conductive layer with a substantially vertical edge adjacent the expulsion element (8). Note: claim 1's preamble term is "fluid expulsion element," but claim 8 refers to "said ink expulsion element" — a terminology mismatch that could create an antecedent-basis argument for claim 8.

Claim 9 — apparatus (three-region form). Same elements as claim 1 (substrate, fluid expulsion element, first passivation layer, second passivation layer over less than the whole of the first, thinner, fluid well over the element), but defined structurally by three resulting regions: (i) a first region consisting essentially of only the second passivation layer; (ii) a second region consisting essentially of both the first and second passivation layers stacked; and (iii) a third region consisting essentially of only the first passivation layer. Dependent claims add: combined thickness in region two ≈0.6 µm or more (10); first region over at least part of the expulsion element, second region adjacent the first, third region adjacent the second (11); second-layer thickness over the element ≈0.4 µm or less (12); a cavitation layer over the second passivation layer (13); first layer includes SiN (14); second layer includes SiN, SiC, or both (15).

Observation on claim scope: despite the title's "and method of making same," the granted claim set contains no method claims — all 15 claims are apparatus claims. The fabrication methods are disclosed only in the specification. Also, claim 9's regional language does not require the second layer to be in contact with the expulsion element the way claim 1 does.

Verification status

• Title, inventor, assignee, filing/issue dates, abstract, and claim text: confirmed against the patent document and its EP/JP family records (Google Patents, EPO publication server).
• "Expired – Lifetime" and the 2019-03-12 anticipated expiration: consistent across the sources I retrieved; maintenance fees at the 4-, 8-, and 12-year windows are recorded. I did not independently retrieve a USPTO PatentCenter maintenance-fee/adverse-decision transaction history, so expense/expiry particulars should be treated as reported rather than independently audited.
• CAFC 2026 dockets: no result found. I cannot state with certainty that no such docket exists — I did not query a primary court docket system (e.g., PACER/CM/ECF) directly. If you need that confirmed, a PACER party search on "Hewlett-Packard" plus the patent number, or a Docket Navigator/Lex Machina search, would be the authoritative route.

I'll search for litigation involving US patent 6331049 across patent litigation databases.

Let me search the litigation databases directly.

Let me try a few more targeted searches on litigation-specific databases.

Answer: No litigation involving US 6,331,049 was found

I searched for the specific patent number 6,331,049 (issued as US 6,331,049 B1, "Printhead having varied thickness passivation layer and method of making same," inventor Marzio Leban, filed 1999-03-12, granted 2001-12-18, current assignee Hewlett-Packard Development Company, L.P.). I did not find any district court litigation, CAFC appeal, PTAB proceeding (IPR/PGR/CBM), ITC Section 337 investigation, or other adversarial proceeding in which this patent was asserted or challenged.

Because no cases were identified, I cannot supply the requested per-case fields (plaintiff, defendant, jurisdiction, case number, filing date, status). Rather than invent them, I am reporting a null result, with the basis and caveats below.

What I checked and what I found

Important false positives — do not confuse these with US 6,331,049

1. JP 6331049 B2 — This is a Japanese patent number (特許第6331049号), a Panasonic IP Management display-device patent granted 2018-05-30. It is a completely different patent in a different jurisdiction and technology. It is not US 6,331,049.
2. Various numbers containing the string "6331049" appeared in unrelated PTAB filings, securities filings, and financial data. None referenced US 6,331,049.
3. The Google Patents "Similar Documents" and "Cited By" lists for US 6,331,049 (e.g., Lexmark's US 6,676,246; US 7,195,343; US 7,178,904; HP's US 7,837,886 and US 9,498,953) show that the patent is cited as prior art by later patents and is related to later litigation, but being cited by, citing, or being related to patents that were litigated does not mean US 6,331,049 itself was ever asserted.

Contextual observations (inference, not verified fact)

• The patent is a component-level printhead die structure claim (varied-thickness passivation layer over heater resistors and drive circuitry). Patents of this type are manufactured by the OEM and are not typically asserted against end users or third-party cartridge remanufacturers, which is more common with supply/cartridge patents.
• The assignee chain is Hewlett-Packard Company → Hewlett-Packard Development Company, L.P. (2005). HP's inkjet patent litigation in this era typically involved HP as plaintiff against cartridge remanufacturers (e.g., Hewlett-Packard Co. v. Nu-Kote Holding Inc., N.D. Cal.), but I found no indication US 6,331,049 was among the asserted patents in any such case.
• The legal-status record shows the patent ran its full term and reached anticipated expiration on 2019-03-12 (status: "Expired – Lifetime"), with maintenance fees paid at years 4, 8, and 12. A patent that expired without any recorded adversary event is consistent with never having been litigated.

Caveats on my search

• My accessible tools were general web search only — I could not directly query the Unified Patents litigation portal, Docket Alarm, CourtListener/RECAP, RPX Insight, or PACER as intended; those queries were cut off. A null result from general web search is not the same as a verified null result from PACER/RECAP and the Unified Patents caselist.
• Litigation involving this patent could exist but be low-visibility (e.g., a settled case where the patent was one of many asserted, a case in which the patent number was mis-transcribed, or a state/foreign proceeding not indexed by the sources reached).
• Patent-number searches are noise-prone, as demonstrated by the JP 6331049 collision.

Recommended verification steps before relying on this null result: run "6331049" or "6,331,049" directly on https://portal.unifiedpatents.com/litigation/caselist and https://portal.unifiedpatents.com/ptab/caselist, search Docket Alarm and CourtListener/RECAP by patent number, and check RPX Insight's patent page for 6,331,049, which cross-links any asserted cases.

Bottom line: to the best of my research, there is no known litigation involving US Patent 6,331,049. I could not verify this against PACER/Unified Patents directly, so treat it as a strong-but-not-absolute negative and confirm with those databases.

I'll verify the structured-data default (no AIA trials on file) against live sources before writing anything.

Proceedings overview

Zero AIA trial proceedings are on file for US 6,331,049. The structured ODP block ("no AIA trial proceedings for this patent as of the most recent ingest") is the canonical source, and my independent checks of PTAB docket material surfaced no IPR, PGR, or CBM naming US 6,331,049 / 6,331,049 B1, and no caption pairing the '049 patent with a petitioner. Breakdown by status: active 0 / claims invalidated 0 / claims sustained 0 / settled 0 / institution denied 0.

Bottom line for a defendant: there is no PTAB record to lean on — neither a kill shot nor a hardening. All 15 claims are untested at the Board, and the decisive fact is not a trial outcome but the calendar: the patent's own record shows an anticipated expiration of 2019-03-12 (20 years from the 1999-03-12 filing). You are defending an expired patent, which removes injunctive exposure and compresses the case into a § 286 six-year damages lookback. Any assertion today is a backward-looking royalty demand, not a threat to your current product line.

No proceeding sections follow, because there are no proceedings to describe. Reproducing fabricated IPR numbers, panels, or FWDs here would be worse than an empty section.

What I checked, and what I found:

• ODP structured "PTAB proceedings on file" block → empty (canonical).
• Keyword searches for the patent number against PTAB/trial material → no hits tying the number to an AIA trial; hits were unrelated (e.g., a different patent that shares the digit string JP6331049B2, unrelated office actions, and generic PTAB practice documents).
• Litigation/petition searches → the only HP printhead enforcement campaign that surfaced was the ITC § 337 action 337-TA-723, which asserted US 6,234,598, 6,309,053, 6,398,347, 6,481,817, 6,402,279, and 6,412,917 — not the '049 patent. I found no assertion of US 6,331,049 anywhere.
• Caveat, stated plainly: I could not query PTAB E2E / P-TACTS or the ODP API directly with a case-number lookup from here. A recent filing that ODP has not yet indexed is possible but would be unusual for a patent that expired on 2019-03-12. Treat "zero" as high-confidence, not notarized.

Strategic summary

Claim status: all untested. No IPR, PGR, or CBM has ever reached an institution decision on US 6,331,049, so there is no claim-level record — nothing canceled, nothing sustained, nothing construed by the Board. Every one of claims 1–15 (two independent claims, 1 and 9, with dependents 2–8 and 10–15) stands exactly as issued, with the prosecution history and the 35 references cited on the face of the patent as the only prior-art record. The two independent claims are structurally narrow: claim 1 requires a second passivation layer formed over "a part, less than whole" of the first and "in contact" with the fluid expulsion element; claim 9 adds an express three-region topology (thin-only / stacked / thick-only). Those limitations are the natural non-infringement battleground in the absence of any Board construction.

Estoppel landscape: essentially empty. With no petitioner, no § 315(e)(2) estoppel attaches to anyone, and no § 325(e)(1) estoppel exists either. A defendant is free to raise any § 102/§ 103 ground, in the PTAB or in court, unconstrained by an earlier IPR. Conversely, there is no prior petitioner whose win you can borrow. Note the two-way consequence: because the patent expired 2019-03-12, an IPR petition now would be litigated on an expired patent (Board practice: claims construed under Phillips, no claim amendments available), and the practical payoff of invalidating an expired patent is limited to defeating damages for the 2013–2019 window. That low payoff is the most likely reason no IPR exists.

Pattern signals. Nothing to report on petitioner or patent-owner behavior — there is no petitioner and no PTAB activity by the owner. The patent is a Hewlett-Packard Company original, assigned to Hewlett-Packard Development Company, L.P. on 2005-01-11, with foreign family members EP 1034932 B1, JP 3326152 B2, and DE 60024905 T2, all expired or inactive per the record. There is no defensive aggregator (Unified Patents or similar) anywhere in the chain and no ex parte reexamination surfaced. The absence of IPRs is consistent with a patent that was never a serial-assertion asset: HP's actual printhead enforcement (337-TA-723) used a different patent set.

Recommended next steps

• If you are a defendant: there is no FWD to link and no canceled claim to quote. Do not represent to a court or an adversary that any claim of the '049 patent has been invalidated — it has not. Your framing is instead: (1) the patent expired 2019-03-12, so injunctive relief and ongoing royalties are off the table; (2) any recovery is capped by 35 U.S.C. § 286 to damages for infringement in the six years preceding the complaint, and delay may also implicate equitable defenses; (3) with no Board construction on the books, the "in contact with" limitation of claim 1 and the three-region requirement of claim 9 should be attacked at Markman on the intrinsic record, plus § 112 indefiniteness if the "part, less than whole" / region boundaries are asserted broadly.
• If a petition is being contemplated: note that the § 315(b) one-year clock runs from service of a complaint alleging infringement, and the § 315(a)(1) bar from a filed DJ action. An expired-patent IPR is permissible but low-value; weigh it against § 282 invalidity in the district court, where the clear-and-convincing burden is a defense-side advantage and there is no estoppel cost.
• Monitoring: because the structured data is authoritative but ingest can lag, re-check the USPTO PTAB P-TACTS / E2E search for the patent number before relying on "zero" in a filing — https://ptacts.uspto.gov/ptacts/ — and CourtListener for any appeal naming the patent: https://www.courtlistener.com/?q=%226%2C331%2C049%22. Patent reference: https://patents.google.com/patent/US6331049/en.
• Plainly stated: if you were expecting an IPR history on this patent as part of your invalidity narrative, it does not exist. The absence is itself the signal — a 1999 printhead passivation patent that expired in 2019 never attracted a challenger, so plan a defense on expiration, claim scope, and § 282 rather than on a PTAB record.

I'll verify the assignment record and check for any litigation or NPE activity involving this patent.

Let me check for any litigation specifically involving this printhead patent and verify the assignment details.

Let me make a final attempt to identify the assignment correspondent of record.

Ownership & Assignment Analysis — US 6,331,049 B1

Patent: "Printhead having varied thickness passivation layer and method of making same"
Application: US 09/267,216 · Filed: 1999-03-12 · Granted: 2001-12-18 · Status: Expired – Lifetime (anticipated expiration 2019-03-12)
Source of record reviewed: Google Patents legal-events/assignment table (https://patents.google.com/patent/US6331049/en), which mirrors USPTO Assignment Center records. Note below where the fetched record does not expose a field.

Inventors

Pattern notes: Single-inventor patent with an effective-date-at-filing assignment — the ordinary "hired to invent" record, not a departure/fire-sale pattern. There are no co-inventors, so no mass-inventor-departure signal can arise. I could not independently confirm Leban's specific HP site or title from the fetched record; do not infer it.

Original assignee

Entity on the issued patent: Hewlett-Packard Company (California corporation).

• Product embodiment: Yes — the patent's own specification is directed to a thermally actuated thermal-inkjet (TIJ) printhead and describes the invention in the context of "those made by Hewlett-Packard, Canon and Epson." HP's TIJ printheads and the inkjet printers/ink cartridges that contain them practice this subject matter. This is not a paper patent.
• Primary line of business: Computing, printing/imaging hardware (HP was the dominant thermal-inkjet OEM through this era).
• Current status: Operating. The 2005 assignment moved the asset into Hewlett-Packard Development Company, L.P. (a Texas limited partnership) as part of HP's internal corporate reorganization; that entity remains the current owner. After the 2015 HP split, the printing/inkjet business sits with HP Inc. (operating, NYSE: HPQ). HP Development Company, L.P. is HP's IP-holding subsidiary, not an independent licensing-only entity. No bankruptcy, dissolution, or insolvency event appears for HP.

Assignment timeline

Only two recorded assignments exist for this patent, both inside the HP corporate family. There are no post-issuance transfers to any third party, LLC, or aggregator.

• 1999-03-12 (executed) / recorded 1999-04-27 — Reel 009906/0676

  • Conveyance: Assignment
  • Assignor: Leban, Marzio (individual inventor)
  • Assignee: Hewlett-Packard Company
  • Correspondent: Not exposed in the fetched record. The USPTO Assignment Center record for this reel/frame sets out the correspondent of record, but that field is not present in the Google Patents mirror I was able to retrieve, and my searches did not surface the original filing's correspondent. I will not guess a name. To read the correspondent, open the reel directly on Assignment Center (reel 009906, frame 0676).
  • Context: Inventor's initial assignment of rights to his employer — standard employment assignment, executed on the filing date.

• 2005-01-11 (executed) / recorded 2005-01-11 — Reel 015583/0106

  • Conveyance: Assignment
  • Assignor: Hewlett-Packard Company
  • Assignee: Hewlett-Packard Development Company, L.P.
  • Correspondent: Not exposed in the fetched record (same limitation as above). Google Patents lists the owner name for this reel but not the recording correspondent.
  • Context: Internal corporate reorganization / change of holding entity (HP → HP's IP-holding LP), concurrent with dozens of HP reassignments recorded the same day. Not a sale to a third party.

Bottom line: the Assignment Center record for US 6,331,049 contains only the original inventor assignment and one intra-corporate HP housekeeping transfer. There is no NPE link to trace.

Timeline diagram

timeline
    title Ownership of US 6331049
    1999 : Filed by Hewlett-Packard
         : Inventor assigns rights to HP
    2001 : Patent issued to HP
    2005 : Moved to HP Development Co LP
    2019 : Patent expired by term

NPE / troll-pattern signals

1. Shell-entity transfer — not present. No assignee with an "IP / Patents / Licensing / Holdings / Ventures" suffix, no single-purpose LLC, no registered-agent service address. The only two links are Leban → Hewlett-Packard Company (reel 009906/0676, 1999) and Hewlett-Packard Company → Hewlett-Packard Development Company, L.P. (reel 015583/0106, 2005). HPDC is HP's captive IP subsidiary, not a licensing-only shell.

2. Known asserter in the chain — not present. Neither assignee matches any public NPE roster (Acacia, Marathon, IV, IPNav, Wi-LAN, Converso/Mosaid, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, etc.). No Unified Patents / RPX high-frequency-plaintiff match for either entity.

3. Repeat correspondent across the chain — unclear (data gap). The correspondent-of-record field is not present in the source I could retrieve for either reel, so I cannot analyze recurrence. What can be said: with only two recordings, both performed by the assignee side (HP), there is no visible outside filing attorney recurring across a multi-entity chain. If you need this signal resolved, pull reels 009906/0676 and 015583/0106 directly from Assignment Center.

4. Cascading transfers — not present. Two transfers, ~6 years apart, no chained LLCs, no shared-registered-agent clustering, no common-principal pattern.

5. Pre-litigation transfer — not present. I located no infringement suit naming US 6,331,049. (The '049 patents that appear in the litigation results — Uniloc/Logitech, Knowles ITC, MicroPairing/Toyota — are different patents that merely share the trailing "049"; none is US 6,331,049.) With no suit, there is no transfer-to-enable-assertion event.

6. Bankruptcy fire-sale — not present. No Chapter 7/11 proceeding touching HP or HPDC, and no sale-in-bankruptcy record.

7. Privateering — not present. No transfer to a third-party NPE asserting against competitors; the chain never leaves the HP family and no HP-funded assertion vehicle appears.

8. Defensive aggregator (anti-NPE) — not present. The chain does not terminate at RPX, AST, LOT, Unified Patents, or OIN; it terminates at HP Development Company, L.P. This is an operating-company holder, not a neutralizer.

Verdict

Operating-company assertion — with an explicit caveat.

Justification: The entire recorded chain is Leban → Hewlett-Packard Company (reel 009906/0676, executed 1999-03-12) and Hewlett-Packard Company → Hewlett-Packard Development Company, L.P. (reel 015583/0106, executed 2005-01-11) — a single inventor assignment plus one intra-corporate HP housekeeping transfer, with a current owner (HP/HPDC) that plainly ships inkjet printheads embodying the claims. All eight NPE signals are negative (signal 3 is unresolved only because the correspondent field is absent from the source I could retrieve, not because of an adverse finding). The one honest caveat: I found no infringement suit naming this specific patent, so the "assertion" prong of this verdict is not proven — stated strictly, this is a non-asserting operating-company asset with no NPE involvement. Either way, there is no troll pattern here.

Verification link: USPTO Patent Assignment Search — search by patent number 6331049 at https://assignment.uspto.gov/patent/index.html (or https://assignmentcenter.uspto.gov/). To resolve the correspondent-of-record gap flagged in signals/entries above, open reel 009906/0676 and reel 015583/0106 directly.

Data-limitations statement: Beyond the two reels cited, I did not fabricate any assignment, correspondent, litigation, or SEC filing. Where the available source did not expose a field (notably the recording correspondent), I have said so rather than infer it. If Assignment Center shows an additional recent record not reflected in the mirror I reviewed, re-run this analysis against the live reel images.

I'll begin by verifying the patent at USPTO and then work through its citation list.

Now let me pull details on the most likely §102-relevant cited references.

Prior-Art Analysis for US 6,331,049 B1 — "Printhead having varied thickness passivation layer and method of making same"

1. USPTO lookup result (identifier confirmed, not corrected)

The identifier 6331049 as it appears in the USPTO-mirrored record resolves to:

Caveat repeated from the earlier section because it directly affects this task: the bare string "6331049" also returns a different, unrelated document — JP 6331049 B2 (Panasonic IP Management, display device, granted 2018-05-30, application 特願2016-228230). All references below belong to the US 6,331,049 B1 citation list only. I retrieved the citation list from the Google Patents US6331049B1 record, which mirrors the USPTO front-page citation data. I did not obtain a direct PatentCenter/Patent Public Search rendering of the file wrapper, so I cannot report which of these citations were carried in a PTO-892 versus an applicant IDS, and I cannot report whether any were the basis of a §102 rejection versus a §103 combination versus mere background.

2. §102 framework used below

Under 35 U.S.C. §102 (pre-AIA, applicable here), a cited reference anticipates a claim only if it discloses every element of that claim, arranged as claimed, in a single reference. The independent claims require:

Claim 1 (and, with added structure, claim 9):

• (a) a substrate
• (b) a fluid expulsion element formed on the substrate
• (c) a first passivation layer over at least a portion of the substrate
• (d) a second passivation layer over a part, less than whole, of the first passivation layer (i.e., the two overlap only in some areas)
• (e) a fluid well over the expulsion element
• (f) the second passivation layer thinner than the first
• (g) the second passivation layer proximate the expulsion element and in contact therewith (required by claim 1; not required by claim 9)
• Claim 9 adds: three regions — (i) second layer only, (ii) first + second stacked, (iii) first layer only.

Dependents: 2 (logic under first layer), 3 (≤0.4 µm), 4 (≥0.6 µm), 5 (SiN/SiC), 6 (protection/cavitation layer), 7 (thermal), 8 (substantially vertical conductive edge); and 10 (stacked ≥0.6 µm), 11 (region placement), 12 (≤0.4 µm), 13 (cavitation layer), 14 (first layer SiN), 15 (second layer SiN/SiC).

Important limitation on a §102-only analysis: a dependent claim cannot be anticipated by a reference that does not also disclose the claim it depends from. Nearly all of the structurally interesting references below therefore cannot anticipate claims 2–8 or 10–15 standing alone; at most they disclose the added feature and would support an obviousness posture or an anticipation argument only if the base-claim elements are located in the same document.

Evidence basis: I retrieved and read the full text of US4535343A, US4931813A, and US5682188A. For the remaining references I have verified citation data (number, assignee, filing/publication dates, title) from the US6331049B1 record and its EP/JP family records, but I have not read their full specifications, so the §102 column for those is a preliminary, title- and abstract-level assessment, not an element-by-element comparison. I flag each such entry.

3. Tier A — Closest structural art (genuine §102 candidates or direct on-point disclosures)

3.1 US4535343A — Hewlett-Packard, "Thermal ink jet printhead with self-passivating elements"

• Filed / Published: 1983-10-31 / 1985-08-13
• Description (verified from full text): Silicon substrate 2 with thermal SiO₂ layer 4; resistive layer 6/6′ (Ta or TaN); aluminum conductors 8/8′; and a passivation structure consisting of layer 10 of an oxide/oxynitride of the resistive material in immediate contact with the resistive element 6′, plus layer 12/12′ of an oxide of aluminum over the conductors; an adhesive layer 14, barrier elements 16/16′ (RISTON/VACREL) and a nickel orifice plate 18 with orifice 20 positioned directly above resistor 6′. The reference expressly teaches that these passivation films "may also be made extremely thin and … still be substantially defect-free" and that thinner films allow operation at 10 kHz versus 2 kHz.
• §102 assessment: This is the single most relevant cited reference and the closest thing in the list to a §102 hit on the concept of claim 1 — thin passivation in immediate contact with the resistive element, with a different passivation over the conductor regions, and a fluid well (orifice 20) above the resistor. However, on the retrieved text the two passivation layers are laterally adjacent, not stacked (layer 12 sits over conductors 8, 8′, not "over a part, less than whole, of" layer 10), and no relative thickness relationship between layers 10 and 12 is stated. That means claim 1 elements (c)/(d)/(f) are not clearly met and claim 9's three-region structure is not disclosed.
  • Potentially anticipates: claim 7 (thermally actuated fluid expulsion element) — squarely disclosed.
  • Strong art against, but not verified anticipation of: claims 1, 3, 5, 11, 12, 15.
  • Does not anticipate: claims 9, 10, 13, 14.

3.2 US4931813A — Hewlett-Packard, "Ink jet head incorporating a thick unpassivated TaAl resistor"

• Filed / Published: 1987-09-21 / 1990-06-05
• Description (verified from full text): Silicon substrate 28, ~15,000 Å SiO₂ thermal barrier 30, TaAl resistive layer 32 (1,000 Å minimum, 3,000–5,000 Å preferred), gold conductive layer 34 (~5,000 Å), with the resistor's contact surface 36 disposed to contact the ink directly — the reference expressly states that increased resistor thickness "obviates the need for the passivation layers," doing away with the seven-layer/five-mask passivated stack.
• §102 assessment: Because it discloses a printhead with the expulsion element in direct contact with fluid and with no overlying passivation layer at all, it cannot anticipate claims 1 or 9 (elements (c), (d), (f), (g) absent). Its significance is (i) as teaching-away art that the patent owner may need to distinguish, and (ii) as the reference whose masked-etch conductor patterning is closest to claim 8's "substantially vertical edge."
  • Potentially anticipates: none.
  • Relevant to: claim 8 (vertical conductor edge) as a secondary feature only.

3.3 US5682188A — Hewlett-Packard (Meyer et al.), "Printhead with unpassivated heater resistors having increased resistance"

• Filed / Published: 1992-09-09 (appl. 08/407,301) / 1997-10-28
• Description (verified from full text): Substrate 28, SiO₂ thermal barrier 30 (~1.7 µm), TaAlOₓ resistive layer 22 (~5,000 Å), adhesion layer 34, conductive layer 36 (~5,000 Å), overcoat layer 38 (Ta). The background section expressly recites the conventional structure — "a TaAl resistor can be coated with a layer of silicon nitride, silicon carbide or, more commonly, both," plus an overcoat of tantalum — and identifies the drawbacks of passivation (turn-on voltage varies with passivation thickness, heat accumulation, manufacturing complexity).
• §102 assessment: This reference is effectively a written description of the admitted prior art of US 6,331,049's own FIG. 1 (uniform SiN/SiC passivation plus Ta cavitation overcoat). It discloses a single, uniform passivation thickness, not a varied one, so it anticipates no claim. It is nonetheless the best single citation for the materials and cavitation-layer limitations of claims 5, 6, 13, 14 and 15.
  • Potentially anticipates: none.
  • Relevant to: claims 5, 6, 13, 14, 15 (materials/cavitation) and to the FIG. 1 admitted prior art.

3.4 EP0887186A1 — STMicroelectronics S.r.l., "Integrated inkjet print head and manufacturing process thereof"

• Filed / Published: 1997-06-27 / 1998-12-30
• Description: Integrated inkjet print head in which drive/control circuitry is fabricated in the same semiconductor substrate as the ejection elements.
• §102 assessment (title/abstract level only — full text not read): This is the most plausible citation for claim 2 ("processing logic formed in said substrate under said first passivation layer"). It cannot anticipate claim 2 standing alone (dependent claim), and it is not known to disclose varied passivation thickness, so it does not anticipate claims 1 or 9.
  • Potentially anticipates: none (but is the key art for claim 2's subject matter).

4. Tier B — Structural printheads, layer stacks, methods, and materials (constructive art; no verified anticipation)

For each of these I have citation data but not full-text verification; treat §102 conclusions as preliminary.

5. Tier C — Drive, energy, and temperature-control references (no structural anticipation)

These were cited for the printhead operating environment (the "fire signal," TOE, drive circuitry) rather than for the claimed layer structure. None of them can anticipate any of claims 1–15, because they do not disclose the layer stack at all:

Note that US5682188A (Tier A) makes the turn-on-energy/passivation-thickness relationship explicit — "turn-on voltage varies with passivation thickness" — which is the motivation-recitation behind the TOE discussion in US 6,331,049's own background.

6. Non-patent literature cited

7. Ranking of the most relevant prior art

1. US4535343A (HP, self-passivating elements) — closest single reference: thin passivant in immediate contact with the resistor plus a separate passivant over the conductors, with an orifice directly above the resistor; expressly motivated by thinness/speed. Best candidate for a §102 argument against claim 7 and for the concept of claims 1/3/5/12/15.
2. US5682188A (HP, unpassivated heater resistors) — best written description of the admitted prior art (uniform SiN/SiC + Ta overcoat), and the clearest statement of the passivation-thickness/TOE trade-off.
3. US4931813A (HP, thick unpassivated TaAl resistor) — the teaching-away reference: resistor directly in contact with ink, passivation expressly eliminated; also the closest art to claim 8's "substantially vertical edge."
4. EP0887186A1 (STMicroelectronics) — most relevant to claim 2's on-substrate logic.
5. US4513298A (HP, Scheu) and US5257042A (Xerox, transducer protection) — foundational structural/printhead-protection art.

Bottom line on §102: On the material I could verify, no cited reference discloses the full combination of independent claim 1 or claim 9 — specifically, none was shown to disclose a second passivation layer that (i) overlies part, less than whole, of a first passivation layer, (ii) is thinner than the first layer, and (iii) is in contact with the expulsion element, all in the same document. The cited art is therefore most naturally an obviousness (§103) record regarding the passivation stack, with §102 exposure essentially confined to (a) the thermal-actuation limitation of claim 7 (US4535343A, US4513298A) and (b) the materials/cavitation limitations of claims 5, 6, 13, 14, 15 (US5682188A and similar).

8. Explicit uncertainties

• I could not retrieve the USPTO file wrapper / office actions for 09/267,216, so I cannot state whether any of these 37 references was applied under §102 versus §103 versus cited as background only. The patent granted 2001-12-18 without my having confirmed the number or content of rejections.
• For the 33 references I did not read in full, the §102 column reflects title, assignee, date, and abstract-level assessment only. US4951063A, US5257042A, US5883650A, EP0825026A2, and EP0729834A2 are the ones where a full-text read is most likely to change the assessment, and they should be re-checked before any of this is relied upon.
• No verified litigation or PTAB record exists for this patent (consistent with the prior section); nothing in the citation record indicates adversarial citation by a third party.

I'll ground the obviousness analysis in the actual cited art before reasoning about combinations. Let me pull the key references from the Prior Art section.

Obviousness Analysis — US 6,331,049 B1 under 35 U.S.C. § 103

0. Scope, sources, and caveats

This analysis builds on the earlier bibliographic, claim-construction, and litigation sections (which I treat as authoritative and do not repeat). Two flags before I start:

• Contradiction check: The prior sections are internally consistent with the patent text I have. No contradiction found. I reuse two observations: (i) despite "and method of making same" in the title, all 15 granted claims are apparatus claims — so any § 103 analysis must operate on the structural limitations only; and (ii) claim 8 recites "said ink expulsion element" while claim 1 recites "fluid expulsion element," an antecedent-basis wrinkle (a § 112 issue, not § 103, but it affects how broadly one reads claim 8).
• Evidence caveat: My retrieval returned actual text for only four of the cited references — US 4,931,813 (Pan et al., HP), US 5,682,188 (Meyer et al., HP), US 5,257,042 (Buhler, Xerox), and EP 0 887 186 (STMicroelectronics). For the remaining cited references (e.g., US 4,535,343 "…with self-passivating elements," US 4,951,063 "Heating elements for thermal ink jet devices," US 5,530,465 (Seiko Epson), US 5,637,644, US 5,883,650, US 6,007,188, US 6,070,969, the Canon EP publications, JP H07276639, and the four HP Journal articles) I have titles and citation context only. I flag every inference drawn from title alone. I did not retrieve the prosecution history (the examiner's actual rejections/allowance), which is the single largest gap in this analysis.
• Not-of-record aside: My searches incidentally surfaced EP 0 465 212 (Xerox, "Ink jet printheads"), which teaches a second passivation layer covering most of a first passivation layer while leaving the resistor/tantalum region exposed so the top layer "is not a thermal barrier between the heating resistors and the ink." That is squarely on point for claim 1's "second passivation layer over a part, less than whole, of said first passivation layer" — but EP 0 465 212 is not in the US 6,331,049 citation list, so a challenger would have to raise it as additional art. I treat it as a bonus reference, not a relied-upon one.

1. Legal framework

• Governing statute: Pre-AIA 35 U.S.C. § 103(a) — the application was filed 1999-03-12, before the AIA's effective date. The question is whether "the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art."
• Graham v. John Deere Co., 383 U.S. 1 (1966): (1) scope/content of the prior art; (2) differences between prior art and claims; (3) level of ordinary skill; (4) secondary considerations.
• KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007): a combination is obvious where the elements were known, the combination does no more than a predictable variation, there was a design incentive or market pressure, and there existed "a finite number of identified, predictable solutions." Motivation may come from the references themselves, the nature of the problem, or the ordinary knowledge of the skilled artisan. A patent composed of several known elements arranged "according to known methods" is obvious "when the improvement is no more than the predictable use of prior-art elements according to their established functions."

A critical structural fact here: the patent's own Background admits both halves of the problem and both halves of the solution's motivation. It states that thick passivation "disadvantageously increases the TOE," and that "in order to protect circuitry within the substrate, it is necessary to have a sufficiently thick passivation layer." That is an admission that the problem was known; the patent rests whatever novelty it has on the spatially-partitioned solution. That framing makes this a textbook KSR combination case.

2. Level of ordinary skill (PHOSITA) as of March 1999

I would define the PHOSITA as a person holding a B.S. in electrical engineering, materials science, or applied physics (or equivalent), with roughly 2–5 years of hands-on experience in thermal inkjet printhead design and thin-film/MEMS fabrication, and working familiarity with: TIJ architecture (heater resistor, conductors, ink chamber/orifice); thin-film passivation materials and their deposition/etching (SiN, SiC, Ta₂O₅); the concept and measurement of turn-on energy (TOE); semiconductor masking/etching unit operations; and on-die drive/control-circuit integration, including the capacitive-coupling and isolation issues that attend it. This is a moderately sophisticated but not extraordinary level of skill, and both asserted references sit squarely within it.

3. Claim 1 — element-by-element map of the prior art

Claim 1 requires: (a) substrate; (b) fluid expulsion element on the substrate; (c) a first passivation layer over at least a portion of the substrate; (d) a second passivation layer over part, less than whole, of the first passivation layer; (e) a fluid well over the expulsion element; (f) the second layer being thinner than the first; and (g) the second layer being proximate and in contact with the expulsion element.

Difference analysis: The only meaningful gap between claim 1 as a whole and the art is the simultaneous, spatially-partitioned presence of two passivation thicknesses on one die — thin over the resistor, thick over the surrounding substrate/circuitry. Every discrete element was known and used for its known function.

4. Primary obviousness grounds

Ground 1 (strongest): US 5,682,188 in view of US 5,257,042 and/or EP 0 887 186 — claims 1–8

Why US 5,682,188 is the ideal primary reference. It is HP's own work, and its Background articulates precisely the trade-off the '049 patent claims to have solved:

• It identifies the drawbacks of passivation: added "manufacturing complexity" (seven film layers vs. two; five masking steps vs. two); that passivation "impede[s] the dissipation of heat"; and — most importantly for TOE — that "the turn-on voltage varies with passivation thickness. This variation makes it more difficult to determine the proper driving voltage for a given resistor. Driving the resistor with too low a voltage can result in insufficient bubble formation, while driving the resistor with too high a voltage rapidly diminishes resistor life."
• It identifies a solution (remove passivation over the resistor; thicken the resistor — following US 4,931,813) and a new problem with that solution: thickening the resistive layer "reduces the resistance of the heater resistor," requiring higher drive current and "a redesign of the printhead or printer."

So US 5,682,188 expressly teaches that passivation thickness over the resistor controls turn-on behavior, and simultaneously teaches that wholesale removal over the resistor carries a penalty. A PHOSITA reading this is directly led to the claimed middle ground: don't remove the passivation over the resistor entirely — thin it — and keep it thick where it is needed.

Why the combination is motivated. US 5,257,042 supplies both the second half of the structure and the reason to keep the passivation thick elsewhere:

• It discloses on-chip drive circuitry and control logic (Fig. 4: "power buses, heating resistors, tantalum protective regions, drive transistors and control logic"), and explains that "[p]lacing drive transistors and resistors on the same substrate is popular because it allows multiplex addressing… which reduces the number of leads connected to the substrate."
• It expressly teaches the capacitive-coupling hazard: voltage spikes "caused by capacitive coupling between the tantalum layer and its heating resistor," with the dielectric region between them forming the capacitor. The '049 patent's own stated rationale for a thick layer over logic — "the likelihood of capacitive coupling or the like effecting circuitry within the substrate increases" — is the same physical concern, just with the coupling directed into the substrate circuitry.
• EP 0 887 186 reinforces integration of transistor circuitry (NPN transistor 29 in well 3) beneath a dielectric/passivation layer (16) with the heater (15) above — i.e., logic in the substrate under the passivation layer (claim 2).

Motivation, stated as a rational underpinning: Both objectives — low TOE at the resistor and robust electrical isolation over the logic — were known, and the two are served by opposite thickness choices at different locations. Where a single die must host both a resistor and its drive circuitry, the artisan identifying both problems has an obvious design incentive to satisfy each where it applies, using the ordinary thin-film tools of deposit/mask/etch. That is the "predictable variation of known elements" KSR sanctions.

Reasonable expectation of success: High. Thickness modulation by mask-and-etch (or full-etch-and-refill, the '049 patent's own Fig. 3 route) is a routine unit operation. Nothing in the combination is unpredictable; the '049 patent itself reports a ~22% TOE reduction for 0.75→0.38 µm as a simple, expected consequence.

Claim 8 (vertical edge). US 4,931,813 (Fig. 2: conductive layer 34 over resistive material 32) shows the standard photolithographically patterned conductor; vertical edges are the default result of anisotropic/patterned etching, and the '049 specification itself concedes that beveled edges are "significantly more difficult to precisely position," so the straight-edge feature is at best a design simplification — the opposite of an unobvious advance.

Ground 2 (alternative primary): US 4,931,813 in view of US 5,257,042 / EP 0 887 186 — claims 1–8

US 4,931,813 is the "unpassivated thick-resistor" reference. It teaches a printhead with substrate, resistor, conductors, ink channel, and orifice plate, in which the resistor is self-passivating / unpassivated so that it can "contact fluid… rather than be separated from the fluid by one or more passivation and buffer layers," expressly to obtain the advantages "by simply using a thicker resistor, thus avoiding the complexity and thermal and electrical performance limitations imposed by the passivation layers."

Its direct teaching is thus: remove the passivation over the expulsion element while leaving the stack everywhere else. The '049 claim-1 structure differs only in degree — it substitutes a thin passivation over the element (in contact with it) for no passivation over the element. The limiting case of zero thickness over the resistor with a thick layer elsewhere is the '049 architecture with the thin layer taken to zero; adding back a deliberately thin passivation over the resistor is an obvious interpolation, especially because US 4,931,813 itself creates the reason (resistor-life/resistance/current-drive penalties) to reinstate a protective layer.

Caveat: For Ground 2, the element of a distinct second passivation layer that overlays part of the first is less directly met by US 4,931,813 alone, so this ground leans more heavily on the secondary reference and/or the ordinary skill in stacking passivations (SiN + SiC, as US 5,682,188 notes are "more commonly, both").

Ground 3: US 5,257,042 in view of US 5,682,188 and the HP Journal non-patent literature — claims 1–15

US 5,257,042 alone supplies: substrate; heating element; a dielectric region (a passivation layer) between the element and a conductive protective (tantalum) region; the tantalum cavitation surface exposed to ink; integrally formed drive transistors and control logic; and the capacitive-coupling/R-C analysis. US 5,682,188 adds the express teaching that passivation thickness governs turn-on voltage and heat dissipation. Together with the non-patent literature — the four cited HP Journal articles (Bhaskar/Aden 1985; Askeland/Childers/Sperry 1988; Aden et al. 1994), which describe the evolving HP thin-film TIJ stack, passivation (SiN/SiC) and cavitation (Ta) layers, and TOE — this ground supplies the complete ordinary-knowledge baseline for the materials and the thickness/energy trade-off. I have not read those articles' full text; I rely on their titles and their role as the standard references on TIJ thin-film structure. This ground is best used against the dependent claims (materials, cavitation layer, thermal actuation).

5. Claim 9 and the dependent claims

Claim 9 (three-region structure, claims 10–15)

Claim 9 defines the same combination structurally: region 1 = essentially only the thin second layer (over the element); region 2 = essentially both layers stacked (the overlap/step); region 3 = essentially only the thick first layer (over the logic). This is the inherent, unavoidable geometry that results from either fabrication route disclosed in the patent (mask-and-thin, or full-etch-and-refill with the refill lapping the step). Any prior art that teaches both (i) a thick passivation over the circuitry region and (ii) a thin passivation over the resistor region necessarily discloses or renders obvious the intermediate overlap region where the two coincide near the topological step. This is the classic case of a claimed structure that is the "natural result" of the combination — a strong § 103 position, since nothing about the three-region recitation adds a structural or functional limitation beyond the two-thickness combination itself.

• Claim 10 (region-2 combined thickness ≥ 0.6 µm): routine optimization; the cited art already discloses passivation layers in the 0.5–1.0 µm range (US 5,257,042's dielectric; US 5,682,188's SiN/SiC stacks; the HP Journal thin-film descriptions). No teaching away; mere recitation of a workable range.
• Claim 11 (region placement): inherent in the structure — the thin region is where the element is, the thick region is where the circuitry is, the intermediate region is between them.
• Claim 12 (second-layer thickness ≤ 0.4 µm over the element): same as claim 3.
• Claim 13 (cavitation layer over the second passivation): expressly taught — US 5,257,042 (tantalum protective region over the dielectric), US 5,682,188 ("an overcoat of tantalum or other metal is applied over the passivation layers"), and US 4,951,063 (silicon nitride followed by a tantalum layer).
• Claims 14–15 (SiN, SiC, or both): expressly taught by US 5,682,188 ("silicon nitride, silicon carbide or, more commonly, both").

Claim 1 dependents (2–8)

• Claim 2 (processing logic in the substrate under the first passivation layer): expressly taught by EP 0 887 186 (transistor 29 in the substrate beneath the dielectric/passivation) and by US 5,257,042 (drive transistors/control logic on the same substrate).
• Claim 3 (second layer ≤ 0.4 µm): a result-effective-variable optimization. The art (US 5,257,042's thin interposed dielectric; US 4,951,063's thin deposited SiN) already uses thin passivations over the resistor; 0.4 µm (~4000 Å) is within the routine range and, notably, thicker than classically "thin" passivations, which weakens any argument that this range is critical or unexpected. (It also overlaps typical prior-art SiN over-layers, raising a §§ 102/103 risk.)
• Claim 4 (first layer ≥ 0.6 µm): standard passivation thickness; no unexpected result asserted.
• Claim 5 (SiN and/or SiC): express prior art (US 5,682,188).
• Claim 6 (protection layer with cavitation surface): express prior art (US 5,257,042; US 5,682,188; US 4,951,063).
• Claim 7 (thermally actuated): all primary references are thermal TIJ; the '049 specification itself notes the invention is applicable to mechanical actuators too, so thermal actuation adds nothing.
• Claim 8 (substantially vertical conductive-layer edge): obvious as the default photolithographic result (see Ground 1 discussion) — and its antecedent-basis defect ("ink" vs. "fluid") leaves it vulnerable on indefiniteness grounds as well.

6. Rebutting the likely non-obviousness arguments

7. Bottom line and residual uncertainty

My assessment: Claims 1–15 of US 6,331,049 are vulnerable to a § 103 obviousness challenge, most cleanly via US 5,682,188 in view of US 5,257,042 (optionally with EP 0 887 186 and the HP Journal articles). The combination discloses every claim-1 element; US 5,682,188 independently supplies the express motivation ("turn-on voltage varies with passivation thickness"; passivation "impede[s] the dissipation of heat"), US 5,257/042 supplies the on-die logic/capacitive-coupling motivation for a thick layer elsewhere plus the dielectric-and-tantalum stack, and the two-region geometry is a KSR-predictable arrangement of known elements serving known functions. Claim 9's three-region recitation is essentially the inherent geometry of that combination. The dependent claims track express prior-art teachings (materials, cavitation layer) or routine optimization (thickness ranges).

What would most change this conclusion, and my principal uncertainty:

1. The prosecution history. A great deal of the strength or weakness here depends on what overcame the examiner's original rejections (I could not retrieve it). The presence of a substantial European Search Report citation list suggests the examiner had the art in hand; an allowance over it would be significant context.
2. The full text of the un-retrieved cited references — especially US 4,535,343 ("…with self-passivating elements"), US 4,951,063, US 5,530,465 (Seiko Epson), US 5,637,644, US 5,883,650, and the HP Journal articles. I have mapped only their titles. Any of these could either strengthen the case (if they show two-thickness passivation) or soften it (if they show only uniform layers). I am explicitly not asserting, from title alone, that any particular one discloses the claimed two-layer geometry.
3. A genuine teaching-away would be the strongest defense — e.g., a cited reference stating that passivation over the resistor must be uniform thickness across the die, or that thickness variation is unacceptable. I found the opposite: US 5,682,188 and US 4,931,813 affirmatively encourage removing passivation over the resistor.

I want to be explicit about what I did not verify: the actual examiner rejections, the full text of roughly two-thirds of the cited references, and any non-public record bearing on secondary considerations. The analysis above is grounded in the patent text and the four references I actually retrieved, and every title-only inference is labeled as such.