Invalidity dossier
US 6118486
Synchronized multiple format video processing method and apparatus
Current assignee: MediaTek, Inc.
Added 9/28/2026, 3:03:12 PM
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Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
I'll verify current litigation/docket status for this specific patent number before summarizing.
Let me run a couple more targeted checks on current docket activity and the specific number.
US Patent 6,118,486 — Verified Summary
Bottom line on the docket question first: I found no CAFC 2026 docket, appeal, or ITC proceeding tied to patent number 6,118,486 in the searches I ran. That is consistent with the patent's status: the Google Patents record shows an anticipated expiration of 2017-12-31, i.e., the patent term ended roughly nine years before the current date. Recorded litigation activity is all historical (2005–2006, Eastern District of Texas and Central District of California). Uncertainty note: my searches were not a direct query of the USPTO Patent Center or the Federal Circuit's PACER/CM-ECF docket, so I cannot state with certainty that no 2026 filing exists; I can only say I found none, and that the expired term makes new infringement appeals unlikely.
Bibliographic data (as literally recorded)
| Field | Value |
|---|---|
| Patent number | US 6,118,486 B1 (US6118486A) |
| Title | Synchronized multiple format video processing method and apparatus |
| Application number | US 09/001,952 |
| Filing date | 1997-12-31 |
| Priority date | 1997-09-26 (benefit of US Provisional 60/060,112, filed Sep. 26, 1997) |
| Issue/publication date | 2000-09-12 |
| Inventor | Glenn A. Reitmeier (WO publication renders it "Glenn Arthur Reitmeier") |
| Original assignee | Sarnoff Corporation |
| Current assignee | MediaTek, Inc. (assignment recorded 2005-05-27 from Sarnoff Corporation) |
| Status | Expired – Lifetime (anticipated expiration 2017-12-31) |
Related filings: PCT/US1998/020235 → WO 9916243 A1 (published 1999-04-01); AU 95854/98. Co-pending U.S. applications filed the same day and incorporated by reference: Ser. No. 09/001,596 (Docket 12213, frame-rate/format sync) and Ser. No. 09/001,620 (Docket 12669, automatic format-dependent video processor adjustment).
Recorded litigation (historical, per Google Patents / Unified Patents data):
- Texas Eastern District Court, case 6:05-cv-00323
- Texas Eastern District Court, case 2:05-cv-00484
- California Central District Court, case 2:06-cv-01225
One secondary source (a National Taiwan University thesis PDF) describes MediaTek counterclaiming on 6,118,486 — acquired from Sarnoff Corporation — in litigation brought by Matsushita/Panasonic. Treat that as secondary-source context, not an authoritative docket citation.
Abstract (as published)
"A multiple format video signal processing system operating in conjunction with a display device timing system to produce synchronized video and timing signals suitable for use by a fixed horizontal scanning frequency display device."
Plain-language overview of the independent claims
The patent has 20 claims. On the face of the text provided, only claims 1 and 2 are independent; every other claim I can read (3–15) depends from claim 1, 3, 5, 8, 10, or 2. Claims 16–20 are truncated in the source text and I do not have their wording, so I cannot confirm whether any of them is independent.
Claim 1 — Apparatus (the core hardware claim). An apparatus that takes an input video signal in any of several display formats and converts it for a display device that is driven by a fixed-frequency horizontal deflection signal plus a vertical deflection signal. Four cooperating elements are required:
- a format converter that adapts at least the horizontal display format of the input to the format dictated by that fixed horizontal deflection frequency;
- a frame rate converter (coupled downstream) that adapts the input frame rate to the display's frame rate;
- a raster generator producing the fixed horizontal deflection signal and the vertical deflection signal in response to a raster clock, where the vertical deflection frequency follows the output video's vertical format; and
- a clock circuit that, responsive to a program clock reference (PCR) associated with the input video signal, produces a system clock and the raster clock — the raster clock being generated by frequency-scaling the system clock.
The inventive core, as stated in the specification, is deriving a single master clock / raster clock from the MPEG 27 MHz system clock (PCR-locked), so that one precision clock source serves both decoding and display timing, and the display need not change scanning frequency between formats.
Claim 2 — Method (the core method claim). A counterpart method for generating video and timing signals for a display with a substantially fixed horizontal scanning frequency, comprising:
- identifying the video display format associated with the video stream;
- generating, responsive to a PCR of the stream, a system clock and a raster clock, the raster clock being produced by frequency-scaling the system clock;
- generating, from the raster clock, a substantially fixed-frequency horizontal synchronizing signal and a vertical synchronizing signal that together define the active viewing area (the vertical deflection frequency being set by the stream's vertical display format); and
- adapting at least the horizontal display format of the stream in response to the horizontal format defined by the fixed horizontal deflection signal.
Representative dependent-claim subject matter (for context):
- Claims 3–5 and 12–14: a predetermined active-lines-to-blank-lines ratio chosen to hold average display brightness constant across formats, expressed via the equation
(P_ACTIVE + P_BLANK)(L_ACTIVE + L_BLANK) = F_RAST / FR. - Claims 6–7: 480-line input doubled to a 960-line format for a ≥960-line display.
- Claims 8–9: clock circuit implemented as a PLL (PCR-driven) plus a frequency scaler responsive to a raster control signal; system clock 27 MHz with raster clock one of 67.5 MHz, 81 MHz, 94.5 MHz, or 108 MHz.
- Claims 10–11: a de-focused mode in which the electron beam is widened to maintain average brightness.
Document inconsistencies I am flagging rather than correcting
Per the strict-ID rule, I am reporting these as they literally appear:
- Claim 6 / claim 7 wording: both recite "said horizontal display format of said input video signal comprises a 480 line format" and doubling it to "a 960 line format." Read literally that is a horizontal/vertical mismatch, but it is the claim text as published.
- Claim 5 / claim 14 equation definitions: the variable list defines "P BLANK" twice, the second time as "the total number of blank displayed lines." Literally, the second definition should correspond to the
L_BLANKterm in the equation. - Specification raster-clock value: one passage states the clock circuit generates "a 61.5 MHz, 81 MHz, 94.5 MHz or 108 MHz raster clock," while the rest of the specification consistently uses 67.5 MHz (and states 67.5 = 5 × 27/2, and that dividing 67.5 MHz by 2000 yields 33.75 kHz, and that "61.5 MHz" would require a divide-by-five/multiply-by-two scaler). The 61.5 MHz figure appears once and is an apparent typographical error, but I am not silently correcting it.
- Frame-rate/"frame buffer read twice" passage says "To utilize 30 Hz video information for 60 Hz display," while the described exemplary output frame rate is 30 Hz.
Source basis
- Full patent text: https://patents.google.com/patent/US6118486/en (fetched 2026-09-28 per the supplied authoritative text)
- WO family member record: https://pubchem.ncbi.nlm.nih.gov/patent/WO-9916243-A1
- Litigation links appearing on the Google Patents record: Unified Patents portal entries for Texas Eastern District cases 6:05-cv-00323 and 2:05-cv-00484, and California Central District case 2:06-cv-01225.
If you need an authoritative confirmation of zero pending 2026 proceedings, that would require a direct Patent Center / PACER / CAFC docket query, which I cannot perform with the tools available here.
Generated 9/28/2026, 3:13:23 PM
Cases on file (3)
Group view →Specific litigation cases in our database that name US patent 6118486. The free-form analysis below may also discuss cases beyond this list.
- MediaTek, Inc. v. Matsushita Electric Industrial Co., Ltd. et al.filed Oct 17, 20052:05-cv-00484U.S. District Court, E.D. Texasterminated Jun 14, 2007closed
Defendants: Matsushita Electric Industrial Co., Ltd., Panasonic North America
Other patents asserted: 5802068
- MediaTek, Inc. v. Sanyo Electric Co., Ltd. et al.filed Aug 31, 20056:05-cv-00323-LEDU.S. District Court for the Eastern District of Texas, Tyler Divisionterminated May 30, 2007settled; dismissed with prejudice
Defendants: Sanyo Electric Co., Ltd., Sanyo North America, Inc., Sanyo North American Corporation
- 2:06-cv-01225U.S. District Court, C.D. Californiasettled/dismissed with prejudice
Defendants: MediaTek, Inc., ASUSTek Computer, Inc., ASUS Computer International
Litigation summary
Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.
I'll search for litigation involving US patent 6118486.
Let me dig deeper into the specific cases identified.
Let me confirm the remaining case details and check for any other assertions.
Litigation Involving U.S. Patent No. 6,118,486
Short answer: Yes — litigation is known. U.S. Patent No. 6,118,486 ("Synchronized Multiple Format Video Processing Method and Apparatus," inventor Glenn A. Reitmeier; originally assigned to Sarnoff Corp., later assigned to MediaTek, Inc. on 2005‑05‑27) was asserted in a cluster of 2005–2007 federal district court actions between MediaTek (which acquired the patent from Sarnoff in May 2005) and Sanyo and Matsushita/Panasonic. All of these matters were resolved by settlement/dismissal; none went to judgment on the '486 patent. The patent expired (anticipated expiration) on 2017‑12‑31.
A caution on scope: some cases below appear in litigation databases as "family" or multi‑patent cases. Only where the record specifically identifies the '486 patent (e.g., the Second Amended Complaint in the Texas action, which attaches the '486 patent as Exhibit B, and the Stanford NPE database entry keyed to patent 6118486) do I treat the '486 as confirmed at issue.
Confirmed Cases
| # | Plaintiff | Defendant(s) | Jurisdiction / Court | Case No. | Filed | Outcome / Status |
|---|---|---|---|---|---|---|
| 1 | MediaTek, Inc. | Sanyo Electric Co., Ltd.; Sanyo North America Corp. | U.S. District Court, E.D. Texas (Tyler Division) | 6:05‑cv‑00323 | Aug. 31, 2005 | Settled; dismissed with prejudice in 2007 as part of global Sanyo–MediaTek settlement; cross‑licenses exchanged. Status: Closed. |
| 2 | MediaTek, Inc. | Matsushita Electric Industrial Co., Ltd. (Panasonic) and Panasonic North America | U.S. District Court, E.D. Texas | 2:05‑cv‑00484 | Oct. 17, 2005 | Closed (June 14, 2007) per docket data; resolved without a judgment on the '486 patent. |
| 3 | Sanyo Electric Co., Ltd. | MediaTek, Inc. (and its customers ASUSTek Computer / ASUS Computer International) | U.S. District Court, C.D. California | 2:06‑cv‑01225 | 2006 | Settled / dismissed with prejudice (part of the same global settlement). The Stanford NPE Litigation Database lists the '486 patent as at issue in this case. |
Supporting detail
- Case 1 (E.D. Tex. 6:05‑cv‑00323): MediaTek's Second Amended Complaint for Patent Infringement names the '486 patent expressly (U.S. Patent No. 6,118,486, "Synchronized Multiple Format Video Processing Method and Apparatus," issued Sept. 12, 2000) as one of three patents‑in‑suit, alongside the '819 and '356 patents. The complaint alleges infringement by Sanyo's DVD recorders, DVD players, digital televisions, set‑top boxes, and ICs. The court (Judge Leonard Davis) issued a claim‑construction opinion (e.g., Mar. 26, 2007) addressing the '356 and '819 patents. Sources: the complaint (via RPX Insight, https://insight.rpxcorp.com/litigation_documents/[2377627](/patent/2377627)) and the claim‑construction order (https://www.govinfo.gov/content/pkg/USCOURTS-txed-6_05-cv-00323/pdf/USCOURTS-txed-6_05-cv-00323-0.pdf).
- Case 2 (E.D. Tex. 2:05‑cv‑00484): MediaTek's financial statement (ROC year 94, i.e., 2005) records that on Oct. 17, 2005 MediaTek sued Matsushita and Panasonic North America in the E.D. of Texas over DVD recorders and digital TVs, asserting U.S. Patent Nos. 5,802,068 and 6,118,486. Docket metadata shows the case closed 06/14/2007. Sources: MediaTek Q3 2006 financial report (https://www.mediatek.com/hubfs/MediaTek%20Assets/Pdfs/Financial%20Reports/2006/Q3-Report.pdf) and Ex Parte case record (https://ai-lab.exparte.com/case/dct/txed/2:05-cv-00484/mediatek-inc-v-matsushita-electric-industrial-co-ltd).
- Case 3 (C.D. Cal. 2:06‑cv‑01225): The Stanford NPE Litigation Database, keyed to patent 6118486, lists "Sanyo Electric Co Ltd v. Mediatek Inc, 2:06‑cv‑01225, C.D. Cal." (https://npe.law.stanford.edu/patent/6118486). This corresponds to Sanyo's California action against MediaTek and its ASUS customers. Because the '486 patent was owned by MediaTek (not Sanyo), its appearance here most likely reflects MediaTek's counterclaims and/or the global consolidation/coordination of the Sanyo–MediaTek disputes; the record I retrieved does not separately itemize the '486 among Sanyo's affirmative California counts.
Global resolution
Sanyo and MediaTek publicly settled the disputes in 2007. Per press coverage: "The settlement covers patent claims brought by Sanyo against MediaTek and its customers ASUSTek Computer, Inc. and ASUS Computer International in California, and by MediaTek against Sanyo and Sanyo North America Corporation in Texas. Both cases were scheduled to begin trial over the next few months and each matter will be dismissed with prejudice… Sanyo and MediaTek also agreed to exchange cross‑licenses under the patents asserted in each litigation." Source: CDRinfo, "Sanyo and MediaTek Reach Settlement in Patent Infringement Litigation" (https://cdrinfo.com/d7/content/sanyo-and-mediatek-reach-settlement-patent-infringement-litigation). Counsel for MediaTek in the Texas action similarly confirmed the cases settled on the eve of trial (Sheppard Mullin attorney account, https://www.sheppardmullin.com/assets/htmldocuments/1191.pdf).
Post‑2007 activity
I found no evidence of any assertion of the '486 patent after the 2007 settlements, and no PTAB/IPR challenges or Federal Circuit appeals specifically directed to the '486 patent. The Google Patents record (https://patents.google.com/patent/[US6118486](/patent/US6118486)/en) lists the three district court cases above under "Family has litigation" and reports legal status "Expired – Lifetime," with anticipated expiration 2017‑12‑31.
Caveats
- The Google Patents "family has litigation" flags and the Unified Patents/Stanford data are family‑level or case‑level records; only the MediaTek Second Amended Complaint (Case 1) and the MediaTek financial statement (Cases 1 and 2) affirmatively tie the '486 patent to specific counts. For Case 3, the linkage is via the patent‑keyed Stanford database entry rather than a retrieved pleading.
- The exact disposition of Case 2 (Matsushita) beyond its June 14, 2007 closure is not fully documented in the sources I retrieved; it is consistent with the overall settlement but I cannot state the dismissal terms with certainty.
- I did not retrieve PACER dockets directly; case numbers, dates, and dispositions above are from the cited secondary/database sources.
Bottom line: Three known U.S. district court cases involved the '486 patent — MediaTek v. Sanyo (E.D. Tex. 6:05‑cv‑00323), MediaTek v. Matsushita/Panasonic (E.D. Tex. 2:05‑cv‑00484), and Sanyo v. MediaTek (C.D. Cal. 2:06‑cv‑01225) — all filed 2005–2006 and all resolved by settlement/dismissal (with prejudice) in 2007, involving cross‑licenses. No litigation is known after 2007.
Generated 9/28/2026, 3:13:35 PM
Proceedings on file (0)
All PTAB activity →AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.
Current assignee: MediaTek, Inc.
No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
I'll start by sourcing the canonical proceedings list and then checking for any proceedings the ODP ingest may have missed.
Let me dig further — checking for any AIA petitions in the 2012–2017 window and identifying the litigation campaign.
Let me confirm there's no AIA petition in the 2012–2017 window and check how the district court case ended.
Proceedings overview
Total AIA trial proceedings on file: zero. The structured "PTAB proceedings on file" block — sourced from the USPTO Open Data Portal — returns no IPR, PGR, or CBM proceeding involving US 6,118,486, and my web checks (Google Patents' litigation/proceeding links, PTAB petition documents, and general IPR databases) surfaced no petition, institution decision, final written decision, or appeal naming this patent. There is therefore no proceeding to break down by status: no claims invalidated, none sustained on the merits, none settled, no institution denials — because nothing was ever filed.
Bottom line defensive posture: the patent is untested at the PTAB but also expired. US 6,118,486 ran its full term and its scheduled expiration was 2017-12-31 (Google Patents legal status: Expired – Lifetime, anticipated expiration 2017-12-31). Every one of claims 1–20 stands as issued, uncanceled and unreviewed — but the enforcement window is closed. A defendant reading a demand letter today is not looking at a hardened IPR survivor; they are looking at a dead patent whose only real-world history is a 2005–2007 district court fight that MediaTek (as assignee of Sarnoff) picked and apparently did not finish.
No proceedings — supporting record
- Type: N/A — no Inter Partes Review, Post-Grant Review, or Covered Business Method review on file.
- Filed: N/A.
- Status: No AIA trial proceedings returned. The ODP ingest is canonical and current as of the most recent update; I found nothing on the web that contradicts it.
- Judge panel: N/A.
- Petition grounds: N/A — no § 102 / § 103 / § 112 ground was ever presented to the Board on this patent.
- Institution decision: N/A.
- Final Written Decision: None issued. No claim of US 6,118,486 has ever been canceled, confirmed, or construed by the PTAB. Any statement to the contrary would be fabricated.
- Settlement / termination: N/A.
- Appeal: No PTAB appeal to the Federal Circuit exists. (The Federal Circuit docket references I located for MediaTek/Sanyo are claim-construction matters from the underlying district court litigation, not appeals from the Board.)
- Defensive value: The absence of any IPR is a meaningful negative signal about how this patent was viewed commercially — a patent asserted against a deep-pocketed consumer-electronics defendant (Sanyo) in 2005–2007 attracted no AIA challenge in the 2012–2017 window when IPR practice exploded. That is not proof of weakness, but it is evidence that sophisticated parties facing this patent preferred settlement/portfolio cross-licensing to a validity fight.
Pre-AIA and non-AIA challenge history (context, not AIA trials)
- Original assignee: Sarnoff Corporation (assignment recorded 1998-05-04; inventor Glenn A. Reitmeier).
- Current assignee: MediaTek, Inc., by assignment recorded 2005-05-27.
- Assertion campaign — MediaTek (then owner) sued over the '486 patent alongside U.S. 5,751,356 and U.S. 5,867,819:
- MediaTek, Inc. v. Sanyo Electric Co., Ltd., No. 6:05-cv-00323 (E.D. Tex., Tyler Div.) — filed 2005-08-31; complaint expressly identifies the '486 patent as issued 2000-09-12. Source: RPX litigation document and the Unified Patents litigation portal entry.
- No. 2:05-cv-00484 (E.D. Tex.) — second E.D. Tex. case listed for this family: Unified Patents portal.
- Sanyo Electric Co. Ltd. v. MediaTek Inc., No. 2:06-cv-01225 (C.D. Cal.) — Sanyo's mirror-image/declaratory action; the Stanford NPE Litigation Database lists this as the case involving patent 6118486: npe.law.stanford.edu/patent/6118486; Unified Patents portal.
- Claim construction (the only real merits record for this patent): E.D. Tex. Memorandum Opinion and Markman order, 2007-03-26 (Doc. 344) and a related order dated 2007-05-03, both covering the '486 patent. Constructions of record: "fixed frequency" — no construction needed (claims 1 and 2); "raster clock signal" — "a periodic signal used to synchronize a display device in response to a program clock reference ('PCR')"; "clock circuit" — "a collection of electrical elements for producing clock signals"; "frequency scaling" — "multiplying and/or dividing a frequency by a given factor"; "display format" — "the horizontal and vertical resolution of output visual information"; "system clock signal" — "a periodic signal used for timing events in a system." Sources: govinfo full text, USCOURTS-txed-6_05-cv-00323 (Appendix A of Doc. 344) and CourtListener, MediaTek v. Sanyo.
- Outcome: the cases were resolved without any reported appellate merits decision on the '486 patent; secondary commentary characterizes the MediaTek–Sanyo (and MediaTek–Panasonic) campaigns as ending in a mutual standoff/"平手收場" rather than a judgment invalidating the '486 patent. I did not locate a public settlement agreement or a final judgment of invalidity — the terms, if any, are not public to my knowledge.
Strategic summary
Claim status. All 20 claims of US 6,118,486 — independent claims 1 and 2 plus dependents 3–20 — are UNTESTED and UNCANCELED. None is CANCELED; none is SUSTAINED in the PTAB sense, because the Board never reviewed them. The only narrowing of record is judicial claim construction from the 2007 E.D. Tex. Markman ruling, which is binding only as to those parties (and their privies under Kessler), and, more importantly, is moot for practical purposes because the patent's term ended 2017-12-31. There are no "surviving claims to work around" in any actionable sense — the whole patent is expired, so the correct posture is statutory, not invalidity-based: past damages (if any were ever preserved) are the only exposure.
Estoppel landscape. Because no AIA trial was ever instituted, 35 U.S.C. § 315(e)(2) estoppel does not exist against anyone on this patent. There is no petitioner privy chain, no IPR-driven bar on district-court invalidity grounds, and no estoppel over § 112 or non-art-based grounds. Conversely, there was no IPR to obtain the benefit of — a defendant today gets no ready-made claim-cancellation record and would have to litigate validity from scratch. The catch is that the practical need is equally gone: with the patent expired and the last recorded enforcement ending around 2007, the prior-art toolbox is irrelevant unless a live damages tail (e.g., an unresolved past-infringement claim, a licensing/royalty audit, or a laches/§ 286 lookback dispute) remains open.
Pattern signals. MediaTek — not Sarnoff — was the asserting party, and it asserted the '486 patent in a three-patent set rather than as a standalone crown jewel; MediaTek acquired the '486 from Sarnoff in 2005, months before filing suit. The same petitioner never filed multiple IPRs against this patent (no petitioner at all). The patent owner never pursued a PTAB appeal (nothing to appeal), and I found no defensive aggregator — the "Unified Patents" links on the Google Patents page are merely the litigation-data vendors for the 2005–2006 district court cases, not evidence that Unified Patents ever petitioned against the '486 patent. Do not mistake those portal links for PTAB activity.
Recommended next steps
- If a demand letter cites US 6,118,486: lead with expiration. The patent's scheduled term ended 2017-12-31 (Google Patents: Expired – Lifetime), and there is no PTAB proceeding — so there is also no FWD to link and no claim-cancellation order to quote. Your letter should instead demand the asserted claims, the accused product's on-sale/use dates, and the asserted recovery period under 35 U.S.C. § 286 (six-year lookback from filing), because a post-2017-12-31 demand for ongoing infringement is facially defective. Verify the term and any PTA/PTE directly on Patent Public Search before relying on it.
- Run your own fresh check of the canonical sources before you finalize anything, since the ODP ingest lags: PTAB E2E / PTAB Center and the USPTO Patent Trial and Appeal Board docket, plus the Google Patents page for US6118486. I found nothing, but a client-ready opinion should record the query and date.
- Check the non-AIA channels I did not exhaustively verify. The ODP block covers AIA trials only. Confirm on Patent Public Search / the USPTO reexamination records whether any ex parte or inter partes reexamination certificate ever issued for the '486 patent — a reexamination certificate would cancel or confirm claims without appearing as an AIA proceeding. I found no evidence of one, but I could not rule it out from the sources retrieved.
- If the real dispute is a past-damages or license-audit claim, obtain the E.D. Tex. and C.D. Cal. dockets for 6:05-cv-00323, 2:05-cv-00484, and 2:06-cv-01225 to identify whether any judgment, license, or covenant running with the '486 patent survives. The 2007 Markman constructions above are the strongest defensive material on the face of the record — particularly the "raster clock signal" limitation (tied to a PCR) and "frequency scaling" ("multiplying and/or dividing a frequency by a given factor"), which narrow claim 1's clock-circuit element and would be the natural hook for a non-infringement position if a live assertion exists.
- Set expectations with the client: the absence of any IPR on a patent that was actively asserted by MediaTek against Sanyo is a signal that the market rated this patent as settle-worthy rather than cancel-worthy — but it is not a validity holding, and it should not be described to a court or an adversary as if the Board had ruled.
Generated 9/28/2026, 3:13:44 PM
Ownership chain (2)
Asserters network →Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.
1997-12-31 · recorded 1998-05-04 · Assignment
? · recorded 2005-05-27 · Assignment
Sarnoff CorporationMEDIATEK, INC.
acquisition
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
I'll research the assignment/ownership record for this patent. Let me run several targeted searches.
Let me try to pull the actual assignment records directly.
I hit my research-step limit before I could retrieve the reel/frame identifiers, so I'm reporting what is verifiable and explicitly marking what I could not pull. No numbers below are invented.
Data-access caveat (read first). My available tooling would not render the USPTO Assignment Center record page (assignmentcenter.uspto.gov / assignment.uspto.gov) or the assignment-api.uspto.gov XML for this patent. I therefore do not have reel/frame numbers or correspondent-of-record names for either recording. The dates, conveyance types, parties, and addresses below come from the patent record's own assignment events (Google Patents legal events, which mirror USPTO assignment data) and from family/counterpart records. Fields I could not verify are marked [NOT RETRIEVED]. Do not treat this as a substitute for a live Assignment Center query — instructions for the verification query are at the end.
Inventors
| Inventor | Employer at filing | Basis |
|---|---|---|
| Glenn A. Reitmeier (WO family record renders it "Glenn Arthur Reitmeier") | Sarnoff Corporation, Princeton, NJ — assignor of record on the 1998-05-04 assignment | USPTO assignment event: "RESPONSIVE TO ASSIGNMENT OF INTEREST… Assignors: RIETMEIER, GLENN A." |
Patterns / oddities:
- Single-inventor patent. No co-inventor departures to track, and therefore no "all inventors left within 12 months" signal. Note the short gap between the provisional (1997-09-26) and the utility filing (1997-12-31) — three months — consistent with an in-house corporate filing, not an inventor-initiated one.
- No evidence of inventor-side retention or later inventor assignment. The only inventor-linked record is the employer assignment.
- ⚠️ False-positive to ignore: a site called patents-review.com surfaces a "Kevin Connelly" page at a URL slug containing "6118486" and labels it "InventorID: 6118486." That is an internal site identifier, not this patent's number — the page concerns a Solar Dynamics Corporation application. Kevin Connelly is not an inventor on US 6,118,486. I flag it because it will contaminate any automated inventor scrape.
Original assignee
Sarnoff Corporation, 201 Washington Road, CN5300, Princeton, NJ 08543-5300 — named on the issued patent and on the 1998-05-04 recorded assignment.
- Line of business: contract R&D laboratory; the corporate descendant of the RCA David Sarnoff Research Center, spun into a for-profit subsidiary of SRI International in 1988. It was a central participant in the FCC/ATSC HDTV Grand Alliance work (1993 onward) and a prolific generator of DTV/MPEG decoder IP. A Korean-language ETRI planning report in my results documents the arc: headcount fell from ~800 (2001) to ~540 (2006), and Sarnoff lost independent legal-entity status in January 2011 when absorbed into SRI International.
- Did it ship a product embodying the claims? No. Sarnoff was a research/licensing entity, not a set-maker or chip vendor. This patent's claims cover receiver architecture (format conversion + frame-rate conversion + PCR-derived raster clock), which Sarnoff licensed into others' products.
- Current status: dissolved as an independent corporation (2011 absorption into SRI International). Not a bankruptcy — this is a parent-company absorption, so the bankruptcy fire-sale signal does not apply.
Assignment timeline
Two recorded assignments exist. (Google Patents legal events for US 6,118,486.) Reel/frame and correspondent are [NOT RETRIEVED] — see caveat above.
1) Executed on or about the 1997-12-31 filing / recorded 1998-05-04 — Reel [NOT RETRIEVED]/[NOT RETRIEVED]
- Conveyance: Assignment (Assignment of Assignors' Interest)
- Assignor: RIETMEIER, GLENN A. (sole inventor)
- Assignee: SARNOFF CORPORATION, 201 Washington Road, CN5300, Princeton, NJ 08543-5300
- Correspondent: [NOT RETRIEVED]. If the same Sarnoff-era correspondent recurs across the co-pending siblings (Ser. No. 09/001,596 / Docket 12213 and Ser. No. 09/001,620 / Docket 12669, both filed the same day and both incorporated by reference here), that is a normal in-house/outside-counsel pattern for a corporate filer and would be expected — not an NPE tell.
- Context: standard inventor-to-employer assignment, executed at filing.
2) Executed on or before 2005-05-27 / recorded 2005-05-27 — Reel [NOT RETRIEVED]/[NOT RETRIEVED]
- Conveyance: Assignment
- Assignor: SARNOFF CORPORATION
- Assignee: MEDIATEK, INC. (Taiwan; the counterpart EP/FR record for the sibling family member EP 1 068 735 lists the transferee address as No. 1, Dusing Rd. 1st, Science-Based Industrial Park, Hsin-Chu 300, TW)
- Correspondent: [NOT RETRIEVED].
- Context: transfer to an operating company — a fabless IC house acquiring DTV/MPEG decoder IP from a research lab. The French national register records a mirror-image transmission totale de propriété to MediaTek in 2006 (#0153170), corroborating that this was a family/portfolio-level conveyance rather than a one-off. I cannot verify from the records I retrieved whether the whole Sarnoff DTV portfolio moved in a single transaction or whether 6,118,486 was assigned individually — flagging as unresolved.
No further recorded post-issuance assignments appear in the legal-events record through expiration (2017-12-31). Nothing after 2005 suggests a later hop into an assertion vehicle.
Timeline diagram
timeline
title Ownership and assertion history US 6118486
1997 : Provisional filed Sep 26
: Utility application filed Dec 31
1998 : Inventor assigns rights to Sarnoff Corp
: Recorded May 4
2000 : Patent issued Sep 12
2005 : Sarnoff assigns to MediaTek Inc
: Recorded May 27
2006 : Sanyo v MediaTek filed in C D Cal
2017 : Patent term expires Dec 31
NPE / troll-pattern signals
| # | Signal | Call | Evidence |
|---|---|---|---|
| 1 | Shell-entity transfer | Not present | Both assignees are named operating/research entities: Sarnoff Corporation (R&D lab, Princeton NJ street address) and MediaTek, Inc. (a publicly traded fabless semiconductor company whose own 2006 annual report describes it as "designing, manufacturing, and supplying integrated circuit chips and decoders"). No "IP/Holdings/Ventures" suffix, no registered-agent address, no single-member LLC anywhere in the chain. |
| 2 | Known asserter in the chain | Not present | Neither Sarnoff nor MediaTek appears on the standard NPE rosters (Acacia, Marathon, IV, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Spangenberg vehicles). Conversely, the Stanford NPE Litigation Database entry for patent 6118486 classifies the asserter in the one case tied to this patent as category "8 Product company" — i.e., not an NPE. |
| 3 | Repeat correspondent across the chain | Unclear — cannot evaluate | Correspondent-of-record names were [NOT RETRIEVED] for both recordings. With only two links and a seven-year gap, recurrence is unlikely on its face, but I will not score this either way without the field. This is the single highest-value item to pull manually — it is the field that most often outs a common lawyer running nominally unrelated LLCs, and its absence here is a gap, not a clearance. |
| 4 | Cascading transfers | Not present | Two assignments, ~7.5 years apart (1998-05-04 → 2005-05-27). No chain of LLCs inside a 24-month window, no shared-address cluster. |
| 5 | Pre-litigation transfer | Unclear / weak | The 2005-05-27 recording sits close to the 2005–2006 escalation: Google Patents lists Texas Eastern cases 6:05-cv-00323 and 2:05-cv-00484 plus C.D. Cal. 2:06-cv-01225 as family litigation. But I could not confirm which party filed the 2005 Texas cases, nor in what month, so I cannot assert the "within 6 months before first suit" test either way. Critically, the one case the Stanford NPE database ties to this patent number is captioned Sanyo Electric Co. Ltd v. MediaTek Inc., 2:06-cv-01225 (C.D. Cal.), with MediaTek listed as the alleged infringer — i.e., MediaTek was on the defense side, which cuts against a pre-litigation-transfer-to-assert read. Do not score this as present on timestamps alone. |
| 6 | Bankruptcy fire-sale | Not present | Sarnoff's endpoint was a 2011 absorption into SRI International (loss of independent legal-entity status), not a Chapter 7/11. No Kodak/Nortel-style sale proceeding appears in the record. |
| 7 | Privateering | Not present | Privateering requires an operating company parking patents with an NPE that asserts on its behalf. Here the operating company took the patents in and asserted them itself, defensively. No third-party assertion vehicle is in the chain. |
| 8 | Defensive aggregator (anti-NPE) | Not present | The chain does not terminate at RPX, AST, LOT, Unified Patents, or OIN. It terminates at an operating semiconductor company. |
⚠️ Reconciliation with the earlier summary
No contradiction, but one naming correction worth recording. The prior section cited a secondary source describing MediaTek counterclaiming on 6,118,486 in litigation "brought by Matsushita/Panasonic." Today's search surfaced the Stanford NPE Litigation Database, which captions the case Sanyo Electric Co Ltd v. MediaTek Inc. Sanyo was then a separate Matsushita-affiliated company (Panasonic acquired Sanyo later, in 2009–2011). The correct party name for the 2:06-cv-01225 plaintiff is therefore Sanyo, not Panasonic — the two accounts describe the same event and the earlier note's substance stands.
I also note a scope discrepancy in the litigation data: Google Patents attaches three cases to this patent's family (two Texas Eastern 2005 cases plus the C.D. Cal. 2006 case), whereas the Stanford NPE database lists only one case against patent number 6,118,486 specifically. The Texas cases may concern other family members rather than this number.
Verdict
Operating-company assertion.
Justification: the chain is exactly two hops — Reitmeier → Sarnoff Corporation (recorded 1998-05-04) → MediaTek, Inc. (recorded 2005-05-27) — and both assignees are named operating/research entities with real addresses and products, with no LLC interposition, no aggregator, and no post-2005 transfer anywhere in the record. The only case the Stanford NPE Litigation Database ties to patent number 6,118,486, Sanyo Electric Co Ltd v. MediaTek Inc., 2:06-cv-01225 (C.D. Cal.), classifies the asserter as a "Product company" (category 8) and lists MediaTek as the alleged infringer — so MediaTek acquired this patent as part of a DTV/MPEG portfolio and wielded it defensively, which is the opposite of the NPE pattern. Confidence caveat: this verdict rests on the two dates and party names being correct; it does not rest on the correspondent field, which I could not retrieve, and I would upgrade my confidence materially by pulling that field.
Verify at: USPTO Patent Assignment Center — search by patent number 6118486 (or application 09/001,952); legacy interface: https://assignment.uspto.gov/patent/index.html. Cross-check the sibling applications 09/001,596 and 09/001,620, which were filed the same day and are incorporated by reference here — if they share reel/frame ranges with 6,118,486, that confirms the 2005 Sarnoff→MediaTek transfer was a portfolio-level transaction. Litigation cross-check: Stanford NPE Litigation Database, patent 6118486.
Generated 9/28/2026, 3:14:00 PM
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
I'll search for the citation records on this specific patent number.
I have partial data. Let me retrieve the actual "References Cited" table for US6118486 specifically.
Let me try to reach the front-page "References Cited" listing for this patent directly.
Search status — read this before the analysis
I attempted to pull the (56) References Cited list from USPTO/Google Patents for US 6,118,486 B1 (application 09/001,952). I hit the tool-step limit before I could retrieve the examiner-cited reference table, and — importantly — the authoritative full text you supplied does not include the front page's "(56) References Cited" block. The supplied text begins with the abstract/description, so it contains no examiner-cited reference list at all.
Per the operating rule against fabrication, I will not reconstruct a §102 citation table from memory or from adjacent patents. Below I separate (a) what is verified from the authoritative document in hand, (b) a legal §102 framework for the two independent claims I can read, and (c) explicitly flagged unverified candidates that still need checking against the real (56) page.
I also want to flag one attribution trap I hit: several of my search hits showed citation tables (e.g., "Patent Citations (33)", "Patent Citations (18)") rendered on the Google Patents pages for US 2011/0134341, US 6,577,349, and US 2005/0158019. Those tables belong to those patents, not to US 6,118,486 — US 6,118,486 merely appears as an entry within them. Do not read those numbers as this patent's citation count.
1. Verified prior art — grounded in the patent's own specification
These are the references the applicant himself discussed in the body of US 6,118,486. This is authoritative for what the patent treats as prior art, though it is not the same as the examiner's (56) list.
| Ref | Full citation as it literally appears | Date | What the patent says it discloses |
|---|---|---|---|
| Lee | U.S. Pat. No. 5,485,216, "Video Conversion Apparatus for High Definition Television," incorporated by reference | Issued Jan. 16, 1996 | HDTV signal is decoded → converted to 30 Hz frame rate → vertically decimated → horizontally decimated → interleaved to produce a 30 Hz, 1050-line video signal. The patent calls it a "brute force technique" and criticizes it for requiring complex timing/switching/video processing circuitry and for being "merely ... a front-end format converter to a standard display device." |
| Martucci | U.S. Pat. No. 5,764,805, incorporated by reference (2:1 upconversion in the DCT domain) | Issued Jun. 1, 1998 | Cited as the enabling teaching for a 2:1 vertical resizer 122 operating in the DCT domain inside video decoder 120. |
| ATSC A/53 | ATSC Digital Television Standard document A/53 (compressed digital video system) | Standard; incorporated by reference | The DTV transmission standard the receiver is built to. |
| MPEG-1 | ISO/IEC standard 11172, incorporated by reference | Standard | Digital data delivery system. |
| MPEG-2 | ISO/IEC standard 13818, incorporated by reference | Standard | Digital data delivery system; the 27 MHz system clock / PCR concept the claims rely on comes from this family. |
| SMPTE raster formats | Studio-equipment raster formats "standardized by the Society of Motion Picture and Television Engineers" | Not a single document | Described as the way a "multisync" approach would be implemented in a TV environment. |
| "Multisync" displays | General computer-industry practice (no document cited) | n/a | Displays that change horizontal/vertical scanning frequencies in response to a graphics-format change; the patent faults them for cost, power, and >1-frame switching latency. |
Also disclosed in the description and relevant to your question (but not prior art against claims 1–2, see §3):
- U.S. Provisional Application Ser. No. 60/060,112, filed Sep. 26, 1997 (priority basis).
- Co-pending Ser. No. 09/001,596 (Docket 12213, frame-rate/format synchronization) and Ser. No. 09/001,620 (Docket 12669, format-responsive video processing), both filed the same day as this application.
2. Legal framework — this is a pre-AIA patent
Filing date 1997-12-31; priority 1997-09-26. That is far before the March 16, 2013 AIA first-inventor-to-file cutoff, so pre-AIA 35 U.S.C. §§ 102(a)/(b)/(e) and § 103 govern. A § 102 anticipation requires a single reference teaching every limitation of the claim, arranged as claimed.
3. § 102 analysis against the claims I can read
Claim 1 (apparatus) and claim 2 (method) both require the same inventive core, and crucially both require:
- a clock circuit responsive to a program clock reference (PCR) of the input signal, producing a system clock; and
- the raster clock generated by frequency-scaling the system clock.
| Reference | Does it potentially anticipate claim 1 or 2 under § 102? | Reasoning |
|---|---|---|
| Lee, US 5,485,216 | No — anticipates no claim as a whole. | Lee is a front-end format converter (decode → 30 Hz → decimate V → decimate H → interleave → 1050 lines). It is arguably relevant to the format-converter and frame-rate-converter elements, but it does not disclose (i) a raster generator deriving a fixed-frequency horizontal deflection signal from a raster clock, nor (ii) a clock circuit responsive to a PCR producing a system clock and a raster clock by frequency scaling. Both are required elements of every independent claim. Lee is therefore a § 103 combination candidate, not a § 102 reference, and the specification itself is written to distinguish it. |
| Martucci, US 5,764,805 | Not prior art at all; anticipates no claim. | Issued 1998-06-01, i.e., after both the 1997-09-26 priority date and the 1997-12-31 filing date. It cannot be § 102(a) or § 102(b) art. It was incorporated by reference as enabling teaching for the optional DCT-domain 2:1 resizer, which is an embodiment detail (the "vertical resizer 122" variant), not a claimed element. |
| MPEG-2 / ISO-IEC 13818 (and MPEG-1 / 11172) | Potentially relevant to the PCR/27 MHz clock limitations only; anticipates no claim as a whole. | These are printed publications predating the priority date and would be § 102(b) art. They disclose the 27 MHz system clock and PCR concept that claim 1's clock-circuit element and claim 2's clock-generating step map onto. But neither standard discloses deriving a display raster clock by frequency-scaling the system clock or generating fixed-frequency horizontal deflection from it. So they cannot alone anticipate claims 1 or 2. |
| ATSC A/53 | Same posture as MPEG-2. | § 102(b) art for the transport/format context (1920×1080, 1280×720, 704×480, 640×480; the format table), but not for the clock/display-timing core. |
| Ser. No. 09/001,596 and Ser. No. 09/001,620 (same-day Sarnoff filings) | No § 102(e) anticipation. | Same-day filings are not "by another" before the applicant's invention/filing for § 102(e) purposes without establishing different invention dates, and in any event they are the applicant's own co-pending work incorporated by reference. Note for your cross-reference file: Ser. No. 09/001,620 corresponds to the Sarnoff "Format-responsive video processing system" that issued as US 6,057,889 (a reference I saw listed in another patent's citation table — I am not asserting it is cited on the '486 front page). |
Bottom line on the verified set: on the record available to me, none of the references the patent itself identifies anticipates claims 1 or 2, because no single one of them discloses the PCR-locked, frequency-scaled raster-clock architecture — which is precisely the point of novelty the specification asserts ("the inventor recognized that considerable cost savings may be achieved ... by utilizing a raster (pixel) clock and horizontal and vertical deflection frequencies that are easily derived from the 27 MHz system clock").
Dependent claims (3–15 as readable; 16–20 truncated in the source text) all depend from claim 1, 3, 5, 8, 10, or 2, so they inherit claim 1's/claim 2's PCR/raster-clock limitations and cannot be anticipated by Lee, Martucci, or the standards alone. The clause-specific subject matter worth separately searching is:
- Claims 3–5, 12–14 — the brightness equation
(P_ACTIVE + P_BLANK)(L_ACTIVE + L_BLANK) = F_RAST / FR. (Note the and the equation's own defect: variableP BLANKis defined twice, the second time as blank lines. I flagged this in the prior section; do not silently read it asL_BLANK.) - Claims 6–7 — 480-line → 960-line doubling. (Note the literal "horizontal display format ... 480 line format" mismatch, also flagged earlier.)
- Claims 8–9 — PLL + frequency scaler; 27 MHz system clock with raster clock of 67.5 / 81 / 94.5 / 108 MHz.
- Claims 10–11 — the DE-FOCUS / widened-electron-beam brightness mode.
4. Unverified candidate references — flagged, not asserted
The following appeared in my searches only inside other patents' citation tables or in unrelated documents, not in a (56) list I could confirm as belonging to US 6,118,486. I list them solely as leads to check, and I make no § 102 assertion about any of them:
- US 4,659,653 — unspecified
- US 5,078,680 (Sarnoff)
- US 4,659,653 / 4,689,042 / 5,085,641 / 5,085,642 / 5,102,393 — Sarnoff-family clutter from unrelated front pages
- US 5,325,131 (Tektronix, "Multiformat television switcher"), US 5,530,484 (Thomson Multimedia, HDTV scan-format converter), US 5,822,008 (Mitsubishi, scan conversion), US 5,926,228 (Samsung, analog/digital video mode receiver) — these appeared in the citation table of US 6,577,349, not of the '486 patent
Do not cite any § 4 item as an anticipatory reference for US 6,118,486 without first confirming it on the actual (56) page.
5. How to close the gap (authoritative sources)
The examiner-cited (56) list is the thing you asked for, and I could not verify it. Retrieve it here:
- USPTO Patent Public Search —
https://ppubs.uspto.gov— search the patent number, open the Front Page / References Cited view. - USPTO PatentCenter —
https://patentcenter.uspto.gov— application 09/001,952, look at the "References Cited" / PTOL-90 and the file-wrapper PTO-892 (Notice of References Cited) and any PTO/SB/08 Information Disclosure Statements. The PTO-892 is what identifies which references the examiner actually relied on. - Google Patents —
https://patents.google.com/patent/US6118486/en— the "Patent Citations" and "Non-Patent Citations" tables (also the "Cited By" table, for the forward-citation picture). - The granted front-page PDF (patentimages) — page 1 carries the statutory "(56) References Cited" column.
- The PCT international search report for the family member PCT/US1998/020235 → WO 99/16243 A1 — that ISR will list the search-examiner's cited documents with the "A / X / Y" relevance categories, which is often the most useful prior-art picture for this family.
6. Explicit uncertainties
- I did not retrieve US 6,118,486's (56) References Cited list. Any complete "prior art per claim" table would be fabrication at this point.
- I do not have claims 16–20, which are truncated in the supplied text. I cannot rule out that one of them is independent and differently limited, which would change the § 102 target set.
- My searches were web searches, not a direct query against PatentCenter/PACER; the historical litigation (E.D. Tex. 6:05-cv-00323; E.D. Tex. 2:05-cv-00484; C.D. Cal. 2:06-cv-01225) is from the Google Patents/Unified Patents record, and the patent's anticipated expiration of 2017-12-31 (Expired – Lifetime) remains as previously reported.
- Two literal text defects identified earlier — the "61.5 MHz" raster-clock typo and the duplicated "P BLANK" definition in claim 5 — remain uncorrected and are relevant to any § 102 element-by-element mapping of claims 5 and 14.
If you can supply the (56) list (or the PTO-892 / ISR), I will produce the full per-reference § 102 / § 103 claim chart with element-by-element mapping against claims 1–2 and the dependent-claim limitations above.
Generated 9/28/2026, 3:14:10 PM
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
I'll firm up the candidate references from the Prior Art section before building the § 103 combinations, since the (56) list itself was never retrieved.
Now let me try to retrieve the actual citation table for US 6,118,486 itself — the Prior Art section flagged this as the key gap.
Obviousness Analysis — U.S. Patent No. 6,118,486 under 35 U.S.C. § 103
Build note: This section deliberately does not repeat the bibliographic, litigation, PTAB, assignment or general prior-art sections above. It takes the prior-art inventory from that section as its starting point and extends it with four verification searches run for this analysis.
Two flagged inconsistencies before we start:
- The task header states Current Date: April 26, 2026, while the authoritative patent fetch and the previously generated sections are timestamped 2026-09-28. I have not reconciled these; the analysis is date-insensitive, but both dates post-date the patent's 2017-12-31 expiration, so this is a retrospective validity analysis (relevant to preserved past damages, an audit, or defensive posture — not to an injunction).
- The (56) "References Cited" list for US 6,118,486 was still not retrieved. My attempt to pull the Google Patents citation table returned no reference table. Every combination below is therefore built from (a) art the patent itself discusses, (b) art verified in this session to exist with the recited content, and (c) items the prior-art section flagged as unverified. None is asserted to be an examiner-cited reference. Treat the combinations as proposed § 103 grounds, not as the prosecution record.
1. Bottom line
On the record available, claims 1 and 2 are, in my assessment, vulnerable to a § 103(a) challenge — but only on a specific, three-way combination, because essentially all of the difficulty sits in one limitation: "a clock circuit, responsive to a program clock reference (PCR) … for producing a system clock signal and said raster clock signal, said raster clock signal being generated by frequency scaling said system clock signal." No single pre-1997 reference located teaches or suggests that the display raster clock be frequency-scaled from the PCR-locked decoder system clock, and the patent's own admissions confirm the prior art instead kept display timing separate (multisync) or fed a standard display (Lee).
The dependent claims divide sharply:
| Claim group | Obviousness posture |
|---|---|
| 1, 2 (independent) | Contestable but defensible. Requires a 3-reference combination; the PCR→raster-clock link is the weakest point for a challenger. |
| 3–5, 12–14 (brightness ratio / equation) | Most vulnerable. The "invention" is arithmetic once you fix the raster clock and the frame rate. |
| 6–7 (480→960 doubling) | Vulnerable, but this is the patentee's best story (avoiding the "9:4" conversion). |
| 8–9 (PLL + scaler; 27 MHz / 67.5 / 81 / 94.5 / 108 MHz) | Highly vulnerable — textbook "finite number of identified, predictable solutions" (KSR). |
| 10–11 (DE-FOCUS) | Vulnerable if a CRT spot-wobble/vertical-defocus reference is found; unverified (see §9). |
| 16–20 | Not analyzable — truncated in the authoritative text; cannot rule out a differently-limited independent claim. |
2. Governing law applied
- Pre-AIA § 103(a). Priority 1997-09-26 / filing 1997-12-31, both before the March 16, 2013 AIA cutover. So: pre-AIA §§ 102 and 103, and the pre-AIA § 103(c) common-ownership carve-out for § 102(e)/(f)/(g) art (relevant, see §5, Combination 4).
- Graham v. John Deere, 383 U.S. 1 (1966) — scope/content, differences, PHOSITA level, secondary considerations.
- KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) — the TSM test is not the sole test; a POSITA's creativity and ordinary design incentives count; a finite number of identified, predictable solutions supports obviousness.
- MPEP § 2143 rationales relied on below: (A) known method combined to yield predictable results; (B) simple substitution of a known element; (C) known technique improving a similar device in the same way; (D) applying a known technique to a known device ready for improvement; (E) obvious to try.
- Analogous art. Every reference below is in the same field of endeavor (digital/HDTV video format conversion, receiver clock recovery, or CRT raster timing), so each is presumptively analogous. In re Bigio, 381 F.3d 1320 (Fed. Cir. 2004).
- PHOSITA definition I am applying: a B.S.-level electrical engineer (or equivalent) with 2–4 years in digital television / MPEG receiver design as of 1996–97. This is a reasonable definition, not one taken from the record — no claim-construction order or litigation expert testimony on level of skill for the '486 patent is in the sources I have.
A practical point that helps a challenger: the 2007 E.D. Tex. Markman construction recorded earlier construed "frequency scaling" as "multiplying and/or dividing a frequency by a given factor" — an ordinary clock-synthesis definition. That construction makes the "frequency scaling" limitation easy to meet with routine dividers/multipliers and, correspondingly, easy to read onto ordinary television clock trees.
3. Claim 1 / Claim 2 limitation matrix (the § 103 target)
| # | Claim 1 element | Claim 2 step | Where the art must supply it |
|---|---|---|---|
| E1 | Apparatus processing input video having one of a plurality of display formats → output suitable for display device | "a system for processing a video stream associated with at least one of a plurality of video display formats" | Lee '216; '484/'661; ATSC A/53 format table |
| E2 | Display uses a fixed-frequency H-DEF and a V-DEF | "display device having a substantially fixed horizontal scanning frequency" | Deliberate selection; multisync art + the patent's own admitted drawbacks supply the motivation |
| E3 | Format converter adapting at least the horizontal format to the format defined by the fixed H-DEF | "adapting at least a horizontal display format … in response to a horizontal display format defined by said fixed frequency horizontal deflection signal" | Lee '216 (horizontal decimator); '484/'661; US 5,828,415; Bannister '958; US 5,920,354 |
| E4 | Frame rate converter coupled to the format converter | (inherent in "video and timing signals") | Lee '216 (frame rate conversion circuit → 30 Hz) |
| E5 | Raster generator producing fixed-freq H-DEF and V-DEF from a raster clock; V-DEF frequency defined by the output video's vertical format | "generating … a substantially fixed frequency horizontal synchronizing signal and a vertical synchronizing signal … said vertical deflection signal having a frequency defined by a vertical display format of said video stream" | Conventional CRT raster/sync timing generators (e.g., NEC multifrequency CRT display device, JPH0373994A; any TV deflection-timing stage) |
| E6 | Clock circuit responsive to a PCR, producing a system clock and the raster clock, where the raster clock is produced by frequency-scaling the system clock | Same | MPEG-2 (ISO/IEC 13818-1) / ATSC A/53 for PCR + 27 MHz + PLL recovery; clock dividers/multipliers for the scaling. This is the crux limitation. |
Single point of novelty (interpreting the claims literally): nothing in E1–E5 is unusual for 1997 television engineering. The only limitation a challenger must reach by combination is E6 — and specifically, tying the display raster clock to the same PCR-locked clock that runs the MPEG decoder.
4. Reference inventory used (with verification status)
| Ref | Identity (as literally reported) | Date | Verified this session? | Teaches |
|---|---|---|---|---|
| Lee | U.S. 5,485,216, "Video Format Conversion Apparatus for High Definition Television," inventor Dong H. Lee, assignee Goldstar Co., Ltd. | Filed Aug. (1995); issued Jan. 16, 1996 | Yes — front-page PDF retrieved | Decoding circuit → frame rate conversion circuit (to 30 Hz) → vertical decimator → horizontal decimator → interlaced-scanning format conversion/selection, all driven by a selection control controller responsive to video format information from the decoding circuit. FIG. 2 tabulates a multi-format input matrix (1050-line I/P 30 Hz; 1050-line P 24 Hz; 787.5-line P 60/30/24 Hz). patentimages US5485216 |
| '484 | U.S. 5,530,484, "Image scanning format converter suitable for a high definition television system," inventors: Reitmeier Glenn A; Fedele Nicola J; Bhatt Bhavesh B; assignee Thomson Multimedia S.A. | Priority 1995-05-18; granted 1996-06-24 | Yes — Unified Patents record | Adaptive scan format converter at the transmitter and at the receiver; at the receiver "a received scan format is automatically converted to a desired format for display as needed. For example, a received interlaced signal (I) will be automatically converted to progressive (P) format to be compatible with a progressive scan display device. A received progressive signal will be passed to the display device without format conversion." Also identifies formats from the data stream (MPEG decoder "deriving coded information from the received data stream indicating whether a received video signal exhibits interlaced or progressive form"). Family: EP 0 743 791 B1. ⚠️ Note the inventorship overlap with the '486 — same named inventor (Reitmeier), different assignee. |
| '661 | U.S. 5,610,661, "Automatic image scanning format converter with seamless switching," Thomson Multimedia S.A. | 1997-03-11 | Yes (cited-table + full text) | Same family/concept; describes receiver-side automatic conversion, memory, frame delay, and timing control coordinating the memory/frame-delay/switch; Grand Alliance raster numbers (2200×1125 total / 1920×1080 active; 1600×787.5 total / 1280×720 active). |
| '170 / '471 | U.S. 5,663,170 "Apparatus for decoding video signals encoded in different formats" (Thomson Consumer Electronics, 1997-09-09); U.S. 5,717,471 "Apparatus for demodulating and decoding satellite, terrestrial and cable transmitted digital television data" (Thomson Consumer Electronics, 1998-02-10) | 1997 / 1998 | Yes (citation-table render) | Receiver-side decoding of differently-formatted digital video; the tuner/demod/transport front end of a DTV receiver. |
| '354 | U.S. 5,920,354, "HDTV to NTSC transcoder system," Thomson Consumer Electronics | 1999 (post-dates '486 filing → § 102(e) only if earlier-filed; verify) | Yes (full text) | 9:4 ratio decimation of 1080 lines → 480 lines; 9:6 for 720 lines; 16 HDTV pixels → 9 NTSC pixels with placeholder "disabled pixels … to hold a place in the bit stream and to maintain synchronized clocks"; programmable real-time filter coefficients. Directly on point for claims 3–5/12–14's active/blank pixel budgeting. |
| '415 | U.S. 5,828,415, "Apparatus for controlling video down-conversion" | 1998-10-27 (post-filing → § 102(e) posture only; verify) | Yes (full text) | A table of conversion modes under configuration-data control — 1080i→485i, 1035i→485i, 1080i→485p, 1152i→576i, etc.; single-chip ASIC; half-band filtering; front-end luminance processing at a 74 MHz data rate and subsequent processing at 37 MHz. On point for multi-format horizontal/vertical resizing to a target raster. |
| '131 | U.S. 5,325,131, "Multiformat television switcher," inventor Bruce J. Penney, assignee Tektronix, Inc. | Filed 1993-05-03; issued 1994-06-28 | Yes — front page PDF | Combines an up-converter, down-converter and auxiliary selector so both standard-format and HDTV-format outputs are available; expressly notes that where input signals "have substantially different line rates, and even different field rates, such as HDTV signals versus standard NTSC or PAL signals, unnecessary conversion between formats degrades image quality." Prior art cited therein: US 4,743,958 (Bannister et al., Grass Valley, "Multiple Television Standards Input Selector and Converter," 1988-05-10), US 4,800,426 (Glenn), US 5,218,436 (Sugiyama, 358/140). |
| Samsung '462 family | EP 0 766 462 A2/A3, "Receiver having analog and digital video modes and receiving method thereof," Samsung Electronics, inventors Jeon Byeungwoo / Song Dong-il, priority KR 9532893 (1995-09-29); counterpart CN 1087124 C (ZL 96113040.7, filed 1996-09-27) | 1997-04-02 | Yes (EP + CN family documents) | Receiver with analog and digital video modes; shared memory between the digital decoder and the analog Y/C-separation/post-processing path; European search report cites EP 0 574 273 A (Toshiba), US 5,448,300 (Yamada et al.), EP 0 619 675 A (IBM). This is almost certainly the family of the US 5,926,228 candidate flagged earlier — but I did not directly verify the US number's text. |
| Multisync displays | Admitted prior art in the '486 itself; example hardware: JPH0373994A, "Multifrequency handling CRT display device" (NEC) | 1991 | Yes (cited-table render) | Displays that change horizontal/vertical scanning frequency in response to a format change. |
| MPEG-2 / ATSC A/53 / MPEG-1 / SMPTE raster formats / Martucci '805 | As described in the prior-art section | — | Per prior section | MPEG-2 PCR + 27 MHz; A/53 format table; SMPTE 74.25 MHz raster clock. Martucci '805 issued 1998-06-01 → not prior art at all. |
5. The proposed § 103 combinations
Combination 1 — Claims 1 and 2 : Lee '216 + MPEG-2/ATSC A/53 (PCR clock recovery) + a conventional/known raster timing generator
Where each element comes from:
| Element | Supplied by |
|---|---|
| E1 (multi-format input) | Lee '216 (FIG. 2 format matrix); A/53 (1920×1080, 1280×720, 704×480, 640×480) |
| E3 (format converter, ≥ horizontal) | Lee '216 (horizontal decimator + selection controller driven by format info); alternatively '484/'661 (receiver-side conversion to a desired display format) |
| E4 (frame rate converter, coupled) | Lee '216 (frame rate conversion circuit → 30 Hz) |
| E5 (raster generator → fixed H-DEF + V-DEF) | Any conventional CRT sync/deflection timing generator; NEC JPH0373994A shows a multi-frequency CRT timing stage; the '486 itself concedes the display raster "determines the maximum number of pixels that may be displayed in a single horizontal line" — i.e., arithmetic |
| E2 (fixed horizontal frequency) | The known tradeoff: multisync (variable) vs. fixed + conversion. Supplied by the multisync art and by the patent's own admission that multisync "leads to an increase in cost … increase in power consumption, and a high inter-format switching latency" |
| E6 (PCR → system clock; raster clock by frequency scaling the system clock) | MPEG-2 ISO/IEC 13818-1 / ATSC A/53: PCR is "a sample of the 27 MHz clock that was used to encode the … transport stream," recovered via PLL + VCO; the standard practice of deriving all other receiver clocks from that clock by divide/multiply. The scaling itself is the oldest technique in clocking. |
Motivation to combine (the KSR/MPEP 2143 rationales):
- Same problem, same field. Lee and the '486 both confront a multi-format DTV/HDTV signal and a display that cannot follow the format. Lee answers with an ordered decode → frame-rate-convert → vertical-decimate → horizontal-decimate chain under format control; the '486 asks for exactly the same functional blocks as claim elements. (MPEP 2143(A).)
- Strong, express design incentive to fix the horizontal frequency. The specification concedes the multisync alternative is more expensive, more power-hungry, and has >1-frame switching latency due to deflection-coil inductance time constants. Where the prior art itself teaches away from the variable-frequency solution on cost/latency grounds, a POSITA seeking a low-cost multi-format receiver has an explicit reason to (i) hold the horizontal frequency constant and (ii) move the adaptation into the video path — which is precisely Lee's/'484's architecture. This is the single strongest obviousness argument available, and it is built from the patentee's own admissions.
- Single-oscillator receivers were a recognized cost objective. A DTV receiver that must recover the encoder's 27 MHz clock from PCR already owns a precision, PCR-locked clock. Using that same clock tree to time the display removes a second precision oscillator and its PLL/VCXO and the associated board area, tuning, and EMI. Improving one component of a known system by a known technique, in the same way, with a predictable result. (MPEP 2143(B), (C), (D).)
- No new function or unexpected result. Generating a display clock by dividing/multiplying a system clock is not a new mode of operation; it changes only where the reference comes from. Predictable result → obvious. (KSR; MPEP 2144.01.)
- Reasonable expectation of success. Every block (MPEG decode, frame-rate conversion, per-format resizing, CRT timing generation) was individually commercialized by 1996–97; the '484 patent — by the same inventor — shows receiver-side automatic conversion already working.
Anticipated rebuttal: Lee is a front-end converter feeding a standard display; it says nothing about display timing. Response: (a) KSR forecloses requiring an express teaching/suggestion where the design incentive is documented; (b) the '484/'661 references do place format conversion at the receiver/display side, expressly "to be compatible with a progressive scan display device," closing Lee's gap; (c) the "fixed frequency" selection is the stated-preference alternative to the admitted-inferior multisync design.
Honest weakness of this combination: E6 requires borrowing from a standard (MPEG-2/ATSC) rather than a single patent, and no located reference expressly says "use the PCR-locked clock as the display raster clock." A court could find non-obviousness here if the patentee frames the invention as recognizing that DTV display raster signals need not track standardized raster frequencies — a recognition the specification expressly claims as the inventive insight. I would put this at "close call / more likely than not obvious," not at "clearly obvious."
Combination 2 — Claims 3–5 and 12–14 (predetermined active-line/blank-line ratio; the equation) : Combination 1 + '354 / '415 / the '486's own admissions
The claim subject matter: adapting the output format to a predetermined ratio of active to blank lines so that average brightness is the same for each format, with the constraint:
(P_ACTIVE + P_BLANK)(L_ACTIVE + L_BLANK) = F_RAST / FR
Why obvious:
- The equation is not a technique; it is the design constraint stated as arithmetic. Once a POSITA fixes (a) the raster clock (a multiple of 27 MHz), (b) the frame rate, and (c) the display's native total line count, the number of pixels per total line is forced:
67.5 MHz ÷ 30 ÷ 1125 = 2000. The '486 presents exactly this computation as its own derivation. Discovering that a product of two integers equals a quotient is not an inventive step; the only choices are the inputs. - Constant brightness via a fixed active-pixel budget is a known CRT engineering objective. The '486 states the mechanism itself: perceived brightness "is related to the number of active (i.e., displayed) pixels and, in the case of a cathode ray tube (CRT) type of display device, the amount of time that the electron beam is active (rather than blanked)." Holding displayed pixel count constant to hold brightness constant is an ordinary design rule (MPEP 2144.04 / KSR — solving a known problem by an obvious, predictable mechanism).
- '354 expressly teaches the pixel-budget-with-placeholders implementation. The HDTV-to-NTSC transcoder reduces 16 pixels → 9 and retains "disabled pixels … to hold a place in the bit stream and to maintain synchronized clocks" — i.e., deliberate blank/placeholder pixels inside an active line to keep the raster's synchronous structure while the active count changes. That is the '486's 1856-in-1920 / 1706-in-1856 scheme in different clothing.
- '415 teaches the multi-mode conversion table (1080i→485i, 1080i→485p, 1152i→576i, 1080i→485i …), i.e., that picking distinct active-line/active-pixel counts per input format — and the corresponding blanking — was routine.
- The claim defect cuts against the patentee. Claim 5 (and claim 14) defines "P BLANK" twice, the second time as blank lines — a § 112 indefiniteness problem independent of § 103. A claim whose only narrowing requirement is an ambiguously-defined equation is a poor non-obviousness anchor.
Anticipated rebuttal: the specific 1856/1920 and 1706/1856 numbers were selected for "straightforward scaling parameters" and constant brightness. Response: In re Aller, 220 F.2d 454 (CCPA 1955) — optimizing a known parameter to obtain a known result is not invention. Caveat: I could not verify that a single reference discloses the claim-level ratio as a predetermined property of the output format across formats (as opposed to a per-conversion-mode configuration). This combination is strong on rationale but would need a third reference or an admission to close the "predetermined" recitation cleanly.
Verdict: claims 3–5 and 12–14 are the most obvious claims in the patent.
Combination 3 — Claims 8 and 9 (PLL + frequency scaler; 27 MHz system clock; raster clock = 67.5 / 81 / 94.5 / 108 MHz) : MPEG-2/ATSC + ordinary clock synthesis + SMPTE 74.25 MHz practice
Claim 8 recites a PLL responsive to the PCR producing the system clock, plus a frequency scaler responsive to a raster clock control signal producing the raster clock. Claim 9 fixes: 27 MHz system clock, raster clock one of 67.5, 81, 94.5, 108 MHz.
Why obvious:
- Claim 8 is the textbook MPEG-2 decoder clock-recovery circuit. PCR-driven PLL + VCO + divide-by-N feedback is the standard implementation described in MPEG-2 systems-layer literature and in the '486's own description. Reciting a PLL and a divider adds nothing beyond the ordinary implementation of E6. (MPEP 2144.04; KSR — "a court must ask whether the improvement is more than the predictable use of prior art elements according to their established functions.")
- Claim 9 is a "finite number of identified, predictable solutions." The selected values are literally the small-integer multiples of 27 MHz in the 60–110 MHz band:
- 67.5 = 5 × 27/2; 81 = 3 × 27; 94.5 = 7 × 27/2; 108 = 4 × 27.
And the specification supplies the selection criterion in its own text: the conventional display clock is 74.25 MHz, so one should choose a raster clock "near 74.25 Hz" that is "easily derived from the 27 MHz system clock." That is the KSR "finite number of identified, predictable solutions" fact pattern and the In re Aller "known parameter optimized to a known result" pattern, in the patentee's own words. There is no disclosure of any unexpected property of 67.5/81/94.5/108 — only ease of derivation.
- 67.5 = 5 × 27/2; 81 = 3 × 27; 94.5 = 7 × 27/2; 108 = 4 × 27.
- Known frequency-scaling techniques. The '486 concedes these values "are relatively easy to produce using various known frequency scaling techniques," and the Markman construction of "frequency scaling" ("multiplying and/or dividing a frequency by a given factor") confirms the limitation is met by any ordinary divider/multiplier chain.
- The 61.5 MHz discrepancy is irrelevant to the claims. One specification passage says "61.5 MHz," while the claims recite 67.5/81/94.5/108 and the rest of the specification consistently uses 67.5. The claims govern; the typo neither helps nor hurts the § 103 analysis, but it would be a cheap § 112(a) argument in a validity fight.
Verdict: claims 8 and 9 are highly vulnerable and, in my view, obvious.
Combination 4 — Claims 6 and 7 (drive a 480-line input to a 960-line format on a ≥960-line display) : Lee '216 + '484/'661 + the admitted 9:4 problem / '354
Why obvious (moderate confidence):
- 2:1 line interpolation is the simplest known vertical scaler. The patent says so: "a 2:1 upconversion … by simple interpolation of a new horizontal scan line between each existing scan line," vs. the "9:4 … relatively complicated" 1080:480 path. Choosing the simpler of two known resampling ratios, where the complexity difference is expressly acknowledged, is the definition of an obvious design tradeoff; the result (a softer 960-line image) is entirely predictable.
- '354 shows the alternative and its cost. The HDTV transcoder implements the 9:4 vertical decimation (1080→480) and 9:6 (720→480) with programmable real-time coefficients and a multi-tap filter structure — evidence that the art knew both approaches and their relative cost.
- The "non-standard line count" objection fails. Claim 6/7 recites a display providing "at least a 960 display lines." The '486 expressly teaches that the display raster need not conform to standard raster frequencies, and once that premise is accepted, a power-of-two vertical scaling is the natural choice for hardware (shift registers).
- E4 (frame rate) coupling is already in Lee. The frame buffer's double-buffered read/write at different clocks is ordinary FIFO/frame-store engineering; Lee's frame-rate conversion stage and '661's "timing control … for coordinating the operation of said memory means, said frame delay means and said selective switching means" supply it.
Anticipated rebuttal (the patentee's best argument overall): the patent allegedly avoids the 9:4 upconversion the industry standard would have used — i.e., it went against the conventional wisdom and produced a superior cost/quality tradeoff. Response: (a) the tradeoff is disclosed as a cost/complexity tradeoff, not an unexpected result; (b) the "9:4 relationship that was specifically chosen to be the ratio of small integers" is admitted to be the design of the transmitted format, not a teaching away from 2× display scaling; (c) the output is not a 1080-line picture at all — it is a 960-line picture on a 1080-line-capable display, which is a lower-quality outcome chosen for cost, i.e., precisely the "predictable result of a known design choice" that KSR condemns.
Verdict: claims 6–7 are probably obvious, but this is the ground where a patentee's "teaching away"/"unexpected cost-quality balance" narrative has the most traction.
Combination 5 — Claims 10 and 11 (DE-FOCUS: widen the electron beam to fill interline black space, preserving brightness) : ⚠️ LEAD NOT VERIFIED
The recited subject matter is a CRT defocusing mode tied to "the reduction, below a native format, of the number of lines to be displayed." The technical phenomenon — filling the interline gaps when fewer lines than native are scanned — is the classic rationale for vertical spot wobble / beam-width modulation in large-screen CRTs, a technique in the television literature well before 1997.
However: I have no verified reference in hand, and neither does the prior-art section. I will not assert a § 102 or § 103 ground on this without one. Flagged as the highest-value remaining search: CRT spot-wobble / vertical beam-defocus / "interline flicker" literature pre-1997; scan-velocity-modulation and beam-shape patents; and interlaced-to-progressive display patents that modulate spot size.
Verdict: claims 10–11 — cannot responsibly opine. Not analyzed.
6. Claim-by-claim verdict table
| Claim | Proposed ground | Confidence | Principal gap / caveat |
|---|---|---|---|
| 1 | Lee '216 + MPEG-2/ATSC + conventional raster timing generation (Comb. 1) | Moderate (~55–65%) | No single reference ties the display raster clock to the PCR-locked system clock; E6 is reached by combination only. Markman's broad "frequency scaling" construction helps the challenger. |
| 2 | Same, in method form (Comb. 1) | Moderate | Same E6 gap; claim 2's "identifying a video display format" step is squarely taught by Lee's selection controller and '484's data-stream format derivation. |
| 3 | Comb. 1 + brightness design rule (Comb. 2) | Moderate–High | "Predetermined ratio … defining an average brightness level" — the relationship is arithmetic; motivation is the recognized CRT brightness/beam-time relationship. |
| 4 | Same | Moderate–High | Same-form-each-format brightness is the express object of the '486; predictable. |
| 5 | Same | High on rationale; claim is also § 112-defective | The equation restates the design constraint; claim 5 twice defines "P BLANK" — indefiniteness clouds, but does not defeat, the § 103 ground. |
| 6, 7 | Comb. 4 | Moderate (~50–60%) | Patentee's "avoided the 9:4 conversion" narrative; non-standard 960-line output could be argued as a deliberate, non-obvious choice. Also note the literal "horizontal display format … 480 line format" mismatch flagged earlier — a claim-construction puzzle that complicates any § 103 mapping. |
| 8, 9 | MPEG-2 + ordinary clock synthesis + SMPTE 74.25 MHz practice (Comb. 3) | High | Textbook PLL/PCR recovery; claimed frequencies are the small-integer multiples of 27 MHz nearest the admitted 74.25 MHz standard. |
| 10, 11 | Unassigned | No opinion | No verified CRT defocus/spot-wobble reference. |
| 12–15 | Comb. 2 (method counterparts of 3–7) | As above | Same as 3–7; claim 14 carries the same duplicated-variable defect as claim 5. |
| 16–20 | Not analyzable | — | Truncated in the authoritative text. Cannot rule out a further independent claim. |
7. Secondary considerations (Graham factor 4)
- Commercial success / nexus: none disclosed in the record I have. MediaTek's 2005 assertion of the '486 (with 5,751,356 / 5,867,819) is litigation activity, not evidence of commercial success of a product embodying the claims, and there is no nexus evidence tying any accused product's success to the '486's clock architecture. Assertion is not a secondary consideration.
- Failure of others: not shown. The fact that no IPR was ever filed against a patent asserted against Sanyo in 2005–2007 (§ PTAB section, above) is not evidence of non-obviousness — the natural reading is that the parties preferred cross-licensing to a validity fight, and the IPR window (2012–2017) coincides with the patent's last years of term.
- Unexpected results: none. The '486 characterizes its advances as cost and complexity reductions ("circuit complexity is reduced," "only requires a single clock circuit," "greatly simplified") — i.e., the routine consequences of design simplification, which KSR treats as supporting obviousness, not rebutting it.
- Long-felt need: the specification identifies a need for "a cost-effective video processing system suitable for use in … a multiple format television receiver," but does not establish that the need went unsatisfied by others, nor that others failed where the '486 succeeded.
8. What would change my conclusion
| Item | Effect if obtained |
|---|---|
| The (56) References Cited list / PTO-892 / the WO 99/16243 ISR | Highest value. The PCT ISR for the family member (PCT/US1998/020235) will carry the search examiner's A/X/Y relevance codes against the '486's claims and could close the E6 gap entirely — or show the examiner already considered and allowed over it. |
| MPEG-2 systems-layer (ISO/IEC 13818-1) text as of 1995–96 | Would firm up E6's first half (PCR → PLL → 27 MHz) as printed publication art. I have not quoted the standard's text in this session. |
| A pre-1997 CRT defocus / spot-wobble / beam-width-modulation reference | Would convert claims 10–11 from "no opinion" to a graded § 103 ground. |
| The E.D. Tex. claim-construction order (Doc. 344, 2007-03-26) | Already partially recorded in the prior section; the full constructions for "format converter," "frame rate converter," and "vertical display format" would let me tighten E3/E5 mapping. |
| Reitmeier's own prior patent US 5,530,484 (verified above) | Most important factual discovery in this session. It is a 1996 publication by the same named inventor (with Fedele and Bhatt), assigned to Thomson, disclosing receiver-side automatic conversion of a received scan format to a desired display format including interlaced→progressive for a progressive display. It is "by others" as to the '486 (different inventive entity), so it is available § 102(a)/(b)/§ 103 art, and it undercuts any argument that placing format conversion at the display side of the receiver was the '486's insight. It should be run as the primary § 103 reference for claims 1–2 and 6–7 alongside Lee. |
Note on a possible § 103(c) wrinkle: pre-AIA § 103(c) disqualifies § 102(e)/(f)/(g) art that was commonly owned at the time of invention. That is why the Sarnoff common-ownership relationship to the same-day Ser. No. 09/001,596 and Ser. No. 09/001,620 matters (it takes them out of the § 103 analysis entirely), and why US 5,530,484's Thomson ownership matters in the opposite direction — it is not commonly owned with the '486 and so is fully available.
9. Explicit uncertainties (per the strict-ID and no-fabrication rules)
- The (56) references were not retrieved. These are proposed combinations, not the examination record.
- I have not mapped claims 16–20, which are truncated in the authoritative text.
- Claims 10–11 have no grounded § 103 reference in this analysis.
- US 5,926,228's text was not directly verified — only its probable family (Samsung EP 0 766 462 / CN 1087124 C, priority 1995-09-29) was.
- US 5,920,354 (1999) and US 5,828,415 (1998) post-date the '486's 1997-09-26 priority and 1997-12-31 filing. They are usable, if at all, only under the pre-AIA § 102(e)/(g) provisions, which require confirming their earlier effective filing dates — not verified. As printed publications they are not § 102(b) art against these claims. Do not cite them as anticipatory.
- Martucci, US 5,764,805 (1998-06-01), remains non-prior-art for this patent (post-dates both priority and filing).
- Claim 5 / claim 14's duplicated "P BLANK" definition and claim 6/7's literal "horizontal … 480 line format" wording remain uncorrected, and both complicate any element-by-element § 103 chart.
Verification path for the missing (56) list: USPTO Patent Public Search (https://ppubs.uspto.gov, application 09/001,952) → Front Page / PTO-892; PatentCenter file wrapper; the WO 99/16243 ISR; and the granted front-page PDF, which carries the statutory "(56) References Cited" column.
Generated 9/28/2026, 3:22:18 PM
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.
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