US 10527454

I'll run targeted searches for this specific patent number, including any 2026 litigation activity.

Let me verify there is no litigation or 2026 appellate activity tied to this specific patent number.

US Patent 10,527,454 — Summary

Caveat on sourcing: My searches returned the patent's own front‑matter (Google Patents and PubChem) and general patent‑listing sites. I found no USPTO litigation record or CAFC 2026 docket referencing 10,527,454. I cannot confirm from authoritative sources that no such docket exists — absence of hits in a web index is not proof of absence, so treat that as "no activity found," not a verified negative.

Bibliographic data (per the patent front matter)

Abstract (as issued)

A magnetic sensor, motor, and application apparatus. The sensor has a four‑terminal magnetic sensing element, a chopping switch, and two discharging branches — one between the first and third terminals, one between the second and fourth terminals. Before the first/third terminals serve as power inputs (while second/fourth terminals serve as magnetic‑field‑detection signal outputs), the second discharging branch is turned on; before the first/third terminals serve as the signal outputs (while the second/fourth terminals serve as power inputs), the first discharging branch is turned on.

Plain‑language overview of each independent claim

Claim 1 — the magnetic sensor itself
A magnetic sensing element with four terminals: terminal 1, terminal 2, terminal 3 opposite terminal 1, and terminal 4 opposite terminal 2.

• A first discharging branch connected between terminals 1 and 3, made of two switches (S1, S2) in series.
• A second discharging branch connected between terminals 2 and 4, made of two switches (S3, S4) in series.
• Timing rule (the point of novelty): just before terminals 1/3 are switched in as the power‑input pair (i.e., while terminals 2/4 are the signal‑output pair), the second branch turns on — shorting terminals 2 and 4 together. Just before terminals 1/3 become the signal‑output pair (i.e., while terminals 2/4 are the power inputs), the first branch turns on — shorting terminals 1 and 3 together. Functionally, this dumps charge trapped on the parasitic capacitance of the terminal pair that is about to be reused, so the previous half‑cycle's residual charge doesn't corrupt the next measurement. Notably, the chopping switch is not required by claim 1; it appears only in claim 2.

Claim 12 — motor assembly
A motor powered by an alternating‑current power supply, combined with the magnetic sensor of claim 1. (No separate structure recited for the motor or its control electronics.)

Claim 13 — application apparatus
An apparatus comprising a motor assembly, where that motor assembly is a motor powered by an alternating‑current power supply plus the magnetic sensor of claim 1. Dependent claim 14 narrows this to a pump, fan, household appliance, or vehicle.

Dependent‑claim notes (for completeness)

Claims 2–11 depend from claim 1 (or from claim 4). Highlights: claim 2 adds a chopping switch modulating the magnetic‑field signal to a high‑frequency region and the offset to baseband; claim 3 recites the eight‑switch chopping topology (K1–K8) and the output terminals P/N; claim 4 recites overlapping control signals and simultaneous turn‑on of S3/S4; claim 5 the symmetric case for S1/S2; claim 7 constant‑current drive; claim 8 a capacitor between the constant‑current source and ground; claim 9 the capacitor being a MOS capacitor; claim 11 a 100–600 kHz control‑signal frequency.

Drafting observations: Claim 4 as issued mixes the two discharging branches in a single recitation (it introduces "first/second discharging switch" control signals but then recites "third discharging switch and fourth discharging switch are simultaneously turned on"), and claim 1's switching logic is expressed relative to "before… serve as" events rather than explicit switch‑control signals — both are worth flagging if the claim scope is ever construed.

Source links

• Google Patents: https://patents.google.com/patent/[US10527454B2](/patent/US10527454B2)/en
• PubChem patent record: https://pubchem.ncbi.nlm.nih.gov/patent/US-10527454-B2
• Related JP family member (different claim set, 10 claims): https://patents.google.com/patent/JP2017207474A

Uncertainty disclosure: The only CAFC case surfaced involving "Johnson Electric" is Joyal Products v. Johnson Electric, No. 09‑1095 (Fed. Cir. 2008–2009) — unrelated to and predating this patent. One search hit referencing "Application No. 10527454, Filed March 11, 2005" is a Bae Systems application serial number, not this patent, and should not be conflated with it. I do not have authoritative confirmation of any post‑grant proceedings (IPR/PGR) or 2026 appellate activity for 10,527,454.

I'll search litigation databases for this specific patent number.

Let me check litigation-specific databases directly.

Proceedings overview

Total AIA trial proceedings on US 10,527,454: 0. The structured USPTO Open Data Portal block for this patent returns no AIA trial proceedings, and targeted web searching (patent number, petitioner/patent-owner names, and the corporate family) surfaced no IPR, PGR, or CBM involving this patent. Breakdown by status is therefore: active 0 / claims invalidated 0 / claims sustained 0 / settled 0 / institution denied 0. Bottom line for a defendant: there is no PTAB-based invalidation to lean on, but the patent itself is also no longer a live threat — it lapsed for failure to pay maintenance fees effective 2024-01-07, so any assertion today is a past-damages-only play on an unexamined-at-the-Board claim set. Because no IPR was ever filed, no statutory estoppel under 35 U.S.C. § 315(e)(2) attaches to anyone, and the entire prior-art space remains available to a challenger.

---

No proceedings to report

There is no proceeding entry to format here. I am not going to manufacture a docket number, a panel, or a Final Written Decision for a proceeding that does not exist. Everything below is grounded in the structured ODP block, the patent's own prosecution/publication record, and the searches I ran.

What I checked

⚠️ Do not be misled by the near-miss. Search results for "10506454" (Corning Optical Communications LLC v. Dali Wireless Inc., IPR2021-00408) and for "the '454 patent" in the Natera/CareDx line of cases are different patents (U.S. 10,506,454 and U.S. 11,530,454). Neither has anything to do with US 10,527,454.

Patent status context (relevant because it drives the defensive calculus more than any PTAB history does)

• Patent: US 10,527,454 B2, "Magnet sensor, motor assembly and application apparatus"
• Assignee: Johnson Electric International AG (originally Johnson Electric S.A.; merger effective 2018-09-25)
• Priority: 2016-04-01 (CN 201610203285.8); later priority from CN 201610389973.8 (2016-06-03)
• Filed: 2017-03-31 (US 15/475,839) | Published: 2017-10-05 (US 2017/0284829 A1) | Granted: 2020-01-07
• Claims: 14 total — independent claims 1, 12, 13; dependent claims 2–11 and 14
• Fee status: EXPIRED — Fee Related. Legal events show maintenance-fee reminder mailed 2023-08-28, lapse for failure to pay 2024-02-12, and "Lapsed due to failure to pay maintenance fee under 37 CFR 1.362" with effective date 2024-01-07. The "adjusted expiration 2038-05-12" shown on Google Patents is a nominal 20-year-from-filing projection; it does not reflect the actual termination of the patent right.
• No DE counterpart activity of note: DE102017106789A1 published 2017-10-05, status "not_active / Withdrawn."

---

Strategic summary

Claim status: all 14 claims are UNTESTED at the PTAB. Claims 1–14 were never challenged in an AIA trial, so there is no cancellation, no surviving-claim narrowing, and no claim-level FWD guidance. The claims as granted are the claims a defendant would face. Because the patent expired 2024-01-07 for non-payment of maintenance fees, there is no injunctive or prospective-royalty exposure; the residual exposure is a § 286 look-back for damages on acts occurring on or before 2024-01-07 (and no earlier than six years before a complaint is filed). For a complaint filed today, that window would be roughly 2020-09-28 through 2024-01-07 — narrow, and worth pricing before spending a defense budget.

Estoppel landscape: essentially a clean slate. With zero petitions filed, no petitioner or privy has been estopped under § 315(e)(2), and no patent owner has been estopped or had claims narrowed by the Board. That cuts both ways: a defendant today could still file an IPR (IPRs remain available against expired patents, though the Board applies Phillips claim construction and the practical value is limited to undercutting the past-damages case), and § 315(b)'s one-year bar has never been triggered by service of a district-court complaint on any party, since no petition exists. Practically, the strongest invalidity tools are § 102/§ 103 art that the examiner did not consider plus a § 112 written-description/enablement theory on the chopping/discharge-switch architecture — all of which a district court or the Board can reach without any estoppel constraint.

Pattern signals. There is no multi-petition pattern, no Unified Patents (or other defensive-aggregator) involvement that I could find, and no PTAB appeal history for this patent. The absence of PTAB activity is itself informative: this patent is one of a large Johnson Electric magnetic-sensor family (siblings include US 9,966,883; US 10,305,400; US 10,374,534; US 10,454,397; US 10,483,830; and CN 107294310 B / CN 107342661 B), and the family has drawn significant assertion attention in China (e.g., Johnson Electric Industrial Manufactory Ltd. litigation against 宁波德昌电机股份有限公司 reported in 2022), yet none of that activity produced an AIA trial against the '454 patent. The likely reason is that the '454 patent was allowed to lapse before it became a meaningful U.S. assertion target — which is exactly why the PTAB docket is empty.

---

Recommended next steps

1. Lead with the expiry, not with a PTAB record. The single most useful fact for a defendant is that US 10,527,454 lapsed for failure to pay maintenance fees, effective 2024-01-07 (37 CFR 1.362). Confirm this on USPTO Patent Public Search and via the USPTO PatentCenter maintenance-fee record before relying on it; if the fee was paid late with a petition (unlikely given the events of record), the status would differ.
2. Scope the past-damages tail immediately. Build the accused-product timeline against 2020-09-28 → 2024-01-07 and check for marking/licensing and any intervening rights arguments. If the accused activity is post-2024-01-07 only, the exposure may be zero.
3. If a demand letter cites claims 1, 12, or 13, note that none of them has been cancelled — there is no FWD to link to and no "claim 1 is dead" argument available. The invalidity case must be built from scratch. Prioritize the closest Hall-plate chopping/spinning-current and offset-cancellation art predating 2016-04-01, and preserve § 112 positions on the "discharging branch" and overlapping-clock limitations.
4. If you later want an IPR, note there is no § 315(b) bar and no § 315(e)(2) estoppel, and the § 325(d) discretion risk is low because the examiner does not appear to have had the most relevant chopping/discharge art. But weigh cost against the expired-patent posture — the Board will not cancel claims to defeat a past-damages claim any faster than a district court will.
5. No PTAB deadlines to track. There are no institution-decision deadlines, no oral hearing dates, and no statutory 1-year FWD deadlines in play, because no trial was instituted.

Verification note and caveat. The ODP block is the canonical source and it lists nothing; I could not independently confirm a negative from PTAB E2E because there is no proceeding number to query. If a very recent petition was filed but not yet indexed by ODP, it would not appear in either the structured block or my searches. If you need to close that gap, search PTAB E2E directly by patent number and by the patent owner name "Johnson Electric," and cross-check CourtListener for any accompanying district-court case — no such case surfaced in my searches, but I did not run a full litigation docket sweep.

I'll start by verifying the assignment records and checking for any litigation or NPE-related activity.

I hit my search budget, but I have the full Google Patents legal-events record plus two corroborating third-party indexes. Note up front: the USPTO Assignment Center record pages themselves (which expose the correspondent of record) were not retrievable in this session — the reel/frame numbers and conveyance types below come from the Google Patents legal-events table, which mirrors the USPTO assignment data. I will not guess at correspondent names I could not retrieve.

---

Inventors

• The patent's country/assignee metadata lists both inventors as Chinese nationals, and the case claims priority to two Chinese applications (CN201610203285.8, filed 2016-04-01; CN201610389973.8, filed 2016-06-03). That is consistent with Johnson Electric engineering staff working out of the group's Chinese motor/sensor manufacturing operations, but I could not verify a specific employing subsidiary (e.g. Johnson Electric Industrial Manufactory or Johnson Electric (Guangdong)). Treat the employer line as inference, not a finding.
• Both inventors executed the original assignment (assignors "CAI, GUANG JIE; WONG, CHUN FAI" on Reel 041825/0011), executed/effective 2017-03-22, i.e. nine days before the US filing date — the standard pre-filing inventor assignment, not a departure-driven transfer.
• Unusual-departure pattern: cannot be assessed. I found no data on either inventor's employment history, and no contrary signal (no re-assignment of their rights to a third party; no inventor-side assignments at all). The Chip Fai Wong inventor page at PatentLeaderboard shows 24 patents attributed to Johnson Electric International AG, which suggests he remained a prolific Johnson Electric filer — mildly against a near-term departure, but not proof.

Original assignee

• Entity on the issued patent: Johnson Electric S.A. (Switzerland) took the inventors' assignment at filing (Reel 041825/0011). By grant (2020-01-07) the printed patent names Johnson Electric International AG (Switzerland), the surviving entity of the 2018 merger recorded at Reel 049682/0550. Google Patents lists "Current Assignee" as Johnson Electric International AG; its "Original Assignee" label is a normalization of the same corporate family, not a separate chain link.
• Business: Johnson Electric is a global manufacturer of motors, motion subsystems and related electronics — the ultimate parent, Johnson Electric Holdings Limited, is listed in Hong Kong (SEHK: 179, 德昌电机控股). The patent's own specification ties the claimed magnetic sensor IC to that business: the motor assembly of claims 12–13 and FIG. 6 uses the magnetic sensor integrated circuit 4000 driving a TRIAC 3000 in series with an AC motor (synchronous motor, per FIG. 7).
• Did they ship a product embodying the claims? High confidence yes in general terms — the disclosure is a production-oriented sensor IC for the assignee's own synchronous-motor/pump/fan appliance applications, and a counterpart was filed in Germany (DE102017106789A1). I did not verify a specific commercial part number, so I state this as "consistent with self-manufacture," not as documented evidence from a datasheet.
• Current status: Operating. No bankruptcy, dissolution, or fire-sale is recorded for Johnson Electric S.A., Johnson Electric International AG, or the Holdings parent. A 2023-vintage portfolio snapshot (PatSnap, via MIT library proxy) attributes ~4,387 patent applications / ~1,341 INPADOC families to Johnson Electric International AG — the profile of a large, active corporate filer, not a shell.
• Note on the patent itself: US 10,527,454 is expired — fee related. Maintenance-fee reminder mailed 2023-08-28; lapse for failure to pay recorded 2024-02-12 with effective date 2024-01-07 (first maintenance fee window; adjusted expiration would otherwise have been 2038-05-12). The DE counterpart is marked not_active / withdrawn. So the family was narrowed to US + DE and then both were let go.

Assignment timeline

Two recorded events. Both are internal to the Johnson Electric corporate family; there is no third-party transfer in this chain.

• 2017-03-22 (executed) / recorded 2017-04-03 — Reel 041825/0011
  • Conveyance: Assignment (Assignment of Assignors' Interest)
  • Assignor: CAI, Guang Jie and WONG, Chun Fai (the inventors)
  • Assignee: Johnson Electric S.A., Switzerland
  • Correspondent: not retrieved — the USPTO Assignment Center correspondent field was not accessible in this session; I am not going to name a firm I did not see. (No recurrence flag can be given either, since I have only one correspondent-eligible record available.)
  • Context: standard pre-filing inventor assignment to the applicant of record, executed 9 days before the 2017-03-31 US filing.
• 2018-09-25 (effective) / recorded 2019-07-07 — Reel 049682/0550
  • Conveyance: Merger (MERGER; ASSIGNOR: JOHNSON ELECTRIC S.A.)
  • Assignor: Johnson Electric S.A.
  • Assignee: Johnson Electric International AG, Switzerland
  • Correspondent: not retrieved (same limitation as above). Note this recording is the merger's US filing; the second-filer identity cannot be confirmed from the sources available to me.
  • Context: pure internal corporate reorganization / change of legal entity — the Swiss operating/holding entity merged into its successor. No consideration flow to a third party, no change in beneficial owner of the Johnson Electric group.

No record of: Security Agreement, License, Release, Correction, or any Change of Name beyond the merger. No post-2020 assignment of any kind. That is itself the finding: the patent remained inside Johnson Electric from filing until the 2024 fee lapse.

Timeline diagram

timeline
    title Ownership of US 10527454
    2016 : CN priority applications filed
    2017 : US application filed 31 March
         : Inventors assign to Johnson Electric SA
    2018 : Merger into Johnson Electric International AG
    2019 : Merger recorded with USPTO
    2020 : US 10527454 granted
    2024 : Patent lapses for unpaid maintenance fee

NPE / troll-pattern signals

1. Shell-entity transfer — not present. The only non-inventor assignee is Johnson Electric International AG, Switzerland, a named group operating entity with ~4,000+ patent filings (PatSnap snapshot). No "IP / Patents / Licensing / Holdings LLC," no Delaware/Texas single-member LLC, no registered-agent drop-box address anywhere in Reels 041825/0011 or 049682/0550.
2. Known asserter in the chain — not present. Neither Johnson Electric S.A. nor Johnson Electric International AG appears on any Acacia / Marathon / IV / IPNav / Wi-LAN / Conversant / Vringo / Pendrell / Round Rock roster in the material I could retrieve, and my searches surfaced no Johnson Electric patent assertion, IPR, or NPE directory entry.
3. Repeat correspondent across the chain — unclear / cannot be assessed. The correspondent of record is the single most diagnostic field for this task and I could not retrieve it for either Reel 041825/0011 or Reel 049682/0550. Stated plainly rather than inferred. Two recordings is also below the threshold at which "recurrence" would be meaningful even if I had the names.
4. Cascading transfers — not present. Two recordings over ~28 months, one of them a corporate merger with an effective date (2018-09-25) reflecting the underlying Swiss merger, not a staged conveyance. No chained LLCs, no shared correspondent address pattern, no common-principal hopping.
5. Pre-litigation transfer — not present. No infringement suit naming US 10,527,454 was found (see the earlier litigation-summary section, which likewise returned no hits; my independent searches during this task also returned nothing). The only assignment dated near a litigation trigger is the 2017 inventor assignment, which predates filing rather than a suit.
6. Bankruptcy fire-sale — not present. No Chapter 7/11 of a Johnson Electric entity appears in the record or in the retrieved coverage; the parent remains listed and operating.
7. Privateering — not present. No transfer to an assertion vehicle, and no Patent Progress / EFF / SEC-filing narrative of Johnson Electric funding an NPE suit against competitors.
8. Defensive aggregator (anti-NPE) — not present. The chain terminates at Johnson Electric International AG, not at RPX, AST, LOT Network, Unified Patents, or OIN. The patent was neutralized by abandonment, not aggregation: it lapsed for non-payment effective 2024-01-07, and the German counterpart DE102017106789A1 was withdrawn / not active.

Verdict

Insufficient data.

The ownership chain is short, complete, and non-litigious: inventors → Johnson Electric S.A. (Reel 041825/0011, executed 2017-03-22, recorded 2017-04-03) → Johnson Electric International AG by intra-group merger (Reel 049682/0550, effective 2018-09-25, recorded 2019-07-07), with no third-party transferee and no assertion activity before the patent expired for unpaid maintenance fees effective 2024-01-07. That is squarely "only the original assignment plus a corporate housekeeping recording," so no NPE verdict — high or moderate — is supportable; every troll-pattern signal above is either absent or unassessable. The one gap that could change the assessment is the correspondent of record on both reels, which I was unable to retrieve and which the record does not hint at either way.

Verification links:

• Assignment Center search: https://assignmentcenter.uspto.gov/ (or the legacy https://assignment.uspto.gov/patent/index.html — search patent number 10527454)
• Legal events as indexed: https://patents.google.com/patent/[US10527454B2](/patent/US10527454B2)/en
• Family/citation record: https://pubchem.ncbi.nlm.nih.gov/patent/US-10527454-B2

Caveat for the file: the two reel/frame citations above are taken from Google Patents' legal-events table, which mirrors USPTO assignment data; I did not directly open the USPTO reel images. Anyone relying on this for standing analysis should pull Reels 041825/0011 and 049682/0550 directly and capture the correspondent block I could not reach.

I'll search for the specific patent and each of its cited references to build an accurate prior-art analysis.

Prior-Art Analysis — US 10,527,454 B2 ("Magnet sensor, motor assembly and application apparatus")

0. Sourcing note and scope

I searched for the exact number US 10,527,454 (no similar numbers). The record I can ground this analysis on is the patent's own front matter and prosecution-citation list, plus secondary records for each cited reference. Google Patents lists five "Citations" on the face of US 10,527,454, four of them flagged " Cited by examiner"* (i.e., examined/relevant art of record) and the fifth a JP publication. These are the references in the patent's prior-art-of-record list; I am not aware of any other patent citations for this number.

Important framing point: The five references below are the art the examiner had before him. Per the prosecution history in the record, the application went final-action → notice of allowance → grant without a sustained § 102 rejection (the only substantive action was one non-final action on 2019-07-10, followed by allowance 2019-10-29). So these references, as a set, were overcome by the applicant. My task is to say, honestly and per reference, whether each could anticipate any issued claim under § 102 — which requires a single reference to disclose each and every limitation of the claim.

Bottom line up front: None of the five cited references, taken alone, anticipates any of issued claims 1–14. In every case the missing element is the point of novelty of claim 1 — the two dedicated discharging branches (S1/S2 across terminals A–C; S3/S4 across B–D) that short the terminal pair just before it is reused, to dump parasitic capacitance. Each reference instead discloses the spinning/chopping switch function (claims 2–3), and some disclose constant-current drive or capacitors (claims 7–9). Their real force is as § 103 obviousness art, not § 102 anticipation.

---

1. The five cited references at a glance

All five predate the earliest effective filing date of US 10,527,454 (priority 2016-04-01; non-provisional filed 2017-03-31), so all qualify as prior art under § 102(a)(1)/(a)(2) if otherwise enabling. Four also predate by more than a year.

---

2. Reference-by-reference analysis

Reference 1 — US 2003/0020470 A1 (Matsushita; "Magnetic field sensor")

• Full citation: US 2003/0020470 A1, "Magnetic field sensor," Matsushita Electric Industrial Co., Ltd.; also granted as US 6,727,684 B2. Published 2003-01-30 (corresponding to a JP priority of 2001-07-26).
• Brief description: A Hall-element magnetic field sensor that uses a switch circuit to invert the polarity of the Hall voltage upstream of a voltage-comparison circuit, plus a latch circuit. It expressly discloses a second switch circuit connected to two pairs of external terminals of the Hall element for selecting one pair as output terminals and the other as input terminals (i.e., the classical current-spinning/chopping of a four-terminal Hall plate), and it inverts the hysteresis polarity in response to first/second synchronizing signals.
• § 102 potential: Does not anticipate any issued claim. It discloses the chopping/spinning switch concept that underlies claim 2 and the terminal-selection aspect of claim 3, but it contains no discharging branch that shorts A–C or B–D before terminal reuse, which is an indispensable limitation of claim 1. Because independent claims 12 and 13 incorporate the sensor of claim 1, they are likewise not anticipated. It is, however, relevant § 103 art for the claim 2–3 chopping-switch subject matter.

Reference 2 — US 7,358,880 B1 (Cirrus Logic; "Magnetic field feedback delta-sigma modulator sensor circuit")

• Full citation: US 7,358,880 B1, Cirrus Logic, Inc. Filed 2007-02-07; granted 2008-04-15.
• Brief description: A semiconductor magnetic field sensor read out through a delta-sigma modulator with magnetic feedback (a DAC drives a coil coupled to the Hall sensor, cancelling the sensed field) and a chopper amplifier to remove offset/1‑f noise. Notably, its FIG. 2 discloses a switch S1 connected to the four Hall terminals that alternates which opposing pair receives bias current and which opposing pair provides the output voltage — the "rotating/spinning" of the Hall bias current, chopping the signal to the chopping frequency f_c. It also mentions a constant current source across the Hall bias terminals (claim 4 of that patent).
• § 102 potential: Does not anticipate any issued claim. It is arguably the closest of the five on the "offset shifted to baseband / signal shifted to chopping frequency" concept (relevant to claims 2–3) and on constant-current drive (claim 7 concept), but it lacks the discharging branches and their pre-switch timing of claim 1, and it drives a magnetic feedback loop rather than the claimed "before… serve as power input terminals" discharge scheme. No independent claim is anticipated.

Reference 3 — US 2012/0223704 A1 (Rohm; "Magnetic sensor")

• Full citation: US 2012/0223704 A1, Rohm Co., Ltd. Published 2012-09-06; U.S. filing 2012-03-01; priority JP 2011-044916 (JP 2011-03-02).
• Brief description: A Hall-element magnetic sensor with a switch circuit that alternately switches between a first bias state (bias along one direction) and a second, perpendicular bias state, an amplifier, a subtractor circuit (capacitor-based) that subtracts amplification voltages from the immediately prior bias state, and a selector circuit. A timing logic circuit controls the operation timings of the switch circuit, the subtractor and selector in sync with a clock, and switches capacitors off/on around bias-state transitions to cancel both Hall-element offset and amplifier input offset.
• § 102 potential: Does not anticipate any issued claim. It is the most closely analogous architecture to claim 1 (four-terminal transducer + bias-state-switching switch network + timing logic that opens switches before state transitions), but its switching/capacitor timing is for signal subtraction, not for shorting the terminal pairs to discharge parasitic capacitance. Claim 1's two series-switch discharging branches (S1/S2, S3/S4) and the "before… serve as" discharge rule are absent. No independent claim is anticipated; it is strong § 103 art for claims 2–3 and possibly 7–9.

Reference 4 — US 2014/0028286 A1 (BCD Semiconductor; "Amplifier circuits and methods")

• Full citation: US 2014/0028286 A1, BCD Semiconductor Manufacturing Limited. Published 2014-01-30; priority 2012-07-26.
• Brief description: Amplifier circuits for a Hall-plate sensing system, including a chopper amplifier circuit, a "Hall voltage signal retaining circuit" with first and second groups of four storage capacitors, and switching circuits driven by clock signals in four different time periods. The system applies current between selected node pairs of a four-node (A, B, C, D) Hall plate, couples the remaining nodes to differential amplifiers, charges the capacitors, and averages the four samples to produce a differential Hall voltage. Switching devices are described as MOS transistors.
• § 102 potential: Does not anticipate any issued claim. It discloses the four-terminal Hall-plate node scheme and multi-phase switching (relevant to claims 2–3), capacitors (claim 8 concept), and MOS switches (claim 10 concept), but it stores/averages measurement samples — it does not discharge parasitic capacitance by shorting terminal pairs before reuse. Claim 1 is not anticipated, so neither are dependent claims 2–11 nor independent claims 12–13.

Reference 5 — JP 2014-066522 A (Seiko Instruments; "Semiconductor hall sensor")

• Full citation: JP 2014-066522 A, Seiko Instruments Inc. Published 2014-04-17; filing 2012-09-24.
• Brief description (limited confidence): As reflected only by the title in the record, a semiconductor Hall sensor — i.e., a Hall-element sensor with integrated drive/detection circuitry. I was not able to retrieve the full text/claims of this JP publication within this analysis (search budget exhausted on this reference). Therefore I cannot responsibly recite its specific disclosure.
• § 102 potential: Cannot be asserted; insufficient data. On the title alone it is directed to the same general field (a Hall-based magnetic sensor) and is therefore relevant background/§ 103 art, but I have no basis to conclude it discloses the discharging-branch-and-timing limitation of claim 1, and no basis to assert anticipation of any claim. Flagged as an open item requiring the actual JP text.

---

3. Which of the five is "most relevant"?

Ranked by proximity to the issued claims:

1. US 2012/0223704 A1 (Rohm) — closest architecture: four-terminal transducer, alternating bias-state switch network, and a timing logic that manipulates switches around state transitions. If any claim's novelty were ever construed away (it is not), this would be the reference to press.
2. US 2014/0028286 A1 (BCD) — four-node Hall plate + chopper + clocked multi-phase switching + capacitors; strong on claims 2–3, 8, 10.
3. US 7,358,880 B1 (Cirrus Logic) — explicit spinning switch across four Hall terminals, chopper amplifier, constant-current bias; strong on claims 2–3 and 7.
4. US 2003/0020470 A1 (Matsushita) — early spinning/terminal-selection switch + latch; relevant to claim 2–3 concepts.
5. JP 2014-066522 A (Seiko Instruments) — relevant field, but unassessed (no text obtained).

Critical gap common to all: none discloses two series-connected discharging switches bridging A–C and B–D that are turned on to short the terminal pair immediately before that pair transitions from output to power-input (or vice versa), to discharge the parasitic capacitance in the manner reciting in claim 1. That limitation is what distinguishes the issued claims, and it is why these references were cited and overcome rather than used to reject.

---

4. § 102 conclusion (claim-level)

Because § 102 requires "each and every limitation… in a single prior art reference," and the discharging-branch-and-timing element of claim 1 is missing from every cited reference, no § 102 anticipation exists for any issued claim on the present record. The five references are properly characterized as § 103 art directed to Hall-element spinning/chopping switches, chopper amplifiers, and multi-phase sampled readout — the surrounding context of claims 2–3 and 7–9 — not as anticipatory art against the claims as issued.

---

5. Explicit uncertainties / caveats

• USPTO-database limitation: I did not obtain a live USPTO PatentCenter/File-Wrapper transaction history in this pass; the citation set is taken from the patent's face (Google Patents "Citations (5)") and cross-checked against the individual reference records. The five references are consistent across the patent's "Citations" and "Patent Citations" tables.
• JP 2014-066522 A: full text not retrieved — its description here rests on the title only and its § 102 status is unverified.
• No auto-correction: Reference identifiers are quoted literally (e.g., "US 2003/0020470 A1," "US 7,358,880 B1," "JP 2014-066522 A"). Where a reference is also a granted patent (US 6,727,684 B2 for US 2003/0020470 A1), both numbers are given for traceability; I did not independently confirm that patent's exact grant date.
• "Cited by examiner" designation: four of the five carry Google's examiner-cited asterisk; the JP item is listed without it. I have not verified from a primary source which party submitted each reference.
• No evidence of any § 102 rejection being sustained: consistent with the prosecution history in the record (single non-final action → allowance), these references do not appear to have formed the basis of an allowed-claim rejection past the initial action.

If you want, I can next (a) retrieve and read JP 2014-066522 A in full to close the last gap, or (b) build the explicit § 103 combinations (e.g., Rohm '704 or BCD '286 in view of a parasitic-discharge teaching) that would be needed to challenge claims 2–11.

I'll research the five prior-art references cited on this patent's face before building the obviousness analysis.

Let me dig into the Seiko Instruments reference and search for the specific discharge/reset teaching.

Obviousness Analysis Under 35 U.S.C. § 103 — US 10,527,454 B2

Analysis date: 2026-09-28 | Patent: US 10,527,454 B2, "Magnet sensor, motor assembly and application apparatus" | App. 15/475,839 | Effective filing: 2016-03-31 (priority 2016-04-01 CN)

Note on cross-reference: This builds on the previously generated patent summary (claim 1 structure, 14 claims, 3 independents). One contradiction is worth restating verbatim: the front matter gives two expiration markers — "Expired – Fee Related / 2024-01-07" (fee lapse) and "Adjusted expiration 2038-05-12." I treat the 2024-01-07 lapse as the operative termination of rights and 2038-05-12 as the nominal post-PTA term.

---

0. Evidence base and its limits — read this first

This is important and limits the confidence of every conclusion below.

I analyzed the five references cited on the patent's face (the "Citations (5)" block), which are the references the examiner of record considered:

Three candor caveats:

1. I retrieved substantive text for R1–R4 but essentially none for R5. For JP 2014-066522 A I have only the title ("Semiconductor hall sensor"), the assignee, and one third-party datum: a PCT search report that cited JP 2014-066522 A as an "X" (most relevant) document against claims 1 and 3 of a different, later Hall-sensor application, in a discussion of spinning-current offset removal. I must not attribute the text of other Seiko Instruments patents (e.g., JP 5052982 B2, which surfaced in the same search) to R5. I treat R5 as "a Seiko Instruments semiconductor Hall-sensor disclosure directed to spinning-current/Hall-element subject matter" and nothing more.

2. I did not retrieve the prosecution history (no office actions, no examiner's reasons for allowance). One non-final action (2019-07-10) followed by a notice of allowance (2019-10-29) is on the face of the record, but I cannot say what the examiner allowed over. Any statement about "the examiner allowed because of X" would be speculation.

3. None of R1–R5, in the text I could retrieve, discloses the discharge branches that are the core of claim 1. That is the single most important finding for this analysis, and it cuts in both directions (it weakens a pure "anticipation-by-combination" story but supports a KSR "known-technique" story). I flag it explicitly rather than papering over it.

I also note that the "Prior art keywords" block on the Google Patents page (terminal, switch, magnetic sensor, discharging, control signal) is terminology extracted from the patent itself, not a characterization of the cited art. It should not be cited as evidence about R1–R5.

---

1. Legal framework applied

• 35 U.S.C. § 103; Graham v. John Deere Co., 383 U.S. 1 (1966) — scope/content of the prior art; differences; PHOSITA level; objective evidence.
• KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) — a combination is obvious where known elements are combined "according to known methods … to yield predictable results"; where there is "a design need or market pressure to solve a problem and there are a finite number of identified, predictable solutions"; motivation may be the "mere existence of any need." Also: the PHOSITA is "a person of ordinary creativity, not an automaton."
• MPEP § 2143 exemplary rationales: (A) combining prior art elements per known methods; (B) simple substitution of one known element for another; (C) use of a known technique to improve a similar device in the same way; (F) "obvious to try."
• MPEP § 2144.04 — obvious design choice; MPEP § 2144.05 — optimization of a parameter.
• In re Aller, 220 F.2d 454 (CCPA 1955) — optimizing a "result-effective variable" is routine.
• In re Kuhle, 526 F.2d 553 (CCPA 1975) — selection of a known element with predictable results is obvious design choice.
• In re Fulton, 391 F.3d 1195 (Fed. Cir. 2004) — teaching away requires the art to "criticize, discredit, or otherwise discourage" the claimed approach.
• MPEP § 2114 — intended-use recitations in apparatus claims carry patentable weight only if they produce a structural difference.
• AIA § 102 applies to this patent (effective filing 2016-03-31); all five references predate it and are § 102(a)(1) prior art usable under § 103.

---

2. Scope and content of the cited art (what I verified each reference discloses)

R1 — Matsushita US 2003/0020470 A1 (link) — Verified disclosures:

• A Hall element "including two pairs of external terminals" (A‑A′ and B‑B′), geometrically equivalent under 90° rotation — i.e., a four-terminal plate with two opposed terminal pairs.
• A "first switch circuit connected to the two pairs of external terminals for selecting one of the two pairs … as output terminals."
• A voltage amplifier, and a memory device for storing the amplified signal, where "the memory device includes a capacitor."
• A second switch circuit between the amplifier and the memory device, and a third switch circuit for inverting polarity of the amplified signal.
• Operation driven by first/second/third "synchronizing signals," with a first phase applying supply across A‑A′ and reading B‑B′, and a second phase applying supply across B‑B′ and reading A‑A′, the two phases being summed so the offset adds in negative phase and cancels ("the Hall element offset signal component can be compensated for by using the pair of output terminals for the first and the second synchronizing signals").
• Explicitly concerned with "the dispersion of the offset signal component included in the output voltage of the Hall element" and the amplifier's input offset.

→ R1 discloses: four-terminal Hall element in two opposed pairs; a switch circuit that reassigns which pair is the bias pair and which is the sense pair; capacitor-based storage; clocked (synchronizing-signal) phase control; and the reason for all of it (offset cancellation).

R2 — Cirrus Logic US 7,358,880 B1 (link) — Verified disclosures:

• Hall effect sensor H … has four terminals connected to a switch S1, which is operated by a clock signal that alternates which opposing pair of Hall effect sensor terminals receive bias current IB and which (opposing) pair of terminals provide the output voltage to the differential inputs of a chopper amplifier A2.
• "The alternation of terminals of Hall effect sensor H is known as rotating or 'spinning' the Hall effect bias current." The spinning "shifts … the bias current I_B … (chopped) to the chopping frequency f_c" and "shifts the field detection frequency by the chopping frequency, so that offset and low-frequency 1/f noise and other artifacts are removed from the measurement."
• A chopper amplifier between the sensor output and the loop filter "to remove offset and prevent the introduction of 1/f noise."
• Claim 4: "a constant current source coupled between said pair of bias current terminals." Claim 5: a switching circuit coupling the input terminal to a first/second sensor terminal in response to first/second states of a switching clock signal, with a constant current source coupled to the switching circuit.
• Background expressly names "power supply and motor control applications in which the transformer or motor fields are detected."

→ R2 discloses: four-terminal Hall sensor; clock-driven spinning switch; chopper modulation of the field signal to a high-frequency (chopping) region while offset/low-frequency noise is removed from the measurement band; constant-current bias; and an express motor-control application.

R3 — Rohm US 2012/0223704 A1 (link) — Verified disclosures:

• Hall element 10 with four terminals A to D, with "a first pair of terminals A and C equivalent geometrically to a second pair of terminals B and D"; terminals at the four apexes of a square plate.
• Switch circuit 20: a first group of switches 21, 23, 25, 27 switched by first switch control signal SW1, and a second group 22, 24, 26, 28 switched by second switch control signal SW2 — i.e., a matrix that reassigns the four terminals between bias and sense.
• A first bias state φ1 (Vcc applied to A‑C) and a second bias state φ2 (Vcc applied to B‑D), alternated by the switch circuit.
• A subtractor circuit 40 with capacitors 41–44 and switches 41–44/451–452 that cancels both the Hall element offset and the amplifier input offset by arithmetic across the two bias states.
• A timing logic circuit 90 that controls operation timings of the switch circuit, the subtractor circuit and the selector circuit in synchronization with a clock signal CLK having a predetermined frequency.
• Critically for this analysis: "The first switch control signal SW1 and the second switch control signal SW2 are generated in such a manner that their high level periods (switch-on periods) do not overlap with each other."

→ R3 discloses the closest overall architecture to the patent: four-terminal Hall plate + 8-switch reassignment matrix + capacitor-based offset cancellation + timing logic synchronized to a clock. But it expressly specifies non-overlapping phase signals.

R4 — BCD Semiconductor US 2014/0028286 A1 (link) — Verified disclosures:

• "a Hall plate having four nodes, designated as nodes A, B, C, and D", an input terminal for coupling to a power source, and a current source coupled to the input terminal for providing a current.
• Four clocked time periods T1–T4, in each of which a bias current is applied between a different pair of nodes and the remaining pair is coupled to the inputs of first and second differential amplifier circuits, with capacitor storage of the amplified samples; a fifth period couples groups of capacitors to differential output terminals Out1/Out2 (differential Hall voltage output at the two output terminals).
• A "switching circuit responsive to a set of clock signals"; a "control circuit configured for issuing clock signals to carry out the measuring and storing steps in four different time periods."
• "the switching circuits include MOS transistors" (and, in other embodiments, bipolar transistors).
• Explicitly a test circuit for testing a Hall plate with "first switching circuit … selectively coupling each of the four terminals to either current source or the ground terminal" and a "second switching circuit … selectively coupling each of the four terminals of the device to the inputs of the differential amplifier circuit."

→ R4 is the best disclosure of the complete 8-switch reassignment matrix (each of four nodes to supply/ground or to amplifier inputs) built from MOS switches and driven by clock signals in discrete phases.

R5 — Seiko Instruments JP 2014-066522 A (link) — Title: "Semiconductor hall sensor." Assignee Seiko Instruments Inc. A third-party PCT search report cited JP 2014-066522 A as an X-category document (entire text/all drawings) against claims 1 and 3 of a separate Hall-sensor application dealing with spinning-current offset removal. I have no substantive text for R5 and will not assign it disclosures beyond "a semiconductor Hall sensor with spinning/terminal-switching and offset handling."

---

3. Element-by-element mapping for independent claim 1

Bottom line for claim 1: every structural element except the discharging branches and their timing is squarely in the cited art, and the cited art even supplies the express purpose (offset and 1/f-noise removal) that motivates the whole architecture. The novelty is confined to limitations (b)–(d).

---

4. Combination 1 (primary): R3 + R1 + R2 — "spinning Hall plate + clocked multi-phase terminal reassignment + chopper/offset architecture"

Primary reference: R3 (Rohm). R3 alone supplies: the four-terminal Hall plate arranged in two geometrically equivalent opposed pairs (a); the 8-switch reassignment matrix; the two alternating bias states; a clock-synchronized timing logic (the substrate for (d)); and capacitor-based offset cancellation.

Secondary: R1 (Matsushita). R1 supplies the same four-terminal, two-opposed-pair Hall element (a), plus the explicit teaching that a switch circuit selects which terminal pair is the bias pair and which is the sense pair under synchronizing signals, and that the second switch circuit and memory capacitor store the amplified sample between phases. R1 also supplies the stating of the problem — offset dispersion of the Hall element and amplifier input offset.

Secondary: R2 (Cirrus Logic). R2 supplies the express characterization of the terminal-swapping as "spinning the Hall effect bias current," the result that spinning "shifts the field detection frequency by the chopping frequency, so that offset and low-frequency 1/f noise and other artifacts are removed from the measurement," a constant-current source for the bias pair (R2 claims 4–5), and a motor-control application.

Motivation to combine (KSR / MPEP 2143 Rationales A and C):

• All three are in the same field (semiconductor Hall-effect magnetic sensors) and address the same recognized problem (Hall-element offset and amplifier offset/1‑f noise), making them analogous art both by field of endeavor and by problem addressed.
• Each reference expressly identifies the other's techniques as solutions to the shared problem — R2 describes spinning as reducing 1/f noise and offset; R1 describes bias/sense phase alternation as cancelling Hall-element offset; R3 describes bias switching plus capacitor subtraction as cancelling both element and amplifier offset. That is more than a "design need"; it is a directed, mutual teaching toward the same architecture.
• The combination yields predictable results (a spinning-current Hall sensor with offset cancellation), and the number of candidate topologies is small (a 4-node plate reassigned among supply/supply-return/amplifier-input pairs).

What the combination does not provide: limitations (b), (c), and the pre-transition timing of (d).

---

5. Combination 2 (primary): R4 + R1 + R2 — "four-node Hall plate with MOS switch matrix and clocked multi-phase sampling"

Primary: R4 (BCD Semiconductor). R4 is the closest art to the switch matrix half of the claim. It expressly recites a Hall plate with four nodes A–D; a current source coupled to the input terminal; a switching circuit responsive to a set of clock signals; four successive time periods in which the bias is applied across a different node pair while the other pair is routed to differential amplifier inputs; differential output terminals; and that "the switching circuits include MOS transistors." R4 further recites, in the test-circuit embodiment, a single switching circuit that selectively couples each of the four terminals to either the current source or ground and a second that couples each of the four terminals to the amplifier inputs — i.e., the full 8-switch matrix the patent's claim 3 recites as K1–K8.

Secondary: R1 (Matsushita) — four-terminal two-pair Hall element; switch circuit selecting the bias/sense pair; capacitor memory; synchronizing signals.
Secondary: R2 (Cirrus Logic) — spinning characterization; chopper modulation of the field signal and suppression of offset/low-frequency noise; constant-current bias; motor-control use.

Motivation: R4 supplies the four-phase clocking scheme and the MOS switch matrix; R1 supplies the four-terminal Hall element with capacitor sample storage and the offset-cancellation rationale; R2 supplies the terminology, the constant-current bias, and the end-use. A PHOSITA seeking to build an offset-compensated Hall sensing IC from R4's multi-phase sampler would naturally (i) use a four-terminal Hall plate as R1/R3/R4 all do, (ii) use MOS switches as R4 expressly teaches, and (iii) add bias-current spinning/chopping as R2 expressly teaches to remove 1/f noise. MPEP 2143 Rationale B (substitution of a known element) covers replacing R4's illustrative element with the R1/R2 four-terminal Hall element.

---

6. The dispositive gap: the discharging branches (limits (b)–(d))

This is where the § 103 case must be won or lost, and I want to be precise about the strength of the bridge.

What the patent claims the branches do (per its own spec): when terminals B and D are about to be switched from sense duty to bias duty, S3 and S4 close together and "the second terminal B is short-circuited with the fourth terminal D thereby eliminating charges stored in a parasitic capacitor between the second terminal B and the fourth terminal D." The symmetric case shorts A to C.

Why a PHOSITA would have been motivated to add this (Rationale C — "known technique to improve a similar device in the same way"):

1. The problem is inherent to the cited art's own architecture. Every one of R1–R4 switches a Hall-plate terminal between a bias role and a sense role at a chopping rate (100 kHz–600 kHz per the patent; R3's CLK, R4's T1–T4, R2's f_c). A terminal that was a sense (high-impedance) node in phase N carries residual charge on its parasitic capacitance into phase N+1, when it becomes (or its partner becomes) a bias node. Settling error from that residual charge is a first-order accuracy problem in exactly the measurement these references are trying to make accurate. The problem is not discovered by the patent; it is a necessary consequence of the spinning/chopping architecture the cited art already discloses.
2. Resetting/shorting a node before a measurement phase is a textbook technique. Switched-capacitor and sample-and-hold circuits routinely use reset switches that short the sampling node (or both plates of a capacitor) before the sample phase, so the measurement is not corrupted by history-dependent charge. Applying that known technique (a shorting/reset switch across the node pair about to be reused) to a known device (a spinning-current Hall plate, ready for improvement) is the paradigm Rationale C case.
3. The result is entirely predictable. Shorting B to D before they become the bias pair removes the residual charge; the subsequent sample is cleaner. Nothing unexpected happens, and no reference had to be modified in principle of operation — R1's switch circuits, R3's timing logic 90/CLK, and R4's clock matrix all provide a natural place to insert such a reset.
4. KSR "finite number of identified, predictable solutions." Given the design goal (remove residual charge at the terminal roles' transition), a PHOSITA has a small menu: (i) short the pair; (ii) lengthen a non-overlap "dead time"; (iii) pre-charge the node to a known level. Using a brief make-before-break overlap to trigger the short (as the patent does with CK1B/CK2B) is one of that small menu, and is the kind of "obvious to try" choice KSR sanctions.
5. The two-series-switch-per-branch detail is design choice. Reciting S1 and S2 in series between A and C (each gated by a respective control signal, both on ⇒ conduction) is a routine way to gate a branch from a clock and to control leakage. In re Kuhle / MPEP 2144.04 (obvious design choice) covers this; the patent attributes no unexpected property to the series arrangement. Notably, the patent also drives the discharge switches from the same sub-clock signals that control the chopping switches (CK2B/CK1B) — an economy-of-design choice, not a technical departure.

Honest weakness of this bridge: It depends on general knowledge / analogous art outside the five cited references, because none of the five, as retrieved, discloses a shorting branch across a Hall-element terminal pair. If the patent owner were to argue that the cited art is silent on residual-charge discharge and that the two-switch-per-branch scheme is a specific, non-suggested design, the burden shifts to the challenger to supply a reference (or a declaration establishing PHOSITA knowledge) for reset/shorting switches in the Hall-sensor or switched-capacitor art. That is the single most important evidentiary need in this case. I was unable to run the searches that would locate such art (search budget exhausted), so I flag this as unverified.

Note on "teaching away": R3's statement that SW1 and SW2 have non-overlapping on-periods is not teaching away under In re Fulton, 391 F.3d 1195. R3 describes a design choice and offers no criticism, disparagement, or discouragement of overlapping phase control. At most it shows that a PHOSITA already knew how to deliberately control the overlap/non-overlap of the phase signals — which is the very control the patent's overlapping CK1B/CK2B exploit. I would not expect a serious teaching-away defense to succeed on R3 alone.

---

7. Claim-by-claim § 103 conclusions

---

8. The strongest non-obviousness arguments to expect (and how they fare)

1. "No cited reference discloses a discharge branch across a Hall-terminal pair." — Strongest argument. It is factually correct as to R1–R5 as retrieved. It forces the rejection to rest on the general-knowledge reset-switch rationale, which must then be proven (declaration evidence or additional art). If the challenger supplies a Hall-sensor or switched-capacitor reference showing a pre-sample reset/short across the sensing node pair, this argument collapses.
2. "R3 teaches non-overlapping control signals — the opposite of the claimed overlap." — Weak. Not teaching away (In re Fulton): no criticism or discouragement. At most it shows deliberate overlap control was known and available.
3. "The two series switches per discharging branch are a specific architecture, not a mere reset switch." — Weak-to-moderate. A one-switch reset would be simpler; the patent claims two in series without asserting any unexpected benefit. Obvious design choice (In re Kuhle). But a patent owner could argue the two-switch, two-clock gating is not what a PHOSITA would build.
4. "The cited art is directed to offset cancellation, not to residual-charge elimination; different problem." — Weak. KSR rejects the "different problem" defense where the prior art elements are known and the combination is predictable; and the residual-charge problem is created by the cited art's own spinning architecture, so it is the same field and the same device.
5. Secondary considerations (objective evidence). — None apparent from the record I reviewed. I found no evidence of unexpected results, commercial success, copying, licensing, or praise tied to these claims. The patent's own spec asserts only that the discharge removes parasitic-capacitor charge — a result that follows directly from shorting the terminals, i.e., a predictable result, not an unexpected one. Absent record evidence, this factor does not rebut a prima facie case.

---

9. Bottom line

• Claims 2, 3, 7, 10, and 11 are, on the retrieved record, strongly obvious — each limitation is essentially express in R1–R4, and claim 11 is a textbook § 2144.05 parameter-optimization case.
• Claims 8–9 are probably obvious as design choices, though claim 9 (MOS capacitor) is the sort of claim a patent owner defends on "no motivation to select this specific capacitor."
• Claims 12–14 are weak — claim 12/13 recite a motor plus the claim-1 sensor with essentially no additional structure, and claim 14 is a pure field-of-use recitation with no structural weight.
• Claim 1 — and derivatively claims 4, 5, 6 — is the real battleground. The only element missing from the cited art is the pair of two-switch discharging branches and their pre-transition timing. The obviousness case therefore turns on the general-knowledge/analogous-art bridge (reset/short switches in switched-capacitor and spinning-current Hall sensors). I assess claim 1 as likely obvious but not certain, and claims 4–6 as the hardest to invalidate because they sit closest to R3, which affirmatively teaches non-overlapping phase signals.
• What would materially change the assessment: (a) a reference showing a Hall-element terminal-pair short during a phase transition, or (b) a PHOSITA declaration establishing that pre-sample reset/short of the sensing node pair was routine in chopper-stabilized Hall ICs by 2016. Conversely, if the challenger supplies only R1–R5, the claim-1 rejection is incomplete as to limitations (b)–(d), and I would not represent that the claim has been shown obvious on that record alone.

Practical context: the patent lapsed for non-payment effective 2024-01-07, so the live significance of a § 103 holding is limited to pre-lapse infringement exposure (and any § 285/opinion-of-counsel setting), not to prospective injunctive relief.

Unresolved items I could not verify (do not treat as findings):

• The substantive disclosure of R5 / JP 2014-066522 A (no text retrieved; only title/assignee and a third-party X-citation datum).
• Whether any of R1–R5 discloses a shorting/discharge branch across the Hall-element terminal pair (nothing found, but absence of hits in my limited search is not proof of absence).
• The prosecution history and the examiner's actual basis for allowance.
• Whether any additional § 103 art exists outside the five citations (e.g., Allegro/Melexis/Infineon/TI chopper-stabilized Hall app notes teaching a reset/blanking switch).

Reference URLs: R1 https://patents.google.com/patent/US20030020470A1 · R2 https://patents.google.com/patent/US7358880 · R3 https://patents.google.com/patent/US20120223704 · R4 https://www.freepatentsonline.com/y2014/0028286.html · R5 https://patents.google.com/patent/JP2014066522A · Patent https://patents.google.com/patent/[US10527454B2](/patent/US10527454B2)/en