US 7236547

US Patent 7,236,547 — Summary

Bibliographic Data

Abstract (as published)

"Method and apparatus for adjusting the frequency of a voltage controlled oscillator (VCO) at a receiver to synchronize the receiver with the transmitter by correlating a synchronization code channel with training sequences to estimate positive and negative offsets which are employed to estimate an error, which is then filtered. The filter output provides voltage controlling the VCO. The same technique may be employed to control a numeric controlled oscillator (NCO)."

Technology in Plain Language

During initial cell search (ICS) at UE power-up in a TDD/cellular system, the receiver must correct a potentially large carrier-frequency offset (up to ~6 kHz) before it can complete Step 1/2/3 cell-search processing. The patent's "start-up AFC" uses a phase-rotation correlation approach: a stored PSC sequence is rotated by +3 kHz and −3 kHz, each rotated version is correlated against the received sequence, and the absolute values (a, b) of the two correlations are combined into a frequency-error estimate. That error is filtered (a proportional-plus-integral, PI, filter) and drives a VCO/NCO to pull the receiver frequency into lock (nominally from 6 kHz down to <2 kHz). Step 1 cell search runs in parallel to keep refreshing the PSC peak location, since frequency correction shifts the code timing.

Independent Claims — Plain-Language Overview

Claim 1 (broadest): A start-up AFC method during initial cell search by a UE receiver: (a) receive input containing a sequence; (b) rotate a stored sequence's phase by a given frequency in both the positive and negative directions; (c) correlate the received sequence with the positively rotated sequence; (d) correlate with the negatively rotated sequence; (e) combine the two correlation outputs into a frequency control signal and auto-adjust the UE receiver's frequency; and repeat (b)–(e) every N frames (N ≥ 1) to process the PSC on the PSCH for SCH-location determination during ICS.

Claim 7: Adds a specific combining formula to claim 1's step (e): take absolute values of the two correlations (a, b) and compute the error as 6 kHz × [(a − b) ÷ (a + b + c)], where c is a constant (used to avoid division by zero).

Claim 10: Adds power-level control to claim 1: the received input power level is adjusted prior to step (a), the input is digitized after that adjustment, and the power level is set using open-loop gain control.

Claim 13: Adds the full cell-search chain to claim 1: obtain the PSC from the ICS processing, use the PSC to extract the SSC from the received input, and use the PSC and SSC to extract a midamble portion from the received input (with dependent claims adding selection of the highest-energy midamble, the equation of claim 7, power-level/digitization, and VCO/NCO control).

Claim 22 (system-oriented variant): A method for adjusting frequency during ICS in a wireless network: (a) obtain a synchronization code from a received input containing a received sequence; (b) rotate the phase of the received sequence by a given frequency amount; (c) correlate a PSCH sequence with both the rotated and unrotated phases of the received sequence; (d) integrate the two correlations — with the AFC start-up method performed in parallel with step (a); and repeat (b)–(d) every N frames (N ≥ 1) for PSC/PSCH processing for SCH-location determination during ICS.

Notes on Sources and Uncertainty

• USPTO/Google Patents confirmation: The bibliographic data above is confirmed by the Google Patents record for US7236547B2 (fetched 2026-08-27), which also lists the full family (US7187732, US7412013, US8149963, US8385482, US20130142292) and the EP counterpart EP1540912B1.
• CAFC 2026 docket: Searches of CAFC 2026 dockets for "7236547" returned no results. I found no indication of any pending appeal, reexamination, or litigation involving this patent at the Federal Circuit in 2026. Given the patent lapsed in 2019 for non-payment of maintenance fees, post-expiry Federal Circuit activity is unlikely, but I cannot rule it out with certainty.
• The "chip-slip" and integration-limit tables (Tables 1–2) and PI-filter coefficient table (Table 3) referenced in the specification are part of the disclosure but are not claim limitations except as incorporated through the equation in claims 7 and 17.