US 6957369

I'll search for current information on US 6957369, including any CAFC 2026 docket activity.

Let me search specifically for the federal court litigation and any CAFC 2026 activity.

Let me look for the specific CAFC appeal numbers associated with this patent.

US Patent 6,957,369 — "Hidden Failure Detection"

Below is a summary grounded in the authoritative patent text you provided, supplemented by current litigation/PTAB records retrieved via search. Where the record is uncertain, I flag it.

Bibliographic data

Abstract (as issued)

A method for self-testing an electronic system having a main module and subsidiary modules connected by data lines, some of which may be idle. One idle line is selected as an "aid line," and the subsidiary module attached to it is instructed to loop back traffic it receives on that line. A second idle line is selected for testing, and a switch in the main module is configured to link the aid line to the line under test. The subsidiary module on the line under test transmits test traffic over it to the main module; if the traffic does not return within a predetermined period, a failure is reported.

Plain-language overview of the independent claims

• Claim 1 (method — the core "aid line" test). In a system where a main module with a switch connects to at least two subsidiary modules over data lines (some sometimes idle): (a) pick a first idle line to that first subsidiary module as an aid line; (b) instruct that first subsidiary module to loop back traffic reaching it on the aid line; (c) pick a second idle line to a second subsidiary module for testing; (d) configure the switch to link the two ports; (e) send test traffic from the second subsidiary module over the second idle line, where it is routed by the switch to the aid line; and (f) report a failure if the traffic doesn't come back to the second subsidiary module within a set time. In short: use one idle path as a "mirror" and shoot test traffic through the switch to it, then watch for the return.

• Claim 8 (method — testing across different module types). Where the system has multiple subsidiary modules, select first and second modules of different types that use different data formats. Instruct the first to loop back traffic from the main module; configure the main module to connect the two modules so the second module's traffic is looped back through the main module; then test by having the second module transmit test traffic in its own (second) format, and assess whether it returns intact. Key point: the loop-back module need not understand the other module's protocol.

• Claim 15 (apparatus — the aid-line version). A modular apparatus with a backplane (traces between modules), a main module with a switch plugged into it, at least first and second subsidiary modules, and a system control processor programmed to perform the claim-1 sequence: designate an idle trace as an aid trace, command loop-back there, select a second idle trace for test, configure the switch to link the ports, cause test traffic over the second idle trace (routed via the switch to the aid trace), and report failure if it does not return within a set time.

• Claim 21 (apparatus — the cross-format version). A backplane-based apparatus with a main module and multiple subsidiary modules, plus a system control processor that selects two modules of different types (different formats), causes the first to loop back traffic, configures the main module to connect them so the second module's traffic is looped back through the main module, has the second module transmit test traffic in its own format, and assesses whether it returns intact. This is the apparatus counterpart to claim 8.

Dependent claims add limitations such as: loop-back without processing the data (claims 2, 9, 16, 22); iteration over all idle lines (claims 4, 18); the modules being cards in a backplane (claims 5, 10); the switch connecting lines to a network trunk while active lines keep carrying traffic non-intrusively (claims 6–7, 11–12, 19–20, 23–24); and the different protocols being TDM vs. packet data (claims 14, 26).

Litigation and PTAB context (retrieved via search)

• District court suits filed 2022: Corrigent Corp. v. Dell Technologies et al., No. 1:22-cv-00496 (D. Del.); Corrigent Corp. v. Arista Networks, Inc., No. 1:22-cv-00497 (D. Del.); Corrigent Corp. v. Cisco Systems, Inc., No. 6:22-cv-00396 (W.D. Tex.).
• PTAB — both petitions denied institution, so no IPR was instituted on this patent:
  • IPR2023-00464 (Dell Technologies, Dell Inc., Cisco Systems) — institution denied 2023-08-30.
  • IPR2023-00837 (Arista Networks) — institution denied 2023-11-20.
• Section 101 issue: In the W.D. Tex. Cisco case, the court found the asserted claims (analyzed as claims 1 and 15) directed to an abstract idea and patent-ineligible under Alice step one/two, reasoning that the specification itself describes the recited elements (backplane, traces, modules, switch, ports, processor) as generic and conventional.
• CAFC docket — 2026 status: A Federal Circuit appeal, 25-2036, Corrigent Corp. v. Cisco Systems Inc., was docketed 2025-08-21, appealing from the W.D. Tex. (originating case 6:22-cv-00396). As of the available records it shows no decided outcome / pending judge assignment, i.e., still pending. A notice of appeal to the Federal Circuit (Docket #365 in the Cisco case) is also of record. I did not find a confirmed 2026 merits decision for this patent.
• A separate CAFC case, 25-1424, Arista Networks, Inc. v. Corrigent Corp. (docketed 2025-02-06), exists, but I cannot confirm from the retrieved records that it concerns the '369 patent specifically — it may relate to another Corrigent patent (e.g., the '431 patent). Treat that attribution as uncertain.

Uncertainty notes

• I could not retrieve the live USPTO PatentCenter/Assignment record directly; bibliographic data above is taken from the patent text you supplied and cross-checked against Google Patents/Justia and litigation documents.
• The current ownership is genuinely ambiguous on the public record: the 2022 assignment chain (NAHUM COMMUNICATION N.T.B. LTD. → CORRIGENT CORPORATION) and a 2022 Delaware/Texas complaint standing dispute (arguments over "reversionary rights" and joining Nahum/Mr. Tamir) suggest ownership/standing was contested. I cannot state with high confidence who the sole current owner is.
• The patent's stated adjusted expiration (2023-07-19) indicates the term has run; any 2026 appellate activity would be about past-infringement liability/validity rather than prospective injunctive relief.
• I found no authoritative 2026 Federal Circuit decision for US 6,957,369; appeal 25-2036 appears still pending. If you need a definitive current status, verify directly against PACER for 25-2036 and the CourtListener docket for W.D. Tex. 6:22-cv-00396.

I'll research litigation involving US patent 6957369 using the sources you specified.

Good initial results. Let me dig deeper into the outcomes and the Federal Circuit appeal.

Litigation involving U.S. Patent No. 6,957,369 ("Hidden Failure Detection")

I searched litigation-focused sources (Unified Patents portal links on the Google Patents record for this patent, CourtListener/RECAP, Justia dockets, PACER Monitor, UniCourt, Docket Alarm, PTAB/IPR records, and trade press). Below is what I could verify. Note: Google Patents' own record for US 6,957,369 lists several court dockets and PTAB proceedings as "litigation" for this family — I've confirmed and expanded each below.

District court litigation

The '369 patent was asserted alongside other Corrigent patents in each case (e.g., U.S. 7,113,485; 7,330,431; 7,593,400; 9,118,602), per the Rule 3 reports to the Commissioner of Patents filed in the dockets.

Key developments in No. 1 (Cisco, W.D. Tex.):

• Cisco moved for judgment on the pleadings under Rule 12(c) arguing the '369 and '485 claims were patent-ineligible under § 101; the court granted it without prejudice at the June 24, 2024 pretrial conference, with leave to amend (Dkt. 299).
• Corrigent filed an amended complaint (Dkt. 297, July 12, 2024).
• July 16, 2025 (Dkt. 362): The court granted Cisco's renewed motion for judgment on the amended pleadings, holding the asserted claims of the '369 patent directed to the abstract idea of "transmitting a test communication and reporting whether the communication is received," implemented with generic hardware, and lacking an inventive concept under Alice step two. Counts I and II were dismissed with prejudice.
• Feb. 10, 2025 (Dkt. 351-1): Final judgment entered for Cisco — the '369 and '485 patents held invalid; summary judgment of non-infringement on the '400 patent; JMOL of non-infringement on the '602 patent; and Corrigent voluntarily dismissed the '431 patent with prejudice. Corrigent had sought >$376M in damages; recovered $0.
• Gibson Dunn (Brian Rosenthal, Stuart Rosenberg) represented Cisco and publicized the result as a complete defense victory (Jan. 22, 2025 firm news).

Key development in No. 2 (Dell, D. Del.):

• On March 3, 2023, Judge Andrews dismissed a single claim from the litigation (D.I. 21), agreeing the claim recites the abstract idea of "measuring latency by subtraction" (Mealey's, Mar. 6, 2023). As Corrigent later recounted in briefing, the court declined to hold Claim 15 of the '369 patent abstract at Alice step one, noting the patent "claims an apparatus that performs diagnostic testing on idle traces, and it seems sufficiently specific I do not think I can say it is claiming an abstract idea."
• The court issued its claim construction (Markman) opinion on May 29, 2024 (Dkt. 103), construing terms such as "main module," "subsidiary module," "backplane," and "idle line."

PTAB (AIA) proceedings — post-grant challenges to the '369 patent

Counsel: Petitioner counsel for IPR2023-00837 was Eliot Williams (et al.); Respondent counsel for both was James Nuttall (et al.).

Federal Circuit appeal

• The Google Patents record for '369 lists a Court of Appeals for the Federal Circuit matter, Appeal No. 25-2036 (Unified Patents litigation link). Given the timing (2025) and the W.D. Tex. final judgment against Corrigent, this is most plausibly Corrigent's appeal of the Cisco judgment, but I could not verify the parties, docketed issues, or briefing status — my search budget for this item was exhausted. Treat this entry as unconfirmed.

Caveats and items I could not verify

1. Current status of the two Delaware cases (Dell and Arista): I found the claim construction opinion and IPR activity, but not a final judgment, settlement, or transfer of the '369 claims. They appear to have been pending as of the most recent records I retrieved. If you need the current docket status, PACER for D. Del. 1:22-cv-00496 and 1:22-cv-00497 would be required.
2. The CAFC 25-2036 appeal (item above) is unconfirmed as to parties and posture.
3. A database summary source (studicata.com) labels the Dell claim construction as "United States Court of Appeals, Third Circuit (2024)." That label appears to be an error — the underlying opinion is Judge Andrews' District of Delaware Markman opinion (D. Del. 1:22-cv-00496, Dkt. 103, May 29, 2024), and patent appeals from D. Del. would go to the Federal Circuit, not the Third Circuit. I flag this rather than propagate it.
4. Owners/parties changed over time: Orckit Corrigent Ltd. → Orckit IP, LLC → Nahum Communication N.T.B. Ltd. → Corrigent Corporation (assignment recorded Apr. 14, 2022, effective Mar. 14, 2022). Standing/ownership was actively litigated in the Cisco case (Cisco's motion for summary judgment that Corrigent lacked standing was denied; Corrigent's motion on ownership was granted), which is why "Corrigent Corporation" appears as plaintiff.

I need to reconcile a direct contradiction before drafting: the structured block says "no PTAB activity on file," but the authoritative patent text explicitly lists two PTAB cases (IPR2023-00464 and IPR2023-00837, both "Not Instituted - Merits"), and the prior sections confirm both were denied institution. Let me search to fill in claim-level detail, panels, and any appeals.

Now let me confirm the challenged claims in the Dell/Cisco IPR and whether either institution denial was appealed.

PTAB Analysis — U.S. Patent No. 6,957,369 ("Hidden Failure Detection")

⚠️ Data-contradiction flag (read first)

The structured "PTAB proceedings on file" block supplied with this task states that the USPTO ODP API returns no AIA trial proceedings for this patent and instructs me to default to "no PTAB activity on file." That is wrong for this patent.

The authoritative patent record provided in the prompt itself lists two PTAB matters, and they are corroborated by the PTAB/IPVerse/Patexia/PTACTS sources retrieved by search:

• Google Patents / USPTO record (https://patents.google.com/patent/US6957369/en): "PTAB case IPR2023-00837 filed (Not Instituted - Merits)" and "PTAB case IPR2023-00464 filed (Not Instituted - Merits)."
• PTACTS legal events in the same record: 2023-04-25 — TRIAL NO. IPR2023-00464, Opponent DELL TECHNOLOGIES, INC., DELL, INC., AND CISCO SYSTEMS, INC.; 2023-07-11 — TRIAL NO. IPR2023-00837, Opponent ARISTA NETWORKS, INC.

Per the operating rule that the patent text is authoritative over conflicting data, I treat the two proceedings below as real and on file, and I flag the ODP-ingest gap as a data-quality failure rather than a true absence of PTAB activity. (This is a "silent" failure of the kind the '369 patent itself is about.) I am not inventing proceeding numbers — both were retrieved from multiple independent sources.

Proceedings overview

Total AIA proceedings on U.S. 6,957,369: 2 — both Inter Partes Reviews, and both were denied institution at the threshold, so there is no Final Written Decision on any claim. Breakdown: 0 active · 0 claims invalidated · 0 claims sustained (no merits ruling ever issued) · 0 settled · 2 institution-denied.

Bottom-line defensive posture: This is a "patent survived, but un-hardened" situation. The patent emerged from PTAB completely intact — claims 1–26 were never cancelled or even construed on the merits, and the Board twice found Petitioners failed to show a reasonable likelihood of prevailing. So a defendant cannot say "claims are dead." But it is equally true that no claim was ever sustained after a full trial, and because § 315(e)(2) estoppel attaches only after a final written decision, none of the Petitioners' art is locked out — every ground (Ke, Lewis, Cook, Sarkinen) remains re-runnable in district court. The practical read: an IPR is now the hardest path against this patent (twice-attempted and twice rejected), while a § 101 / Alice challenge is the live lever, as the parallel W.D. Tex. litigation shows.

IPR2023-00464 — Dell Technologies Inc., Dell Inc., and Cisco Systems, Inc. v. Corrigent Corporation

• Type: Inter Partes Review (35 U.S.C. §§ 311–319).

• Filed: 2023-01-19 (proceeding filing date per PTAB/IPVerse; the petition paper is docketed 2023-01-23).

• Status: "Not Instituted - Merits" (Google Patents verbatim) / "Institution Denied" (IPVerse verbatim). Plain-English gloss: the Board considered the petition and refused to open trial on the merits.

• Judge panel: Nathan A. Engels (writing), Kristen L. Droesch, Brent M. Dougal. (Panel composition for this docket per Patexia/IPVerse case records.)

• Petition grounds (§ 103 obviousness only — no anticipation and no § 112 challenge was raised):

  Ground	Reference(s)	Claims challenged
  1	Ke (U.S. 5,841,788) in view of Lewis (U.S. 4,685,102)	1–26
  2	Ke + Lewis + Sarkinen (U.S. Pub. 2003/0101426)	3, 6, 8, 13, 14, 17, 21, 25, 26
  3	Cook (U.S. 4,074,352) in view of Lewis	1–26
  4	Cook + Lewis + Sarkinen	3, 6, 8, 13, 14, 17, 21, 25, 26

  (Ground-to-claim mapping is drawn verbatim from Cisco's own stipulation filed in the parallel litigation, PTACTS exhibit; it matches the four grounds Corrigent's expert described.)

• Institution decision: Denied — 2023-08-30. The panel sided with Patent Owner: it "agree[d] with [Corrigent] that Petitioner has not shown adequate reasons for combining Ke and Lewis with reasonable expectation of success," and that "particularly in light of the teachings of Ke, Petitioner employs improper hindsight." It reached the same conclusion on Cook–Lewis ("Petitioner has not adequately explained reasons for combining Cook and Lewis… improper hindsight"). Corrigent's expert summarized the decision as finding the POSA would not have been motivated to combine backplane testing in Ke (which tests one board at a time with the other boards disabled) with the loopback testing of Lewis — i.e., Ke effectively teaches away from the claimed cross-module loopback. (Patent Owner's characterizations are from Corrigent's briefs, not the Board text; the underlying decision is IPR2023-00464, Paper 19.)

• Final Written Decision: None. No FWD ever issued — no claim was cancelled and no claim was sustained. Because institution was denied, the Board never reached a final written decision, so no claim-level validity determination exists from this proceeding.

• Settlement / termination: No settlement. The proceeding terminated on the institution denial; Petitioners' fee refund was requested 2023-12-11 and approved 2023-12-15.

• Appeal: None, and none is possible. A denial of institution is final and non-appealable under 35 U.S.C. § 314(d). No notice of appeal, request for Director Review, or rehearing is of record. (Corrigent's later CAFC appeal in the district-court case — see below — is not an appeal of this IPR.)

• Defensive value: This is the more significant loss for defendants. The Board, on the merits standard, found the best two- and three-reference § 103 combinations failed the "reason to combine" element. Any defendant planning an IPR around Ke and/or Cook should expect the same reception — the panel identified hindsight and no reasonable expectation of success as the fatal defects, and those are curable only with materially new evidence and art.

IPR2023-00837 — Arista Networks, Inc. v. Corrigent Corporation

• Type: Inter Partes Review.
• Filed: 2023-04-18.
• Status: "Not Instituted - Merits" (Google Patents verbatim) / "Institution Denied" (IPVerse verbatim).
• Judge panel: Nathan A. Engels (writing), Kristen L. Droesch, Brent M. Dougal — the same panel as IPR2023-00464.
• Petition grounds (§ 103 obviousness): A near-verbatim copy of the Dell/Cisco petition — the same four grounds and references against the same claims 1–26: (1) Ke–Lewis; (2) Ke–Lewis–Sarkinen; (3) Cook–Lewis; (4) Cook–Lewis–Sarkinen. Corrigent's preliminary response (PTACTS) expressly argued the petitions were "nearly identical," and Arista itself proposed joinder with the Dell/Cisco proceeding, offering to let Dell's counsel lead on overlapping issues.
• Institution decision: Denied — 2023-11-20. The Board declined to institute this follow-on/duplicative petition — it would have been pointless to move to trial against claims the Board had already refused to institute on in IPR2023-00464. (Corrigent's framing: "[t]he denial of institution is the natural consequence that Petitioner must face for attempting to replicate the earlier Dell-Cisco IPR without addressing the deficiencies identified therein.")
• Final Written Decision: None — no claim cancelled, none sustained.
• Settlement / termination: No settlement. Arista's request for a refund of the post-institution fee was approved 2024-01-31.
• Appeal: None — non-appealable institution denial under § 314(d).
• Defensive value: A cautionary tale for serial/copycat petitioning. A second petitioner running the same art on the same claims after a first denial will likely be denied. There is no estoppel benefit to a defendant from this docket, but also no adverse claim ruling.

Strategic summary

Claim-status map (what the PTAB has actually done to U.S. 6,957,369). Nothing. All 26 claims — independent claims 1, 8, 15, 21 and every dependent claim — remain in force and were never cancelled, narrowed, or cancelled-by-disclaimer in any AIA proceeding. Unlike the common pattern where an IPR trims the claim set, here the PTAB produced no merits record at all: institution was denied twice (§ 314(a) "reasonable likelihood" standard, a low bar Petitioners still missed). So the patent is best described as PTAB-untested, not PTAB-hardened. A defendant cannot point to a cancelled claim; conversely, an assertion built on claim 1 is not "sanction-bait," because no tribunal has killed it. Note also, from the patent record itself, the term has expired (adjusted expiration 2023-07-19), so the exposure is past damages only — the whole fight is retrospective.

Estoppel landscape. Because no IPR was instituted, § 315(e)(2) estoppel never attached. There is no statutory bar preventing the Dell/Cisco/Arista group (or anyone) from raising Ke, Lewis, Cook, or Sarkinen — or any other art — in district court. Two nuances matter: (a) in the W.D. Tex. case Cisco stipulated it would drop Ke/Lewis/Cook/Sarkinen in litigation only if the PTAB instituted; institution was denied, so Cisco expressly reserved the right to assert "any grounds or claims on which the Board declines to institute," and the art was preserved (that case has since been resolved on § 101, not § 103); and (b) for a new defendant today, the full prior-art universe is open, but IPR timing is a real risk — this patent issued 2005-10-18, and the Office's post-Dabico/"settled expectations" practice (as reflected in the 2025 PTAB workload memos and the In re Google mandamus briefing) now disfavors institution on long-expired patents, which is a second, independent reason a fresh IPR would likely fail here.

Pattern signals. (1) Two petitions, one art set — Dell/Cisco filed first (2023-01-19), Arista filed a near-clone two months later and offered to join; the Board denied both, treating the second as duplicative. (2) No defensive aggregator. Unlike many asserted patents, the PTAB challenges here came from named litigation defendants (Dell, Cisco, Arista), not from Unified Patents or another RPX-style aggregator — notwithstanding that Unified's portal hosts the litigation links. (3) Patent owner plays hard and cooperates across dockets. Corrigent filed a substantive preliminary response in each IPR (with extensive § 314(a)/Fintiv and General Plastic arguments) and consistently pressed the parallel-litigation claim construction (the W.D. Tex. "order of steps" construction it obtained from Cisco's own proposal) as a threshold defect in the petitions. (4) The claims also face a § 101 attack (§ 101/Alice held invalid in W.D. Tex.), which is the more consequential front — see below.

Recommended next steps

• If you are a defendant being asserted against today, do not plan on an IPR. Both PTAB challenges failed at institution on the merits (IPR2023-00464, Paper 19, denying institution 2023-08-30; IPR2023-00837, denying institution 2023-11-20). A third petition would face the same "reason to combine / hindsight" problem plus the Office's settled-expectations practice for a patent that expired in 2023. If you nonetheless file, expect a General Plastic/Fintiv fight and budget for materially new art — not Ke, Lewis, Cook, or Sarkinen.
• Lead with § 101 and invalidity outside the IPR grounds, not § 103. The companion 6:22-cv-00396 (W.D. Tex.) proceeding ended with the asserted '369 claims held patent-ineligible and other Corrigent patents disposed of (non-infringement), with final judgment for Cisco and $0 to Corrigent. Appeal: CAFC 25-2036, Corrigent Corp. v. Cisco Systems Inc., docketed 2025-08-21, from W.D. Tex. 6:22-cv-00396 — currently pending as of the available records (no merits disposition located). ⚠️ Cross-reference flag: the previously generated litigation section gives both a "2025-02-10 final judgment" and a "2025-07-16 renewed Rule 12(c) § 101 grant (Dkt. 362)"; those dates are not obviously reconcilable, so verify the operative date via PACER for 6:22-cv-00396 before relying on it. The § 101 ruling is the single most valuable defensive precedent available against this patent.
• Reconcile the dockets before you rely on "no prior adjudication." Both Delaware cases (Corrigent v. Dell, 1:22-cv-00496; Corrigent v. Arista, 1:22-cv-00497) went through Markman (D. Del. Dkt. 103, 2024-05-29, Judge Andrews), and Judge Andrews's earlier order in the Dell case declined to find claim 15 abstract at Alice step one (D.I. 21, 2023-03-03) — i.e., there is a split between W.D. Tex. (ineligible) and D. Del. (eligible, at least for claim 15). That split is itself a defense asset/liability depending on your forum. Confirm current status of both D. Del. cases via PACER.
• Since no FWD issued, negative claim limitations of § 315(e)(2) estoppel do not bind anyone — meaning the full prior-art record remains available to you, and equally available to the patent owner's next targets. There is no PTAB "safe harbor."
• Portal links for verification: PTAB proceedings at https://portal.unifiedpatents.com/ptab/case/IPR2023-00464 and https://portal.unifiedpatents.com/ptab/case/IPR2023-00837; institution decisions and all papers via USPTO PTAB E2E/PTACTS (search proceeding numbers IPR2023-00464 and IPR2023-00837); appellate docket via CourtListener/PACER for Fed. Cir. 25-2036.

Bottom line for a defendant: the PTAB offers you nothing affirmative on the '369 patent — two defendants tried, and both petitions died at the door, on the merits, with no estoppel and no cancelled claims to show for it. Your realistic paths are (1) § 101, riding the W.D. Tex. ineligibility judgment now on appeal at CAFC 25-2036, and (2) any § 103 art materially different from Ke/Lewis/Cook/Sarkinen, since those four references have now been twice rejected by the Board as an obviousness combination.

I'll research the assignment chain, recorded correspondents, and NPE-directory entries for US 6,957,369.

Useful — I found the Orckit assignment pattern. Let me search for the specific reel/frames on this patent and the recorded correspondents.

Key finding: Richard A. Baker, Jr. was the correspondent on Orckit-related recordings. Let me verify whether he ran this patent's chain and check other links.

Assignment-record reconstruction — US 6,957,369 B2 ("Hidden Failure Detection")

Source note. The reel/frame numbers below are taken from the Legal Events table on the authoritative Google Patents record you supplied (which mirrors the USPTO Assignment Center / Patent Assignment Search data). I was able to corroborate parts of the chain against RPX/Unified Patents litigation documents, PTAB filings, and sibling Orckit-family records surfaced via search. I could not open the Assignment Center UI/API directly, and my search budget was exhausted before I could retrieve the correspondent field for every frame. Where a correspondent is unverified I say so rather than guess. Verify at: https://assignmentcenter.uspto.gov/ (search patent number 6957369).

Inventors

Pattern check — inventor departure / fire-sale precursor: Not present / not determinable. The only date in the record is the inventors' assignment, executed 2002-05-19 (11 days before the 2002-05-30 filing). There is no recorded inventor-to-third-party assignment, no re-assignment by the inventors after filing, and no evidence in the retrieved materials of either inventor leaving the assignee within 12 months. Bruckman's name recurs on later Orckit/Corrigent filings, which argues against an early-departure pattern. I found no evidence to support either conclusion beyond the absence of contrary records.

Original assignee

Corrigent Systems Ltd. (Israel), recorded as assignee on Reel 012954/0104 (executed 2002-05-19, recorded 2002-05-30). Note: Google Patents' header also renders the original assignee as "Orckit Corrigent Ltd"; the recorded assignment document names CORRIGENT SYSTEMS LTD., and that entity is the chain's starting point. The two names resolve later in the chain via a Change of Name (Reel 032579/0201).

• Primary line of business: telecom access and transport equipment — ADSL access systems (market leader, ~1990–2000) and, from ~2000, Ethernet switching / packet transport for carrier networks. Affiliated with / dual-branded with Orckit Communications Ltd. (founded 1990 by Izhak Tamir; Nasdaq-listed 1996). In the W.D. Tex. complaint Corrigent pleads the entity as "Corrigent-Systems Ltd. (a.k.a. Orckit Communications Ltd.)," citing telco customers including Deutsche Telekom and KDDI.
• Did it ship a product embodying the claims? Yes — the claims are directed at the company's own backplane-based modular product architecture (main module + line cards plugged into a backplane with switch ports and backplane traces). The complaint asserts telecom-product sales exceeding $500M and a KDDI deployment of 2,000+ Corrigent Ethernet switch units as early as 2005. This is a genuine operating-company origin, not a paper entity.
• Current status: Wound down / ceased as an operating business. Distress markers are in the assignment record itself — an IP security agreement to a distressed-IP lender in 2013 (Reel 030033/0774), then a wholesale transfer of the portfolio to a Delaware IP-holding LLC in 2016 (Reel 038541/0984). Orckit Communications was delisted from Nasdaq. I did not find evidence of a Chapter 7/11 filing, so treat "wound down / asset-sold" as the supportable characterization rather than "in bankruptcy."

Assignment timeline

Seven recorded events. All reel/frame values are as they appear on the patent's legal-events record.

1. 2002-05-19 (executed) / recorded 2002-05-30 — Reel 012954/0104

   • Conveyance: Assignment of assignors' interest
   • Assignor: Bruckman, Leon; Ilan, Shmuel
   • Assignee: Corrigent Systems Ltd. (Israel)
   • Correspondent: Not retrieved (search budget exhausted before the Correspondent field could be confirmed)
   • Context: Initial inventor→company assignment, executed 11 days pre-filing; ordinary in-house capture of employee inventions.

2. 2013-03-18 (executed) / recorded 2013-03-18 — Reel 030033/0774

   • Conveyance: Security Agreement
   • Assignor: Orckit-Corrigent Ltd.
   • Assignee / secured party: Hudson Bay IP Opportunities Master Fund, LP (New York)
   • Correspondent: Not retrieved
   • Context: Securitization — the company pledged its patent estate as collateral for financing; a distressed-IP lending structure, not a title transfer. (The sibling Orckit patent US 6,680,904 recorded the same transaction at a different reel — 030034/0366 — indicating separate per-batch recordings, not one master.)

3. 2013-07-23 (executed) / recorded 2013-07-26 — Reel 030887/0983

   • Conveyance: Release by Secured Party
   • Assignor: Hudson Bay IP Opportunities Master Fund LP
   • Assignee: Orckit-Corrigent Ltd.
   • Correspondent: Not retrieved
   • Context: Collateral released back to the borrower four months later — the pledge was extinguished, not foreclosed. (Sibling '904 patent: Reel 030885/0117.)

4. Effective 2009-09-06 (executed) / recorded 2014-04-01 — Reel 032579/0201

   • Conveyance: Change of Name
   • Assignor: Corrigent Systems Ltd.
   • Assignee: Orckit-Corrigent Ltd.
   • Correspondent: Not retrieved
   • Context: Change of name only — a housekeeping recording delayed ~4.5 years after the 2009 name change. Adds no new owner.

5. 2016-04-25 (executed) / recorded 2016-05-11 — Reel 038541/0984

   • Conveyance: Assignment of Assignors' Interest
   • Assignors: Corrigent Systems Ltd.; Orckit Communication Ltd.; Orckit-Corrigent Ltd. (all three operating entities)
   • Assignee: Orckit IP, LLC (Delaware; address of record variously Newton, MA 02459-1840, "DE LLC # 5896551", and later 874 Walker Road, Suite C, Dover, Delaware)
   • Correspondent: Not retrieved for this frame, but a 37 CFR 3.73(b) Statement filed 2016-06-06 for this same Reel 038541/0984 in the Orckit portfolio names Yehuda Binder as the authorized signatory for Orckit IP LLC. Note the address pattern: a Delaware LLC at a commercial registered-agent address with a Massachusetts correspondence address.
   • Context: Shell-entity / monetization transfer. The entire Orckit portfolio leaves the operating companies and lands in a single-purpose "IP" LLC. Reel 038541/0984 is a portfolio-wide master assignment — the identical reel/frame appears in the chain of title of sibling patents (e.g., US 6,680,904), confirming one bulk record covering many patents rather than a per-patent document.

6. 2021-12-31 (executed) / recorded 2022-04-14 — Reel 059596/0727

   • Conveyance: Assignment of Assignors' Interest
   • Assignor: Orckit IP, LLC
   • Assignee: Nahum Communication N.T.B. Ltd. (Ramat Gan, Israel)
   • Correspondent: Not retrieved for this frame. Portfolio-level recurrence: the analogous Nahum↔Orckit IP recordings in the same family were handled by correspondent Richard A. Baker, Jr., 291 Main Street, West Newbury, MA 01985 (see Reel 060544/0799). Flagged as a probable repeat correspondent on this chain — frame-level confirmation pending.
   • Context: Transfer to a holding vehicle. Title moves offshore to an entity that is not a product company and holds for ~10 weeks.

7. 2022-03-14 (executed) / recorded 2022-04-14 — Reel 059596/0852

   • Conveyance: Assignment of Assignors' Interest
   • Assignor: Nahum Communication N.T.B. Ltd.
   • Assignee: Corrigent Corporation (Massachusetts) — the plaintiff in all three 2022 suits
   • Correspondent: Not retrieved for this frame. Same reel as entry 6 (059596, frames 0727 and 0852), i.e., both transfers recorded the same day, 2022-04-14, five days before the first complaints were filed (2022-04-19).
   • Context: Transfer-to-asserter. The chain is arranged so that a New England entity with a clean, freshly-recorded chain of title brings suit against Cisco, Dell, and Arista.

Adjacent finding (flagged, not part of this chain): Sibling Orckit-family patent US 6,680,904 shows an additional hop through Blackbird Tech LLC (out 2018-04-26, Reel 045708/0435; back to Orckit IP 2019-01-09, Reel 048067/0604) — i.e., a known NPE appears in the family even though no Blackbird recording exists on the '369 patent. That sibling record also shows a return of title from Nahum back to Orckit IP (Reel 060544/0799), which is consistent with the "reversionary rights" dispute litigated in the Cisco case. Chain-of-title across this family is genuinely messy and inconsistent per patent.

Timeline diagram

timeline
    title Ownership of US 6957369
    2002 : Inventors assign to Corrigent Systems Ltd
    2005 : US 6957369 issues
    2013 : IP pledged to Hudson Bay IP fund
         : Released back to Orckit Corrigent Ltd
    2014 : Change of name to Orckit Corrigent Ltd
    2016 : Portfolio assigned to Orckit IP LLC
    2021 : Orckit IP assigns to Nahum
    2022 : Nahum assigns to Corrigent Corporation
         : First suits vs Cisco Dell Arista
    2023 : Patent term expires
    2025 : Cisco wins final judgment in Waco
         : CAFC appeal 25-2036 docketed

NPE / troll-pattern signals

1. Shell-entity transfer — PRESENT. The estate moves from three operating companies to Orckit IP, LLC at Reel 038541/0984 (executed 2016-04-25). Supporting tells: "IP" suffix in the LLC name; Delaware LLC ("DE LLC # 5896551") with a registered-agent-style address at 874 Walker Road, Suite C, Dover, Delaware; no products in commerce under that name; a single portfolio-wide master assignment rather than a targeted purchase; and the assignee's correspondence address migrating Newton MA → West Newbury MA. A second non-operating hop follows to Nahum Communication N.T.B. Ltd. (Reel 059596/0727) and a third to Corrigent Corporation (Reel 059596/0852), neither of which ships product.

2. Known asserter in the chain — PRESENT (with qualification). The terminal assignee, Corrigent Corporation, is not on the classic named NPE lists (Acacia, Marathon, IV, Wi-LAN, Conversant, Vringo, etc.). It is treated as a high-frequency plaintiff by the ecosystem: it filed three simultaneous district-court suits on 2022-04-19 (D. Del. 1:22-cv-00496 and -00497; W.D. Tex. 6:22-cv-00396) asserting five patents including this one; Unified Patents challenged the family at the PTAB (IPR2023-00464 by Dell/Cisco; IPR2023-00837 by Arista); and the family is flagged in Darts-IP's global litigation dataset ("First worldwide family litigation filed"). Claim construction issued 2024-05-29 in Delaware, and Waco entered judgment against Corrigent in 2025. I would call Corrigent Corporation an assertion vehicle, but I am not asserting it appears on a published RPX/Unified NPE roster without seeing that roster.

3. Repeat correspondent across the chain — UNCLEAR (portfolio-level recurrence shown; frame-level unverified). The correspondent I could actually retrieve for the Orckit/Nahum recordings is Richard A. Baker, Jr., 291 Main Street, West Newbury, MA 01985, on Reel 060544/0799 — a sibling patent's Nahum→Orckit IP recording, executed 2022-06-15, in which the same Massachusetts street address doubles as the Orckit IP correspondence address. That is precisely the "the LLC names change, the lawyer doesn't" fingerprint the task describes — but I could not confirm Baker as correspondent on the specific frames for this patent (012954/0104, 030033/0774, 030887/0983, 032579/0201, 038541/0984, 059596/0727, 059596/0852) before my search budget ran out. Treat as a strong lead requiring Assignment Center confirmation, not as an established finding. Also of record: Yehuda Binder signed the 2016 3.73(b) statement for Orckit IP LLC — signatory, not confirmed correspondent.

4. Cascading transfers — PRESENT. Consecutive transfers land inside a tight window: 2021-12-31 Orckit IP → Nahum, then 2022-03-14 Nahum → Corrigent Corporation, both recorded on a single day (2022-04-14) on the same reel (059596, frames 0727 and 0852). Two title hops in ~10 weeks, recorded together, into an entity that begins filing suits five days later. Across the whole chain, the patent changes hands four times in ten years (2013 pledge, 2016 LLC, 2021 Nahum, 2022 Corrigent).

5. Pre-litigation transfer — PRESENT. The final assignment was executed 2022-03-14 and the first infringement complaints were filed 2022-04-19 — a 36-day gap (executed→suit). Less than six months, and the record was deliberately perfected five days before filing (recorded 2022-04-14). Standing was then actively contested in the Cisco case (Cisco moved for summary judgment of no standing; the court denied it and Corrigent prevailed on ownership), which confirms the transfers were arranged with an eye to a clean, suable title record.

6. Bankruptcy fire-sale — UNCLEAR / NOT ESTABLISHED. No Chapter 7 or Chapter 11 proceeding for the original assignee appears in the retrieved record, so I will not assert a Kodak/Nortel-style bankruptcy sale. There are distress markers: the 2013 IP security agreement to Hudson Bay IP Opportunities Master Fund, LP (Reel 030033/0774), a fund associated with distressed-IP lending; Nasdaq delisting of the Orckit entity; and the eventual 2016 exit of the entire portfolio from the operating companies. That is financial distress and asset monetization — not a proven court-supervised fire sale.

7. Privateering — UNCLEAR. The originator (Corrigent Systems / Orckit-Corrigent) ceased to be a going concern before the assertions began, so the classic "operating company funds an NPE to hit competitors while continuing to compete" fact pattern is not made out on this record. What is documented is a portfolio monetization by successor holders. If the reversionary-rights and transfer documentation produced in the Cisco litigation shows the original principals retained an economic interest, that would tip this to "present," but I cannot verify that from the assignment record alone.

8. Defensive aggregator (anti-NPE) — NOT PRESENT. The chain terminates at Corrigent Corporation, an asserter. There is no RPX, AST, LOT Network, Unified Patents, or OIN link anywhere in the recorded chain for this patent. The patent was not neutralized; it was asserted. (Unified Patents appears here only as an IPR petitioner/defender, not as an assignee.)

Verdict

NPE — high confidence.

Three independent strong signals are documented on the face of the assignment record. First, shell-entity transfer: the estate leaves the operating companies for Orckit IP, LLC at Reel 038541/0984 (executed 2016-04-25) — a Delaware LLC with an "IP" name, a Dover registered-agent address, a portfolio-wide master assignment, and no products. Second, cascading transfers: Orckit IP → Nahum Communication N.T.B. Ltd. (Reel 059596/0727, executed 2021-12-31) → Corrigent Corporation (Reel 059596/0852, executed 2022-03-14), both recorded together on 2022-04-14. Third, pre-litigation transfer: the final assignment was executed 36 days and recorded 5 days before the first complaints (2022-04-19, D. Del. 1:22-cv-00496/-00497 and W.D. Tex. 6:22-cv-00396). The originator was a real operating company that shipped the claimed architecture — this is a genuine operating-company invention later converted into an assertion asset, not a troll from birth; but the current holder is a non-practicing asserter, and the record shows the chain was constructed to set up suit. Two items limit precision and should be closed out before this is relied on: the correspondent fields for this patent's seven frames (lead: Richard A. Baker, Jr., 291 Main St., West Newbury, MA — confirmed on sibling Reel 060544/0799) and the current ownership/standing position after the 2025 Waco judgment and the pending CAFC appeal 25-2036.

Verify the reel/frame entries above at https://assignmentcenter.uspto.gov/ by searching patent number 6957369 (or by reel/frame).

I'll ground the prior-art analysis by verifying the key cited references against current public records.

Key finding: the prosecution history shows the Examiner made § 102 rejections over a reference not listed on the patent face. Let me verify that and the remaining cited references.

Preliminary notes on method and scope

Two ground rules I'm applying, because they change the answer materially:

1. "The patent citations for 6957369" = the 13 references listed under Patent Citations on the face of US 6,957,369 B2. I searched these and cross-checked them against the prosecution history and the (denied) IPR petitions. All 13 are reproduced in the authoritative text you supplied; I did not "round" the numbers.
2. § 102 requires a single reference disclosing every claimed element as arranged in the claim. Most of the 13 references teach one or two elements (backplane testing, serial test-data return, switch fabrics). I flag below which ones are genuine § 102 candidates versus § 103 combination material — I will not manufacture anticipations that the record does not support.

Important convergence I found: the two references the Examiner actually used in a § 102/§ 103 rejection during prosecution — US 6,028,845 (Serikawa) and US 5,541,862 (Bright) — are both already on the face of the patent. That is the single most important prior-art fact for this patent, and it is grounded in the prosecution history reproduced in the Dell/Cisco IPR petition (petition artifact on PTAB PTABCTS, which states the Examiner rejected claims 1–4, 6–9, 11–14 as anticipated by US 6,028,845 "Serikawa" and over Serikawa in view of US 5,541,862 "Bright").

The 13 cited references — citation, dates, description, and § 102 mapping

Tier 1 — Genuine § 102 / closest prior art

1. US 6,028,845 A — "Communication-line-quality measuring system using a conventional signal frame structure"

• Full citation: U.S. Patent No. 6,028,845 (Serikawa), assigned to Fujitsu Limited. Filed/priority 1996-02-21; issued 2000-02-22.
• Description: Measures communication-line quality using a conventional signal-frame structure — i.e., line test/quality measurement over a framed communication link.
• § 102 assessment (strongest candidate): This is the reference the Examiner relied on for anticipation. Per the prosecution history, claims 1–4, 6–9, and 11–14 were rejected as anticipated by Serikawa (and alternatively as obvious over Serikawa + Bright). This is the only true § 102 event in the file. Applicants overcame it only by amending claim 1 to add "…wherein the test traffic is conveyed via the switch to the aid line connecting to the first subsidiary module" and arguing the art lacked a loop-back test via a switch. So: Serikawa anticipates the pre-amendment claims 1–4 and 6–9; after the amendment it no longer reads on issued claims 1–4 (the added switch-conveyance limitation is absent), and claims 6–9 inherit that limitation via dependency. Claims 11–14 were also rejected over Serikawa but are claim-8 dependents in the issued patent — again cured by the amendment.

2. WO 01/93499 A1 — "Non intrusive self test capability in the UTOPIA level two bus"

• Full citation: PCT Publication WO 01/93499 A1 (also published as WO 01/93499 A8), applicant ADC Telecommunications Israel Ltd., PCT/IB2001/000950; priority 2000-05-31 (US 09/584,577), published 2001-12-06.
• Description: ATM switch/multiplexer architecture with an ATM-layer device (the switch) and multiple physical-layer devices coupled by a UTOPIA Level-2 bus; a dedicated self-test circuit coupled to the bus loops ATM cells back from the ATM-layer device through a dedicated virtual circuit, providing non-intrusive self-test without additional wires/bandwidth.
• § 102 assessment: This is the closest conceptual reference and is the one the applicants themselves admitted and incorporated by reference in the '369 background. It discloses a switch, physical-layer devices, and non-intrusive loop-back self-testing — but it lacks the '369 scheme of (a) selecting an idle line as an "aid line," (b) a cross-connect within the switch linking two different subsidiary ports, and (c) a subsidiary module that loops back pass-through traffic regardless of its data format. Accordingly it does not anticipate issued claims 1, 8, 15, or 21 on its own; it is the strongest § 103 primary reference. (Google Patents' WO 01/93499 record lists US 6,957,369 among "Families Citing this family," confirming the citation link.)

Tier 2 — Teach one or more elements; § 103 material, not anticipating

3. US 5,841,788 A — "Methods for backplane interconnect testing"

• Full citation: U.S. Patent No. 5,841,788 ("Ke"), assigned to Lucent Technologies Inc. Filed 1996-10-18; issued 1998-11-24.
• Description: Boundary-scan backplane testing: test vectors applied to individual circuit boards while remaining boards are disabled, observing receiver signals on all boards to identify backplane faults (open/shorted traces, bent pins).
• § 102 assessment: Teaches backplane-interconnect fault detection, but by disabling boards — the opposite of non-intrusive testing while active traffic continues. No idle-line aid-line, no switch cross-connect, no subsidiary loop-back of foreign-format traffic, no timeout reporting. Does not anticipate any issued claim. Prime § 103 reference (relied on by the IPR petitioner for the backplane/fault-detection teachings).

4. US 5,627,842 A — "Architecture for system-wide standardized intra-module and inter-module fault testing"

• Full citation: U.S. Patent No. 5,627,842, assigned to Digital Equipment Corporation. Filed 1993-01-21; issued 1997-05-06.
• Description: Standardized system-wide test architecture spanning both intra-module and inter-module fault testing.
• § 102 assessment: Discloses the general notion of a uniform inter-module testing regime, but nothing about idle lines, aid lines, switch cross-connection, or loop-back via a receiving module. Not anticipatory; § 103 material for "testing across modules."

5. US 6,122,756 A — "High availability computer system and methods related thereto"

• Full citation: U.S. Patent No. 6,122,756, assigned to Data General Corporation, inventors Baxter et al. PCT filed 1996-08-14 (priority 1995-08-14, provisional 60/002,320); issued 2000-09-19.
• Description: Backplane with a communication bus and a diagnostic bus; motherboards with scan chains; an applications program automatically tests functionalities and interconnections, automatically determines faulted components, and functionally removes them; redundant clocking.
• § 102 assessment: Discloses automated backplane-level diagnostics and fault reporting/removal, but not the '369's idle-line "aid line," switch port cross-connect, or the loop-back-by-a-module that does not process the data. Not anticipatory; solid § 103 reference for automated diagnostics + fault reporting on a backplane.

6. US 5,132,635 A — "Serial testing of removable circuit boards on a backplane bus"

• Full citation: U.S. Patent No. 5,132,635 (Kennedy), assigned to AST Research, Inc. Filed 1991-03-05; issued 1992-07-21.
• Description: Daisy-chained IEEE 1149.1 (JTAG) boundary-scan testing of removable PCBs on a backplane bus; serial test data propagated board-to-board with a common return line; a pattern comparator detects malfunctioning components.
• § 102 assessment: Discloses sending test data onto a backplane and detecting an unexpected return (a return-path failure signal). But no idle-line selection, no switch cross-connect, no aid line, and it tests boards in a disabled/scan mode rather than non-intrusively over idle data lines. Not anticipatory; § 103 background.

7. US 5,574,730 A — "Bussed test access port interface and method for testing and controlling system logic boards"

• Full citation: U.S. Patent No. 5,574,730, assigned to Unisys Corporation. Filed 1995-01-31; issued 1996-11-12.
• Description: A bussed test-access-port interface for testing/controlling system logic boards.
• § 102 assessment: Board-level test access over a bus; lacking the idle-line/switch-cross-connect/loop-back combination. Not anticipatory; § 103 material.

Tier 3 — Peripheral/background; not § 102, weak § 103

8. US 5,541,862 A — "Emulator and digital signal analyzer" (the "Bright" reference)

• Full citation: U.S. Patent No. 5,541,862, assigned to Wandel & Goltermann ATE Systems Ltd. Filed 1994-04-28; issued 1996-07-30.
• Description: Emulator/digital signal analyzer for testing communication equipment.
• § 102 assessment: Not anticipatory alone. This is the secondary reference the Examiner combined with Serikawa; it is relevant only as a § 103 teaching source (analyzer/emulator test signaling).

9. US 5,420,985 A — "Bus arbiter system and method utilizing hardware and software which is capable of operation in distributed mode or central mode"

• Full citation: U.S. Patent No. 5,420,985, assigned to Texas Instruments Inc. Filed 1992-07-28; issued 1995-05-30.
• Description: Bus arbitration operable in distributed or central mode.
• § 102 assessment: Generic backplane control/arbitration. Does not anticipate any claim; minimal § 103 value (central vs. distributed control).

10. US 5,327,435 A — "Method for testing a processor module in a computer system"

• Full citation: U.S. Patent No. 5,327,435, assigned to Digital Equipment Corporation. Filed 1992-11-13; issued 1994-07-05.
• Description: Testing a processor module in a computer system.
• § 102 assessment: Module-level testing; no idle-line/aid-line/switch-loopback elements. Not anticipatory.

11. US 6,233,073 B1 — "Diagnostic injection of transmission errors in fiber optic networks"

• Full citation: U.S. Patent No. 6,233,073 B1, assigned to International Business Machines Corporation. Filed 1998-07-30; issued 2001-05-15.
• Description: Injects a transmission error into a Fibre Channel optical stream (using FOSA, SERDES, buffering, mask logic) to verify a network's error-detection/fault-tolerance schemes.
• § 102 assessment: This is roughly the inverse of the '369 (it deliberately corrupts traffic), and it operates on an optical link, not a backplane switch fabric. Not anticipatory; only marginal § 103 value for the physical-layer (SERDES/FOSA) testing aspects.

12. US 6,366,556 B1 — "Self-healing networks using virtual rings"

• Full citation: U.S. Patent No. 6,366,556 B1, assigned to Lucent Technologies Inc. Filed 1998-06-22; issued 2002-04-02.
• Description: Failure detection and restoration in networks using virtual rings.
• § 102 assessment: Concerns network failure detection/restoration (protection switching), not idle-line diagnostic testing with an aid line and a switch cross-connect. Not anticipatory; weak § 103 relevance to failure detection generally.

13. US 6,456,587 B2 — "Ring transmission system and squelch method used for same"

• Full citation: U.S. Patent No. 6,456,587 B2, assigned to Fujitsu Limited. Priority 1995-09-26; issued 2002-09-24.
• Description: Ring transmission system with a squelch method for handling failures in a ring.
• § 102 assessment: Ring failure/alarm handling; no idle-line aid-line or switch loop-back. Not anticipatory; marginal § 103.

Bottom-line § 102 conclusions

Net: No cited reference — including the two the Examiner used — appears to fully anticipate the issued independent claims 1, 8, 15, or 21. This is consistent with (a) the patent having issued after the Serikawa rejection was overcome by amendment, and (b) both IPRs being denied institution (IPR2023-00464 denied 2023-08-30; IPR2023-00837 denied 2023-11-20). The most legally significant § 102 reference for this patent is US 6,028,845 (Serikawa), followed as § 103 primary art by WO 01/93499 and US 5,841,788.

Explicit uncertainty / confidence flags

• Claim-mapping precision. The Serikawa § 102 rejection is documented in the prosecution history as recounted in the Dell/Cisco IPR petition (PTAB PTABCTS petition artifact). I could not re-pull the underlying Office Action myself within this run, so treat the exact claim list (1–4, 6–9, 11–14) as high-but-not-absolute confidence; the substance (Serikawa as the § 102 reference; amendment adding the switch-conveyance limitation to overcome it) is corroborated.
• Reference descriptions for US 5,627,842, 5,574,730, 5,420,985, 5,327,435, 5,541,862, 6,366,556, and 6,456,587 are drawn from their titles/assignees/abstracts as listed on the patent face and my general knowledge; I was unable to open full texts for these within this run, so the element-level "does not anticipate" conclusions rest on the titles/abstracts and the claims' structure, not full-text review. Verify full texts before relying on any of those for a formal invalidity position.
• This is prior-art analysis, not a legal opinion. An anticipation call under § 102 is a claim-by-claim, element-by-element legal determination; the table above is a technical mapping, not a legal conclusion of invalidity.

I'll verify the key prior-art references cited on this page before building the §103 analysis.

Obviousness Analysis — U.S. Patent No. 6,957,369 ("Hidden Failure Detection") under 35 U.S.C. § 103

Building on the summaries already generated (bibliography, claim constructions, litigation/PTAB posture), this section analyzes validity under § 103 using only the prior-art materials appearing in the Prior Art section of this page — i.e., the "Patent Citations (13)" list, the WO 01/93499 reference the '369 specification expressly incorporates, and the "Similar Documents"/"Cited By" cross-references — plus the applicant's own admissions in the specification, which are prior art against the applicant regardless of citation.

I flag contradictions with the earlier sections where they arise. One note up front: the earlier "Litigation summary" lists a Feb. 10, 2025 final judgment date and a July 16, 2025 dismissal order; those two entries appear internally inconsistent in sequence (a July 2025 order cannot postdate a Feb. 2025 final judgment). I do not rely on either for the § 103 analysis; the salient, verifiable procedural fact is that both IPR petitions (IPR2023‑00464 and IPR2023‑00837) were denied institution on the merits, which is probative of how a neutral tribunal viewed the obviousness record.

1. Legal framework and the PHOSITA

Because the '369 patent was filed 2002‑05‑30 with no earlier priority claim, pre‑AIA §§ 102/103 govern. The obviousness inquiry follows Graham v. John Deere, 383 U.S. 1 (1966) (scope/content of prior art; differences; level of ordinary skill; secondary considerations) and KSR Int'l v. Teleflex, 550 U.S. 398 (2007) (a combination of familiar elements according to known methods is obvious when it does no more than yield predictable results; an express teaching, suggestion, or motivation is not required — a design need, market pressure, or "obvious to try" can suffice).

Level of ordinary skill (PHOSITA). Based on the '369 specification's own hardware (SERDES backplane interfaces, an off‑the‑shelf crosspoint switch, MPC8265/8250 communications processors, an Ethernet/SNMP control channel), the PHOSITA is an engineer with a B.S. in EE/CS and roughly 3–5 years designing backplane-based telecom/datacom line cards, familiar with (i) board-level and backplane interconnect test (boundary scan/JTAG, loopback), (ii) PHY/SERDES devices and crosspoint switches, and (iii) management-plane firmware.

Critical date: any asserted reference must predate 2002‑05‑30 (or qualify under pre‑AIA § 102(e)/(g)). This matters because the page's "Cited By" and "Similar Documents" lists contain post‑2002 items (e.g., US 7,050,390; US 7,289,436; US 2007/0180329 A1; CN104515945B; KR20030064072A) that are not available as § 103 art here. I exclude them.

2. The applicant's own admissions supply much of the claim vocabulary

Before reaching the citations, note that the '369 specification concedes the generic/conventional nature of the recited hardware — a point the earlier section flagged as decisive on the § 101 motion, and which is equally load-bearing under § 103:

This is significant: independent claims 1/15 reduce largely to (a) choosing an idle line as a loopback "aid" endpoint, (b) configuring a known crosspoint to link two ports, and (c) a timeout/verify loop. The admissions narrow the real inventive question to the use of a second idle line as the loopback partner so no dedicated test hardware is needed.

3. The prior-art reference set (from the page's Prior Art section)

4. Combination grounds

Ground 1 (primary): WO 01/93499 in view of US 5,841,788 — independent claims 1 and 15

WO 01/93499 already discloses the genus: a switch/multiplexer (ATM layer device) coupled over a bus to multiple physical-layer devices, plus a self-test path that loops traffic back through the switch "in order to perform a self test function without requiring additional wires or bandwidth," i.e., non-intrusively.

Claim-by-claim mapping:

Motivation, articulated (KSR factors):

1. Same field / analogous art — both references address in-system test of modular, backplane/slot-based communication hardware.
2. Express incorporation — the '369 specification incorporates WO 01/93499 by reference, so its teachings are properly combinable; this is a textual bridge, not a hindsight construction.
3. Design need — WO 01/93499's approach relies on a self-test circuit with a dedicated virtual circuit; a designer seeking to test interconnect traces and the PHY components at both ends (the exact failure modes US 5,841,788 identifies: bent/broken/short pins, open/short traces) would turn to backplane-interconnect test techniques.
4. Predictable result — combining a known loopback with a known crosspoint switch yields the expected "does the pattern come back" outcome; KSR, "a combination of familiar elements according to known methods… yields predictable results."

Ground 2: US 6,052,362 in view of US 5,841,788 (and/or the admitted Vitesse crosspoint art) — claims 1 and 15

US 6,052,362 teaches the core loopback verification loop in a packet-switched module, internally generated and checked test packets routed by core logic through a loopback path that "includes at least one transmitting channel and at least one receiving channel of a single transceiver," explicitly to enable field testing without external test equipment. Combine with US 5,841,788's backplane trace/pin fault detection and the '369's admitted off-the-shelf crosspoint, and claim 1's steps follow as a predictable arrangement. Motivation: eliminate external testers (US 6,052,362's stated problem) and detect interconnect faults in situ (US 5,841,788's stated problem).

Ground 3: US 5,132,635 / US 5,574,730 / US 5,627,842 in any of the above — claims 1, 4, 5, 15, 18

These all teach serial/system-wide testing of interchangeable cards in backplane slots with automatic response comparison. US 5,132,635 is particularly useful for claim 5/10/15's "cards plugged into a backplane" and for the iteration limitation of claim 4/18, since its whole point is to automatically step board-to-board across whatever cards are installed — the same "cycle through until all are tested" logic the '369 uses for idle traces.

Ground 4: US 6,122,756 + US 6,233,073 — non-intrusiveness and in-service diagnostics (claims 6–7, 11–12, 19–20, 23–24)

Claim 7's limitation ("testing the second idle line while continuing to use the lines that are not idle for carrying the data to the network trunk") is the "non-intrusive" concept. WO 01/93499 states it verbatim as its objective ("non intrusive self test… without requiring additional wires or bandwidth"); US 6,233,073 teaches injecting test traffic into a live fiber network; US 6,122,756 teaches a high-availability system performing in-service diagnostics. That combination squarely covers the non-intrusive dependent claims.

Ground 5: Claims 8 and 21 (cross-type / cross-format testing)

These independent claims add: first and second subsidiary modules of different types using different data formats, where the loopback module need not understand the other's format.

The best art here may be the '369's own admissions, which are prior art:

• "Different types of subsidiary modules can be connected in parallel via backplane 26 to the same main module 22, each module operating in accordance with its own communication protocol and data format" (TDM module A, Ethernet module B).
• "the physical layer interfaces… are uniform, and the different services are thus transmitted through ports… and are aggregated by switch 28 irrespective of the differences in service type."

So a system in which different-protocol cards are aggregated through a uniform PHY was already known. Adding WO 01/93499's bit-level loopback (which, by definition, returns bits without interpreting them) yields claim 8's "loop back… without processing" / "test traffic in the second format… returned intact." Motivation: backward compatibility — a uniform-PHY multiplexer must test mixed card populations anyway; the natural, and indeed necessary, implementation is a format-agnostic bit-level loopback. Result is predictable.

5. Dependent-claim coverage summary

6. Counterarguments, gaps, and the honest weaknesses

I would be overstating the case if I presented this as a clean § 103 kill. The genuine gaps:

1. The "reuse an idle line as the loopback leg" idea is not squarely taught. WO 01/93499 uses a dedicated self-test circuit and a dedicated virtual circuit; US 6,052,362 uses a dedicated test transceiver and a test port; US 5,132,635 daisy-chains through a test bus. Claim 1's distinguishing move — choosing another idle data line as the "aid line," thereby testing the line and both endpoint PHYs with no dedicated test hardware — is the point where an obviousness attack is weakest, and petitioners apparently found the art did not disclose it, which is consistent with both IPRs being denied institution on the merits (IPR2023‑00464, denied 2023‑08‑30; IPR2023‑00837, denied 2023‑11‑20).
2. Predetermined timeout at the sending subsidiary module. The '369 places the timeout/verify at the originating line card (claim 1[f]). WO 01/93499's verification is at the self-test circuit; US 5,841,788's comparison is at a master. A defendant/examiner would need an additional reference or reasoning for distributed timeout handling on the transmitting card.
3. Cross-format claim (8/21) exposure is two-sided. Either (a) the "different types/different formats" element is inherent given uniform PHY interfaces (then claim 8/21 is obvious over the '369's own admissions + a bit-level loopback), or (b) it is not inherent (then the art gap is real). The '369 specification's own admissions lean toward (a), which undermines these claims rather than saving them.
4. No secondary considerations shown to overcome a prima facie case. The record does not evidence unexpected results, long-felt need, or licensing "because of" the invention. The commercial context (asserted in 2022 against Cisco/Dell/Arista, >$376M sought, $0 recovered) is not, by itself, probative nexus evidence.
5. Date discipline. Any ground built on the "Cited By" list (e.g., US 7,050,390, US 7,289,436, US 2007/0180329, CN104515945) fails the 2002‑05‑30 cutoff. Similarly, items like US 6,973,600 ("Bit error rate tester") or CN109856473A should only be used if their own filings predate 2002‑05‑30 — I have not verified those filing dates and do not rely on them.
6. I could not verify the full merits reasoning of the two denied petitions (only the institution outcomes and the petition claim charts surfaced). The denial outcomes cut against, but do not conclusively defeat, the grounds above, since a denied institution reflects the Board's view of the specific grounds and art presented by Dell/Cisco (IPR2023‑00464) and Arista (IPR2023‑00837) — not the full universe of § 103 art.

7. Bottom line

• Claims 1 and 15 are, in my assessment, the most vulnerable to a § 103 challenge, because every element except the "idle-line-as-aid-line with no dedicated test hardware" feature is either expressly taught by the incorporated WO 01/93499 and US 5,841,788, or admitted as conventional in the '369 specification itself (backplane traces, embedded processors, uniform PHYs, and — critically — the off-the-shelf Vitesse VCS835 crosspoint cross-connect). The strongest articulated motivations are (i) WO 01/93499's own express "non intrusive… without additional wires" objective, (ii) US 5,841,788's identification of exactly the backplane pin/trace failure modes the '369 claims to detect, and (iii) US 6,052,362's stated desire to test in the field without external equipment.
• Dependent claims 3, 13, 14, 17, 25, 26 (cross-format / TDM-vs-packet) are arguably the easiest to invalidate, because the specification concedes that mixed-protocol cards were already aggregated over a uniform physical layer — the "different formats" element is admitted prior art, and a bit-level loopback is format-agnostic by construction.
• The genuine novelty core is narrow: substituting an idle production line for a dedicated loopback circuit/transceiver. Whether that survives depends on how strongly one credits the "eliminate dedicated test hardware" design need as a motivating rationale under KSR — and, as the earlier section noted, both PTAB panels declined to institute on the art presented to them, so this is a closer question than a citation-mapping exercise alone would suggest.

Uncertainty flags: (1) I did not independently verify the bibliographic dates of the "Similar Documents" entries not marked as citations, so any use of them is conditional on their pre‑2002‑05‑30 filing/priority; (2) I could not retrieve the substantive merits reasoning in IPR2023‑00464/IPR2023‑00837; (3) as noted, one chronology in the earlier Litigation section (Feb. 10, 2025 final judgment vs. July 16, 2025 dismissal order) appears inconsistent and I have not relied on it.