Invalidity dossier

US 10890539

Semiconductor defect inspection apparatus

Current assignee: Kioxia Corp

Added 9/24/2026, 3:53:00 PM

At a glanceNo PTAB challengesNo litigation on fileSemiconductor (T)

Active provider: DeepSeek · deepseek-v4-flash

Auto-generating section 1 of 2: Extensions…

Each section takes ~30-60s with web-search grounding. Keep this tab open — sections will fill in below as they complete.

Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

✓ Generated

I'll verify the patent details against live sources, including checking for any litigation activity.

Let me run additional targeted searches to confirm the patent's identity and check for litigation.

US 10,890,539 B1 — Verification Summary

I searched for the exact identifier 10890539 / US10890539 and for any 2026 CAFC litigation tied to it. Note on scope: the searches surfaced no record specifically for this patent number (I did not obtain a direct USPTO Patent Center or CAFC docket record), so the bibliographic data below is taken from the authoritative full text you supplied, and my litigation finding is a negative search result rather than a confirmed "no litigation" status.


Bibliographic Data

Field Value
Patent number US 10,890,539 B1
Title Semiconductor defect inspection apparatus
Assignee (current & original) Kioxia Corporation (Kioxia Corp), Japan
Inventors Hiroaki Shirakawa; Kiminori Yoshino
Application no. US 16/798,990
Filing date 2020-02-24
Issue (grant) date 2021-01-12
Priority JP 2019-120124, filed 2019-06-27
Pre-grant publication US 2020/0408700 A1 (2020-12-31); JP 2021005681 A (2021-01-14)
Anticipated expiration 2040-02-24
Claims 18 (independent claims 1 and 13)
Cited prior art (examiner) US 6,191,849 B1 (Hitachi); US 2009/0262621 A1 (Saito); US 2015/0168311 A1 (Lasertec); JP 5713419 B1 (Lasertec)
Key classifications G01N 21/9505 (wafer internal defects); G01N 21/6489 (photoluminescence of semiconductors); G01N 21/6445 (fluorescence polarization)

Abstract (as issued)

A semiconductor defect inspection apparatus inspects a specimen that is a semiconductor substrate with a patterned surface. It includes an excitation light irradiator, a polarization converter, a detector, and a defect analysis detector. The irradiator directs excitation light along an optical path and at an oblique predetermined incident angle; the first polarization converter (in the optical path) converts it to s-polarized light; the detector detects photoluminescence (PL) light generated by the specimen; and the defect analysis detector detects a dislocation defect by analyzing a PL image produced by photoelectrically converting the detected light.


Plain-Language Overview of the Independent Claims

Claim 1 — Apparatus.
An apparatus for inspecting a patterned semiconductor substrate, comprising four elements:

  1. An excitation-light irradiator that illuminates the specimen obliquely at a set incident angle;
  2. A first polarization converter placed in the light path that turns the excitation light into s-polarized light;
  3. A detector that captures photoluminescence light emitted by the specimen; and
  4. A defect-analysis detector that finds a dislocation defect by analyzing a photoluminescence image formed from the detected light.

In essence: shine oblique s-polarized excitation light on a patterned wafer, image the resulting photoluminescence, and analyze that image for dislocations.

Claim 13 — Method.
A method counterpart using the same apparatus (irradiator, first polarization converter, detector, defect-analysis detector). The steps are: (a) obliquely irradiate the patterned specimen with excitation light along the optical path at a set incident angle, with the first polarization converter in the path; (b) convert the excitation light to s-polarized light; (c) detect the photoluminescence light; and (d) detect a dislocation defect by analyzing a photoluminescence image from the photoelectrically converted light.

Note: Claim 13 as printed in the source uses slightly ungrammatical phrasing ("irradiating, by the excitation light irradiator, the a specimen…"), but its substance mirrors claim 1 in method form.

Key dependent claims (context for the independent claims):

  • Claim 2: adds a second polarization converter for p-polarized light and a controller that sets the polarization direction; the analyzer compares the s-polarized-image and p-polarized-image results at the same location to classify the dislocation defect by depth.
  • Claim 3: the incident angle is chosen so the s-polarized penetration depth is at or below a set depth while the p-polarized penetration depth exceeds it.
  • Claim 4: the incident angle is at or above the Brewster angle (angle of zero p-polarized reflectivity).
  • Claims 5–6: cover the case where the substrate has a groove (e.g., an STI formation groove), with the incident angle selected so s-polarized light stays above the groove bottom and p-polarized light reaches below it.
  • Claim 7: the depth classification uses a pixel-value difference threshold between the two images.
  • Claims 9–12: further limit to a silicon substrate, excitation energy above silicon's forbidden band (1.2 eV), and a first wavelength filter, lens, and second wavelength filter in the optical path.

Litigation / Docket Check

  • I found no CAFC (or district court) docket entry, and no 2026 activity, referencing US10890539. Its Google Patents page shows a clean legal-status timeline: filed, assigned, granted, and "Active," with the only record event after grant being the standard patent-grant notice (issued 2020-12-22).
  • The prominent 2026 Kioxia litigation in the results — Viasat, Inc. v. Kioxia Corp. (W.D. Tex.), ~$229M jury verdict in July 2026, with an appeal contemplated — concerns a different patent (Viasat's flash-memory forward-error-correction "700 patent," i.e., US 8,615,700), not US10890539. I mention it only to make clear it is unrelated to this patent number.

Uncertainty Disclosure

  • Confidence: High for all bibliographic fields, the abstract, and the claim structure, because they come from the authoritative full patent text.
  • Lower confidence / caveat: Because I could not directly query USPTO Patent Center or a CAFC docket system in this session, I cannot categorically state that US10890539 has never been asserted. My conclusion is limited to: no litigation reference to this specific number appeared in my searches. A negative search result is not proof of absence.
  • I did not auto-correct any identifier. The Japanese prior-art citation is rendered as printed (JP 5713419 B1), and the family/citing documents (e.g., TW202316102A, CN114295555A, US12140550B2, CN114527143A) are reported exactly as listed.

Generated 9/29/2026, 9:03:33 PM

Cases on file (0)

Specific litigation cases in our database that name US patent 10890539. The free-form analysis below may also discuss cases beyond this list.

No cases on file mention this patent. Upload a CSV or add a case manually in Admin → Manage litigation cases.

Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

✓ Generated

I'll search for litigation involving US patent 10890539.

Let me check additional litigation databases directly.

Summary: No litigation found involving U.S. Patent No. 10,890,539

Based on my searches, I found no known litigation — district court, ITC (Section 337), or PTAB — involving U.S. Patent No. 10,890,539 ("Semiconductor defect inspection apparatus," Kioxia Corp., issued Jan. 12, 2021, from App. No. 16/798,990, claiming priority to JP 2019-120124).

What I searched and what came back

I ran targeted queries for the patent number in both raw (10890539) and comma-formatted (10,890,539) versions, combined with litigation terms ("patent litigation," "infringement lawsuit," "asserted," "defendant"), plus a Kioxia-defendant sweep. I was unable to open the Unified Patents litigation portal or PACER directly (rate/step limits), so this is a negative result based on open-web search coverage rather than a direct docket query.

Result: every hit referencing a "'539 patent" was a different patent — none was U.S. 10,890,539:

Hit Actual patent Case
Output buffer circuit reissue RE43,539 IPR petition (Apple/WDT-related)
Belbuca / buprenorphine Orange Book 9,901,539 BDSI v. Avogen, D. Del.
Laser eye-surgery system a different '539 AMO Development v. Alcon Vision, D. Del. 1:20-cv-00842
SSD output-buffer circuit a different '539 Longitude Licensing v. Acer, C.D. Cal. 8:23-cv-00036

These are coincidental last-three-digit matches, which the instructions require me to treat literally and not conflate with '539.

Kioxia litigation that I did find — but it does not involve 10,890,539

Kioxia does get sued over memory-chip patents, but none of those pleadings identified 10,890,539:

  • Viasat v. Kioxia — W.D. Tex. (Waco). Jury verdict July 16, 2026 awarding Viasat ~$229M for flash-memory error-correction patent infringement. Plaintiff: Viasat; Defendant: Kioxia. (A parallel suit against Western Digital reportedly remains pending.)
  • Storage Vectors LLC v. Kioxia Corp — E.D. Tex. 2:25-cv-00276, filed Mar. 6, 2025. Patent-in-suit: U.S. 10,095,426 ("Error tolerant or streaming storage device").
  • MonolithIC 3D Inc. v. KIOXIA Corp — E.D. Tex. 2:25-cv-01160 and 2:26-cv-00392 (filed 2025/2026). Patents relate to 3D NAND / monolithic 3D stacking.
  • In re Certain NAND and DRAM Memory Chips, ITC Inv. No. 337-TA-1492 (instituted Mar. 26, 2026), based on MonolithIC 3D's Feb. 17, 2026 complaint. Respondents include Kioxia and SK hynix entities; asserted patents are U.S. 12,035,531 et al. (2026-issued 3D memory patents), NOT 10,890,539.

None of the above asserts 10,890,539.

Why this is plausible (context, not a substitute for docket checks)

U.S. 10,890,539 claims a photoluminescence-based inspection apparatus — a manufacturing/metrology tool, not a consumer product component. Combined with (a) its recent issuance (Jan. 2021), (b) its cited-art citations being only four references, and (c) no family members outside US/JP, the absence of any recorded district-court, ITC, or PTAB proceeding is consistent with a patent that has not been asserted to date.

Caveats

  • This reflects publicly indexed sources reachable via web search as of April 26, 2026. I did not directly query PACER, Docket Alarm, or the Unified Patents caselist, so a very recent or unindexed filing could be missed.
  • Recommendation: to confirm definitively, pull the patent's "Litigation" and "Post-Grant Proceedings" tabs on Unified Patents / Docket Alarm, and run a PACER docket search, before relying on this negative result.

Bottom line: No litigation involving U.S. Patent No. 10,890,539 is known. I did not find any plaintiff, defendant, jurisdiction, or case number tying that specific patent to a proceeding. I am flagging this as a negative finding rather than asserting absolute completeness, since I could not reach PACER/Unified Patents directly.

Generated 9/29/2026, 9:03:33 PM

Proceedings on file (0)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

✓ Generated

I'll start by verifying the structured data against public sources.

Let me run additional targeted checks for any proceedings, litigation, and Unified Patents involvement.

Let me do a final confirmation sweep specifically on PTAB dockets and any litigation involving this patent.

PTAB / AIA Trial Landscape — U.S. Patent No. 10,890,539 B1

Patent identification (as it appears on the face of the record):

  • Patent: US 10,890,539 B1 — "Semiconductor defect inspection apparatus"
  • Inventors: Hiroaki Shirakawa; Kiminori Yoshino
  • Original/current assignee: Kioxia Corporation
  • Application: US 16/798,990 — filed 2020-02-24
  • Priority: 2019-06-27 (JP 2019-120124; JP counterpart published as JP 2021-005681 A)
  • Granted: 2021-01-12; anticipated expiration 2040-02-24
  • Family publication: US 2020/0408700 A1

Proceedings overview

Total AIA trial proceedings on US 10,890,539: ZERO. The structured "PTAB proceedings on file" block drawn from the USPTO Open Data Portal (ODP) API returns no IPR, PGR, or CBM proceedings for this patent, and a targeted web sweep (PTAB decisions portal, general web, docket aggregators) surfaced no petition, institution decision, Final Written Decision, or Federal Circuit appeal naming this patent. The breakdown is therefore 0 active / 0 claims invalidated / 0 claims sustained / 0 settled / 0 institution denied — this patent has never been challenged at the PTAB, and all 18 claims (claims 1–12 apparatus, claims 13–18 method) stand exactly as issued, with no adverse Board or appellate ruling of record.

Defensive posture: There is no PTAB-based defense to inherit and no estoppel on the books in the patent owner's favor — but also no validation of the claims. A defendant is facing a completely untested patent: no institution decision has ever passed judgment on the strength of the cited art, so every invalidity ground is open, and the absence of prior challenges is not evidence of strength. Caveat: ODP indexing lags newly-filed matters. Treat "zero" as "zero as of the most recent ingest," and re-run the docket check before relying on it in a filing.


Proceedings (most-impactful first)

None. There are no AIA trial proceedings to enumerate — no proceeding number exists, and I will not invent one. The remainder of this report addresses what that absence means and what the nearest-adjacent public material shows.


Strategic summary

Claim status: all 18 claims are UNTESTED and INTACT. No claim of US 10,890,539 has been canceled, disclaimed through a PTAB proceeding, or held unpatentable by the Board. Independent claim 1 (excitation light irradiator configured for oblique incidence at a predetermined incident angle + first polarization converter disposed in the optical path configured to convert the excitation light into s-polarized light + photoluminescence detector + defect analysis detector) and independent claim 13 (the method counterpart) are the two load-bearing claims. Dependent claim 2 adds the second (p-polarized) converter and the controller, plus the s-vs-p comparison used to classify a dislocation defect in the depth direction — this is the commercial heart of the patent, because it is the s/p differential that isolates a surface-layer defect from a bulk one. Dependent claims 3 and 5 supply the incident-angle/penetration-depth limitations (PDs ≤ TD < PDp; and the STI-groove-bottom variant), and claim 4 pins the angle at or above the Brewster angle. Because nothing has been litigated at the Board, there is no narrowing amendment, no certificate, and no claim construction of record.

Estoppel landscape: no § 315(e)(2) estoppel exists, and no § 315(b) clock is running on the basis of any PTAB filing. Estoppel under 35 U.S.C. § 315(e)(2) attaches only to a petitioner that obtains an institution decision; with zero institutions, there is no petitioner-side estoppel, and no prior-art ground is foreclosed to anyone. For a defendant now being asserted against, the entire field is open — the four references that are already of record before the examiner are the natural starting set, but they carry no § 325(d)/Advanced Bionics baggage beyond ordinary examiner-considered-art arguments, since the Board has never weighed them. Conversely, the patent owner also has no IPR win to hide behind.

Prior art already on the face of the patent (§ 102/§ 103 candidates for a first petition):

  • US 6,191,849 B1 — Wafer inspecting apparatus (Hitachi), 1997-12-26
  • US 2009/0262621 A1 — Method and apparatus for inspecting a pattern shape (Keiya Saito), 2008-04-18
  • US 2015/0168311 A1 — Defect classifying method and inspection apparatus (Lasertec), 2013-12-18
  • JP 5713419 B1 — Defect classification method and inspection device (Lasertec), 2014-09-30

The Lasertec references ("defect classifying method and inspection apparatus") are the most promising § 103 anchors because they target the same problem statement — classifying defects in patterned semiconductor specimens — so a petition would need to teach or suggest the oblique-incidence s-polarized excitation step and the penetration-depth-limited photoluminescence detection, which is where the '539 specification's own "Description of the Related Art" concedes a photoluminescence-based patterned-defect inspection apparatus was already "known." That concession in the Background is fertile ground for an obviousness theory.

Pattern signals — there are none, and that is itself diagnostic. The same petitioner has not filed anything (no petitioner exists). The patent owner, Kioxia, has not pursued a PTAB appeal on this patent because it has never had a PTAB adverse ruling here. There is no defensive aggregator in the chain — no Unified Patents, RPX, or similar third party has challenged the '539. The likely explanation is commercial: this is an in-house manufacturing/process-inspection tool patent (the specification expressly frames it for "line inspection in a manufacturing process of a semiconductor memory device," e.g., a defect-screening inspection after STI-groove formation). Patents of that character are typically used defensively and cross-licensed rather than asserted against downstream purchasers, which is why they do not attract IPRs. I found no public record of this specific patent being asserted in litigation; the Kioxia-related infringement activity surfaced in my search (e.g., the MonolithIC 3D ITC action against Kioxia and the BiTMICRO/Kioxia IPRs) concerns different Kioxia and third-party patents, not the '539, and I will not stretch those to this patent number.


Recommended next steps

  1. Do not assume the patent is weak just because it is un-IPR'd. Zero proceedings means zero adjudicated validity, but it equally means the claim construction and validity record is a blank slate. The examiner's allowance over the four cited references is the only screening this patent ever received.
  2. If you are a defendant contemplating a validity challenge, the clock is governed by § 315(b), not by any prior filing. There is no prior petition and therefore no § 315(b) bar derived from one, and no General Plastic / Fintiv follow-on baggage either — a first-filed petition faces only the ordinary § 314(a) discretionary factors. That is the cleanest procedural posture a petitioner can have.
  3. Build the petition around the Background-section admission plus Lasertec. The specification's acknowledgment that "a defect inspection apparatus using a photoluminescence method is known as an apparatus for inspecting a defect present in a pattern formed on a semiconductor substrate" is an admission of a known technique. A § 103 combination pairing that admitted photoluminescence platform with an oblique-incidence s-/p-polarization teaching (Lasertec US 2015/0168311 and JP 5713419) attacks the two limitations the patent owner will rely on: the "obliquely incident at a predetermined incident angle" element of claim 1 and the penetration-depth relationship of claims 3/5.
  4. Target the dependent claims, not just claim 1. If claim 1 survives on the "oblique incidence" element, the claim 3/5 penetration-depth numbers (TD of 0 to −400 nm, STI depth ~300–400 nm) read as a result of the angle choice rather than a separate inventive step — a strong obviousness-of-a-range argument. The Brewster-angle limitation of claim 4 is expressly disclaimed as non-critical by the specification ("without being limited to the Brewster angle"), which cuts against the owner on that claim.
  5. Verify before filing. Re-run the ODP/PTAB E2E check (https://ptacts.uspto.gov/ptabweb/) and the PTAB decisions page (https://www.uspto.gov/patents/ptab/decisions) the week you finalize, because newly-filed petitions can appear in the docket before ODP ingest catches up. Federal Circuit activity should be checked at https://www.courtlistener.com and the CAFC docket; I found none, but I could not exhaustively confirm a negative on the appellate docket before running out of search steps.
  6. Watch the § 112 angle. Claims 1 and 13 use purely functional "configured to" language with no structural detail tying the polarization converter to the "optical path" other than position; claim 13 in particular mixes apparatus components into what is styled a method claim, which is a ripe § 112(b) and § 112(a) written-description target for a PGR-style attack — though note the PGR window (9 months from grant, i.e., ~2021-10-12) has long closed, so that theory must be raised as an IPR § 103 ground or in district court.

Confidence and source notes

  • Highest confidence: the zero-proceeding count (ODP ingest as stated in the prompt), the bibliographic data, the claim set (18 claims), and the cited-art list — all taken from the patent record supplied in the prompt.
  • Medium confidence: the characterization of the commercial/defensive posture and the absence of litigation assertion of this patent. My searches returned no complaint or IPR naming US 10,890,539, but a comprehensive district-court and ITC negative cannot be proven by web search alone.
  • Not established: judge panels, institution decisions, FWDs, settlements, and CAFC docket numbers — none exist for this patent, and I have deliberately left those subsections empty rather than populate them with look-alike proceedings involving other Kioxia patents (e.g., the BiTMICRO IPRs IPR2023-00741/-00742, which concern US 9,135,190 and US 8,010,740 and are unrelated to this patent).

Generated 9/29/2026, 9:03:46 PM

Ownership chain (1)

Asserters network →

Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.

  1. 2020-02-19 · recorded 2020-02-24 · reel 051904/0313 · Assignment

    Hiroaki Shirakawa; Kiminori YoshinoKIOXIA Corporation

    pre-filing employment assignment

Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

✓ Generated

I'll verify the assignment record and check for any litigation or NPE signals before writing up.

Inventors

Inventor Named on Employer at time of filing
Hiroaki Shirakawa US 10890539 (all claims) Kioxia Corporation (Tokyo, JP) — formerly Toshiba Memory Corporation
Kiminori Yoshino US 10890539 (all claims) Kioxia Corporation (Tokyo, JP) — formerly Toshiba Memory Corporation

On the "unusual pattern" check — nothing anomalous. Both inventors executed the assignment to the employer five days before the US filing (executed 2020-02-19; US app 16/798,990 filed 2020-02-24). That is the normal pre-filing employer-assignment sequence, not a departure/divestiture pattern. There is no evidence in the record of either inventor leaving the assignee within 12 months of filing, and no reversionary or employment-termination assignment on file.

Context worth flagging: this case claims priority to JP 2019-120124, filed 2019-06-27, i.e. while the applicant entity was still named Toshiba Memory Corporation (the Toshiba Memory → Kioxia rename took effect 2019-10-01, after Bain Capital-led consortium acquisition of Toshiba's memory business). Consistent with that, co-inventor Yoshino also appears on sibling US 11,119,059 B2, whose printed assignee is Toshiba Memory Corporation. I found no separate "Change of Name" assignment record for US 10890539 in the sources I could reach; the single recorded instrument names Kioxia Corporation directly. I am not asserting a recorded name-change conveyance exists — flagging it as a gap to verify.

Original assignee

KIOXIA CORPORATION (Tokyo, JP; ultimately a subsidiary of Kioxia Holdings Corporation) — per the only recorded assignment, reel 051904/0313.

  • Product embodying the claims: No, and importantly so. US 10890539 claims an inspection apparatus (oblique s-/p-polarized photoluminescence measurement with depth-discriminating defect classification). It is a manufacturing/metrology tool used in-house for STI-groove dislocation-defect screening after shallow-trench-isolation formation — it is not a NAND die, SSD, or any article Kioxia sells. The claims are not embodied in a commercial product; they protect a process-control capability.
  • Primary line of business: NAND flash memory and SSD/storage products (BiCS FLASH 3D NAND); R&D, manufacture and sale of memory and related products.
  • Current status: Operating and publicly listed. Kioxia Holdings Corporation (TSE listing, ticker family 285A) is an active, solvent operating company. No bankruptcy, no receivership, no wind-down. It is not an NPE and has never been on an NPE/asserter registry.
  • Litigation posture (context only, not this patent): Kioxia is a defendant, repeatedly and heavily — Viasat, Inc. v. Kioxia (W.D. Tex., filed 2021-11-29; $229M jury verdict 2026-07-16, judgment 2026-07-31; Kioxia has appealed); Bell Semiconductor, LLC v. Kioxia (2022); MonolithIC 3D Inc. v. Kioxia Corp., No. 2:25-cv-01160 (E.D. Tex., filed 2025-11-26) and related ITC Inv. No. 337-TA-1492 (2026). None of these assert US 10890539. Kioxia does not appear to be a plaintiff asserting this patent against anyone.

Assignment timeline

The USPTO/Google Patents legal-events record for US 10890539 contains exactly one (1) recorded assignment, and it is a pre-issuance employer assignment:

  • 2020-02-19 (executed) / recorded 2020-02-24 — Reel 051904/0313
    • Conveyance: Assignment
    • Assignor: Hiroaki Shirakawa; Kiminori Yoshino (the two named inventors, jointly)
    • Assignee: KIOXIA CORPORATION, Japan
    • Correspondent: Not retrievable from the sources I could reach. The Google Patents legal-events record exposes only the reel/frame, the assignor/assignee names and the REEL/FRAME cite (REEL/FRAME:051904/0313); it does not publish the recording correspondent (attorney/firm) field. I will not guess at this field. Action item: pull reel 051904/0313 directly at the USPTO Assignment Center to capture the correspondent of record.
    • Context: Ordinary pre-filing employment assignment — inventors to their employer, executed 5 days ahead of the US 2020-02-24 filing date. Not a sale, not a fire-sale, not a securitization, not a transfer to an asserter.

No change-of-name recording, no security agreement, no license recordation, no release, no correction, and no post-issuance assignment of any kind. The patent has been held continuously by Kioxia since before it was filed.

JP counterpart: JP2021005681A (Japanese family member, priority JP 2019-120124) is likewise still held by the Kioxia entity — Google Patents shows the JP family application status as pending with no recorded transfer.

Timeline diagram

timeline
    title Ownership of US 10890539
    2019 : JP priority application filed by Toshiba Memory
         : Toshiba Memory renamed Kioxia Corporation
    2020 : US application 16 798 990 filed by Kioxia
         : Inventors assign to Kioxia reel 051904 frame 0313
    2021 : Patent US 10890539 issued Jan 12
         : Kioxia sued by Viasat over unrelated patents
    2025 : Kioxia still record owner

NPE / troll-pattern signals

# Signal Call Basis
1 Shell-entity transfer Not present The only recorded conveyance (reel 051904/0313, exec. 2020-02-19, rec. 2020-02-24) runs inventors → Kioxia Corporation, an operating NAND manufacturer. No "IP / Holdings / Licensing / Ventures" successor appears anywhere in the chain. No single-purpose LLC, no registered-agent address, no Delaware/Texas shell.
2 Known asserter in the chain Not present Neither assignor nor assignee matches any entry on the Acacia / Marathon / IV / IPNav / Wi-LAN / Conversant / Vringo / Pendrell / Innovatio / Round Rock / Spangenberg lists. Kioxia Corporation is a major operating manufacturer, not a licensing vehicle. The monolithIC 3D and Bell Semiconductor plaintiffs are adverse parties to Kioxia, not assignees in this patent's chain.
3 Repeat correspondent across the chain Unclear Cannot be assessed — and I will not guess. There is only one recorded instrument, so there is no recurrence to test even in principle, and the correspondent field for reel 051904/0313 was not exposed in the records I could retrieve. A single appearance is not a finding per the stated criteria; verify at the Assignment Center before drawing any conclusion.
4 Cascading transfers Not present One recorded assignment in ~6 years of pendency/ownership. No chained LLC transfers, no <24-month cascade, no shared correspondent addresses to compare.
5 Pre-litigation transfer Not present The sole assignment predates the filing, not a suit, and is dated 5 days before the 2020-02-24 filing. Kioxia has not filed any infringement suit naming this patent.
6 Bankruptcy fire-sale Not present No Chapter 7/11 of the assignee. Toshiba Memory's 2018 sale to the Bain consortium was a carve-out of a solvent business line from Toshiba, not a bankruptcy sale, and it is not recorded on this patent's chain in any event. Kioxia Holdings is currently listed and operating.
7 Privateering Not present No operating company → NPE transfer on the chain. There is no identified NPE asserting on Kioxia's behalf. (Kioxia litigates as the target, not the sponsor, in the Viasat / Bell / MonolithIC matters.)
8 Defensive aggregator (anti-NPE) Not present Chain does not terminate at RPX, AST, LOT Network, Unified Patents, or OIN. It terminates at Kioxia Corporation. Neutralization-by-aggregator did not occur.

Verdict

Insufficient data — per the rubric's literal definition ("no records, or only the original assignment").

Justification: the entire recorded chain is a single pre-filing employment assignment, executed 2020-02-19 and recorded 2020-02-24 at reel 051904/0313, conveying US 10890539 from inventors Hiroaki Shirakawa and Kiminori Yoshino to KIOXIA CORPORATION. There are zero post-issuance transfers, zero shell-entity links, zero recordations to any known asserter, and no litigation asserting this patent; all eight NPE signals are absent or, in the one case of signal 3, unassessable for want of a second recordation. To be explicit about what "Insufficient data" means here: it reflects the absence of any transactional activity to analyze — not doubt about who owns the patent. Ownership is clear and unbroken: an operating NAND manufacturer has held US 10890539 since before issuance, so there is no NPE finding to make on this patent.

Verification links:

Residual verification tasks I could not close: (1) the recording correspondent on reel 051904/0313 — needed to test signal 3 against a wider portfolio; (2) whether Kioxia filed any Change of Name recordation for this family at the Toshiba Memory → Kioxia transition (not present in the records I reached, so I neither assert nor deny it).

Generated 9/29/2026, 9:03:51 PM

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

✓ Generated

I'll research the patent and its cited prior art. Let me start with searches.

Let me search for the remaining cited references.

Let me verify the Japanese reference JP5713419B1 and the examiner's citation context.

US 10890539 B1 — Prior-Art Citation Analysis

1. The patent under analysis

Field Value
Patent number US 10,890,539 B1
Title Semiconductor defect inspection apparatus
Application US 16/798,990, filed 2020-02-24
Priority JP 2019-120124, filed 2019-06-27
Granted / published 2021-01-12 (US 2020/0408700 A1 published 2020-12-31)
Inventors Hiroaki Shirakawa; Kiminori Yoshino
Assignee Kioxia Corporation
Cited references 4 (all examiner-cited)

Source: https://patents.google.com/patent/US10890539/en

Critical date for § 102. The earliest effective filing date is 2019-06-27 (JP priority) / 2020-02-24 (US filing). Every cited reference published well before that date, so all four qualify as prior art under AIA 35 U.S.C. § 102(a)(1)/(a)(2). The question is therefore purely one of disclosure, not of prior-art status.

Important caveat on the § 102 framing. I have analyzed each reference against the claims literally. On the record available, none of the four cited references appears, by itself, to disclose every element of any one claim, so a strict § 102 anticipation rejection is unlikely for any claim. The references function primarily as § 103 (obviousness) art. I flag below where each comes closest and which claim(s) it most bears on. This is an analytical assessment, not a legal conclusion.


2. Claim set of US 10,890,539 (for cross-reference)

  • Claim 1 (independent, apparatus): oblique excitation-light irradiation at a predetermined incident angle; first polarization converter → s-polarized light; detector for photoluminescence light; defect analysis detector detecting a dislocation defect from a photoluminescence image.
  • Claim 2–8 (dependent on 1/2): second converter → p-polarized light; controller; s-vs-p comparison to classify dislocation defect in the depth direction; penetration-depth (PDs/PDp) angle conditions; Brewster-angle condition; STI groove; pixel-value threshold; single polarizing plate.
  • Claims 9–12: PDs ≤ predetermined depth; silicon substrate; excitation energy > silicon bandgap (1.2 eV); first wavelength filter + lens + second wavelength filter.
  • Claims 13–18: method counterparts of the above.

3. Reference-by-reference analysis

Reference 1 — US 6,191,849 B1

Field Value
Full citation US 6,191,849 B1, "Wafer inspecting apparatus," Hitachi, Ltd., inventors (Hitachi); granted 2001-02-20
Priority / filing Priority 1997-12-26; published/granted 2001-02-20
URL https://patents.google.com/patent/US6191849

Brief description. Obliquely irradiates a wafer and detects scattered rays with two detecting systems. The two systems are positioned so that surface foreign matter and internal defects produce opposite intensity ratios, so the two signals can be compared to distinguish surface matter from internal defects. Notably, the specification discusses oblique incidence at the Brewster angle and p-polarized illumination, and expressly notes polarization effects of the scattering. Detection modality is scattered light, not photoluminescence.

Relevance under § 102. This reference does not anticipate any claim. It lacks: (i) conversion of excitation light into s-polarized light, (ii) photoluminescence detection, (iii) a photoluminescence image, and (iv) a dislocation defect analysis. Its contribution is the general technique of obliquely irradiating a semiconductor wafer at a controlled polarization/angle and using a comparison of two detection results to discriminate surface vs. internal origin.

Potentially bears on: Claim 4 / claim 16 (the Brewster-angle incident angle — "angle at which a reflectivity becomes zero when the p-polarized light is obliquely incident") and, more generally, the surface-vs-depth discrimination rationale underlying claims 2/3/5. Best characterized as § 103 art, not § 102.


Reference 2 — US 2009/0262621 A1

Field Value
Full citation US 2009/0262621 A1, "Method and apparatus for inspecting a pattern shape," Keiya Saito et al., Hitachi High-Technologies Corp.; published 2009-10-22 (granted as US 8,040,772 B2, 2011-10-18)
Priority / filing Priority JP 2008-108875 (2008-04-18); US filing 2009-04-17
URL https://patents.google.com/patent/US20090262621

Brief description. Inspects a patterned medium (patterned/bit-patterned magnetic recording media, stampers, masters) by obliquely irradiating the specimen with broadband (including far-UV) illuminating light in a selected polarized state (TE/TM via a polarizing prism), detecting zero-order reflected light, and inspecting the pattern shape from the spectral reflectance waveform. The polarizing prism converts the illumination into a single, selected linear polarization; a laser beam is also obliquely directed at the sample to detect scattered light for edge-roughness detection.

Relevance under § 102. Does not anticipate any claim. It discloses a polarization converter and oblique incidence on a patterned specimen, but the detection modality is reflected/scattered light and spectral reflectance, not photoluminescence, and it addresses pattern shape/edge roughness, not dislocation defects. There is no photoluminescence image and no s/p comparison for depth classification.

Potentially bears on: the claim-1/claim-8 element of a polarization converter (here a polarizing prism/polarizing plate producing a single linear polarization), and the general concept of oblique polarized illumination of a patterned substrate. § 103 art.


Reference 3 — US 2015/0168311 A1

Field Value
Full citation US 2015/0168311 A1, "Defect classifying method and inspection apparatus," Lasertec Corporation; published 2015-06-18 (granted as US 9,551,672 B2, "Defect classifying method and optical inspection apparatus for silicon carbide substrate," 2017-01-24)
Priority / filing Priority 2013-12-18
URL https://patents.google.com/patent/US20150168311

Brief description. Inspects a silicon carbide (SiC) substrate with an epitaxial layer using the photoluminescence (PL) method. UV illumination is projected toward the substrate (claim 37 expressly recites an illumination unit that obliquely projects UV illumination toward the SiC substrate); reflected light and photoluminescence light are condensed, separated, and detected; a signal processor detects and classifies defects. The object is to distinguish a basal plane dislocation (BPD) — a dislocation defect — from other crystal defects using the PL image (optionally together with the reflected-light image).

Relevance under § 102. This is the closest of the four in subject matter: it discloses oblique UV illumination, photoluminescence detection, a PL image, and detection/classification of a dislocation defect. However, it does not disclose (i) converting the excitation light into s-polarized light, nor (ii) a specimen that is a silicon substrate with a predetermined pattern (STI groove / element-isolation pattern) on its surface as claimed, nor (iii) the s-vs-p depth-classification feature of claim 2. It therefore does not fully anticipate claim 1 or any dependent claim.

Potentially bears on (closest to anticipation): Claim 1 / Claim 13 in substantial part (PL-based dislocation-defect detection, oblique excitation, photoluminescence image), missing only the s-polarization and patterned-silicon limitations — making it the reference an examiner would most plausibly combine with a polarization teaching (e.g., Reference 1 or 2) under § 103.


Reference 4 — JP 5713419 B1

Field Value
Full citation JP 5713419 B1, "Defect classification method and inspection device" (欠陥分類方法及び検査装置), レーザーテック株式会社 (Lasertec Corporation); published 2015-05-07
Priority 2014-09-30
URL https://patents.google.com/patent/JP5713419B1

Brief description. A Japanese Lasertec patent directed to the same subject matter as Reference 3 — detecting and classifying crystal defects in a SiC substrate (distinguishing basal plane dislocations from other defects), using illumination and photoluminescence-based detection/classification of dislocations. It is functionally a JP-family counterpart/companion to the Lasertec SiC PL-inspection disclosures (compare US 2015/0168311 A1 / US 9,551,672 B2).

Relevance under § 102. Because its disclosure tracks Reference 3, the same analysis applies: it discloses oblique illumination + photoluminescence-based dislocation classification, but does not disclose s-polarized excitation or a patterned silicon (STI) substrate. It does not anticipate claim 1 or any dependent claim on the record available.

Potentially bears on: Claim 1 / Claim 13 as a corroborating foreign counterpart to Reference 3. § 103 art. (Note: because I did not retrieve the full Japanese text/claims, I flag this as an assessment based on the title, assignee, priority, and family relationship to Reference 3 rather than on a complete text review; the full JP specification should be checked before relying on this reference.)


4. Summary table

# Reference Pub. date Detection modality Dislocation defect? s-polarized excitation? Anticipates any claim?
1 US 6,191,849 B1 (Hitachi) 2001-02-20 Scattered light No No No (§103; bears on cl. 4/16)
2 US 2009/0262621 A1 (Hitachi High-Tech) 2009-10-22 Reflected/scattered light No Polarized, but reflected-light modality No (§103; bears on cl. 1/8)
3 US 2015/0168311 A1 (Lasertec) 2015-06-18 Photoluminescence Yes (BPD) Not disclosed No — closest to cl. 1/13; missing s-polarization + patterned Si
4 JP 5713419 B1 (Lasertec) 2015-05-07 Photoluminescence Yes Not disclosed No — counterpart to #3

5. Overall conclusion

  • Of the four examiner-cited references, US 2015/0168311 A1 and its Japanese counterpart JP 5713419 B1 are the most relevant: they disclose the core photoluminescence-based detection and classification of a dislocation defect. They do not, however, disclose the two features that appear to define the novelty of US 10,890,539 — conversion of the obliquely incident excitation light into s-polarized light and the combination with p-polarized light to classify the dislocation defect in the depth direction on a patterned semiconductor surface.
  • US 6,191,849 B1 supplies oblique/Brewster-angle p-polarized illumination and the surface-vs-internal discrimination idea; US 2009/0262621 A1 supplies oblique polarized illumination of a patterned specimen using a polarizing element.
  • Accordingly, under a strict § 102 analysis, none of the four references alone anticipates any of claims 1–18. The realistic challenge is a § 103 combination of a Lasertec PL-dislocation reference with a Hitachi polarization/oblique-incidence teaching, which is presumably why the examiner cited this set.

Verification note. Titles, dates, and assignees above are taken from the citation tables on the granted patent page and from Google Patents pages for each reference. I was unable to retrieve the complete text of JP 5713419 B1; its description here is inferred from its title, assignee, priority date, and its family relationship to US 2015/0168311 A1, and should be confirmed against the full JP specification before being relied upon.

Generated 9/29/2026, 9:04:04 PM

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

✓ Generated

I'll analyze obviousness by first retrieving the content of the prior art references cited on the patent's page.

Let me retrieve the two Lasertec references, which appear most relevant to the polarization/defect-classification aspects.

Obviousness Analysis — US 10,890,539 B1 under 35 U.S.C. § 103

Patent: US 10,890,539 B1, "Semiconductor defect inspection apparatus" (Kioxia Corp.; inventors Shirakawa & Yoshino; priority JP 2019-120124, 2019‑06‑27; issued 2021‑01‑12; 18 claims, independents 1 and 13).
Source of record: https://patents.google.com/patent/US10890539/en


1. Scope, framework, and caveats

I use the four examiner‑cited references from the patent page's Citations (4) section:

Ref Date Assignee Subject matter
US 6,191,849 B1 pub. 2001‑02‑20 (prio. 1997‑12‑26) Hitachi Wafer inspecting apparatus — oblique irradiation, scattered‑ray detection, surface‑foreign‑matter vs. internal‑defect discrimination, Brewster‑angle thresholds
US 2009/0262621 A1 (US 8,040,772 B2) pub. 2009‑10‑22 Hitachi High‑Technologies (Saito) Oblique, polarized broadband (incl. far‑UV) illumination of a patterned specimen; detection of zero‑order reflected light; polarization chosen "suitable for the object"
US 2015/0168311 A1 (US 9,551,672 B2) pub. 2015‑06‑18 Lasertec Photoluminescence (PL) inspection of a semiconductor substrate; defect classification including dislocations; comparison of PL and reflection images at the same address
JP 5713419 B1 pub. 2015‑05‑07 Lasertec "Defect classification method and inspection device" — Lasertec family member of the above

All four predate the 2019‑06‑27 priority date and are §102(a)(1)/(a)(2) prior art.

Framework: Graham v. John Deere factors, with the KSR rationales as codified in MPEP 2143 (combining known elements according to known methods to yield predictable results; use of a known technique to improve a similar device; obvious design choice among a finite number of identified, predictable solutions).

Caveats / contradictions flagged:

  • I could not retrieve the full text of JP 5713419 B1 in this session. Google Patents lists it with a 2014‑09‑30 priority date, distinct from the 2013‑12‑18 filing of the sibling JP 5633099 B1 (Lasertec, 欠陥分類方法及び検査装置, claim 1 shown in my search results). I therefore treat JP 5713419 B1 as part of the Lasertec defect‑classification family whose US counterparts are US 2015/0168311 A1 and US 9,551,672 B2 — but this should be verified against the document itself before being relied on. Identifier rendered literally as printed.
  • The claim set in the pre‑grant publication (US 2020/0408700 A1, as mirrored on Justia) is numbered differently from the issued claims: e.g., publication claim 4 corresponds to issued claim 3, publication claim 5 to issued claim 4, publication claim 7 to issued claim 5. I analyze the issued claim set (1–18) from the authoritative full text. This is the contradiction to watch for when reading earlier-generated summaries.
  • The specification makes an admission of prior art: "there is known a technique in which excitation light is incident at an angle at which the reflectivity of p‑polarized light becomes zero (0) (Brewster angle) so that the intensity of photoluminescence light obtained by the p‑polarized light is increased, and the detection accuracy of a dislocation defect is improved." This is highly material to claims 2 and 4.

2. Level of ordinary skill

A PHOSITA here would hold a BS in physics, optics, or electrical engineering (or equivalent), with ~2–5 years in optical semiconductor wafer inspection, including familiarity with photoluminescence metrology, Fresnel/polarization optics, and the Beer–Lambert penetration‑depth relationship. This matters because polarization‑dependent penetration depth (PDs < PDp at a given oblique angle) is textbook optics, not a discovery of this patent — the patent itself presents it as a known relationship to be exploited.


3. Ground 1 — Claim 1

Primary: US 2015/0168311 A1 / US 9,551,672 B2 (Lasertec), in view of US 2009/0262621 A1 (Saito) and/or US 6,191,849 B1 (Hitachi).

Claim 1 element Where taught
Apparatus for inspecting a specimen that is a semiconductor substrate Lasertec: inspection of a SiC substrate / SiC substrate with epitaxial layer.
…having a surface on which a predetermined pattern is formed Saito: oblique polarized illumination of patterned media and patterned semiconductor wafers (its background cites JP‑A‑2007‑304062: polarized light applied obliquely to a periodic step pattern on a semiconductor wafer); Lasertec's specimen has an epitaxial layer/structure.
Oblique excitation light at a predetermined incident angle Lasertec: US 9,551,672 claim 37 — "an illumination unit that obliquely projects illumination light of an ultraviolet region toward a silicon carbide substrate." Also Saito (oblique illumination) and Hitachi '849 (oblique irradiation).
Detector detects photoluminescence light Lasertec: UV excitation, condensation of "reflected light and photoluminescence light," separation, PL photodetector; PL image formed.
First polarization converter converting excitation light to s‑polarized light Saito: irradiating optical system applies light "in a polarized state suitable for the object to be inspected from an oblique direction"; its second embodiment explicitly analyzes "the relationship between the polarization direction of illuminating light and the shape detecting sensitivity." Hitachi '849 likewise treats the polarization state of obliquely incident rays as a designed variable and partitions detection about the Brewster angle.
Defect analysis detector detects a dislocation defect by analyzing a PL image Lasertec: PL images are analyzed to detect and classify crystal dislocations — basal plane dislocation (BPD), threading edge dislocation (TED), threading screw dislocation (TSD) — and defect shape/luminance data are stored per address and compared.

Motivation to combine (MPEP 2143 rationales):

  • Known technique to improve a similar device: Lasertec already inspects a semiconductor substrate for dislocations by PL imaging; Saito teaches that in oblique‑illumination inspection of patterned specimens the illumination polarization must be selected to suit the specimen, and that detection sensitivity varies with polarization. Selecting s‑polarization is therefore a routine application of a known technique in the same field.
  • Predictable result: choosing the polarization state of obliquely incident excitation light changes the Fresnel transmission and hence excitation depth — a predictable, quantified effect the patent itself treats as known physics (PDs < PDp).
  • Design need: Lasertec's own motivation — distinguishing a killer dislocation from a non‑killer defect — supplies the reason to control how deep the excitation light reaches.

Alternative Ground 1′: Hitachi '849 in view of Lasertec. Hitachi '849 supplies oblique incidence, Brewster‑angle reasoning, and intensity‑comparison to discriminate surface vs. internal defects at the same location; Lasertec supplies PL excitation/detection and dislocation classification. Substituting PL as the detected signal and s‑polarized oblique excitation as the illumination is a predictable substitution of one known optical signal for another in an inspection apparatus.

Assessment: Claim 1 is likely obvious. Its scope is broad ("semiconductor substrate," "dislocation defect," "analyzing a photoluminescence image"), and its only arguably narrowing feature — s‑polarized excitation — is a conventional, motivated polarization choice explicitly suggested by Saito.


4. Claims 2–8

Claim 2 (second polarization converter for p; controller selecting polarization; compare s‑image and p‑image at the same location; classify defect in the depth direction).

  • Lasertec already performs the comparison architecture: the inspection apparatus stores PL‑image defect shape data in a first/second storage area and a classification unit "acquires defect shape data on the photoluminescence image having the same address as that included in the received defect information" and compares images to classify the defect (freepatentsonline mirror of US 2015/0168311 A1). Substituting a second PL image taken with p‑polarized excitation for the reflection image is an obvious variant of the same comparison step.
  • Hitachi '849 expressly claims discriminating surface foreign matter from an internal defect by comparing detected intensities between two detection systems positioned relative to the reflection/Brewster angle — i.e., classification by depth/location. That is the core of claim 2's depth classification.
  • Motivation: both references articulate the same technical goal the patent states — separating defects that are near the surface (which the patent says affect electrical characteristics) from those inside (which do not). This is a KSR "known technique to improve similar device" plus "predictable result" combination.

Claim 3 (angle chosen so s penetration ≤ predetermined depth and p penetration > that depth). The s/p penetration‑depth asymmetry at oblique incidence is a known physical consequence of the differing Fresnel transmission coefficients; selecting an incidence angle to bracket a target depth is a routine design choice following directly from Hitachi '849's Brewster‑angle partition and Saito's polarization‑sensitivity teaching. Strong obviousness case; also vulnerable as a result‑oriented capability limitation that does not distinguish over an apparatus inherently capable of operating at such an angle (In re Montgomery / In re Vaeck line of reasoning).

Claim 4 (incident angle ≥ Brewster angle). This claim is squarely supported as obvious — and arguably anticipated by the applicant's own admitted prior art. The specification concedes that a technique of irradiating at the Brewster angle to increase p‑polarized PL intensity and improve dislocation‑defect detection accuracy is known. Hitachi '849 claims detection systems defined by whether they sit at or above vs. below the Brewster angle, independently corroborating the knowledge. Additionally, a Lasertec light‑source disclosure surfaced in my search describes a source producing linearly polarized light projected onto a sample "as an illumination beam of P‑polarized light at an incidence angle substantially equal to the Brewster's angle of the sample."

Claims 5–6 (substrate has a groove; the groove is an STI formation groove; angle chosen so s stays above the groove bottom and p reaches below it). Grooved/recessed semiconductor topography and STI are ubiquitous; Saito's references address patterned/recessed‑and‑projecting semiconductor structures, and Lasertec addresses epitaxial‑layer structure. Applying the claim 3 angle‑selection principle to a known STI depth is a conventional application with predictable results.

Claim 7 (pixel‑value difference threshold between the s and p images). Comparing luminance/pixel data between two images of the same address and thresholding is exactly what Lasertec's classification units do (shape/luminance of defect images compared at a common address). Conventional image processing.

Claim 8 (the polarization converters are a polarizing plate producing a single vibration plane). A polarizing plate is the ordinary structural implementation of a polarization converter; Lasertec's related disclosure describes linearly polarized illumination via a polarization‑maintaining optical path.


5. Claims 9–12 and 13–18

  • Claim 9 (s penetration ≤ predetermined depth): same reasoning as claim 3, minus the p limitation — obvious.
  • Claim 10 / 18 (silicon substrate): the patent itself acknowledges silicon wafers and silicon's 1.2 eV bandgap as conventional subject matter; Lasertec's semiconductor substrate is SiC but silicon is the most conventional semiconductor substrate in the field. This is an obvious substitution of a known material with predictable structural properties — though see the counterargument in §6.
  • Claim 11 (excitation energy > silicon's forbidden bandwidth): routine; Lasertec uses UV illumination, and any visible‑band excitation (380–780 nm ≈ 1.6–3.3 eV) exceeds 1.2 eV.
  • Claim 12 (a first wavelength filter, a lens, and a second wavelength filter in the optical path): Lasertec condenses light with an objective lens, and separates/selects PL and reflection light with dichroic/band‑edge optics (band‑edge emission filter, and a second wavelength region including longer PL wavelengths). Directly met.
  • Claims 13–17: method counterparts of claims 1–4, 9 — obvious on the same grounds (all apparatus elements are recited in the method).
  • Claim 18: same as claim 10.

6. Counterarguments the patent owner would raise — and how they fare

  1. "Silicon is an indirect‑bandgap material with very weak band‑to‑band PL, so a PHOSITA would not port SiC PL inspection to silicon." This is the most credible non‑obviousness argument. However: (a) the patent's own Background admits PL‑based defect inspection of patterned semiconductor substrates is known; (b) the patent relies on dislocation‑related PL (D‑band emission), not band‑to‑band emission; and (c) if the record shows dislocation‑related PL in silicon was known, the argument fails. This is a factual inquiry that should be checked against the art.
  2. "None of the references suggests tying the incidence angle to a polarization‑dependent penetration depth relative to the patterned surface layer (e.g., STI depth)." This is the strongest position for dependent claims 3 and 5–6, and the point on which the examiner most likely allowed the case. A rebuttal would rest on Hitachi '849's Brewster‑angle partition plus routine optimization of a known optical effect.
  3. No secondary considerations appear on the face of the record — no unexpected results, no long‑felt need, no licensing nexus is stated. The asserted benefits (selectively detecting surface dislocations; improved yield/throughput) are the expected consequence of the known penetration‑depth difference, i.e., a result‑effective‑to‑achieve rather than an unpredictable one.

7. Conclusion

Claim(s) Obviousness assessment Strongest ground
1, 13 Likely obvious Lasertec (US 2015/0168311 A1 / US 9,551,672 B2) + Saito (US 2009/0262621 A1)
2, 14 Likely obvious Lasertec (same‑address image comparison) + Hitachi '849 (surface vs. internal discrimination)
3, 15 Obvious (design choice; also capability limitation) Hitachi '849 + known Fresnel/polarization physics
4, 16 Strongly obvious — supported by applicant's admission of prior art Admitted prior art; corroborated by Hitachi '849 and Lasertec light‑source disclosure
5–6 Obvious Claim 3 reasoning + conventional STI topography (Saito pattern art)
7 Obvious Lasertec defect‑image/luminance comparison
8 Obvious Conventional polarizing plate (Lasertec polarized illumination)
9, 17 Obvious Claim 3 reasoning
10, 18 Obvious (material substitution) Subject to the indirect‑bandgap rebuttal in §6
11 Obvious Lasertec UV illumination
12 Obvious Lasertec objective lens + dichroic/band‑edge filters

Bottom line: A prima facie § 103 case exists against all claims, strongest against claims 4 and 16 (the Brewster‑angle claims, which the specification's own admission largely negates) and weakest, but still viable, against claims 3, 5–6, and 10/18.

Confidence: High for the disclosure content of US 6,191,849 B1, US 2009/0262621 A1, and US 2015/0168311 A1/US 9,551,672 B2 (retrieved text). Lower for JP 5713419 B1 (full text not retrieved; treated as a Lasertec family member — verify directly). The material‑substitution argument for silicon (§5–§6) turns on facts about the state of silicon dislocation‑PL art that I did not verify and should be checked before being asserted.

Generated 9/29/2026, 9:04:26 PM

Extensions

Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.

Not generated yet. Click Generate to call the active LLM provider with the configured prompt.

Derivative works

Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.

Not generated yet. Click Generate to call the active LLM provider with the configured prompt.

Keep exploring

Other patents in Semiconductor (T)

See all Semiconductor (T) patents →