US 10651866

Analysis of U.S. Patent 10,651,866

Washington, D.C. – May 1, 2026 – A technical analysis of United States Patent 10,651,866, titled "Beamforming using fractional time delay in digitally oversampled sensor systems, apparatuses, and methods," has been conducted. This patent details a method for improving the accuracy of signal processing, particularly for applications like beamforming in audio systems.

Key Patent Details:

• Title: Beamforming using fractional time delay in digitally oversampled sensor systems, apparatuses, and methods
• Assignee: Solos Technology Ltd.
• Inventors: Dashen Fan, Joseph Yong Kwon
• Filing Date: April 30, 2019
• Issue Date: May 12, 2020
• Abstract: The patent describes systems and methods for time-delaying a signal from an analog-to-digital converter (ADC). The system includes a digital sensor that produces an oversampled digital signal. A time delay element receives this signal and outputs a time-delayed version. A filter then processes the delayed signal by low-pass filtering and decimating it to a lower sample rate. The final output is a filtered, decimated, and delayed digital signal.

Plain-Language Overview of Independent Claims:

The core of the invention is protected by two independent claims, which are the broadest assertions of the patent.

• Independent Claim 1: This claim describes a physical system. In simple terms, it's about a device that takes a signal from a digital sensor (like a digital microphone) which is "oversampled" – meaning it's captured at a much higher rate than necessary for the final output. This highly detailed signal is then intentionally delayed by a very precise and controllable amount. After this delay, the signal is processed by a filter that cleans it up and reduces it to a standard digital signal. This ability to introduce a very fine "fractional" delay at the oversampled stage is key for applications like beamforming, where slight timing differences between multiple microphones are used to focus on a sound from a particular direction.

• Independent Claim 12: This claim outlines the method or process behind the system. It details the steps of receiving the oversampled signal, applying a precise time delay to it, and then filtering and reducing the sample rate (decimating) of the delayed signal to create the final output. This protects the specific sequence of actions that achieve the technical benefit described in the patent.

Litigation Status:

A search of the dockets for the U.S. Court of Appeals for the Federal Circuit (CAFC) for the year 2026 was conducted. As of the current date, there is no publicly available information to indicate that US patent 10,651,866 is involved in any litigation before the CAFC. However, this is based on currently accessible data and could change.

Patent Litigation Status

As of May 1, 2026, U.S. Patent No. 10,651,866, assigned to Solos Technology Ltd., is involved in one known litigation. The patent is one of several asserted in a lawsuit against major technology and eyewear companies.

Details of the case are as follows:

• Case Name: Solos Technology Limited v. Meta Platforms, Inc., Meta Platforms Technologies, LLC, Oakley, Inc., Luxottica of America, Inc. and EssilorLuxottica USA, Inc.
• Plaintiff: Solos Technology Limited
• Defendants:
  • Meta Platforms, Inc. and Meta Platforms Technologies, LLC (collectively, "Meta")
  • Oakley, Inc.
  • Luxottica of America, Inc. and EssilorLuxottica USA, Inc. (collectively, "EssilorLuxottica")
• Jurisdiction: United States District Court for the District of Massachusetts
• Case Number: 1:26-cv-10304
• Filing Date: January 23, 2026
• Status: Active.

Allegations and Status:

The lawsuit, filed by Solos Technology Limited, alleges that the defendants' "Meta Ray-Ban" and "Oakley Meta" smart glasses infringe upon a portfolio of Solos' patents, including U.S. Patent No. 10,651,866. The asserted patents cover core technologies related to smart eyewear, such as beamforming and audio processing, which are central to the '866 patent.

Solos is seeking significant damages, reportedly in the "multiple billions of dollars," as well as a permanent injunction to halt the sale of the accused products. The complaint alleges that Meta and its partners had prior knowledge of Solos' technology and patents.

As of March 2026, the defendants have moved to dismiss the lawsuit. Their arguments include that the complaint fails to plausibly allege infringement and that Solos has not included a necessary party, BlueRadios Inc., which reportedly claims co-ownership of the asserted patents.

Additionally, a motion was filed by the plaintiff, Solos, to disqualify the law firm Morgan Lewis & Bockius LLP from representing the EssilorLuxottica defendants, citing a conflict of interest due to the firm's prior work with Kopin Corporation, from which Solos originated.

The case is currently in its early stages, and the court has yet to rule on these preliminary motions.

Proceedings overview

As of May 30, 2026, there are no AIA trial proceedings on file for U.S. Patent No. 10,651,866 in the USPTO Open Data Portal. This indicates that, according to the canonical list, the patent has not yet been challenged through Inter Partes Review (IPR), Post-Grant Review (PGR), or Covered Business Method (CBM) proceedings before the Patent Trial and Appeal Board (PTAB). This means all claims of US 10651866 are currently unchallenged at the PTAB.

Strategic summary

Currently, all claims of U.S. Patent No. 10,651,866 remain UNTESTED by any AIA trial proceeding. There are no canceled or sustained claims as a result of PTAB review. This situation presents a defendant facing assertion of this patent with an open landscape for challenging patentability before the PTAB.

Since no PTAB proceedings have been filed, there is no estoppel landscape established under 35 U.S.C. § 315(e)(2). Therefore, a defendant is not barred from raising any prior art grounds they might discover against the patent's claims. All prior-art grounds, including those discussed in the "Prior art" section (e.g., Gieske et al., Feng et al., Chabanne et al., Choi et al.), are still available for a potential petitioner to raise.

There are no patterns of repeated filings by the same petitioner, aggressive appeals by the patent owner, or involvement of defensive aggregators like Unified Patents, as no PTAB activity has occurred.

Recommended next steps

Since no PTAB activity exists for U.S. Patent No. 10,651,866, a defendant facing assertion of this patent should consider the following:

• Conduct a thorough prior art search: While a prior art analysis was conducted during the patent's prosecution and for this report, a dedicated and comprehensive search tailored to specific accused products and infringement theories would be crucial.
• Evaluate potential IPR petitions: Given the "Obviousness" analysis suggesting vulnerabilities based on combinations of existing prior art, a defendant should seriously consider filing an IPR petition. The absence of prior PTAB challenges means a new petition would be a first attempt to invalidate the claims.
• Monitor for new filings: Continuously monitor USPTO databases (such as Patent Center or the PTAB's Open Data Portal) for any newly filed IPR, PGR, or CBM petitions against U.S. Patent No. 10,651,866 by other parties. Such filings could impact strategy and provide insights into potential grounds of unpatentability.

Inventors

• Dashen Fan: Employer not explicitly stated in the patent document, but Google Patents lists him as an inventor associated with Kopin Corporation in other patents.
• Joseph Yong Kwon: Employer not explicitly stated in the patent document, but Google Patents lists him as an inventor associated with Kopin Corporation in other patents.

Original assignee

The original assignee named on the issued patent is Solos Technology Ltd.

Solos Technology Ltd. (also referred to as Solos Technology Limited) initially developed smart glasses technology. Solos is a tech startup spun off from Kopin Corporation, focusing on smart glasses with fitness and audio functions, including patented noise cancellation technology called Whisper™ Audio Technology. Solos also highlights its IP portfolio of over 100 patents and patent applications related to smart eyewear.

More recently, Solos Technology has rebranded and shifted its primary line of business to aroma recovery systems for premium dealcoholized beverages, utilizing a multi-patented solid-phase extraction innovation.

As of May 30, 2026, Solos Technology Ltd. appears to be an active, operating company, albeit with a significant shift in its core product focus. It is currently involved in patent infringement litigation concerning its smart glasses technology.

Assignment timeline

There are no recorded assignments for U.S. Patent 10,651,866 on the USPTO Assignment Center as of today's date, 2026-05-30.

This indicates that the original assignee, Solos Technology Ltd., still officially owns the patent according to USPTO records.

Timeline diagram

timeline
    title Ownership of US 10651866
    2019 : Application filed by Solos Technology Ltd
    2020 : Patent granted to Solos Technology Ltd
    2026 : Solos Technology Ltd files infringement suit

NPE / troll-pattern signals

1. Shell-entity transfer — not present. The patent remains with Solos Technology Ltd., which initially developed smart glasses products and is now active in the aroma recovery market.
2. Known asserter in the chain — unclear. While Solos Technology Ltd. has filed an infringement lawsuit, it is not listed as a known NPE on common directories (RPX, Unified Patents). However, its shift in product focus away from smart glasses while asserting patents in that domain could suggest a licensing-focused strategy for its older IP.
3. Repeat correspondent across the chain — not present. With no recorded assignments, there is no chain of correspondents to analyze.
4. Cascading transfers — not present. There are no recorded assignments.
5. Pre-litigation transfer — not present. There are no recorded assignments of the patent prior to the January 23, 2026, infringement lawsuit.
6. Bankruptcy fire-sale — not present. There is no indication that Solos Technology Ltd. has filed for bankruptcy.
7. Privateering — unclear. Solos Technology Ltd. was spun off from Kopin Corporation, and Kopin Corporation is still an active company. The relationship between Solos and Kopin regarding the assertion of this patent, and whether Kopin benefits from Solos's litigation, is not explicitly clear from the available public records.
8. Defensive aggregator (anti-NPE) — not present. The patent is currently owned by Solos Technology Ltd., an operating company.

Verdict

Operating-company assertion

While Solos Technology Ltd. has undergone a significant pivot in its primary line of business, it was initially an operating company that developed smart glasses technology. The current infringement lawsuit against Meta Platforms, Inc., et al. (Case# 1:26-cv-10304) involves the assertion of this patent, which relates to the smart glasses technology Solos previously developed. The absence of recorded assignments on the USPTO Assignment Center confirms that Solos Technology Ltd. remains the owner, indicating an assertion by the original developer of the technology.

USPTO Assignment Center search: https://assignmentcenter.uspto.gov/

Prior Art Analysis for U.S. Patent 10,651,866

An analysis of the prior art cited during the prosecution of U.S. Patent 10,651,866 reveals several key patents and applications that describe related technologies. The core of the '866 patent is the application of a fractional time delay to a digitally oversampled signal from a sensor before the signal is decimated to its baseband rate. This technique allows for very fine time-delay resolution, which is particularly advantageous for beamforming applications. The following prior art was considered by the USPTO examiner and is most relevant to the claims of the '866 patent.

Key Prior Art References

1. U.S. Patent No. 9,661,400 (Chabanne et al.)

• Full Citation: US 9,661,400 B2, "Method and a device for processing an audio signal captured by a microphone array," filed January 29, 2014; published May 23, 2017.
• Brief Description: This patent discloses a method for processing audio signals from a microphone array to create a directional capture. It involves applying a delay to the signals from different microphones before summing them. The delay is calculated to compensate for the time-of-arrival differences of a sound wave at each microphone, thereby "steering" the array's sensitivity in a specific direction. The patent discusses applying delays to achieve beamforming.
• Potential Anticipation of Claims: This reference is relevant to the general concept of using time delays for beamforming, as recited in claims 9-11 and 15-18 of the '866 patent, which are directed to beamforming applications. However, Chabanne et al. describes applying delays to the baseband signal after analog-to-digital conversion and decimation, not to the oversampled signal as taught in the '866 patent. This difference is a key distinguishing feature of the invention.

2. U.S. Patent No. 8,958,582 (Choi et al.)

• Full Citation: US 8,958,582 B2, "Method and apparatus for controlling beamforming," filed May 2, 2012; published February 17, 2015.
• Brief Description: Choi et al. describes an apparatus and method for beamforming that includes a delay unit for delaying an input signal. The system is designed to improve sound quality in devices like mobile phones by focusing on a sound source. This patent details the use of delay elements in a multi-microphone system to achieve directional sound pickup.
• Potential Anticipation of Claims: Similar to the '400 patent, this reference teaches the use of time delays for beamforming (relevant to claims 9-11 and 15-18). However, it does not explicitly disclose the application of these delays in the oversampled domain before decimation. The novelty of the '866 patent lies in performing this delay at a much higher sampling rate, which provides finer resolution than applying delays at the baseband rate.

3. U.S. Patent Application Publication No. 2011/0211718 A1 (Gieske et al.)

• Full Citation: US 2011/0211718 A1, "Fractional Delay for Beamforming with PDM Microphones," filed February 26, 2010; published September 1, 2011.
• Brief Description: This application is highly relevant as it explicitly discusses implementing fractional delays for beamforming with Pulse Density Modulated (PDM) microphones. PDM is a type of oversampling analog-to-digital conversion. Gieske et al. describe a method where a PDM signal is delayed and then filtered.
• Potential Anticipation of Claims: This publication appears to be the most pertinent prior art. It teaches the core concept of applying a delay to an oversampled (PDM) signal for beamforming purposes, which is central to independent claims 1 and 12 of the '866 patent. The key distinction, and likely the reason the '866 patent was granted over this reference, may lie in the specific implementation details of where the delay element is placed within the processing chain (e.g., before or between decimation/filtering stages) and the programmability of this delay, as detailed in the dependent claims of the '866 patent. For instance, the '866 patent describes in detail the placement of the delay element at various stages within a multi-stage PDM receiver module (FIGS. 5-7).

4. U.S. Patent No. 7,242,773 (Feng et al.)

• Full Citation: US 7,242,773 B2, "System and method for digital microphone interface and decimation filter," filed June 24, 2004; published July 10, 2007.
• Brief Description: This patent focuses on the interface and decimation filter for a digital microphone that outputs a one-bit, oversampled data stream (such as PDM). It describes the architecture of a PDM receiver module, including cascaded-integrator-comb (CIC) filters and other filter stages used to convert the oversampled signal to a baseband PCM signal.
• Potential Anticipation of Claims: This reference is relevant to the context of the PDM receiver module described in the '866 patent (e.g., element 280 in FIG. 2C and 314 in FIG. 3). It provides background on the standard components of such a system. However, Feng et al. does not teach or suggest the insertion of a programmable time delay element into the oversampled signal path for the purpose of beamforming. Therefore, it does not anticipate the core inventive concept of the '866 patent but rather describes the environment in which the invention operates.

Summary of Patentability

The patentability of US 10,651,866 appears to rest on the specific architectural choice of where to introduce a time delay in a digitally oversampled system. While the concept of using time delays for beamforming was well-established, and the use of oversampling digital microphones was also known, the '866 patent carves out a specific and efficient method for achieving highly precise, fractional time delays. By operating on the high-frequency, oversampled signal before it is decimated, the system can achieve a much finer delay resolution (a fraction of a baseband sample period) with simpler hardware (e.g., a small buffer) than would be required to implement a complex fractional delay filter on the baseband signal. The Gieske et al. application comes close to this concept, but the '866 patent's claims and specification provide a more detailed and flexible architecture, which was evidently sufficient to establish novelty and non-obviousness during examination.

An analysis of the obviousness of U.S. Patent No. 10,651,866 ("the '866 patent") under 35 U.S.C. § 103 suggests that its claims may be vulnerable to an obviousness challenge, particularly when considering the combination of prior art references cited during its prosecution. The legal standard for obviousness requires determining whether the differences between the claimed invention and the prior art are such that the invention as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art (PHOSITA).

A PHOSITA in this context would be an electrical engineer or a related professional with experience in digital signal processing (DSP), specifically in audio applications, analog-to-digital conversion, and microphone array systems. Such a person would be familiar with oversampling techniques like Pulse Density Modulation (PDM), decimation filters (e.g., CIC filters), and the principles of delay-and-sum beamforming.

Obviousness Analysis Based on Prior Art Combinations

The primary argument for the obviousness of the '866 patent's claims rests on the combination of U.S. Patent Application Publication No. 2011/0211718 A1 (Gieske et al.) and U.S. Patent No. 7,242,773 B2 (Feng et al.).

Primary Combination: Gieske et al. in view of Feng et al.

• Independent Claims 1 and 12: These claims broadly cover a system and method for receiving an oversampled digital signal from a sensor, applying a time delay to this oversampled signal, and then decimating and filtering it to a baseband rate.
• Gieske et al. Contribution: As noted in the prior art analysis, Gieske et al. is highly relevant because it explicitly teaches the core concept of implementing a fractional delay for beamforming directly on a Pulse Density Modulated (PDM) signal, which is a one-bit oversampled signal. This directly addresses the fundamental inventive concept of the '866 patent.
• Feng et al. Contribution: Feng et al. provides a detailed, conventional architecture for a PDM receiver module, which is the exact environment in which the '866 invention operates. Feng describes the standard stages of such a receiver, including the use of cascaded-integrator-comb (CIC) filters followed by other decimation and filtering stages to convert the oversampled PDM signal into a baseband PCM signal.
• Motivation to Combine: A PHOSITA, seeking to implement the fractional delay beamforming system for PDM microphones taught by Gieske et al., would naturally turn to a standard PDM receiver architecture like that detailed in Feng et al. Gieske teaches what to do (delay the PDM stream), and Feng teaches where to do it by laying out the standard signal processing path.

The '866 patent elaborates on placing the time delay element at various points within the oversampled domain: either before the PDM receiver module (FIG. 2C, element 276) or between the different decimation and filtering stages within the receiver (FIGS. 4, 5, 6, and 7). A PHOSITA would recognize that placing the delay element at any point before the final decimation to the baseband rate would still be in the "oversampled domain." The decision of where precisely to place this delay element would be a matter of routine engineering optimization, not invention.

For instance, placing the delay buffer at the highest sampling rate (before any filtering, as in FIG. 3) would provide the finest time resolution, as described in the '866 patent. Placing it after the first decimation stage (e.g., after the CIC filter, as in FIG. 5) would reduce the size of the required buffer at the cost of slightly coarser time resolution. These are predictable design trade-offs that a skilled engineer would evaluate based on system constraints like required precision, memory availability, and processing power. Therefore, exploring these different implementation points as shown in the '866 patent would have been an obvious design choice when combining the teachings of Gieske et al. and Feng et al.

Analysis of Dependent Claims

Many of the dependent claims of the '866 patent add further conventional details that would not overcome an obviousness rejection based on this combination.

• Programmable Delay (Claim 3): The concept of making a delay programmable for a beamforming application is inherent to "steering" the beam. As described in U.S. patents like Chabanne et al. (US 9,661,400 B2) and Choi et al. (US 8,958,582 B2), adjusting delays to change the directional focus of a microphone array is a fundamental aspect of beamforming. A PHOSITA implementing Gieske et al.'s delay would be motivated to make it programmable to create a steerable beam, a well-known goal in the art.
• Specific Filter Architectures (Claims 4, 5, 6): Claiming the use of a CIC filter, half-band filters, or a multi-stage architecture for the PDM receiver module merely recites the standard components of such a system, as explicitly taught by Feng et al. These elements are part of the known environment and do not add a non-obvious element to the claimed combination.
• Application to Beamforming (Claims 9-11, 15-18): These claims explicitly apply the time-delay method to a beamforming system with multiple microphones. This is the primary motivation disclosed by Gieske et al. and is the general context of Chabanne et al. and Choi et al. Combining the teachings would inherently lead to a beamforming application. The use of an arithmetic block to sum or subtract the delayed signals (FIG. 10) is the standard final step in any delay-and-sum beamformer.

Conclusion

A strong argument exists that the claims of U.S. Patent 10,651,866 would have been obvious to a person of ordinary skill in the art. The primary reference, Gieske et al., teaches the core concept of applying a fractional delay to an oversampled PDM signal for beamforming. Feng et al. teaches the conventional multi-stage architecture of the PDM receiver where this delay would be implemented. The motivation to combine these references would be to implement Gieske's concept using a standard, well-understood PDM receiver design as shown by Feng. The specific placement of the delay element within the oversampled processing chain, as detailed in the '866 patent, represents a set of predictable and obvious design choices for a skilled engineer seeking to optimize performance and resource usage. Additional features, such as programmability and the use of standard filter types, are also well-documented in the prior art and would be considered obvious additions to the core concept.

U.S. Patent 10,651,866: Term, Application History, and Family Details

An analysis of the prosecution history and continuity data for U.S. Patent No. 10,651,866 ("the '866 patent") provides the following details regarding its term, related applications, and projected expiration.

Patent Term and Expiration:

• Earliest Priority Date: The '866 patent claims priority to U.S. Application No. 15/225,745, which was filed on August 1, 2016.
• Standard Term: U.S. patents have a term of 20 years from the filing date of the earliest U.S. non-provisional application to which they claim priority.
• Patent Term Adjustment (PTA): A review of the patent's file history in the USPTO's Patent Center database indicates zero days of Patent Term Adjustment. The USPTO did not identify any of its own delays during prosecution that would warrant an extension of the patent's term.
• Patent Term Extension (PTE): There is no indication of any Patent Term Extension (PTE) for this patent. PTE is typically granted for delays caused by regulatory review (e.g., by the FDA) and is not applicable here.
• Projected Expiration Date: Based on the earliest priority date of August 1, 2016, and with no term adjustments, the projected expiration date for U.S. Patent No. 10,651,866 is August 1, 2036.

Continuation and Application History:

The '866 patent is part of a chain of "continuation" applications. This means the applicant filed subsequent applications based on the original disclosure to pursue different sets of claims.

• The application that matured into the '866 patent is U.S. Application No. 16/399,867, filed on April 30, 2019.
• This application is a continuation of U.S. Application No. 15/947,845, filed on April 8, 2018.
• The '845 application is, in turn, a continuation of U.S. Application No. 15/225,745, which was filed on August 1, 2016, and has since issued as U.S. Patent No. 9,941,895. This '895 patent is the parent patent in this specific chain.

Related Family Members:

The '866 patent is also related to at least one other U.S. patent through a shared priority claim, forming a larger patent family.

• U.S. Patent No. 11,082,055 B1: This patent, which issued from U.S. Application No. 16/851,044 (filed April 16, 2020), is also listed as part of the family. It shares the same priority date of August 1, 2016. This indicates it is likely another continuation or a divisional application stemming from the same original subject matter.

This network of related applications and patents demonstrates a strategy to build a broad portfolio of intellectual property around the core invention of applying fractional time delays in the oversampled domain.

Defensive Disclosure and Prior Art Generation for U.S. Patent 10,651,866

Publication Date: May 10, 2026
Field: Digital Signal Processing, Sensor Arrays, Beamforming
Technology: Fractional Time Delay in Oversampled Systems

This document discloses novel variations, applications, and integrations of the core technology described in U.S. Patent 10,651,866 (the '866 patent). The purpose is to place these concepts in the public domain, thereby establishing them as prior art against future patent applications on similar or incremental inventions. The core concept involves applying a controllable time delay to a digital signal in its oversampled state, prior to decimation and filtering to a baseband rate, to achieve high-resolution signal alignment.

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Axis 1: Material & Component Substitution

1.1. FPGA-Based Reconfigurable Delay and Filter Block

• Enabling Description: The time delay element (e.g., 808 in '866 patent) and the PDM receiver module (812) are implemented as a single, reconfigurable block on a Field-Programmable Gate Array (FPGA) or a System on a Chip (SoC) with an embedded FPGA. The delay is not a fixed-length buffer but a dynamically adjustable shift register synthesized in hardware description language (VHDL or Verilog). The number of delay stages (N) is controlled by writing to a memory-mapped register on the FPGA. This same FPGA fabric also implements the CIC, half-band, and FIR filter stages. This allows for in-field updates to both the delay resolution and the filter characteristics, such as changing the decimation ratio or filter coefficients to adapt to different acoustic environments or sensor types without hardware redesign. The entire path from PDM input to PCM output exists as a single, customizable IP core.
• Mermaid.js Diagram:

  graph TD
      A[Digital Sensor - PDM Output] --> B{FPGA Fabric};
      subgraph B [FPGA / SoC]
          C[PDM Input Interface] --> D[Programmable Shift Register (Delay Element)];
          E[Control Register] -.->|Sets Delay 'N'| D;
          D --> F[CIC Filter Stage];
          F --> G[Half-Band Filter 1];
          G --> H[Half-Band Filter 2];
          H --> I[Programmable FIR Filter];
      end
      I --> J[Baseband PCM Output];
      K[System Bus/CPU] --> E;
  

1.2. Switched-Capacitor Array for Analog PDM Delay

• Enabling Description: Instead of delaying the digital bitstream, the one-bit PDM signal (which is a high-frequency analog signal with two voltage levels) is passed through an analog delay line before being re-quantized. This delay line is composed of a series of switched-capacitor stages. A control voltage, set by a digital-to-analog converter (DAC) driven by the controller (e.g., 818 in '866 patent), adjusts the switching frequency of the MOSFETs in the capacitor array, thereby precisely controlling the group delay of the signal. This method avoids digital clock domain crossing issues and can offer lower power consumption in certain implementations. The output of the switched-capacitor delay line is then fed into a simple comparator to restore a clean digital PDM signal, which is then processed by a standard PDM receiver.
• Mermaid.js Diagram:

  sequenceDiagram
      participant DS as Digital Sensor
      participant SCA as Switched-Capacitor Array
      participant C as Comparator
      participant PDM_RX as PDM Receiver
      participant CTL as Controller
  
      DS->>+SCA: Oversampled PDM Signal (Analog Levels)
      CTL->>SCA: Set Control Voltage (for Delay)
      SCA->>+C: Time-Delayed PDM Signal
      C->>-PDM_RX: Re-quantized Digital PDM
      PDM_RX-->>DS: (Internal Processing)
      Note right of PDM_RX: Decimation & Filtering
  

1.3. Optical Fiber Delay for RF-Oversampled Signals

• Enabling Description: This variation replaces the digital sensor with a high-bandwidth electro-optical modulator that converts an analog RF signal from an antenna into a modulated light signal. The oversampling is performed in the optical domain. The time delay element is a variable-length fiber optic delay line. The length of the optical path is controlled using an optical switch matrix that routes the light through different lengths of spooled fiber optic cable. The delayed optical signal is then converted back to an electrical signal by a photodetector and processed by a high-speed ADC and digital decimator. This is applicable for phased-array radar or satellite communication systems where delays in the nanosecond range with picosecond resolution are required.
• Mermaid.js Diagram:

  graph TD
      subgraph RF Frontend
          A[Antenna] --> B(Low-Noise Amplifier);
      end
      B --> C(Electro-Optical Modulator);
      subgraph Optical Delay Unit
          C --> D{Optical Switch Matrix};
          D -- Path 1 --> E1[Fiber Spool 1 (Δt1)];
          D -- Path 2 --> E2[Fiber Spool 2 (Δt2)];
          D -- Path N --> En[Fiber Spool N (Δt_n)];
          E1 --> F(Optical Combiner);
          E2 --> F;
          En --> F;
      end
      G[Controller] --> D;
      F --> H(Photodetector);
      H --> I(High-Speed ADC & Decimator);
      I --> J[Baseband Digital Signal];
  

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Axis 2: Operational Parameter Expansion

2.1. Nanoscale NEMS Resonator Array for Mass Spectrometry

• Enabling Description: An array of nanoelectromechanical systems (NEMS) resonators is used, where each resonator's frequency shifts when a molecule adsorbs onto its surface. The frequency output of each resonator is an analog signal that is oversampled by a gigahertz-rate sigma-delta modulator. The resulting oversampled data streams are time-delayed with femtosecond precision using cryogenic digital logic. By "beamforming" the data from the NEMS array, the system can spatially resolve and identify different molecular species landing on the array surface with extremely high precision, effectively creating a high-resolution chemical imaging system.
• Mermaid.js Diagram:

  flowchart LR
      subgraph NEMS Array
          N1[Resonator 1] --> S1[ΣΔ Modulator 1];
          N2[Resonator 2] --> S2[ΣΔ Modulator 2];
          N3[Resonator 'n'] --> Sn[ΣΔ Modulator 'n'];
      end
      subgraph Cryogenic Processor
          S1 --> D1[ps-Delay 1];
          S2 --> D2[ps-Delay 2];
          Sn --> Dn[ps-Delay 'n'];
          D1 & D2 & Dn --> Sum(Arithmetic Combiner);
          Sum --> Filt(Decimator/Filter);
      end
      Filt --> Output[Mass/Location Data];
      Controller --> D1 & D2 & Dn;
  

2.2. Large-Scale Geophone Array for Seismic Imaging

• Enabling Description: The system is applied to a geographically distributed array of hundreds of geophone sensors for oil and gas exploration. Each geophone station digitizes the analog seismic signal using an oversampling ADC (e.g., 24-bit, 256 ksps). The raw oversampled data is transmitted via a high-speed network to a central processing cluster. Within the cluster, programmable time delays, corresponding to integer and fractional parts of the final baseband sample rate (e.g., 1 ms), are applied to the oversampled streams. These delays compensate for seismic wave propagation times through different geological strata. The delayed signals are then summed and decimated, allowing geophysicists to "steer" a listening beam deep into the Earth's crust to image subterranean structures with higher resolution than conventional methods.
• Mermaid.js Diagram:

  graph TD
      G1[Geophone 1] --> ADC1(Oversampling ADC 1);
      G2[Geophone 2] --> ADC2(Oversampling ADC 2);
      Gn[Geophone 'n'] --> ADCn(Oversampling ADC 'n');
  
      ADC1 --> |Network| C(Central Processor);
      ADC2 --> |Network| C;
      ADCn --> |Network| C;
  
      subgraph C
          D1[Delay Δt1];
          D2[Delay Δt2];
          Dn[Delay Δtn];
          C1[Data In 1] --> D1;
          C2[Data In 2] --> D2;
          Cn[Data In 'n'] --> Dn;
          D1 --> S(Summer);
          D2 --> S;
          Dn --> S;
          S --> F(Decimator & Filter);
      end
      F --> Img[Seismic Image];
  

2.3. High-Temperature Turbine Vibration Monitoring

• Enabling Description: A sensor array using piezoelectric accelerometers fabricated from Gallium Nitride (GaN) is mounted inside the hot section of a gas turbine engine, operating at temperatures exceeding 500°C. The analog signals are transmitted to a remote, cooler location where they are digitized by high-speed, oversampling ADCs. The fractional delay beamforming technique is used to isolate vibration signatures from specific individual turbine blades. By applying precise time shifts to the oversampled signals from sensors placed around the turbine casing, the system can focus on the acoustic and vibrational signature of a single blade as it rotates, enabling the detection of micro-cracks or fatigue far earlier than conventional system-wide vibration analysis.
• Mermaid.js Diagram:

  stateDiagram-v2
      state "Turbine Hot Section" as Hot {
          direction LR
          S1 : Sensor 1 (GaN)
          S2 : Sensor 2 (GaN)
          Sn : Sensor n (GaN)
      }
      state "Remote Electronics Unit" as Cold {
          direction LR
          ADC1 : Oversampling ADC 1
          ADC2 : Oversampling ADC 2
          ADCn : Oversampling ADC n
          Delay1: Delay Unit 1
          Delay2: Delay Unit 2
          Delayn: Delay Unit n
          Beamformer: Sum & Decimate
  
          ADC1 --> Delay1
          ADC2 --> Delay2
          ADCn --> Delayn
          Delay1 --> Beamformer
          Delay2 --> Beamformer
          Delayn --> Beamformer
      }
      S1 --> ADC1 : Analog Signal
      S2 --> ADC2 : Analog Signal
      Sn --> ADCn : Analog Signal
      Beamformer --> Output : Blade Health Data
  

---

Axis 3: Cross-Domain Application

3.1. Aerospace: GPS Anti-Jamming with Controlled Reception Pattern Antenna (CRPA)

• Enabling Description: A multi-element GPS antenna (CRPA) is used on an aircraft. The RF signal from each antenna element is down-converted, and the intermediate frequency (IF) signal is digitized using a high-rate oversampling ADC. To counteract jamming, the system identifies the angle of arrival of the jamming signal. A controller then calculates a set of precise fractional time delays for each channel. These delays are applied to the oversampled digital IF streams to align the jamming signals from each element with an inverted phase before they are summed. This creates a deep null in the antenna's reception pattern in the direction of the jammer, while desired GPS satellite signals from other directions are coherently summed for a processing gain. This significantly improves the resilience of GPS navigation in hostile electronic warfare environments.
• Mermaid.js Diagram:

  flowchart TD
      A1[Antenna 1] --> M1(RF Mixer 1);
      A2[Antenna 2] --> M2(RF Mixer 2);
      An[Antenna n] --> Mn(RF Mixer n);
  
      M1 --> ADC1(Oversampling ADC 1);
      M2 --> ADC2(Oversampling ADC 2);
      Mn --> ADCn(Oversampling ADC n);
  
      ADC1 --> D1[Fractional Delay 1];
      ADC2 --> D2[Fractional Delay 2];
      ADCn --> Dn[Fractional Delay n];
  
      JDA[Jammer Direction Analyzer] --> Controller;
      Controller -- Delay & Weight Values --> D1;
      Controller -- Delay & Weight Values --> D2;
      Controller -- Delay & Weight Values --> Dn;
  
      D1 --> S{Summer};
      D2 --> S;
      Dn --> S;
  
      S --> DEC(Decimator/Filter) --> GPS[GPS Signal Processor];
  

3.2. AgTech: Synthetic Aperture Soil Penetrating Radar

• Enabling Description: A tractor or autonomous rover is equipped with a linear array of ground-penetrating radar (GPR) transceivers. As the vehicle moves, each transceiver emits pulses and records the echoes. The received analog echo signals are digitized using oversampling converters. The data streams from the entire array are stored. In post-processing, fractional time delays are applied to the oversampled echo data from different spatial locations (i.e., from different points along the vehicle's path). This process, known as "delay-and-sum" beamforming in the synthetic aperture context, focuses the radar energy at specific depths and locations under the soil. This allows for the high-resolution 3D mapping of soil moisture, root systems, or buried irrigation lines, with a much higher resolution than a single GPR unit could provide.
• Mermaid.js Diagram:

  sequenceDiagram
      participant Vehicle
      participant GPR_Array
      participant Data_Recorder
      participant Post_Processor
  
      loop For each position X
          Vehicle->>GPR_Array: Trigger Pulse at X
          GPR_Array-->>Data_Recorder: Record Oversampled Echo Data(X)
      end
  
      Post_Processor->>Data_Recorder: Retrieve all Echo Data
      Note over Post_Processor: Apply fractional time delays to Data(X_n) to focus on target (Y, Z)
      Post_Processor->>Post_Processor: Sum delayed signals & Decimate
      Post_Processor-->>Output: 3D Soil Map Image
  

3.3. Medical Imaging: Ultrasound Tomography

• Enabling Description: In a medical ultrasound probe containing an array of hundreds of transducer elements, the received analog signals from each element are immediately digitized by an on-chip oversampling ADC. To form a high-resolution image, the raw oversampled data streams from all elements are processed in parallel. A powerful FPGA or GPU applies dynamic, programmable fractional time delays to each channel. The delays are calculated based on the geometry of the transducer array and the desired focal point within the patient's body. By sweeping the focal point rapidly, the system can reconstruct a complete 2D or 3D image. Applying delays in the oversampled domain, rather than the baseband, allows for much finer focusing (sub-sample resolution), leading to sharper images with fewer artifacts, improving diagnostic accuracy.
• Mermaid.js Diagram:

  graph TD
      subgraph Ultrasound Probe
          T1[Transducer 1] --> ADC1(Oversample ADC);
          T2[Transducer 2] --> ADC2(Oversample ADC);
          Tn[Transducer n] --> ADCn(Oversample ADC);
      end
      subgraph Image Processor (FPGA/GPU)
          ADC1 --> D1[Dynamic Delay Δt1];
          ADC2 --> D2[Dynamic Delay Δt2];
          ADCn --> Dn[Dynamic Delay Δtn];
          D1 & D2 & Dn --> Sum(Beamforming Adder);
          Sum --> Filt(Filter/Decimator/Envelope Detector);
      end
      Filt --> Img[Image Reconstruction];
      Controller[Focal Point Controller] --> D1 & D2 & Dn;
  

---

Axis 4: Integration with Emerging Tech

4.1. AI-Driven Adaptive Beamforming for Speech Separation

• Enabling Description: The system is used in a smart speaker with a microphone array. A deep neural network (DNN) runs on a dedicated AI accelerator chip. The DNN receives the beamformed baseband audio output and a 'cacophony score' representing the noise level. The network's output layer directly controls the fractional delay values (N) for each oversampled microphone channel. The system is trained via reinforcement learning, where the reward function is maximizing the signal-to-interference-plus-noise ratio (SINR) of a target speaker's voice. The AI learns to dynamically steer the beam and even create nulls in the direction of competing speakers or noise sources in real-time, far more effectively than a traditional fixed-algorithm beamformer.
• Mermaid.js Diagram:

  flowchart LR
  MicArray -->|Oversampled Signals| DelayBlock[Programmable Delay Elements];
  DelayBlock --> Beamformer[Sum & Decimate];
  Beamformer -->|Baseband Audio| DNN;
  Beamformer -->|Baseband Audio| SINR_Calc[SINR Calculator];
  
  subgraph AI Controller
      DNN[Deep Neural Network];
      SINR_Calc -->|Reward Signal| DNN;
  end
  
  DNN --|New Delay Values| DelayBlock;
  Beamformer --> OutputAudio;
  

4.2. IoT-Networked Acoustic Monitoring for Predictive Maintenance

• Enabling Description: An array of MEMS microphones is deployed across a factory floor, with each microphone system acting as an IoT node. Each node digitizes audio using oversampling and connects to a central server via a time-synchronized protocol like PTP (Precision Time Protocol). The server collects the raw, oversampled streams. To inspect a specific machine, an operator selects it on a dashboard. The server then calculates the required fractional time delays for the relevant microphone nodes to form an acoustic beam focused on that machine. The beamformed, decimated audio is then fed into a machine learning model trained to detect anomalies like bearing wear or motor imbalance. This allows for targeted, non-intrusive monitoring of equipment across a large, noisy facility.
• Mermaid.js Diagram:

  graph TD
      subgraph IoT Nodes
          Node1[Mic 1 + ADC] -- PTP Sync & Oversampled Stream --> N(Network);
          Node2[Mic 2 + ADC] -- PTP Sync & Oversampled Stream --> N;
          NodeN[Mic N + ADC] -- PTP Sync & Oversampled Stream --> N;
      end
      subgraph Cloud/Server
          N --> DataIngest(Data Ingest);
          DataIngest --> DelayProcessor[Fractional Delay Processor];
          Dashboard[Operator Dashboard] -->|Target Machine Coords| DelayProcessor;
          DelayProcessor --> Beamformer[Sum & Decimate];
          Beamformer --> ML[Anomaly Detection Model];
      end
      ML --> Alert[Maintenance Alert];
  

---

Axis 5: The "Inverse" or Failure Mode

5.1. Graceful Degradation Mode for Hearing Aids

• Enabling Description: A hearing aid uses a dual-microphone array with fractional delay beamforming to focus on a speaker in a noisy environment (e.g., a restaurant). A power management IC monitors the battery level. When the battery drops below a 20% threshold, the controller (818) switches the system to a "low-power" mode. In this mode, the oversampling clock frequency is halved (e.g., from 2.048 MHz to 1.024 MHz), the high-order FIR filter (328) is bypassed, and the programmable delay element (808) is set to a fixed, zero-delay value. The system then operates as a simple omnidirectional microphone pair, consuming significantly less power. While the advanced directional focus is lost, the user retains basic hearing assistance, extending the device's operational life until it can be recharged.
• Mermaid.js Diagram:

  stateDiagram-v2
      [*] --> FullPower
      FullPower: High-Res Beamforming
      FullPower: f_SF = 2.048MHz
      FullPower: Full PDM Filtering
      FullPower: Programmable Fractional Delay
  
      FullPower --> LowPower : Battery < 20%
      LowPower --> FullPower : Charging
  
      LowPower: Omnidirectional
      LowPower: f_SF = 1.024MHz
      LowPower: Simplified Filtering
      LowPower: Delay Bypassed (Δt = 0)
  

5.2. Acoustic Null-Steering for Privacy Applications

• Enabling Description: The invention is implemented in a conference room speakerphone to create a "cone of silence." Instead of summing the time-delayed signals to enhance a sound source (constructive interference), the system subtracts them or adjusts delays and gains to create destructive interference. An operator can define a spatial zone (e.g., a visitor's chair) where audio should not be picked up. The controller (904) calculates the Δt values for each microphone in the array that will cause signals originating from that zone to cancel each other out when combined. This creates a deep null in the microphone array's sensitivity pattern, ensuring that side conversations in the designated zone are not transmitted, thereby protecting privacy.
• Mermaid.js Diagram:

  graph TD
      subgraph Mic Array
          M1[Mic 1]; M2[Mic 2]; Mn[Mic n];
      end
  
      subgraph Processor
          M1 --> D1[Delay Δt1];
          M2 --> D2[Delay Δt2];
          Mn --> Dn[Delay Δtn];
  
          D1 --> S(Arithmetic Unit);
          D2 --> S;
          Dn --> S;
      end
  
      Controller -- Control Signals --> D1;
      Controller -- Control Signals --> D2;
      Controller -- Control Signals --> Dn;
      Controller -- Mode: Null-Steering --> S;
      UserInput[User Defines Privacy Zone] --> Controller;
  
      S --> Output[Transmitted Audio];
      style M1 fill:#f9f,stroke:#333,stroke-width:2px
      style M2 fill:#f9f,stroke:#333,stroke-width:2px
      style Mn fill:#f9f,stroke:#333,stroke-width:2px
  

---

Combination Prior Art Scenarios

C.1. Integration with I2S/TDM Bus Standards

• Enabling Description: The time delay element is embodied as a specialized bus interface peripheral for an audio Digital Signal Processor (DSP). The peripheral is designed to sit on a Time-Division Multiplexed (TDM) audio bus, which is an extension of the I2S standard used to carry multiple channels of PDM data on a single data line. The peripheral snoops the frame clock (FSYNC) to identify the start of each channel's data slot. It contains a separate programmable buffer for each channel (e.g., up to 8 channels for TDM-8). A controller writes the desired delay, in units of bit-clock cycles, to a set of registers corresponding to each audio channel. The peripheral outputs a new, time-aligned TDM stream where each channel has been individually delayed with fractional-baseband-period precision. This creates a standard-compliant hardware block for multi-channel PDM beamforming pre-processing.

C.2. Integration with AES69 (SOFA) File Format

• Enabling Description: A method and system for embedding beamforming parameters directly into a Spatially Oriented Format for Acoustics (SOFA) file. A SOFA file traditionally stores Head-Related Transfer Functions (HRTFs) or microphone array impulse responses. This disclosure describes an extension to the SOFA specification by adding a new data type: OversampledFractionalDelay. For each microphone position defined in the file (SourcePosition), a corresponding OversampledFractionalDelay variable is stored. This variable contains two values: the oversampling-to-baseband ratio (R) and the number of oversampling clock cycles of delay (N). A SOFA-compliant renderer or audio engine would read these parameters and apply the specified delay Δt = N * (1 / (f_bb * R)) to the corresponding oversampled audio stream before decimation, allowing for the precise recreation of a pre-configured beamformed soundfield described by the SOFA file.

C.3. Integration with WebRTC Standard for Browser-Based Beamforming

• Enabling Description: A method for enabling high-resolution beamforming in a web browser using the WebRTC API. A custom JavaScript AudioWorkletProcessor is defined. This processor receives multiple raw audio streams from a USB microphone array connected to the client machine. Although the browser's Web Audio API typically provides access only to baseband audio, this disclosure describes a custom hardware driver for the microphone array that exposes the raw, oversampled PDM streams to the worklet. The AudioWorkletProcessor then implements the fractional delay logic of the '866 patent in software (e.g., using a circular buffer in a SharedArrayBuffer). The controller is a JavaScript function that adjusts the delay based on user input or another algorithm (e.g., voice activity detection) to steer the beam during a WebRTC video conference, improving clarity without requiring native applications or specialized hardware on the receiving end.