US 11082055

US Patent 11082055, titled "Beamforming using fractional time delay in digitally oversampled sensor systems, apparatuses, and methods," was filed on April 16, 2020, and issued on August 3, 2021. The inventors are Dashen Fan and Joseph Yong Kwon. The current assignee is Solos Technology Ltd.

Abstract:
The patent describes systems and methods for applying a time delay to a signal produced by an analog-to-digital converter (ADC). This ADC includes a digital sensor that detects an analog field quantity and outputs an oversampled digital signal at a specific sampling clock frequency. A time delay element receives this oversampled digital signal and produces a time-delayed version. Subsequently, a filter processes the delayed signal by low-pass filtering and decimation, reducing it to a lower sample rate. The final output is a low-pass filtered, decimated, and delayed digital signal, where the lower sample rate is less than the initial sampling clock frequency.

Independent Claims Overview:

• Claim 1 (System for time delaying a signal): This claim describes a system that delays a signal from an analog-to-digital converter (ADC). The system includes a digital sensor that responds to an analog physical quantity and produces an oversampled digital signal at a certain clock frequency. A time delay element receives this oversampled signal and outputs a delayed version. A filter then processes this delayed signal by low-pass filtering and reducing its sample rate to a value lower than the initial clock frequency, producing a final delayed output signal.

• Claim 11 (Apparatus for time delaying a signal): This claim covers an apparatus designed to delay a signal coming from an analog-to-digital converter (ADC). The apparatus comprises a digital sensor for detecting an analog physical quantity, which generates an oversampled digital signal at a sampling clock frequency. A time delay element is included to receive this oversampled digital signal and introduce a delay, outputting a time-delayed oversampled signal. The apparatus also features a filter that takes the delayed oversampled signal, applies low-pass filtering, and decimates it to a lower sampling rate, resulting in a delayed, low-pass filtered, and decimated digital output signal.

• Claim 12 (Method for time delaying a signal): This claim outlines a method for delaying a signal from an analog-to-digital converter (ADC). The method involves converting an analog physical quantity into an oversampled digital signal using a digital sensor operating at a specific sampling clock frequency. This oversampled digital signal is then subjected to a time delay, resulting in a time-delayed oversampled digital signal. Finally, the method includes filtering this delayed oversampled signal by low-pass filtering and decimation to a lower sample rate, producing a low-pass filtered, decimated, and delayed digital output signal.

Litigation:
The patent family for US11082055 is involved in litigation. As of the current date, there is a US case filed in the Court of Appeals for the Federal Circuit (CAFC case number 26-1721), and another US case filed in the Massachusetts District Court (case number 1:26-cv-10304).