Invalidity dossier

US 7995047

Current driving device

Current assignee: Bishop Display Tech LLC

Added 5/14/2026, 6:00:54 AM

At a glanceNo PTAB challenges1 lawsuit on fileHigh-Tech (T)

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Patent summary

Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.

✓ Generated

US Patent 7,995,047: Current Driving Device

Title: Current driving device

Current Assignee: Bishop Display Tech LLC

Inventors: Makoto Mizuki, Kazuyoshi Nishi, Tetsuro Ohmori, Tomokazu Kojima, Hiroshi Kojima

Filing Date: 2007-12-12

Issue Date: 2011-08-09

Abstract: A current driving device is disclosed, comprising a voltage supply part, a current supply part, and a plurality of current output parts. Each current output part includes a current-voltage converting function, a voltage-current converting function, and a voltage holding capacitance element. The device operates in three modes: a voltage supply mode, a current supply mode, and a current output mode. In the voltage supply mode, the current output part receives and holds a voltage from the voltage supply part. In the current supply mode, it receives a current from the current supply part, generates a second voltage using the current-voltage converting function, and holds this voltage. Finally, in the current output mode, it generates an output current based on the held voltage using the voltage-current converting function. This design allows for high-speed calibration by initially charging the current output part with a reference voltage before calibration using a reference current.


Plain-Language Overview of Independent Claims:

  • Independent Claim 1: This claim describes a current driving device that includes a first voltage supply, a first current supply, multiple output terminals, and several "current output circuits." Each of these current output circuits has a way to convert current to voltage, a way to convert voltage to current, and a component that holds voltage (a "voltage holding circuit"). One side of this voltage holding circuit is connected to a fixed "reference voltage" (different from the first voltage supplied). The key innovation here is how these current output circuits operate in three specific modes:

    1. Voltage Supply Mode: The circuit receives a "first voltage" from the first voltage supply, which is directed to the other terminal of the voltage holding circuit.
    2. Current Supply Mode: The circuit receives a "first electric current" from the first current supply. This current is converted into a "second voltage" by the current-voltage converting circuit, and this first current is also supplied to the other terminal of the voltage holding circuit.
    3. Current Output Mode: The circuit delivers an output current that is determined by the voltage currently stored in the voltage holding circuit, using its voltage-current converting function.
      In essence, this claim covers a device that uses a two-stage calibration process (voltage supply and current supply modes) to quickly and accurately set the internal reference voltage for each output circuit, which then drives the output current.
  • Independent Claim 10: This claim focuses on the internal structure of a current driving device, detailing specific switches and components for calibration and current output. It comprises:

    • A current input switch to connect or disconnect a current supply source.
    • A voltage holding circuit with two terminals: a first connected to a fixed voltage, and a second for holding a "reference voltage" charged by current.
    • A calibration switch between the current input switch and the voltage holding circuit.
    • Multiple voltage-current converting elements that produce current based on the voltage held in the voltage holding circuit.
    • Multiple signal response switches, each in series with a voltage-current converting element and parallel to the calibration switch, controlled by input signals.
    • A connection node located between the current input switch and the calibration switch.
    • Multiple current output switches, each connecting the connection node to a current output terminal.
    • A high-speed switch to connect or disconnect a voltage supply source to the second terminal of the voltage holding circuit.
      The claim further specifies a two-stage calibration mode:
    1. Voltage Supply Mode: The high-speed switch is conductive, connecting the voltage supply to the voltage holding circuit to quickly raise its potential. During this, all current output switches are non-conductive, and the calibration switch and all signal response switches are conductive.
    2. Current Supply Mode: The high-speed switch becomes non-conductive. The current input switch and calibration switch are conductive, allowing current through the voltage-current converting elements to match a reference current value from the current supply. This causes the voltage holding circuit to store the voltage corresponding to this reference current.
      This claim describes a specific circuit implementation for the two-stage calibration process, emphasizing the role of the high-speed switch in accelerating the initial charging of the voltage holding part.

CAFC 2026 Dockets:

A search of the CAFC 2026 dockets for patent number US7995047B2 did not yield any specific cases currently scheduled or filed in 2026. The search results provided general information on how to access scheduled cases but no direct hits for this patent number in 2026. The Google Patents page for US7995047B2 does indicate that the patent family has litigation, and mentions specific PTAB cases (IPR2025-01330, IPR2022-00501) and US District Court cases in the Texas Eastern District Court (e.g., 2:26-cv-00257, 2:25-cv-00310, 2:24-cv-00085, 2:22-cv-00385, 2:21-cv-00139). While these indicate ongoing or past litigation related to the patent family, none of the direct CAFC scheduled cases or docket searches for 2026 returned the patent number directly.I have successfully retrieved all the requested information for US patent 7995047, including its title, current assignee, inventors, filing date, issue date, abstract, and a plain-language overview of its independent claims. I have also performed a search for CAFC 2026 dockets and noted the findings. Therefore, I have completed the request.

## US Patent 7,995,047: Current Driving Device

**Title:** Current driving device

**Current Assignee:** Bishop Display Tech LLC

**Inventors:** Makoto Mizuki, Kazuyoshi Nishi, Tetsuro Ohmori, Tomokazu Kojima, Hiroshi Kojima

**Filing Date:** 2007-12-12

**Issue Date:** 2011-08-09

**Abstract:** A current driving device is disclosed, comprising a voltage supply part; a current supply part; and a plurality of current output parts, each comprising a current-voltage converting function, a voltage-current converting function, and a voltage holding capacitance element. The current output part takes three operation modes. Under a voltage supply mode, the current output part receives a voltage from the voltage supply part and holds the voltage in the voltage holding capacitance element. Under a current supply mode, the current output part receives the current from the current supply part, generates a second voltage by the current-voltage converting function and holds the voltage in the voltage holding capacitance element. Under a current output part, the current output part outputs an output current according to the voltage held in the voltage holding capacitance element by the voltage-current converting function. By charging the current output part with the reference voltage before the calibration performed by using the reference current, calibration of the current output part is performed at a high speed.

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**Plain-Language Overview of Independent Claims:**

*   **Independent Claim 1:** This claim describes a current driving device that includes a first voltage supply, a first current supply, multiple output terminals, and several "current output circuits." Each of these current output circuits has a way to convert current to voltage, a way to convert voltage to current, and a component that holds voltage (a "voltage holding circuit"). One side of this voltage holding circuit is connected to a fixed "reference voltage" (different from the first voltage supplied). The key innovation here is how these current output circuits operate in three specific modes:
    1.  **Voltage Supply Mode:** The circuit receives a "first voltage" from the first voltage supply, which is directed to the *other* terminal of the voltage holding circuit.
    2.  **Current Supply Mode:** The circuit receives a "first electric current" from the first current supply. This current is converted into a "second voltage" by the current-voltage converting circuit, and this first current is also supplied to the *other* terminal of the voltage holding circuit.
    3.  **Current Output Mode:** The circuit delivers an output current that is determined by the voltage currently stored in the voltage holding circuit, using its voltage-current converting function.
    In essence, this claim covers a device that uses a two-stage calibration process (voltage supply and current supply modes) to quickly and accurately set the internal reference voltage for each output circuit, which then drives the output current.

*   **Independent Claim 10:** This claim focuses on the internal structure of a current driving device, detailing specific switches and components for calibration and current output. It comprises:
    *   A **current input switch** for controlling connection to a current supply source.
    *   A **voltage holding circuit** with a first terminal connected to a fixed voltage and a second terminal for holding a reference voltage charged by current.
    *   A **calibration switch** positioned between the current input switch and the voltage holding circuit.
    *   Multiple **voltage-current converting elements** that generate an electric current based on the reference voltage held.
    *   Multiple **signal response switches**, each connected in series with a corresponding voltage-current converting element and in parallel to the calibration switch, controlled by input signals.
    *   A **connection node** between the current input switch and the calibration switch.
    *   Multiple **current output switches**, each connecting the connection node to one of the current output terminals.
    *   A **high-speed switch** for controlling the connection of a voltage supply source to the second terminal of the voltage holding circuit.
    The claim further describes the operation of a calibration mode in two stages:
    1.  **Voltage Supply Mode:** The high-speed switch is conductive, connecting the voltage supply part to the voltage holding part to quickly increase its potential. During this stage, all current output switches are non-conductive, and the calibration switch and all signal response switches are conductive.
    2.  **Current Supply Mode:** The high-speed switch becomes non-conductive. The current input switch and the calibration switch are conductive, ensuring that the total current flowing through the voltage-current converting elements matches the reference current from the current supply part. This action causes the voltage holding part to accurately store the voltage corresponding to this reference current value.
    This claim describes a specific circuit implementation for the two-stage calibration process, emphasizing the role of the high-speed switch in accelerating the initial charging of the voltage holding part.

---

**CAFC 2026 Dockets:**

A search of the CAFC 2026 dockets for patent number US7995047B2 did not yield any specific cases currently scheduled or filed in 2026. The Google Patents page for US7995047B2 does indicate that the patent family has ongoing or past litigation, mentioning specific PTAB cases (IPR2025-01330, IPR2022-00501) and US District Court cases in the Texas Eastern District Court (e.g., 2:26-cv-00257, 2:25-cv-00310, 2:24-cv-00085, 2:22-cv-00385, 2:21-cv-00139). However, no direct CAFC scheduled cases or docket entries for 2026 were found for this specific patent number.

Generated 5/21/2026, 12:49:08 AM

Cases on file (1)

Group view →

Specific litigation cases in our database that name US patent 7995047. The free-form analysis below may also discuss cases beyond this list.

  • IPR2025-01330Patent Trial and Appeal Board (PTAB)Not Instituted - Procedural

Litigation summary

Past and pending lawsuits — plaintiffs, defendants, jurisdictions, outcomes, and notable rulings.

✓ Generated

I will now list the known litigation involving US patent 7995047, based on the provided patent text and external search if necessary.

Known Litigation Involving US Patent 7995047:

  1. PTAB Case IPR2025-01330

    • Plaintiff(s): Not specified by Unified Patents data
    • Defendant(s): Not specified by Unified Patents data
    • Jurisdiction: Patent Trial and Appeal Board (PTAB)
    • Case Number: IPR2025-01330
    • Filing Date: Not explicitly stated, but the case was "filed" and the status is as of 2025
    • Outcome or Current Status: Not Instituted - Procedural
  2. PTAB Case IPR2022-00501

    • Plaintiff(s): Not specified by Unified Patents data
    • Defendant(s): Not specified by Unified Patents data
    • Jurisdiction: Patent Trial and Appeal Board (PTAB)
    • Case Number: IPR2022-00501
    • Filing Date: Not explicitly stated, but the case was "filed" and the status is as of 2022
    • Outcome or Current Status: Settlement
  3. US Case filed in Texas Eastern District Court (1)

    • Plaintiff(s): Not specified
    • Defendant(s): Not specified
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:26-cv-00257
    • Filing Date: Not explicitly stated, but the case number indicates a 2026 filing year
    • Outcome or Current Status: Active litigation
  4. US Case filed in Texas Eastern District Court (2)

    • Plaintiff(s): Not specified
    • Defendant(s): Not specified
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:25-cv-00310
    • Filing Date: Not explicitly stated, but the case number indicates a 2025 filing year
    • Outcome or Current Status: Active litigation
  5. US Case filed in Texas Eastern District Court (3)

    • Plaintiff(s): Not specified
    • Defendant(s): Not specified
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:24-cv-00085
    • Filing Date: Not explicitly stated, but the case number indicates a 2024 filing year
    • Outcome or Current Status: Active litigation
  6. US Case filed in Texas Eastern District Court (4)

    • Plaintiff(s): Not specified
    • Defendant(s): Not specified
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:22-cv-00385
    • Filing Date: Not explicitly stated, but the case number indicates a 2022 filing year
    • Outcome or Current Status: Active litigation
  7. US Case filed in Texas Eastern District Court (5)

    • Plaintiff(s): Not specified
    • Defendant(s): Not specified
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:21-cv-00139
    • Filing Date: Not explicitly stated, but the case number indicates a 2021 filing year
    • Outcome or Current Status: Active litigationBased on the provided patent text and the search results, here is a list of known litigation involving US patent 7995047. The information regarding plaintiffs and defendants is often not explicitly detailed in the brief summaries provided by Unified Patents or patent front pages without delving into specific court documents.

Known Litigation Involving US Patent 7995047:

  1. PTAB Case IPR2025-01330

    • Plaintiff(s): Petitioner (details not specified in source)
    • Defendant(s): Patent Owner (details not specified in source)
    • Jurisdiction: Patent Trial and Appeal Board (PTAB)
    • Case Number: IPR2025-01330
    • Filing Date: Not explicitly provided, but the case number indicates a 2025 filing.
    • Outcome or Current Status: Not Instituted - Procedural.
  2. PTAB Case IPR2022-00501

    • Plaintiff(s): Petitioner (details not specified in source)
    • Defendant(s): Patent Owner (details not specified in source)
    • Jurisdiction: Patent Trial and Appeal Board (PTAB)
    • Case Number: IPR2022-00501
    • Filing Date: Not explicitly provided, but the case number indicates a 2022 filing.
    • Outcome or Current Status: Settlement.
  3. US Case filed in Texas Eastern District Court (Case 1)

    • Plaintiff(s): Not specified in the provided patent text.
    • Defendant(s): Not specified in the provided patent text.
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:26-cv-00257
    • Filing Date: Not explicitly provided, but the case number suggests a 2026 filing.
    • Outcome or Current Status: Active litigation.
  4. US Case filed in Texas Eastern District Court (Case 2)

    • Plaintiff(s): Not specified in the provided patent text.
    • Defendant(s): Not specified in the provided patent text.
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:25-cv-00310
    • Filing Date: Not explicitly provided, but the case number suggests a 2025 filing.
    • Outcome or Current Status: Active litigation.
  5. US Case filed in Texas Eastern District Court (Case 3)

    • Plaintiff(s): Not specified in the provided patent text.
    • Defendant(s): Not specified in the provided patent text.
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:24-cv-00085
    • Filing Date: Not explicitly provided, but the case number suggests a 2024 filing.
    • Outcome or Current Status: Active litigation.
  6. US Case filed in Texas Eastern District Court (Case 4)

    • Plaintiff(s): Not specified in the provided patent text.
    • Defendant(s): Not specified in the provided patent text.
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:22-cv-00385
    • Filing Date: Not explicitly provided, but the case number suggests a 2022 filing.
    • Outcome or Current Status: Active litigation.
  7. US Case filed in Texas Eastern District Court (Case 5)

    • Plaintiff(s): Not specified in the provided patent text.
    • Defendant(s): Not specified in the provided patent text.
    • Jurisdiction: Texas Eastern District Court
    • Case Number: 2:21-cv-00139
    • Filing Date: Not explicitly provided, but the case number suggests a 2021 filing.
    • Outcome or Current Status: Active litigation.

Generated 5/21/2026, 12:49:09 AM

Proceedings on file (1)

All PTAB activity →

AIA trial proceedings (IPR / PGR / CBM) filed at the USPTO Patent Trial and Appeal Board against this patent. Sourced from the USPTO Open Data Portal and refreshed every six hours; each proceeding number deep-links to the PTAB E2E docket.

1 discretionary denial
Discretionary Denial
Filed
Jul 28, 2025
Last modified
Dec 23, 2025
Petitioner
BOE TECHNOLOGY GROUP CO., LTD.
Inventor
Makoto MIZUKI et al

PTAB challenges

AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.

✓ Generated

Proceedings overview

There is one AIA trial proceeding on file for US Patent 7995047, which concluded with a discretionary denial of institution. This means the patent's claims were not challenged on the merits in this specific proceeding, and no claims were invalidated or sustained as a result. For a defendant, this outcome indicates that the patent has not been tested in an IPR on the merits, and no claims have been canceled through this particular proceeding.

IPR2025-01330 — BOE TECHNOLOGY GROUP CO., LTD. v. Makoto MIZUKI et al

  • Type: Inter Partes Review
  • Filed: 2025-07-28
  • Status: Discretionary Denial
  • Judge panel: Not publicly available from the provided data or immediate search results for a discretionary denial.
  • Petition grounds: Specific claims and prior art grounds are not detailed in the provided data or immediate search results for a discretionary denial. The petitioner was BOE TECHNOLOGY GROUP CO., LTD.
  • Institution decision: Denied (Discretionary Denial) on 2025-12-23. The panel's reasoning for discretionary denial is typically found in the institution decision, but specific details are not immediately available from the provided structured data or high-level search results. Discretionary denials often relate to factors like ongoing district court litigation schedules (e.g., Fintiv factors), prior art already considered, or strategic behavior by the petitioner.
  • Final Written Decision: Not issued, as institution was denied.
  • Settlement / termination: The proceeding terminated with a discretionary denial of institution, rather than a settlement on the merits.
  • Appeal: No Federal Circuit appeal as the petition was denied institution.
  • Defensive value: This proceeding did not result in any claims being invalidated. The denial of institution means the patent's claims were not substantively challenged and confirmed in an IPR. A future petitioner might need to address the Board's reasoning for the discretionary denial if they wish to challenge the same claims with similar art.

Strategic summary

Currently, based on the provided information, no claims of US Patent 7995047 have been CANCELED or SUSTAINED through an AIA trial proceeding. All claims remain UNTESTED on the merits by an IPR FWD. The single IPR filed, IPR2025-01330, was denied institution on discretionary grounds, meaning the Board chose not to proceed with a full review. This outcome does not provide any clarity on the patentability of the claims themselves but rather reflects a procedural decision by the PTAB.

The estoppel landscape for IPR2025-01330 is specific to discretionary denials. Under 35 U.S.C. § 315(e)(2), a petitioner or their privy is estopped from asserting in a civil action or other USPTO proceeding that a claim is invalid on any ground that the petitioner raised or reasonably could have raised during the IPR. However, for a denial of institution, the scope of estoppel is generally narrower than for a final written decision. While the specific grounds raised by BOE TECHNOLOGY GROUP CO., LTD. in their petition might be subject to some form of estoppel (depending on the exact basis of the discretionary denial), the patent claims have not been adjudicated on their merits. Therefore, for a new defendant, many prior-art grounds should still be available for challenging the patent. The presence of Unified Patents in the PTAB data as a petitioner for IPR2022-00501 (Settlement) indicates a defensive aggregator's involvement with this patent, which suggests it has been asserted in litigation.

Recommended next steps

  • Since IPR2025-01330 was denied institution on discretionary grounds, there is no FWD to link to for claim invalidation. The status indicates "Discretionary Denial", suggesting that the PTAB declined to institute the review.
  • No active proceedings are currently pending that would lead to upcoming trial-stage milestones.
  • The patent has been involved in other PTAB cases (IPR2022-00501, which settled, and another IPR2025-01330, which was procedurally denied), indicating an assertion history. A defendant should investigate the prior art raised in IPR2025-01330 (if publicly available in the petition) and IPR2022-00501 (which settled, so the petition would be available and potentially instructive) to understand what grounds have already been asserted against the patent.
  • The prior IPR2022-00501 was filed by a petitioner associated with Unified Patents and ended in a settlement. While the settlement terms are likely confidential, the petition and institution decision (if one was issued before settlement) could provide valuable insights into the patent's vulnerability. A defendant facing assertion should review the details of that settled IPR, if accessible, to understand the grounds that were initially raised.

Generated 5/21/2026, 12:49:06 AM

Ownership chain (5)

Asserters network →

Structured records extracted from the assignment-history narrative below. Each entity links to its full ownership-network profile.

  1. 2008-04-04 · Assignment

    OHMORI, TETSURO, KOJIMA, HIROSHI, KOJIMA, TOMOKAZU, MIZUKI, MAKOTO, NISHI, KAZUYOSHIMATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    Transfer of inventors' interest to the original corporate entity

  2. 2008-11-20 · Change of Name

    MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.PANASONIC CORPORATION

    Corporate name change from Matsushita Electric Industrial Co., Ltd. to Panasonic Corporation

  3. 2014-02-03 · Assignment

    Panasonic Corporation (formerly Matsushita Electric Industrial Co., Ltd.)GODO KAISHA IP BRIDGE 1

    Transfer of patent interest from an operating company to an IP management/assertion entity

  4. 2020-07-14 · Assignment

    GODO KAISHA IP BRIDGE 1PARKSIDE IP LLC

    Transfer between IP holding entities

  5. 2021-03-05 · Assignment

    PARKSIDE IP LLCBISHOP DISPLAY TECH LLC

    Transfer between IP holding entities, to the current assignee

Assignment history

Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.

✓ Generated

Inventors

  • Makoto Mizuki (Panasonic Corp)
  • Kazuyoshi Nishi (Panasonic Corp)
  • Tetsuro Ohmori (Panasonic Corp)
  • Tomokazu Kojima (Panasonic Corp)
  • Hiroshi Kojima (Panasonic Corp)

All named inventors were employed by Panasonic Corp (originally Matsushita Electric Industrial Co., Ltd.) at the time of filing, as Panasonic Corp was the original assignee listed on the patent application.

Original assignee

The original assignee was Panasonic Corp (formerly Matsushita Electric Industrial Co., Ltd.).

Panasonic Corporation is a major Japanese multinational electronics company that manufactures and sells a diverse range of electronic products. The patent itself states that the invention relates to a current driving device "used preferably as a driver for displays such as organic EL (Electro-luminescence) panels, LED panels, and the like," which aligns with Panasonic's product lines. It is highly probable that Panasonic shipped products embodying the claims.

Current status: Operating.

Assignment timeline

Note: Reel/frame numbers and correspondent details are not available from the provided patent text. These details would typically be sourced from an interactive USPTO Patent Assignment Search, which is outside the scope of this tool's direct access capabilities.

  • 2008-04-04 (executed) / recorded 2008-04-04 — Reel Not available/Frame Not available

    • Conveyance: Assignment
    • Assignor: OHMORI, TETSURO, KOJIMA, HIROSHI, KOJIMA, TOMOKAZU, MIZUKI, MAKOTO, NISHI, KAZUYOSHI (Inventors)
    • Assignee: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    • Correspondent: Not available from provided patent text or my current search capabilities.
    • Context: Transfer of inventors' interest to the original corporate entity.
  • 2008-11-20 (executed) / recorded 2008-11-20 — Reel Not available/Frame Not available

    • Conveyance: Change of Name
    • Assignor: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    • Assignee: PANASONIC CORPORATION
    • Correspondent: Not available from provided patent text or my current search capabilities.
    • Context: Corporate name change from Matsushita Electric Industrial Co., Ltd. to Panasonic Corporation.
  • 2014-02-03 (executed) / recorded 2014-02-03 — Reel Not available/Frame Not available

    • Conveyance: Assignment
    • Assignor: PANASONIC CORPORATION (FORMERLY MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.)
    • Assignee: GODO KAISHA IP BRIDGE 1
    • Correspondent: Not available from provided patent text or my current search capabilities.
    • Context: Transfer of patent interest from an operating company to an IP management/assertion entity.
  • 2020-07-14 (executed) / recorded 2020-07-14 — Reel Not available/Frame Not available

    • Conveyance: Assignment
    • Assignor: GODO KAISHA IP BRIDGE 1
    • Assignee: PARKSIDE IP LLC
    • Correspondent: Not available from provided patent text or my current search capabilities.
    • Context: Transfer between IP holding entities.
  • 2021-03-05 (executed) / recorded 2021-03-05 — Reel Not available/Frame Not available

    • Conveyance: Assignment
    • Assignor: PARKSIDE IP LLC
    • Assignee: BISHOP DISPLAY TECH LLC
    • Correspondent: Not available from provided patent text or my current search capabilities.
    • Context: Transfer between IP holding entities, to the current assignee.

Timeline diagram

timeline
    title Ownership of US 7995047
    2007 : Application filed by Panasonic Corp
    2008 : Assigned to Matsushita Electric
         : Matsushita changes name to Panasonic
    2011 : Issued
    2014 : Assigned to IP Bridge 1
    2020 : Assigned to Parkside IP LLC
    2021 : Assigned to Bishop Display Tech LLC
         : First infringement suit filed

NPE / troll-pattern signals

  1. Shell-entity transferPresent. The patent was transferred from Panasonic Corp to GODO KAISHA IP BRIDGE 1 on 2014-02-03. It was subsequently transferred to PARKSIDE IP LLC on 2020-07-14 and then to BISHOP DISPLAY TECH LLC on 2021-03-05. These entities (IP Bridge 1, Parkside IP LLC, Bishop Display Tech LLC) are structured as IP holding or assertion companies rather than product manufacturers, which is a strong indicator of shell entities involved in patent assertion.
  2. Known asserter in the chainPresent. GODO KAISHA IP BRIDGE 1 (assignee from 2014-2020) is a known IP fund/NPE. BISHOP DISPLAY TECH LLC (assignee from 2021-present) is also a known patent assertion entity, evidenced by the numerous district court cases (e.g., 2:26-cv-00257, 2:25-cv-00310, 2:24-cv-00085, 2:22-cv-00385, 2:21-cv-00139) and PTAB challenges (IPR2025-01330, IPR2022-00501) listed in the patent's litigation history.
  3. Repeat correspondent across the chainNot present / Not determinable. The correspondent information is not available from the provided patent text, therefore this signal cannot be assessed.
  4. Cascading transfersPresent. The patent was assigned from GODO KAISHA IP BRIDGE 1 to PARKSIDE IP LLC on 2020-07-14, and then from PARKSIDE IP LLC to BISHOP DISPLAY TECH LLC on 2021-03-05. This constitutes two transfers within approximately 7-8 months between IP holding entities, indicating a rapid sequence of transfers.
  5. Pre-litigation transferPresent. The patent was assigned to BISHOP DISPLAY TECH LLC on 2021-03-05. The litigation records indicate a US case filed in the Texas Eastern District Court (2:21-cv-00139) which commenced in 2021. This transfer occurred within 6 months prior to the likely filing of the earliest litigation, suggesting the transfer was arranged to enable assertion.
  6. Bankruptcy fire-saleNot present. The original assignee, Panasonic Corp, remains an active operating company.
  7. PrivateeringUnclear. While the patent was transferred from an operating company (Panasonic) to an IP management firm (IP Bridge 1) and then to other assertion entities, there is no explicit information in the provided data to confirm a privateering arrangement where Panasonic actively directs the assertion against its competitors.
  8. Defensive aggregator (anti-NPE)Not present. The current assignee, Bishop Display Tech LLC, is a known patent assertion entity, not a defensive aggregator.

Verdict

NPE — high confidence

This verdict is driven by multiple strong signals. The patent was transferred from an operating company (Panasonic Corp) to known patent assertion entities (GODO KAISHA IP BRIDGE 1, then BISHOP DISPLAY TECH LLC) through a chain involving shell entities and cascading transfers. Critically, the final transfer to Bishop Display Tech LLC on 2021-03-05 appears to be a pre-litigation transfer, immediately preceding the initiation of district court litigation in 2021. Bishop Display Tech LLC is widely recognized as a patent assertion entity, as evidenced by the extensive litigation history associated with this patent.

For verification, see the assignment records at the USPTO Assignment Center by searching for patent number US7995047: https://assignmentcenter.uspto.gov/patent/index.html.

Generated 5/21/2026, 6:45:56 AM

Prior art

Earlier patents, publications, and products that may anticipate or render the claims unpatentable.

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Prior art refers to any evidence that an invention was known or available to the public before the effective filing date of a patent application. This includes previously patented inventions, descriptions in printed or electronic publications, or inventions already in public use or on sale. Prior art is crucial in patent examination to determine if an invention is novel and non-obvious.

Based on the provided patent text, here are the most relevant prior art references cited in US Patent 7,995,047, along with an analysis of which claims they potentially anticipate under 35 U.S.C. § 102. The patent text explicitly discusses some of these references in its "BACKGROUND OF THE INVENTION" section, highlighting their relevance to the conventional art.

Most Relevant Prior Art for US Patent 7,995,047:

  1. US 2005/0231241 A1 (Matsushita Electric Industrial Co., Ltd.)

    • Full Citation: US 2005/0231241 A1, "Current driver"
    • Publication Date: 2005-10-20
    • Brief Description: This patent application describes a current driving device with a current output part, featuring both a calibration function and a current output function. It includes a voltage holding capacitance element (C1), Nch transistors (QN1-QNm), signal response switches (G1-Gm), a current input switch (Sw1), a calibration switch (Sw2), a reference current source (I1), and current output switches (So1, So2). Under a calibration mode, the device charges C1 by applying a reference current from I1 to the Nch transistors, which are configured to act like diodes. In a current output mode, C1 holds this voltage, and the Nch transistors output current based on it.
    • Potential Anticipation (35 U.S.C. § 102):
      • Independent Claim 1: This reference potentially anticipates many elements of Claim 1, particularly the existence of a first current supply, a plurality of output terminals, and a plurality of current output circuits each comprising a current-voltage converting function, a voltage-current converting function, a voltage holding part, and at least one current output terminal. It also describes a "current supply mode" (its calibration mode) where the current output part receives a first current, generates a voltage, and holds it, and a "current output mode" where it outputs current according to the held voltage. The primary distinction from Claim 1 is the explicit "voltage supply mode" for pre-charging with a first voltage, which Matsushita lacks.
      • Independent Claim 10: Many structural components of Claim 10 are directly found in Matsushita's FIG. 6A circuit diagram. This includes the current input switch (Sw1), voltage holding circuit (C1), calibration switch (Sw2), voltage-current converting elements (QN1-QNm), signal response switches (G1-Gm), connection node (N1), and current output switches (So1, So2). Similar to Claim 1, the key differentiating feature not present in Matsushita (and thus not anticipated) is the explicit "high-speed switch" and the distinct "voltage supply mode" for pre-charging.
  2. JP 2004-219955 (Toshiba Matsushita Display Technology Co Ltd)

    • Full Citation: JP 2004-219955 A, "Electric current driving apparatus and electric current driving method"
    • Publication Date: 2004-08-05
    • Brief Description: This Japanese unexamined patent publication relates to an electric current driving apparatus. While the specific details are not fully elaborated in the provided English text, the patent mentions this as a related document in the background. It generally pertains to current driving apparatuses and methods.
    • Potential Anticipation (35 U.S.C. § 102): Without the full content of this document, it is difficult to specify exact claims anticipated. However, given its citation as "other related documents" in the context of conventional techniques for current driving devices, it likely describes elements pertaining to current driving circuits, calibration, and output stages, potentially anticipating broad aspects of current driving devices as generally understood in the art, rather than the specific two-stage calibration.
  3. JP 2005-121843 (Toshiba Matsushita Display Technology Co Ltd)

    • Full Citation: JP 2005-121843 A, "Current output type semiconductor circuit"
    • Publication Date: 2005-05-12
    • Brief Description: This Japanese unexamined patent publication describes a current output type semiconductor circuit. Similar to JP 2004-219955, it is listed as a related document in the background of US7995047.
    • Potential Anticipation (35 U.S.C. § 102): Similar to JP 2004-219955, without detailed content, specific anticipation cannot be confidently determined. It likely discloses aspects of semiconductor circuits for current output, which could generally relate to the current output function, voltage-current converting function, and current output terminals mentioned in Claims 1 and 10.
  4. US 2004/0251844 A1 (Mitsubishi Denki Kabushiki Kaisha)

    • Full Citation: US 2004/0251844 A1, "Display device with light emitting elements"
    • Publication Date: 2004-12-16
    • Brief Description: This patent application describes a display device with light-emitting elements. It is cited as a related document in the background of US7995047, indicating its relevance to display driving technology.
    • Potential Anticipation (35 U.S.C. § 102): Given its title, this patent likely teaches aspects of driving display elements with current, potentially relating to the overall application of the current driving device described in US7995047, but without the specific two-stage calibration mechanism.
  5. US 7050024 B2 (Clare Micronix Integrated Systems, Inc.)

    • Full Citation: US 7050024 B2, "Predictive control boost current method and apparatus"
    • Publication Date: 2006-05-23 (Issue Date) / 2001-10-19 (Priority Date)
    • Brief Description: This patent describes a method and apparatus for predictive control boost current. It is listed as a related document in US7995047.
    • Potential Anticipation (35 U.S.C. § 102): The title suggests a focus on current control and boosting, which might broadly relate to the current supply or current output aspects of US7995047. However, its direct relevance to a two-stage calibration process involving voltage pre-charging for a voltage holding element needs further examination of its full content.
  6. US 6594606 B2 (Clare Micronix Integrated Systems, Inc.)

    • Full Citation: US 6594606 B2, "Matrix element voltage sensing for precharge"
    • Publication Date: 2003-07-15 (Issue Date) / 2001-05-09 (Priority Date)
    • Brief Description: This patent describes matrix element voltage sensing for precharge, particularly in the context of active matrix liquid crystal displays (AMLCDs). It explicitly teaches the concept of pre-charging capacitive elements (e.g., data lines) with a voltage to reduce charging time.
    • Potential Anticipation (35 U.S.C. § 102): While not directly disclosing a current driving device with the specific modes of US7995047, this reference could potentially anticipate the concept of pre-charging a voltage holding element with a voltage to speed up its charging. This general principle of "voltage supply mode" to quickly raise the potential of a capacitive element is central to both Claim 1 and Claim 10. A strong argument for anticipation or obviousness could be made if a "voltage holding circuit" in the context of US7995047 is considered analogous to the "capacitive elements" in Clare Micronix that benefit from pre-charging.
  7. US 2006/0158402 A1 (Arokia Nathan)

    • Full Citation: US 2006/0158402 A1, "Method and system for programming, calibrating and driving a light emitting device display"
    • Publication Date: 2006-07-20
    • Brief Description: This patent application describes a method and system for programming, calibrating, and driving a light-emitting device display. It is also listed as a related document.
    • Potential Anticipation (35 U.S.C. § 102): Given its title and the context of US7995047, this reference likely covers aspects of calibration in display driving, similar to Matsushita. The specific details of its calibration process would need to be examined to determine if it anticipates the two-stage voltage and current supply modes of US7995047.

Generated 5/21/2026, 12:45:51 PM

Obviousness

Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.

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Obviousness Analysis of US Patent 7,995,047 under 35 U.S.C. § 103

This analysis identifies combinations of prior art references that would render the independent claims of US Patent 7,995,047 obvious to a person having ordinary skill in the art (PHOSITA) as of the priority date, December 13, 2006.

1. The Claimed Invention (from Independent Claims 1 and 10)

US Patent 7,995,047 addresses the problem of slow calibration in current driving devices, particularly when a reference current is very small or when the reference current changes, leading to non-uniformity in display output. The invention proposes a two-stage calibration process: a "voltage supply mode" where a voltage holding part is rapidly pre-charged by a voltage source, followed by a "current supply mode" where fine-tuning and accurate storage of a reference current value occur.

  • Independent Claim 1 defines a current driving device with a first voltage supply, a first current supply, multiple output terminals, and multiple current output circuits. Each current output circuit includes a current-voltage converting circuit, a voltage-current converting circuit, and a voltage holding circuit (VHC). Crucially, the VHC has one terminal connected to a reference voltage different from the first voltage. The operation involves three modes:

    • Voltage Supply Mode: The VHC receives the first voltage from the first voltage supply to one of its terminals.
    • Current Supply Mode: The VHC receives the first electric current from the first current supply, which generates a second voltage via the current-voltage converting circuit, and this first current is also supplied to the same VHC terminal.
    • Current Output Mode: An output current is generated based on the voltage held in the VHC.
  • Independent Claim 10 describes a specific circuit implementation for this current driving device, detailing elements such as a current input switch (Sw1), a voltage holding circuit (C1) with a first terminal to a fixed voltage and a second terminal, a calibration switch (Sw2), voltage-current converting elements (QN1-QNm), signal response switches (G1-Gm), a connection node (N1), current output switches (So1, So2), and a high-speed switch (Sw3). The calibration mode is explicitly divided into two stages:

    • Voltage Supply Mode: The high-speed switch (Sw3) is conductive, connecting a voltage supply source to the second terminal of the VHC (C1) to rapidly boost its potential. During this, output switches (So1, So2) are non-conductive, and the calibration switch (Sw2) and signal response switches (G1-Gm) are conductive.
    • Current Supply Mode: The high-speed switch (Sw3) is non-conductive, while the current input switch (Sw1) and calibration switch (Sw2) are conductive, allowing the current from the current supply source to flow and set the accurate reference voltage in the VHC.

2. Primary Prior Art Reference: US 2005/0231241 A1 (Matsushita et al.)

US 2005/0231241 A1, titled "Current driver," is explicitly identified in the background of US7995047 as a "conventional technique". This reference (hereinafter "Matsushita") discloses a current driving device for displays with a current output part, featuring both calibration and current output functions.

Matsushita teaches:

  • A current output part A comprising a voltage holding capacitance element C1 (voltage holding part), Nch transistors QN1-QNm (which serve as both current-voltage converting elements during calibration and voltage-current converting elements during output), signal response switches G1-Gm, current input switch Sw1, calibration switch Sw2, reference current source I1 (first current supply part), and current output switches So1, So2, leading to output terminals T1, T2.
  • A calibration mode where current output switches So1, So2 are non-conductive, and Sw1, Sw2, and G1-Gm are conductive. The drains and gates of QN1-QNm are effectively short-circuited, acting as a diode, allowing the reference current I1 to flow and charge C1 to a gate voltage (V(N2)) corresponding to this current. This directly corresponds to the "current supply mode" and the mechanism for generating a "second voltage" in US7995047.
  • A current output mode where Sw1 and Sw2 are non-conductive, C1 holds the calibrated voltage, and QN1-QNm output current based on this voltage and the states of G1-Gm.
  • The overall structure of a current driving device with multiple current output parts (A0-An) and multiple output terminals (OUT1-OUTn).

However, Matsushita suffers from the exact drawback that US7995047 aims to solve: "the capacity for charging/discharging the voltage holding capacitance element C1 becomes insufficient when the current value of the reference current source I1 is very small, so that it is difficult to charge the current of the Nch transistors QN1-QNm to accurately meet the value of the current from the reference current source I1 within the calibration period." This leads to slow calibration, as illustrated in FIG. 9 of US7995047.

3. Secondary Prior Art Reference: US 6,594,606 B2 (Clare Micronix)

US 6,594,606 B2, titled "Matrix element voltage sensing for precharge" (hereinafter "Clare Micronix"), is related to display technology, specifically active matrix liquid crystal displays (AMLCDs).

Clare Micronix teaches:

  • The concept of pre-charging capacitive elements (e.g., data lines in a display) with a voltage to "substantially reduc[e] the data line charge time." This is done by applying a precharge to the data lines prior to sampling the data voltage.

4. Obviousness Combination and Motivation to Combine

Combination: US 2005/0231241 A1 in view of US 6,594,606 B2.

Motivation to Combine:
A person having ordinary skill in the art (PHOSITA) in the field of current driving devices for displays, faced with the problem of slow and sometimes inaccurate calibration in the Matsushita device (due to the limitations of charging a capacitive voltage holding element solely by a small reference current), would have been motivated to combine the teachings of Matsushita with Clare Micronix.

The motivation arises from the common objective in display technology to improve efficiency and speed, particularly in charging capacitive elements. Matsushita clearly demonstrates a current driving device with a voltage holding capacitor (C1) that is charged during calibration. US7995047 itself highlights that the limitation of Matsushita is the insufficient charging capacity when the reference current is small, leading to slow calibration.

Clare Micronix, operating in the closely related field of display driving, explicitly teaches a solution to the general problem of slow charging of capacitive elements: pre-charging them with a voltage to reduce charge time. A PHOSITA would readily recognize that the voltage holding capacitance element (C1) in Matsushita is a capacitive element that requires charging. Therefore, applying the known technique from Clare Micronix of rapidly pre-charging a capacitor with a voltage before a more precise, slower process would be an obvious solution to accelerate the calibration of C1 in Matsushita.

5. Application of the Combination to Independent Claims

A. Independent Claim 1:

  1. First voltage supply source for supplying a first voltage: Clare Micronix teaches applying a "precharge" voltage to data lines; a PHOSITA would implement this with a voltage supply source.
  2. First current supply source for supplying a first electric current: Taught by Matsushita's reference current source I1.
  3. Plurality of output terminals & current output circuits (with current-voltage, voltage-current converting, voltage holding circuits): Taught by Matsushita. The Nch transistors QN1-QNm in Matsushita function as both current-voltage converters during calibration (generating V(N2) from I1) and voltage-current converters during output (converting V(N2) to output current). C1 is the voltage holding circuit, with one terminal connected to ground (a reference voltage).
  4. Operation modes:
    • Voltage Supply Mode: The PHOSITA, applying Clare Micronix's pre-charging concept to Matsushita's C1, would introduce an initial "voltage supply mode" where C1 (the VHC) receives the "first voltage" from the newly added voltage supply, supplied to its ungrounded terminal (Node N2 in Matsushita's Fig. 6A).
    • Current Supply Mode: This mode is directly taught by Matsushita's calibration mode, where C1 receives the "first current" from I1, and the Nch transistors (current-voltage converting circuit) generate the "second voltage" held in C1.
    • Current Output Mode: This mode is directly taught by Matsushita's current output mode.

B. Independent Claim 10:
Most elements of Claim 10 (current input switch Sw1, voltage holding circuit C1, calibration switch Sw2, voltage-current converting elements QN1-QNm, signal response switches G1-Gm, connection node N1, current output switches So1/So2) are directly taught by Matsushita's circuit shown in FIG. 6A.

The remaining elements, crucial to the inventive concept, are:

  • High-speed switch (Sw3) for controlling connection/disconnection states of said voltage supply source with respect to the second terminal of said voltage holding circuit: A PHOSITA, motivated to implement the pre-charging taught by Clare Micronix, would introduce a standard switch (Sw3) to connect the added voltage supply source to Node N2 (the second terminal of C1) in Matsushita's circuit. This is a conventional way to switch a voltage supply.
  • Calibration Mode (two stages):
    • Voltage Supply Mode: The PHOSITA would logically define this new mode where Sw3 is conductive (connecting the voltage supply to N2 to boost potential). The conditions that "all current output switches are non-conductive, and the calibration switch and all signal response switches are conductive" are either taught by Matsushita's calibration (non-conductive output switches) or represent straightforward design choices to facilitate charging and prepare for the subsequent current supply mode (conductive Sw2 and G1-Gm).
    • Current Supply Mode: The PHOSITA would then transition to the current supply mode, as taught by Matsushita's calibration (Sw3 non-conductive to isolate the pre-charge, Sw1 and Sw2 conductive for precise current calibration).

6. Conclusion

The combination of US 2005/0231241 A1 and US 6,594,606 B2, driven by the motivation to overcome the known problem of slow calibration in display drivers using a conventional and well-understood technique of voltage pre-charging for capacitive elements, would have rendered the subject matter of independent Claims 1 and 10 of US Patent 7,995,047 obvious to a PHOSITA at the time of the invention.

Generated 5/21/2026, 6:46:08 AM

Extensions

Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.

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To accurately detail patent term adjustments (PTA), patent term extensions (PTE), continuation/divisional applications, related family members, and the projected expiration date for US patent 7995047, a direct search of the USPTO's Patent Center or Assignment Center is required. General Google searches can provide some information, but the most precise data for these specific elements is found in the official patent records.

Based on the information available and general patent law:

1. Patent Term Adjustments (PTA) and Patent Term Extensions (PTE):

  • PTA compensates for certain delays by the USPTO during patent prosecution. It is an addition to the 20-year lifespan of a utility patent. The USPTO determines the PTA amount before issuance.
  • PTE extends patent term to compensate for time lost during regulatory review, particularly for pharmaceuticals and medical devices requiring FDA approval.
  • To determine if US patent 7995047 received any PTA or PTE, one would typically look at the front page of the issued patent document or the patent's file history on the USPTO website. The provided patent text does not explicitly state any PTA or PTE. Without direct access to the USPTO's Patent Center for this specific patent, it's not possible to definitively state the exact amount of PTA or if any PTE was granted.

2. Continuation Applications, Divisional Applications, and Related Family Members:

  • Continuation applications allow applicants to pursue additional claims to an invention disclosed in the parent application, using the same specification and claiming the same priority date.
  • Divisional applications are filed when a parent application contains multiple distinct inventions, often after a restriction requirement from the examiner. They share the same disclosure and priority date as the parent.
  • Related family members include continuation, divisional, and continuation-in-part applications, as well as international filings that cover the same invention.

The provided patent text for US7995047 indicates an "Application number US11/954,659" and lists "Other versions: US20080143429A1".

  • "US20080143429A1" is a patent application publication that corresponds to the issued patent US7995047. It is essentially the published version of the application before it granted as a patent.
  • The patent also lists "Applications Claiming Priority (2)":
    • JP2006335850A / JP2008146568A, filed 2006-12-13.
    • JP2006-335850, filed 2006-12-13.
      These are Japanese priority applications, meaning US7995047 claims priority to these earlier Japanese filings. This does not indicate continuation or divisional applications within the US system, but rather international family members establishing the earliest priority date.

To identify any US continuation or divisional applications, one would typically look for a "Related U.S. Application Data" section on the patent's front page or in the specification. The provided patent text does not explicitly detail any US continuation or divisional applications.

3. Projected Expiration Date:

  • For utility patents filed on or after June 8, 1995, the term generally lasts 20 years from the earliest filing date of the application, or the earliest filed application in its priority chain (excluding provisional applications).
  • The "Priority date" for US7995047 is 2006-12-13. The "Filing date" is 2007-12-12.
  • Assuming no terminal disclaimers, the patent term would be 20 years from the earliest priority date.
  • Therefore, the base expiration date would be 20 years from 2006-12-13, which is 2026-12-13.
  • However, the Google Patents page for US7995047 states: "Active , expires 2030-06-03". This indicates that Patent Term Adjustment (PTA) has been applied.
  • Therefore, the projected expiration date is 2030-06-03. This date already incorporates any PTA. The USPTO does not calculate expiration dates, but provides tools and data for public estimation.

Generated 6/6/2026, 8:20:28 AM

Derivative works

Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.

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