US 7257582

US Patent 7257582, titled "Load balancing with shared data", was filed on February 27, 2003, and issued on August 14, 2007. The sole inventor is Michael Rothschild. The current assignee of record is Intellectual Ventures I LLC.

Abstract:
The patent describes a method for a computer-executable process where a preexisting input file is logically subdivided, without initial reading, into multiple partitions. These partitions are then distributed to a plurality of processors, which carry out respective subtasks, including reading and processing their assigned partitions. This method enables the distribution of processing large amounts of data across multiple cooperating processors, ensuring that the load on each processor is proportional to its capacity, thereby optimizing efficiency.

Independent Claims Overview:

Independent Claim 1:
This claim describes a method for performing a computer process on an input file by breaking it down into smaller, manageable parts. First, the system automatically determines how to divide the input file's records into multiple logical partitions. Descriptions of these partitions are then sent to various subtask processors. Simultaneously, at least some of these processors begin executing their assigned subtasks, each reading and processing one partition to produce a specific output. Afterward, this process repeats, with available processors taking on new, unassigned partitions on a first-come, first-served basis. Finally, all the individual subtask outputs are combined to create a single, comprehensive output that reflects the overall processing.

Litigation Information (as per Google Patents):
As of April 26, 2026, a search for specific CAFC 2026 dockets directly referencing patent 7257582 did not yield direct results. However, the provided patent information from Google Patents indicates the patent family has been involved in litigation, including:

• Multiple US cases filed in various District Courts:
  • Texas Eastern District Court (case 4:24-cv-00980)
  • Delaware District Court (cases 1:26-cv-00397, 1:26-cv-00417, 1:26-cv-00461)
  • Texas Western District Court (cases 1:25-cv-01147, 7:24-cv-00277)
  • Texas Northern District Court (case 3:25-cv-02885)
• A PTAB Inter Partes Review (IPR2025-00785) was filed in 2025, which was "Not Instituted - Merits".
• The patent family also has "First worldwide family litigation filed".

Litigation involving US Patent 7257582, "Load balancing with shared data," includes several cases in US District Courts and a PTAB Inter Partes Review.

US District Court Cases:

• Intellectual Ventures I LLC et al. v. American Airlines Inc.

  • Jurisdiction: Texas Eastern District Court
  • Case Number: 4:24-cv-00980
  • Filing Date: November 2, 2024
  • Status: Open. The court has denied American Airlines' motions to sever and stay claims and partial motion to dismiss. An order was issued compelling American Airlines to produce discovery relating to its use of the accused instrumentalities prior to the complaint's filing.

• Intellectual Ventures I LLC et al. v. Southwest Airlines Co.

  • Jurisdiction: Texas Western District Court
  • Case Number: 7:24-cv-00277
  • Filing Date: November 2, 2024
  • Status: Closed. An agreed scheduling order was filed, setting deadlines for infringement contentions, invalidity contentions, and other pre-trial matters. The defendant's deadline to answer or respond to the complaint was extended to January 10, 2025.

• Intellectual Ventures I LLC et al. v. Home Depot International Inc., Home Depot U.S.A. Inc., Home Depot Product Authority LLC.

  • Jurisdiction: Texas Western District Court
  • Case Number: 1:25-cv-01147
  • Filing Date: July 23, 2025
  • Status: Open. A scheduling order has been signed, with a Markman Hearing set for May 29, 2026, and a jury trial set for August 16, 2027. Home Depot has filed counterclaims against Intellectual Ventures I LLC and Intellectual Ventures II LLC.

• Travelers Indemnity Co. v. Intellectual Ventures I LLC

  • Jurisdiction: Delaware District Court
  • Case Number: 1:26-cv-00397
  • Filing Date: April 8, 2026
  • Status: Open. This case involves patent infringement claims.

• Munich Re America Services, Inc. v. Intellectual Ventures I LLC

  • Jurisdiction: Delaware District Court
  • Case Number: 1:26-cv-00417
  • Filing Date: April 9, 2026
  • Status: Open. This case involves patent infringement claims.

• ALDI Inc. v. Intellectual Ventures I LLC et al.

  • Jurisdiction: Delaware District Court
  • Case Number: 1:26-cv-00461
  • Filing Date: April 21, 2026
  • Status: Open. ALDI Inc. filed a preemptive declaratory judgment lawsuit against Intellectual Ventures.

• Intellectual Ventures I LLC et al. v. Southwest Airlines Co.

  • Jurisdiction: Texas Northern District Court
  • Case Number: 3:25-cv-02885
  • Filing Date: October 24, 2025
  • Status: Open.

PTAB Inter Partes Review (IPR):

• American Airlines, Inc. et al. v. Intellectual Ventures I LLC
  • Case Number: IPR2025-00785
  • Filing Date: Before April 10, 2025 (as Director's decision mentions it was filed by that date).
  • Status: Not Instituted - Merits. The Director's decision, dated August 29, 2025, declined discretionary denial of institution, citing factors such as the age of the challenged patents (14-18 years, creating settled expectations), an existing ex parte reexamination request for one of the patents, and the large number and wide scope of patents asserted in parallel district court litigation. The projected final written decision due date in these proceedings is November 9, 2026. The PTAB decision was "Not Instituted - Merits" as per Google Patents, but the Director's decision indicates discretionary denial was not appropriate. This suggests a more nuanced outcome where the IPR was not instituted for reasons other than discretionary denial based on the merits of the arguments presented. The Google Patents information stating "Not Instituted - Merits" is acknowledged.

Ex Parte Reexamination:

• Unified Patents filed an ex parte reexamination proceeding against U.S. Patent 7,257,582 on June 19, 2025. This reexamination is currently before the USPTO.

Proceedings overview

One AIA trial proceeding has been filed against US Patent 7257582, which resulted in a denial of institution on the merits. There is also an active ex parte reexamination. This gives a defendant a somewhat hardened patent, as it has survived an IPR challenge, although the ex parte reexamination could still affect its claims.

IPR2025-00785 — American Airlines, Inc. et al. v. Intellectual Ventures I LLC

• Type: Inter Partes Review
• Filed: April 9, 2025
• Status: Not Instituted - Merits. The Director's decision declined institution based on a holistic assessment of the evidence and arguments presented, despite some factors favoring denial.
• Judge panel: Not explicitly named in the publicly available decision, but the decision was a Director's review. Judge Ken B. Barrett is listed as a panel judge for IPR2025-00785 in some databases.
• Petition grounds: Not explicitly detailed in the provided snippets, but the associated district court litigation involved challenges to the patent based on "abstract ideas without an inventive concept" under 35 U.S.C. § 101.
• Institution decision: Denied (on merits) on August 29, 2025. The Director's decision noted that while the patent's age (14-18 years) created strong "settled expectations" for the Patent Owner and an existing ex parte reexamination was underway, other factors weighed against discretionary denial. These included the projected IPR final written decision date (November 9, 2026) being earlier than the likely district court trial dates, and limited investment in the district court proceedings, suggesting that the IPR would likely conclude before the district court trial, reducing duplication of efforts. However, the ultimate denial was on the merits, indicating that the petition did not demonstrate a reasonable likelihood of prevailing on at least one claim.
• Final Written Decision (if issued): Not applicable, as institution was denied.
• Settlement / termination: Not applicable, as institution was denied.
• Appeal: Not applicable, as institution was denied. Appeals typically follow a Final Written Decision.
• Defensive value: The denial of institution for IPR2025-00785 means that the claims challenged in this petition remain undisturbed by PTAB proceedings. A defendant would need to develop new prior art or legal theories to challenge the patent at the PTAB, as the specific grounds raised in this petition were deemed insufficient to warrant institution.

Strategic summary

Only one AIA trial proceeding, IPR2025-00785, has been filed against US Patent 7257582. This IPR was not instituted on the merits, meaning no claims were challenged successfully at the PTAB in this particular proceeding. Consequently, all claims (1-14) of US7257582 remain SUSTAINED and UNTESTED by a Final Written Decision at the PTAB.

The estoppel landscape for IPR2025-00785 is minimal since institution was denied. Petitioners in IPRs (and their privies) are generally barred from raising any ground they raised or reasonably could have raised only if a final written decision is issued. Since no FWD was issued, the specific prior-art grounds presented in IPR2025-00785 are likely still available for future challenges, although a new petition would need to demonstrate a reasonable likelihood of success on the merits.

A notable pattern signal is the involvement of Unified Patents, which filed an ex parte reexamination against US Patent 7257582 on June 19, 2025. Ex parte reexaminations are another avenue for challenging patents at the USPTO. The fact that the IPR was not instituted on the merits and an ex parte reexamination is underway suggests that challengers are actively seeking to invalidate this patent through various administrative procedures. The Director's decision to deny institution of IPR2025-00785 considered the existence of this concurrent ex parte reexamination.

Recommended next steps

• A defendant facing assertion of US7257582 should closely monitor the ongoing ex parte reexamination proceeding. The outcome of this reexamination could impact the patentability of the claims. Information regarding ex parte reexaminations can be found through the Unified Patents Portal.
• Given that IPR2025-00785 was denied institution on the merits, any future IPR petitions would need to present stronger arguments and/or different prior art to overcome the PTAB's initial assessment. Reviewing the detailed reasoning behind the denial, if available in the full decision, would be crucial for understanding the deficiencies of the previous petition.
• The patent is involved in several district court litigations. A defendant should analyze the arguments and prior art being used in those cases, as they may inform potential new PTAB challenges or provide insights into the patent owner's infringement theories.

Inventors

• Michael Rothschild: Employer at the time of filing is not explicitly stated in the patent document. The original assignee was Corigin Ltd.

Original assignee

The original assignee named on the issued patent is Corigin Ltd.
The patent abstract and description indicate that the invention relates to load balancing and data sharing for computer-executable processes like sort applications, statistical analysis, report writing, and database queries. It is unclear from the patent text alone whether Corigin Ltd. shipped a product embodying these claims.
Corigin Ltd. subsequently assigned the patent to Michael Rothschild in 2007. Its current status (operating, acquired, dissolved, in bankruptcy) is not readily determinable from the patent document itself.

Assignment timeline

• 2003-04-03 (executed) / recorded 2003-04-21 — Reel 013985/0119

  • Conveyance: Assignment
  • Assignor: Rothschild, Michael
  • Assignee: Corigin Ltd, ISRAEL
  • Correspondent: BLANKMAN, MARC, 301 N. Charles St. Baltimore, MD 21201.
  • Context: Transfer from inventor to initial assignee.

• 2007-06-21 (executed) / recorded 2007-07-09 — Reel 019527/0110

  • Conveyance: Assignment
  • Assignor: Corigin Ltd.
  • Assignee: Rothschild, Michael, ISRAEL
  • Correspondent: BLANKMAN, MARC, 301 N. Charles St. Baltimore, MD 21201. (Correspondent recurs).
  • Context: Transfer from original assignee back to inventor.

• 2008-05-13 (executed) / recorded 2008-06-10 — Reel 021064/0887

  • Conveyance: Assignment
  • Assignor: Rothschild, Michael
  • Assignee: Otic Investments Limited Liability Company, DELAWA
  • Correspondent: STEPHEN J. MCGLYNN, 2033 Gateway Place, Suite 550 San Jose, CA 95110.
  • Context: Transfer from inventor to a new entity.

• 2015-08-12 (executed) / recorded 2015-09-17 — Reel 036595/0766

  • Conveyance: Merger
  • Assignor: Otic Investments Limited Liability Company
  • Assignee: Cufer Asset Ltd. L.L.C., DELAWARE
  • Correspondent: RICHARD J. MCKAY, 2033 Gateway Place, Suite 550 San Jose, CA 95110. (Correspondent firm recurs).
  • Context: Acquisition of assignee via merger.

• 2024-09-26 (executed) / recorded 2024-09-26 — Reel 068714/0435

  • Conveyance: Assignment
  • Assignor: Cufer Asset Ltd. L.L.C.
  • Assignee: Intellectual Ventures I LLC, DELAWARE
  • Correspondent: JEFFREY B. MCMAHAN, 10480 Little Patuxent Pkwy, Suite 300, Columbia, MD 21044.
  • Context: Transfer to a known patent assertion entity.

Timeline diagram

timeline
    title Ownership of US 7257582
    2003 : Assigned to Corigin Ltd
    2007 : Assigned to Michael Rothschild
    2008 : Assigned to Otic Investments LLC
    2015 : Merged to Cufer Asset Ltd LLC
    2024 : Assigned to Intellectual Ventures I LLC

NPE / troll-pattern signals

1. Shell-entity transfer — Present.

   • 2008-05-13 (executed) / recorded 2008-06-10 — Reel 021064/0887: Assigned to "Otic Investments Limited Liability Company, DELAWA". The name, a Delaware LLC, and the subsequent merger into another LLC suggest a shell entity.
   • 2015-08-12 (executed) / recorded 2015-09-17 — Reel 036595/0766: Merged into "Cufer Asset Ltd. L.L.C., DELAWARE". This entity also has the characteristics of a shell.
   • 2024-09-26 (executed) / recorded 2024-09-26 — Reel 068714/0435: Assigned to "Intellectual Ventures I LLC, DELAWARE". Intellectual Ventures is a well-known patent assertion entity, often operating through shell-like LLCs.

2. Known asserter in the chain — Present.

   • 2024-09-26 (executed) / recorded 2024-09-26 — Reel 068714/0435: The current assignee is "Intellectual Ventures I LLC", which is widely recognized as a patent assertion entity.

3. Repeat correspondent across the chain — Present.

   • Marc Blankman (301 N. Charles St. Baltimore, MD 21201) appears as correspondent for the assignment to Corigin Ltd. (Reel 013985/0119) and the assignment back to Michael Rothschild (Reel 019527/0110).
   • The firm associated with Stephen J. McGlynn (2033 Gateway Place, Suite 550 San Jose, CA 95110) for the assignment to Otic Investments LLC (Reel 021064/0887) appears to be the same firm as Richard J. McKay (same address) for the merger to Cufer Asset Ltd. L.L.C. (Reel 036595/0766), indicating a recurring firm.

4. Cascading transfers — Not present. The transfers occur over several years (2003, 2007, 2008, 2015, 2024), not within a tight 24-month window.

5. Pre-litigation transfer — Present.

   • The assignment to Intellectual Ventures I LLC was executed and recorded on 2024-09-26 (Reel 068714/0435).
   • The first district court case, Intellectual Ventures I LLC et al. v. American Airlines Inc. (4:24-cv-00980), was filed on November 2, 2024. This is approximately one month after the assignment, falling well within the 6-month window for a pre-litigation transfer. Another case, Intellectual Ventures I LLC et al. v. Southwest Airlines Co. (7:24-cv-00277) was also filed on November 2, 2024.

6. Bankruptcy fire-sale — Not present. There is no indication in the provided information of any assignor filing for bankruptcy.

7. Privateering — Unclear. While Intellectual Ventures is a known asserter, the context of Corigin Ltd's primary business and its relationship with Intellectual Ventures is not explicitly detailed in the provided data.

8. Defensive aggregator (anti-NPE) — Not present. The chain ends with Intellectual Ventures I LLC, which is an asserting entity, not a defensive aggregator.

Verdict

NPE — high confidence. This verdict is driven by multiple strong signals. The patent was transferred to "Otic Investments Limited Liability Company" and then "Cufer Asset Ltd. L.L.C.", both Delaware LLCs with names suggestive of shell entities (Reels 021064/0887, 036595/0766). The ultimate assignment to "Intellectual Ventures I LLC" (Reel 068714/0435) confirms a known patent assertion entity in the chain. Furthermore, the transfer to Intellectual Ventures occurred on 2024-09-26, just over a month before initial infringement lawsuits were filed in November 2024, indicating a clear pre-litigation transfer to enable assertion. The recurrence of correspondent firms also points to a specialized practice in patent transfers.

USPTO Assignment Center search page for verification: https://assignmentcenter.uspto.gov/

To identify the most relevant prior art for US Patent 7257582, I will examine the patent citations listed within the patent itself. The USPTO provides search tools to access patent information.

Here are the prior art references cited in US Patent 7257582, along with their details and potential anticipation:

Patent Citations (Cited by Examiner)

1. US5357632A

   • Full Citation: US5357632A - Dynamic task allocation in a multi-processor system employing distributed control processors and distributed arithmetic processors
   • Publication Date: 1994-10-18
   • Filing Date: 1990-01-09
   • Brief Description: This patent describes a multiprocessor system with dynamic task allocation, where control processors distribute tasks to arithmetic processors. It focuses on efficiently utilizing resources by dynamically assigning tasks based on system load.
   • Potential Anticipation (35 U.S.C. § 102): US5357632A potentially anticipates claims relating to distributing tasks to a plurality of processors and the efficient use of heterogeneous systems. Specifically, it could anticipate elements of claim 1 regarding "distributing descriptions of all of said partitions to each of a plurality of subtask processors" and "simultaneously executing at least a respective one of the subtasks... in each of at least some of said processors". The concept of dynamic task allocation based on load also aligns with the load balancing objective of US7257582.

2. US5603028A

   • Full Citation: US5603028A - Method and apparatus for data distribution
   • Publication Date: 1997-02-11
   • Filing Date: 1992-03-02
   • Brief Description: This patent describes a method and apparatus for distributing data, particularly in a parallel processing environment. It focuses on efficient data handling for parallel computation.
   • Potential Anticipation (35 U.S.C. § 102): US5603028A could potentially anticipate the logical subdivision of data and its distribution to processors as described in claim 1, particularly steps (a) "automatically determining file allocation and logically subdividing records of said input file into a plurality of partitions" and (b) "distributing descriptions of all of said partitions to each of a plurality of subtask processors".

3. US5835755A

   • Full Citation: US5835755A - Multi-processor computer system for operating parallel client/server database processes
   • Publication Date: 1998-11-10
   • Filing Date: 1994-04-04
   • Brief Description: This patent describes a multiprocessor computer system designed for parallel client/server database processes. It focuses on managing and executing database operations across multiple processors.
   • Potential Anticipation (35 U.S.C. § 102): Given its focus on parallel database processes, US5835755A could potentially anticipate aspects of US7257582, especially claim 11 which states "wherein said computer-executable process includes a database query." The general concept of parallel processing for database operations might touch upon distributing tasks and combining results, relevant to steps (c) and (e) of claim 1.

4. US5926833A

   • Full Citation: US5926833A - Method and system allowing direct data access to a shared data storage subsystem by heterogeneous computing systems
   • Publication Date: 1999-07-20
   • Filing Date: 1997-03-24
   • Brief Description: This patent describes a method and system that allows heterogeneous computing systems to directly access a shared data storage subsystem. This is highly relevant to the "shared data" aspect of US7257582.
   • Potential Anticipation (35 U.S.C. § 102): This reference is highly relevant to the core concept of US7257582, particularly the enablement of "sharing data and workload between possibly heterogeneous computer systems" as stated in the background and the detailed description. It could anticipate the ability of different processors to access the input file, which is implicitly required by claim 1's steps (b) and (c). It directly addresses a key enablement of US7257582, which is the assumption that input and output files are shared by potentially heterogeneous systems.

5. US6061067A

   • Full Citation: US6061067A - Applying modifiers to objects based on the types of the objects
   • Publication Date: 2000-05-09
   • Filing Date: 1996-08-02
   • Brief Description: This patent describes a method for applying modifiers to objects based on their types. While not directly related to load balancing, it deals with object-oriented processing.
   • Potential Anticipation (35 U.S.C. § 102): This patent appears less directly related to the core load-balancing and distributed processing aspects of US7257582. However, if the "records" in US7257582's claim 1 are considered "objects" and the "processing" involves applying "modifiers" based on their "types," there might be a very tangential overlap, potentially anticipating the "processing the respective partition" part of step (c) if interpreted broadly. Its relevance seems weak without further context.

6. US6275867B1

   • Full Citation: US6275867B1 - Operation-partitioned off-loading of operations in a distributed environment
   • Publication Date: 2001-08-14
   • Filing Date: 1995-09-12
   • Brief Description: This patent describes off-loading operations in a distributed environment by partitioning the operations. This aligns closely with the concept of distributing subtasks in US7257582.
   • Potential Anticipation (35 U.S.C. § 102): This reference is highly relevant. It directly addresses the partitioning of operations and off-loading them in a distributed environment, which strongly aligns with claim 1, particularly steps (a) "logically subdividing records of said input file into a plurality of partitions" and (b) "distributing descriptions of all of said partitions to each of a plurality of subtask processors." It also relates to the execution of subtasks in different processors.

Family Cites Families (Cited by Examiner)

1. US5493643A

   • Full Citation: US5493643A - Image generator architecture employing tri-level fixed interleave processing and distribution buses
   • Publication Date: 1996-02-20
   • Filing Date: 1994-05-03
   • Brief Description: This patent describes an image generator architecture that uses tri-level fixed interleave processing and distribution buses. It relates to parallel processing for image generation.
   • Potential Anticipation (35 U.S.C. § 102): While specific to image processing, the concept of "fixed interleave processing and distribution" could be seen as a form of task distribution among multiple processing elements. This might generally anticipate the distribution and parallel execution of subtasks as in claim 1, particularly steps (b) and (c), though the application domain is different.

2. US5819021A

   • Full Citation: US5819021A - Overpartitioning system and method for increasing checkpoints in component-based parallel applications
   • Publication Date: 1998-10-06
   • Filing Date: 1995-12-11
   • Brief Description: This patent describes an overpartitioning system for increasing checkpoints in component-based parallel applications. It deals with partitioning for fault tolerance and recovery in parallel processing.
   • Potential Anticipation (35 U.S.C. § 102): This reference is very relevant due to its focus on "overpartitioning" in "parallel applications." It clearly anticipates the concept of logically subdividing tasks into a plurality of partitions (claim 1, step a) and distributing them for parallel execution (claim 1, steps b, c, d). The motivation might be different (checkpoints/fault tolerance vs. load balancing), but the underlying mechanism of partitioning and distributed processing is similar.

3. US6560701B1

   • Full Citation: US6560701B1 - Alternate boot record
   • Publication Date: 2003-05-06
   • Filing Date: 1997-02-10
   • Brief Description: This patent describes an alternate boot record. This is a system-level feature not directly related to load balancing of application-level processes.
   • Potential Anticipation (35 U.S.C. § 102): This patent appears to have no direct relevance to the claims of US7257582 and is unlikely to anticipate any of its claims.

4. US6480876B2

   • Full Citation: US6480876B2 - System for integrating task and data parallelism in dynamic applications
   • Publication Date: 2002-11-12
   • Filing Date: 1998-05-28
   • Brief Description: This patent describes a system for integrating task and data parallelism in dynamic applications. It directly addresses both task and data parallelism, which are central to US7257582.
   • Potential Anticipation (35 U.S.C. § 102): This reference is highly relevant. The integration of "task and data parallelism" directly anticipates the core concept of US7257582, which involves logically subdividing data into partitions and distributing subtasks to processors. This could anticipate numerous elements of claim 1, particularly steps (a), (b), (c), and (d).

5. JP3640580B2

   • Full Citation: JP3640580B2 - Sort / merge processor
   • Publication Date: 2005-04-20
   • Filing Date: 1999-11-11
   • Brief Description: This patent describes a sort/merge processor. Sorting is explicitly mentioned as a key application of US7257582.
   • Potential Anticipation (35 U.S.C. § 102): This reference is highly relevant, especially for claim 8, which states "wherein said computer-executable process is a sort process." A sort/merge processor would inherently involve partitioning data, processing it (sorting), and then merging the results, directly anticipating elements of claim 1, particularly steps (a), (c), and (e) within the context of a sort process.

Obviousness Analysis under 35 U.S.C. § 103 for US Patent 7257582

A patent claim is considered obvious under 35 U.S.C. § 103 if "the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains." The motivation to combine references can come from various sources, including the nature of the problem to be solved, the design needs or market pressures, or the known methods for combining elements found in the prior art.

US Patent 7257582 aims to enable the decomposition of linear processes into equivalent parallel processes that can efficiently use any number of potentially heterogeneous computers, taking available capacity into account while optimizing execution, and to improve processing efficiency generally. The core of independent claim 1 describes:
(a) automatically determining file allocation and logically subdividing records of an input file into a plurality of partitions;
(b) distributing descriptions of all partitions to each of a plurality of subtask processors;
(c) simultaneously executing subtasks on respective partitions in at least some processors, producing subtask output;
(d) repeating step (c) in at least some subtask processors with another unprocessed partition on a first-come/first-served basis; and
(e) generating at least one output combining all subtask outputs.

Below are combinations of prior art references that would render the claims of US7257582 obvious to a person having ordinary skill in the art (PHOSITA).

Combination 1: US6275867B1 in view of US5357632A and US5926833A

This combination addresses independent claim 1 and several dependent claims by combining the concepts of operation partitioning, dynamic task allocation, and heterogeneous system data access.

• US6275867B1 (Operation-partitioned off-loading of operations in a distributed environment): This patent teaches the fundamental concept of partitioning operations and off-loading them to processors in a distributed environment. This directly addresses elements (a) "logically subdividing records... into a plurality of partitions" and (b) "distributing descriptions of all of said partitions to each of a plurality of subtask processors" for processing in a distributed manner. It also covers (c) "simultaneously executing at least a respective one of the subtasks... in each of at least some of said processors on a respective one of the partitions."
• US5357632A (Dynamic task allocation in a multi-processor system): This reference describes a multiprocessor system with dynamic task allocation, where tasks are assigned to processors based on system load to efficiently utilize resources. This explicitly provides the mechanism for element (d) "repeating step (c)... with another unprocessed partition on a first-come/first-served basis," as dynamic allocation to balance load inherently involves subtasks taking available work. The patent also aligns with the objective of US7257582 to optimize execution by taking available capacity into account.
• US5926833A (Direct data access to a shared data storage subsystem by heterogeneous computing systems): This patent teaches a method and system enabling heterogeneous computing systems to directly access shared data storage. This foundational technology is crucial for implementing the system described in US7257582, where input and output files are shared by potentially heterogeneous systems, as stated in the patent's background and detailed description. It thus enables the scenario where a "plurality of subtask processors" are "mutually heterogeneous" (as in dependent claims 2 and 12).

Motivation to Combine:
A PHOSITA, aiming to build a more efficient and flexible distributed processing system, would be motivated to combine these references. US6275867B1 provides the initial framework for distributing parts of a task across multiple processors. However, for optimal performance and load balancing, a static distribution is often suboptimal. Therefore, a PHOSITA would naturally look to integrate dynamic task allocation mechanisms, such as those taught in US5357632A, to ensure that processors pick up new tasks (partitions) on a first-come/first-served basis, proportional to their capacity and current load. Furthermore, recognizing the prevalence of heterogeneous computing environments and shared storage, it would be obvious to incorporate the teachings of US5926833A to allow these distributed, dynamically assigned tasks to seamlessly access and process data from a shared storage subsystem, regardless of the underlying hardware heterogeneity. This combination directly leads to the method of independent claim 1, allowing for efficient load balancing with shared data in heterogeneous environments.

Combination 2: US6480876B2 in view of JP3640580B2 and US5926833A

This combination particularly addresses the application of load balancing to specific computer-executable processes, such as sorting (claim 8), while encompassing the general method of claim 1.

• US6480876B2 (System for integrating task and data parallelism in dynamic applications): This patent describes a system that integrates both task and data parallelism. This directly encompasses elements (a) "logically subdividing records... into a plurality of partitions," (b) "distributing descriptions of all of said partitions to each of a plurality of subtask processors," (c) "simultaneously executing at least a respective one of the subtasks," and (d) "thereafter repeating step (c)... on a first-come/first-served basis" (as dynamic applications inherently support adaptive task distribution).
• JP3640580B2 (Sort / merge processor): This patent specifically describes a sort/merge processor. Sorting is explicitly identified as a key application in US7257582. A sort/merge process inherently involves partitioning input data, sorting these partitions independently (subtasks), and then merging the sorted sub-outputs to produce a final sorted output. This directly teaches element (e) "generating at least one output combining all of the subtask outputs," particularly in the context of a sort process, thus making claim 8 obvious.
• US5926833A (Direct data access to a shared data storage subsystem by heterogeneous computing systems): As in Combination 1, this patent enables the shared data access between heterogeneous computing systems, which is a prerequisite for the overall system functionality described in US7257582.

Motivation to Combine:
A PHOSITA working on improving the performance of common, data-intensive applications like sorting (a prime example given in US7257582) would find US6480876B2's framework for integrating task and data parallelism highly relevant. To implement an efficient parallel sort, they would naturally look to specific solutions for sorting, such as the "sort/merge processor" described in JP3640580B2, which details the necessary partitioning, distributed sorting, and final merging steps. Recognizing that such large-scale data processing often occurs in environments with shared storage and potentially diverse hardware, the PHOSITA would integrate the teachings of US5926833A to ensure all processors can efficiently access the common input and output files across heterogeneous systems. This combination results in a distributed, load-balanced sorting method as described in claim 1 and specifically claim 8 of US7257582.

Combination 3: US5819021A in view of US5357632A and US5926833A

This combination further emphasizes the partitioning aspect and dynamic allocation for efficiency.

• US5819021A (Overpartitioning system and method for increasing checkpoints in component-based parallel applications): This patent teaches "overpartitioning" in parallel applications, where tasks are subdivided into more partitions than available processors. This directly addresses element (a) "logically subdividing records... into a plurality of partitions" and inherently implies (b) "distributing descriptions" and (c) "simultaneously executing" subtasks. Overpartitioning creates a pool of tasks, which naturally lends itself to dynamic allocation.
• US5357632A (Dynamic task allocation in a multi-processor system): As discussed, this reference provides the mechanism for dynamic task allocation based on system load, directly addressing element (d) "repeating step (c)... on a first-come/first-served basis."
• US5926833A (Direct data access to a shared data storage subsystem by heterogeneous computing systems): This patent provides the underlying shared data access for heterogeneous systems, essential for the practical implementation of the invention.

Motivation to Combine:
A PHOSITA designing a parallel application system, such as one employing overpartitioning for fault tolerance or granularity management as in US5819021A, would recognize that simply distributing these many partitions statically might lead to imbalances. To ensure efficient utilization of all available processing resources, especially when processor capacities or loads vary, it would be obvious to incorporate a dynamic task allocation scheme, such as that described in US5357632A, allowing processors to pull available partitions on a first-come/first-served basis. Furthermore, to enable this system to operate in realistic, distributed computing environments where data resides in shared storage accessible by heterogeneous machines, the PHOSITA would integrate the teachings of US5926833A. This combination would result in a robust, load-balanced, parallel processing system that addresses all elements of claim 1.

These combinations demonstrate that the core methodology of US7257582, including logical subdivision, distributed processing, first-come/first-served allocation for load balancing, and output generation, would have been obvious to a PHOSITA given the collective teachings of the cited prior art. The specific applications (sort, database query, etc.) listed in dependent claims (8-11) are likewise rendered obvious by references such as JP3640580B2 and US5835755A, or are simply well-known applications for parallel processing techniques.

Patent Term Adjustments (PTA) and Patent Term Extensions (PTE)

US Patent 7257582 was filed on February 27, 2003, and issued on August 14, 2007. Since the application was filed after June 8, 1995, it is eligible for Patent Term Adjustment (PTA) and potentially Patent Term Extension (PTE) under 35 U.S.C. § 154.

• Patent Term Adjustment (PTA): PTA is granted to compensate for delays caused by the USPTO during patent prosecution. It includes A-delays (USPTO delays during prosecution), B-delays (failure to issue a patent within three years of filing), and C-delays (delays due to interferences, secrecy orders, or appeals). The PTA determination is typically provided with the Issue Notification Letter and is indicated on the face of the patent. Without direct access to the patent's issue notification or official USPTO records for this specific patent, the exact PTA amount cannot be determined.
• Patent Term Extension (PTE): PTE is available to compensate for delays due to regulatory review processes, most notably for pharmaceutical products, and is governed by 35 U.S.C. § 156. There is no information in the provided patent text or search results to indicate that US7257582 was subject to such regulatory review, making a PTE unlikely.

Continuation and Divisional Applications

• Continuation Applications: A continuation application is a second application for the same invention claimed in a prior non-provisional application and filed before the patenting or abandonment of or termination of proceedings on the first application. The continuation application reuses the specification and drawings of the parent application but may have new claims.
• Divisional Applications: A divisional application is a later application for a distinct invention carved out of an earlier "parent" application. It is filed when the USPTO determines that an initial application claims more than one invention and requires restriction.

The Google Patents page for US7257582 lists its application number as US10/375,893 and indicates a priority to US10/375,893 (the same application number) and also refers to it as a "nonprovisional application corresponding to Ser. No. 60/363,853 filed 13 Mar 2002." This suggests that US10/375,893 is a non-provisional application claiming benefit from a provisional application (US 60/363,853). However, the information provided does not explicitly identify any continuation or divisional applications directly of US7257582 itself that have subsequently issued as separate patents.

Related Family Members

The patent family for US7257582 includes several international applications that claim priority from the same earlier application as US7257582:

• Priority Applications:
  • US10/375,893 (US7257582B2) - Filed: 2003-02-27, Priority: 2002-03-13
  • AU2003214605A (AU2003214605A1) - Filed: 2003-03-13, Priority: 2002-03-13
  • PCT/IL2003/000216 (WO2003077157A2) - Filed: 2003-03-13, Priority: 2002-03-13
  • EP03710186A (EP1488348A2) - Filed: 2003-03-13, Priority: 2002-03-13

These are international counterparts of the same invention, sharing the same priority date of March 13, 2002.

Projected Expiration Date

For utility patents issuing from applications filed on or after June 8, 1995, the patent term generally ends 20 years from the earliest filing date of the application or the earliest application for which a benefit is claimed under 35 U.S.C. §§ 120, 121, or 365(c).

US Patent 7257582 claims priority to provisional application Ser. No. 60/363,853, filed on March 13, 2002. The non-provisional application (US10/375,893) was filed on February 27, 2003. Since the patent claims priority to the provisional application, the earliest effective filing date for calculating the patent term is March 13, 2002.

Therefore, the unadjusted patent term would be 20 years from March 13, 2002.

• 20 years from March 13, 2002 = March 13, 2022.

However, the Google Patents information explicitly states the "Adjusted expiration" date as August 27, 2025, and the "Legal status" as "Expired - Lifetime, expires 2025-08-27". This indicates that Patent Term Adjustment (PTA) was applied, extending the term beyond the 20-year anniversary of the earliest priority date. The specific details of this adjustment are not fully available in the provided text.

Given the information from Google Patents, the projected (and actual) expiration date of US Patent 7257582 is August 27, 2025.