Invalidity dossier
US 6658536
Added 9/23/2026, 8:45:55 PM
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Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
US6658536 — Patent Overview
Title: Cache-coherency protocol with recently read state for extending cache horizontally
Patent number: US6658536B1 (application US08/839,547)
Assignee: International Business Machines Corporation (original assignee; listed current assignee)
Inventors: Ravi Kumar Arimilli, John Steven Dodson, John Michael Kaiser, Jerry Don Lewis
Dates: Priority/filing date 1997-04-14; granted/publication date 2003-12-02; anticipated expiration 2017-04-14. Status: Expired – Fee Related.
Purpose (from the text): The invention "generally relates to computer systems, and more particularly to a cache-coherency protocol which provides for a most recently referenced state allowing improvements in cache intervention which effectively extend a processor's cache horizontally."
Plain-language scope: The patent describes a multiprocessor system in which processing units (with multi-level cache hierarchies) communicate over a generalized interconnect or bus and snoop each other's read/write operations. A cache-coherence protocol associates a status indicator with each cache block (e.g., MESI: Modified, Exclusive, Shared, Invalid), reducing message traffic. The disclosed improvement concerns "intervention," where a cache holding control over a block supplies data directly to a requesting cache, bypassing a write-to-memory-then-read sequence. Per the text, intervention "can only be performed by a cache having the value in a block whose state is Modified or Exclusive," and the excerpt notes intervention with Shared states can be provided if the system collects all Shared responses (text truncated at this point).
What the excerpt does not establish:
- The full text of the claims; no claim numbers or claim language appear in the excerpt.
- The precise definition or implementation of the "recently read" state named in the title; the excerpt only alludes to it via the Shared-state intervention discussion, which is cut off.
- Whether any claims were allowed, rejected, or amended during prosecution.
- Independent verification of dates, assignee status, or legal status (excerpt notes status is an assumption, not a legal conclusion).
Generated 10/1/2026, 9:41:11 PM
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Litigation summary
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Proceedings on file (0)
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No PTAB proceedings on file. This patent has not been challenged via IPR, PGR, or CBM. The absence is itself a signal — well-asserted patents eventually attract IPRs. The LLM analysis below may surface filings the ODP feed hasn’t indexed yet.
PTAB challenges
AIA trial proceedings at the USPTO Patent Trial and Appeal Board — IPR, PGR, and CBM. Petitioners, judge panels, claim-level invalidation outcomes from Final Written Decisions, and Federal Circuit appeals. The single most important defensive datapoint after litigation history.
Assignment history
Inventors, original assignee, and the chain of ownership recorded with the USPTO — including the correspondent attorney who recorded each assignment, since shell-LLC chains often share one repeat-player attorney even when the entity names look unrelated. Surfaces NPE / patent-troll patterns: shell-entity transfers, known asserters in the chain, repeat correspondent fingerprints, pre-litigation assignments, and bankruptcy fire-sales.
Prior art
Earlier patents, publications, and products that may anticipate or render the claims unpatentable.
Obviousness
Combinations of prior art that suggest the claimed invention would have been obvious under 35 U.S.C. § 103.
Extensions
Patent term adjustments, term extensions, continuations, divisionals, family members, and expiration dates.
Derivative works
Defensive disclosure: derivative variations of each claim designed to render future incremental improvements obvious or non-novel.