Invalidity dossier
US 5872044
Late process method for trench isolation
Current assignee: Intersil Corp
Added 9/23/2026, 4:23:03 PM
Active provider: DeepSeek · deepseek-flash
Patent summary
Title, assignee, inventors, filing/issue dates, abstract, and a plain-language overview of the claims.
Patent Overview: US 5,872,044 — "Late Process Method for Trench Isolation"
Source: https://patents.google.com/patent/US5872044/en
Bibliographic data (as supplied): US Patent 5,872,044; application US08/733,368; filed 1996-10-17; granted/published 1999-02-16; priority date 1994-06-15; inventors Donald Frank Hemmenway and Lawrence George Pearce; original assignee Harris Corp.; current assignee listed as Intersil Corp.; status "Expired – Lifetime."
Purpose: The invention relates generally to trench isolation and, in particular, to forming trench isolation after completion of a final thick thermal oxidation step and a final deep diffusion step. The stated problem is that prior-art trench isolation processes are performed early in fabrication, so the trench oxide continues to grow during later thermal oxidation (e.g., LOCOS), causing excessive sidewall oxide growth; because silicon dioxide occupies roughly twice the volume of the silicon consumed, the resulting expansion creates mechanical stress and crystalline lattice defects in adjacent device regions, increasing leakage and reducing yield.
Plain-language scope (from the excerpt): Instead of forming and filling trenches early, the trenches are formed and filled "late"—after process steps that can create trench-related silicon defects, such as deep diffusion or thick thermal oxidation. In this disclosure, a thick thermal oxide is defined as thermal oxide greater than 500 Angstroms, and a deep diffusion as one where dopant penetrates the surface by one micron or more. After the trenches are formed and filled, the substrate is not subject to further deep diffusions exceeding one micron. The trench is made through the LOCOS isolation or other thermal oxide layers down to a buried dielectric layer, a buried conductive layer, or a predetermined depth. The open trench may be doped to render sidewalls conductive—stated as particularly helpful for contacting a buried layer conductive region, such as in bipolar transistors—and the trench walls may be implanted or silicided to provide contact.
Not established by this excerpt: the full claim language and count; the detailed process sequence and parameters; the complete written description and figures; the precise scope of prosecution history; and the full prior-art discussion. The excerpt also omits the "Definitions" and "Images" content. No litigation, ownership-transfer, validity, or prior-art analysis is undertaken here; the excerpt states that an assignment to Intersil Corporation occurred, but ownership details are not otherwise assessed.
Generated 10/1/2026, 9:50:56 PM
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Litigation summary
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PTAB challenges
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Assignment history
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Prior art
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Obviousness
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Extensions
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Derivative works
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