US 5521366

I'll check for any litigation/docket activity for this specific patent, then summarize from the authoritative full text provided.

US 5,521,366 — Analyst Summary

Important note on scope of verification: The full patent text was supplied to me as the authoritative source (Google Patents, fetched 2026-09-24). My web searches surfaced the same document plus a 2005 Texas Eastern District Court case (2:05-cv-00456) flagged in the Google Patents "Family has litigation" field (Unified Patents data). I found no CAFC 2026 docket activity for this patent, and I cannot confirm any case number or 2026 appeal from authoritative primary docket sources. Treat the litigation field as unverified; the patent's anticipated expiration is 2014-07-26, which makes current appellate activity improbable.

Bibliographic data (from the authoritative text)

Assignment chain caveat: the assignment records show multiple transfers and security interests (Metanetics → Meta Holding/Meta Holdings → Telxon → Symbol Technologies, with Bank of New York, Foothill Capital, and JPMorgan Chase security interests). The "Symbol Technologies LLC" designation is Google's unverified current-assignee listing.

Abstract (as issued)

Dataform readers and methods provide operation with a sequence of overlapping exposure periods for successive lines of sensor elements of an array. Also, the exposure periods for successive lines of sensor elements, or successive subsets of lines, can be independently determined. In operation, illumination of a target area is turned on before exposure of the first line of sensor elements, each line is exposed by reflected illumination in an exposure period which overlaps with the exposure period of one or more other lines, and illumination is then turned off. Using a CMOS construction, for example, the level of image signals read from one line is referred to a look-up table to determine an appropriate exposure period for a subsequent line or lines. This process is repeated to achieve exposure periods adjusted for localized exposure conditions for each successive line or subset of lines.

Plain-language overview of the independent claims

Claim 1 — Dataform reader with overlapped, feedback-controlled exposures (apparatus).
A reader has an array of sensor elements arranged in lines. An "array control assembly" (a) resets a selected line to a reference potential when an exposure start signal arrives (starting charge accumulation), and (b) reads out the line's image signals to an output point when an exposure stop signal arrives. An "exposure control system" is tied to that output point; it looks at the signal levels read from already-exposed lines and uses them to set the exposure period for one or more later lines. It then issues the start/stop signals so that exposure periods are partially overlapped — a later line starts integrating before an earlier line finishes.

Claim 12 — Same reader, without the overlap requirement.
Essentially claim 1 minus the final "overlapping exposure periods" limitation: an array-control assembly that resets/reads lines on start/stop signals, plus an exposure control system that derives a later line's exposure period from image-signal levels of previously selected lines and supplies the start/stop signals accordingly.

Claim 17 — Complete handheld reader (apparatus).
Adds to the array/array-control/exposure-control structure: at least one exposure illuminator for the target area, a focusing device in front of the array that images reflected illumination when the target is within a focus range, and a processing unit at the output point that decodes the dataform. The exposure control system implements overlapping exposure periods for successive lines. (Note: claim 17 does not itself recite the "signal-level feedback" limitation of claim 1.)

Claim 23 — Imaging method with partial overlap (method).
Steps: (a) reflect illumination from a target area containing a dataform onto the array; (b) reset a first line to reference potential on an exposure-start signal; (c) accumulate charge (exposure period); (d) read the first line on an exposure-stop signal; (e) output the first line's signals; (f) repeat (b)–(d) for successive lines, starting each successive line's exposure during the preceding line's exposure period, so periods partially overlap; (g) output each line's signals in sequence behind the preceding line's; (h) stop illuminating the array. Dependent claims add turning illumination on/off around the frame (24), averaging a line's signal level to time a later exposure stop (25), doing so via a look-up table (26), and applying that averaged level to a line "at least one line removed" from the sampled line (27), plus memory storage and decoding (28).

Claim 29 — Line-subset exposure method (method).
For an array of X lines: (a) read image signals from a selected line; (b) use their level to determine an exposure period; (c) apply that period to control the exposure duration of a subset of Y lines (Y ≥ 1 and Y < X); (d) repeat with a later line and a later subset. Dependent claims cover shared periods across a subset (30), the specific Y = 3 case (31), the Y = 1 per-line case (32), look-up-table determination from an averaged level (33), using the period to time the exposure-stop relative to the start signal (34), and decoding the dataform (35).

Notable technical context (from the specification)

• The stated motivation is power, size, and accuracy: prior continuous-frame CCD readers consume on the order of a full watt and have slow gain-control response; the invention targets single-frame capture using CMOS photodiode sensor elements with on-chip support circuitry (gain, focus sensing, exposure control), described as potentially ~one-tenth the power of comparable CCD arrangements.
• The specification criticizes prior interlaced exposure (exposing all alternate lines, then the rest): non-uniform illumination/reflectivity causes over- or under-exposure when one average exposure period is used for the whole image, and progressive readout makes the last line's effective exposure far longer than the first's.
• Referenced related filings include Ser. No. 08/258,428 (filed Jun. 10, 1994, incorporated by reference) and U.S. Pat. No. 5,304,787 ("Locating 2-D Bar Codes"). The same family produced continuations such as US 5,817,200; US 5,816,390; US 5,701,059; US 5,763,864; US 5,811,774; and parent US 5,572,006.
• Cited prior art of record includes US 5,265,266 (Denyer), US 5,309,243 (Tsai), US 4,955,296 (Ishida), US 4,835,615 (Taniguchi), and JP 63-67692.

Uncertainty flags: (1) the CAFC 2026 docket search returned nothing specific to this number — I cannot confirm or deny any 2026 appellate proceeding; (2) current ownership as listed is Google's automated designation, not a verified chain-of-title; (3) the "litigation" flag rests on Unified Patents metadata and I did not independently verify the 2005 case details.

I'll search for litigation involving US patent 5521366 specifically.

Let me search more targeted sources.

Let me try the specific case number and litigation databases.

Litigation involving US Patent 5,521,366

Bottom line: Based on my searches, only one litigation record is affirmatively linked to this patent — a 2005 U.S. District Court case in the Eastern District of Texas, case number 2:05-cv-00456. I was unable to confirm the plaintiff, defendant, precise filing date, or outcome from the sources I could retrieve, and I will flag each of those gaps explicitly rather than guess.

Confirmed record

The only litigation citation appearing in the patent record is a Unified Patents portal link of the form portal.unifiedpatents.com/litigation/Texas Eastern District Court/case/2:05-cv-00456. Take note of an important caveat: Google Patents labels this as "Family has litigation" and a companion Darts-ip link (family ID 23298920), meaning the case is associated with the patent family (which includes related members such as US 5,572,006, US 5,815,200, US 5,702,059, US 5,763,864, US 5,646,390, US 5,811,774, US 6,424,830, and US 7,065,344) rather than being expressly tagged to the '366 patent as an asserted patent-in-suit. It is therefore possible the '366 patent was one of several patents-in-suit, or that the case relates principally to a sibling family member. I could not verify which.

What I could NOT establish

• Plaintiff and defendant identities. My searches surfaced the "2:05-cv-00456" link but did not return a docket entry naming the parties. The patent's ownership chain at that time (Metanetics Corp. → Meta Holding Corp. → Telxon Corp. → Symbol Technologies, Inc.; Symbol acquired as assignee in 2002) means either the then-owner Symbol Technologies or its predecessor Telxon/Meta Holding could plausibly have been the plaintiff — but this is inference, not a verified fact, and I will not state it as one.
• Outcome. No termination, settlement, judgment, or dismissal information was retrieved.
• Any other cases. I found no additional litigation naming this patent beyond the single E.D. Tex. case. Notably, the search results mentioning bar-code litigation generally (e.g., Metrologic Instruments, Inc. v. Symbol Technologies, Inc., Symbol Technologies ITC Inv. No. 337-TA-551, and the Lemelson actions) do not appear to involve the '366 patent, and I should not conflate those with it.

Status notes

• The '366 patent's legal status is Expired – Lifetime, with an anticipated expiration of 2014-07-26 (20 years from the earliest priority date of 1994-07-26). Any litigation would necessarily have been filed before that date, which is consistent with (but not proof of) a 2005 filing.
• The patent also carries a notice of foreign family litigation (Darts-ip family 23298920), but no foreign case details are given in the record.

Recommended verification steps (I could not complete these)

1. PACER / CourtListener / RECAP — pull the docket for 2:05-cv-00456 in E.D. Tex. to obtain the exact party names, filing date, and docket entries.
2. Unified Patents litigation portal — open the exact URL cited in the patent record (.../Texas Eastern District Court/case/2:05-cv-00456) for the normalized plaintiff/defendant/patent mapping.
3. Darts-ip family 23298920 — for the worldwide family litigation entry.
4. RPX Empower / litigation.rpxcorp.com — cross-check for any additional suits (e.g., a possible earlier Metanetics-era case).

Summary: One litigation is documented — E.D. Tex. case 2:05-cv-00456 (2005) — but the parties, exact filing date, and outcome of that case are not confirmed by the sources I was able to retrieve, and I found no other litigation specifically naming US 5,521,366. I am explicitly flagging these unknowns rather than fabricating entries.

I'll verify the structured data with targeted web searches before writing anything.

Proceedings overview

Zero AIA trial proceedings are on file for US 5521366. The USPTO Open Data Portal returns no IPR, PGR, or CBM proceeding, and my independent searches of PTAB-related sources surfaced none — no petition, no institution decision, no Final Written Decision, no appeal. (A CBM would have been a poor fit in any event: the '366 claims are directed to sensor-array exposure timing and readout circuitry, not to "a financial product or service" under AIA § 18(d)(1).)

The bottom-line defensive posture is therefore not "the patent is hardened by surviving IPRs." It is stronger and simpler than that: the patent is expired and unassertable. Google Patents lists the anticipated expiration as 2014-07-26 and the legal status as "Expired - Lifetime." Filed 1994-10-31 (priority 1994-07-26, the CIP parent), granted 1996-05-28, this is a pre-URAA patent that has been off term for roughly twelve years. Even the 35 U.S.C. § 286 six-year damages lookback closed years ago. If you have received a demand letter citing US 5521366 in 2026, the correct first response is a term-expiration letter, not an IPR.

The one caveat: "litigation" ≠ "PTAB proceeding"

The Google Patents page carries two litigation badges that are easy to misread as PTAB activity. They are not:

• A Texas Eastern District Court case, cited as case 2:05-cv-00456, with the source labeled "Unified Patents Litigation Data." That label is a database vendor attribution, not evidence that Unified Patents LLC filed a challenge. I found no Unified Patents petition against the '366 patent.
• A Darts-IP "first worldwide family litigation" link (family 23298920).

What I could corroborate from the public record is a 2005 E.D. Tex. assertion campaign. In Symbol Technologies, Inc. v. Metrologic Instruments, Inc., No. 2:05-cv-509 (E.D. Tex., Marshall Div.), Symbol accused Metrologic of infringing six patents including US 5,521,366, alongside US 5,479,002, US 6,631,845, US 5,646,390, US 5,591,952, and US 6,854,655 — see 450 F. Supp. 2d 676 (2006) (denying transfer of venue), available at https://www.courtlistener.com/opinion/[2562871](/patent/2562871)/symbol-technologies-inc-v-metrologic-instruments-inc/.

I cannot confirm that 2:05-cv-00456 is the same matter as 2:05-cv-509 — the docket numbers differ and my searches did not return a docket sheet for 456 naming these parties. Treat 456 as unverified. This is district-court activity from 2005, brought by a practicing company (Symbol, as successor to Metanetics/Telxon) against a competitor. It is not an AIA trial, and it is not the behavior pattern of a monetizing non-practicing entity.

Strategic summary

Claim status: everything is untested at the PTAB, and all 35 claims expired intact. The patent carries 35 claims (claim 1 is the reader apparatus claim; claims 2–6 as reproduced address sequential line readout, averaged image-signal exposure determination, a look-up table of exposure periods versus average image signal levels, grounding to a reference potential, and start-signal timing). Because no IPR or PGR was ever filed, there is no PTAB cancellation record — no independent claim is canceled, none is squarely "sustained" by an FWD, and none is "hardened." The claims simply ran out of term. Do not represent to a court that claims 1–5 are canceled; they are not. They are expired.

Estoppel landscape: no § 315(e)(2) estoppel attaches to anyone. Estoppel requires a petitioner to have reached an FWD in an IPR/PGR, or to have been a real party in interest or privy to one. That trigger never occurred here. For a defendant being asserted today, this cuts the opposite way from the usual IPR analysis: every prior-art ground remains available, including art litigated in the 2005 E.D. Tex. case and art that could have been raised then. There is no symmetry penalty to worry about, no "reasonably could have raised" trap, and no need to sequence an IPR ahead of invalidity contentions. Practically, though, you should never reach that analysis — invalidity is a fallback, and expiration is the front line.

Pattern signals: this patent was never a PTAB target, and that tells you something. Well-asserted, unexpired patents of any commercial consequence reliably attract IPRs — that is precisely the asymmetrical-incentive pattern that makes the absence of proceedings diagnostic. Here the four-year assertion campaign (2005–2006, Symbol v. Metrologic) happened during the pre-AIA era, when IPR/PGR/CBM did not exist; by the time AIA trials became available in 2012-09-16, the patent had under two years of term left and no live high-stakes litigation driving a petition. So the "no proceedings" finding is fully explained by timing, not by the patent being bulletproof. There is no defensive aggregator in the chain, no serial petitioner, and no patent-owner PTAB-appeal posture, because there is no PTAB docket at all.

Recommended next steps

1. Lead with expiration, not invalidity. Demand letter or complaint citing US 5521366: respond that the patent expired 2014-07-26 (Google Patents legal status: "Expired - Lifetime"). There is no prospective infringement, no injunction, and no ongoing royalty. Confirm the term calculation independently against the USPTO Patent Center file wrapper (the pre-URAA term — 17 years from grant vs. 20 years from earliest filing — should be checked against the front-page information), but every date on file produces an expiration well before today.

2. Check § 286 before conceding the possibility of back damages. Even the six-year pre-suit damages window has closed. Any damages theory would have to reach conduct before 2014-07-26 and would have had to be sued on years ago. Quote § 286 and the term-end date in your responsive letter.

3. Preserve invalidity as a fallback, unconstrained by estoppel. Because no § 315(e)(2) or § 325(e)(2) estoppel exists, you may raise any § 102/§ 103 ground, including art that a prior petitioner "could have raised." If you need the strongest historical art package, pull the 2005 E.D. Tex. invalidity contentions and any claim-construction record from Symbol v. Metrologic, No. 2:05-cv-509 — but note I could not verify in these searches whether that record included substantive invalidity rulings on the '366 patent.

4. Do not confuse the vendor label. If you are building a diligence memo, record explicitly that the "Unified Patents" string on the Google Patents page for '366 is the attribution of the litigation dataset ("Unified Patents Litigation Data," CC-BY-4.0), not a Unified Patents LLC IPR filing. No such filing exists.

Verification links

• PTAB E2E (no records for US 5521366): https://ptacts.uspto.gov/ptacts/
• US 5521366 on Google Patents (status: Expired - Lifetime; anticipated expiration 2014-07-26): https://patents.google.com/patent/US5521366/en
• Symbol Techs., Inc. v. Metrologic Instruments, Inc., No. 2:05-cv-509, 450 F. Supp. 2d 676 (E.D. Tex. 2006): https://www.courtlistener.com/opinion/2562871/symbol-technologies-inc-v-metrologic-instruments-inc/

Confidence note: I have high confidence in the "no AIA trial proceedings" conclusion, based on the ODP block plus independent searching. I have lower confidence on the 2:05-cv-00456 docket identification and could not verify it; the caveat above is flagged rather than resolved.

I'll research the assignment record and litigation history before reconstructing the chain.

The searches didn't surface reel/frame data directly. Let me dig deeper on the litigation and assignment specifics.

Good leads. Let me confirm the litigation details and hunt for reel/frame and correspondent data.

Note on source limitations (read first)

The authoritative full text supplied for US 5,521,366 includes Google Patents' legal-events list, which records conveyance type, assignor, assignee and date — but not reel/frame numbers and not the correspondent of record. I attempted to retrieve the underlying USPTO Assignment Center records (reel/frame + correspondent) via web search; the searches confirmed the litigation and the corporate context but did not return the reel/frame serial numbers or the recording attorneys for this patent. I searched until the tool budget was exhausted.

Accordingly: every reel/frame field below is marked "not retrieved" rather than invented. The assignment sequence, dates, parties and conveyance types are taken verbatim from the authoritative legal-events data. Where I add outside context (merger agreement, litigation, post-2005 corporate ownership) I say so and flag it as unverified.

Inventors

Unusual-pattern check: No evidence of inventors departing the original assignee within 12 months of filing. Both inventors appear only as assignors on the initial 1995-02-06 record; neither appears again anywhere in the assignment chain. This is the ordinary startup pattern (founders/engineers assign to the company at formation of the filing) and is not a fire-sale tell. One weak, non-dispositive observation: a "Wang" (Dayou Wang, not Ynjiun P. Wang) later appears as an inventor on a Symbol Technologies barcode-exposure application (WO 2011016924 A3), which is consistent with Symbol having absorbed the technology and staff after acquiring the portfolio — but I cannot confirm either inventor's post-1995 employment from the sources available, so I will not assert it.

Original assignee

Metanetics Corporation, Fort Myers, Florida — named on the issued patent and confirmed by the 1995-02-06 assignment record.

• Primary line of business: Design/manufacture of portable dataform (bar-code and 2-D matrix code) readers. The spec's own framing (hand-held, battery-powered, CMOS single-chip reader) is consistent with an operating hardware company, not a licensing vehicle.
• Did they ship a product? The specification describes a concrete hand-held reader (FIGS. 1A–1C: plastic case, hand grip, trigger, battery compartment, LED illuminator arrays, CMOS sensor array). That is a manufacturable device, and Metanetics was a barcode-reader maker of the mid-1990s. I could not independently verify unit sales from the available sources; treat "shipped a product" as likely but not documented here.
• Current status: Not operating under its own name. Per Google Patents legal events, Metanetics Corporation underwent a CHANGE OF NAME → "Meta Holding Corporation" (recorded 2004-12-22), and Meta Holding was then merged into Telxon Corporation (recorded 2004-12-22). A separate public document — the Plan and Agreement of Merger among Telxon Corporation, Meta Technologies Corporation, and Metanetics Corporation, dated 2000-02-22 (Justia contracts) — shows Metanetics being merged into a Telxon subsidiary around 2000. Caveat/contradiction: that 2000 agreement names the surviving entity "Meta Technologies Corporation … renamed Metanetics Corporation," which does not line up cleanly with the Google legal-events narrative ("Metanetics → Meta Holding → merged into Telxon"). The underlying recorded instruments are the only way to reconcile this, and I did not obtain them. Flagging the mismatch explicitly rather than picking one story.

Assignment timeline

All entries below are the recorded events from the authoritative legal-events data. Reel/frame and correspondent were not retrievable, so those fields are marked accordingly. Conveyance types that are liens/releases are included because they appear in the chain but are not ownership transfers.

• 1995-02-06 (recorded) — Reel not retrieved

  • Conveyance: Assignment of assignors' interest
  • Assignor: Paul P. Ju; Ynjiun P. Wang
  • Assignee: Metanetics Corporation
  • Correspondent: not retrieved
  • Context: Founders'/employees' assignment of invention rights to the operating startup that filed the application.

• 1999-03-30 (recorded) — Reel not retrieved

  • Conveyance: Security interest
  • Assignor: Telxon Corporation
  • Assignee: The Bank of New York
  • Correspondent: not retrieved
  • Context: Securitization / financing lien on Telxon's IP; not an ownership change.

• 1999-07-12 (recorded) — Reel not retrieved

  • Conveyance: Security agreement
  • Assignor: Meta Holdings Corporation
  • Assignee: The Bank of New York
  • Correspondent: not retrieved
  • Context: Financing lien on the Metanetics-successor entity; not an ownership change.

• 1999-09-09 (recorded) — Reel not retrieved

  • Conveyance: Release by secured party
  • Assignor: The Bank of New York, as agent
  • Assignee: Telxon Corporation
  • Correspondent: not retrieved
  • Context: Lien release after refinancing.

• 1999-09-09 (recorded) — Reel not retrieved

  • Conveyance: Security interest
  • Assignor: Meta Holding Corporation
  • Assignee: Foothill Capital Corporation, as agent
  • Correspondent: not retrieved
  • Context: Replacement financing lien (Foothill steps in as secured party).

• 1999-09-09 (recorded) — Reel not retrieved

  • Conveyance: Release of security interest
  • Assignor: Bank One, N.A.
  • Assignee: Meta Holding Corporation
  • Correspondent: not retrieved
  • Context: Pre-existing Bank One lien released; part of the 1999 refinancing cluster.

• 1999-09-09 (recorded) — Reel not retrieved

  • Conveyance: Release by secured party
  • Assignor: The Bank of New York, as agent
  • Assignee: Meta Holding Corporation
  • Correspondent: not retrieved
  • Context: BNY lien released against the Meta Holding entity; completes the 1999 refinancing cluster.

• 2002-04-08 (recorded) — Reel not retrieved

  • Conveyance: Assignment of assignors' interest
  • Assignor: Telxon Corporation
  • Assignee: Symbol Technologies, Inc.
  • Correspondent: not retrieved
  • Context: Acquisition — Symbol Technologies absorbed Telxon (and with it the Metanetics-derived portfolio). This is the last true ownership transfer in the chain.

• 2004-12-22 (recorded) — Reel not retrieved

  • Conveyance: Change of name
  • Assignor: Metanetics Corporation
  • Assignee: Meta Holding Corporation
  • Correspondent: not retrieved
  • Context: Corporate rename only; no change in beneficial ownership. (Recorded date is 2004 but the rename likely occurred earlier.)

• 2004-12-22 (recorded) — Reel not retrieved

  • Conveyance: Merger
  • Assignor: Meta Holding Corporation
  • Assignee: Telxon Corporation
  • Correspondent: not retrieved
  • Context: Internal reorganization/merger of the Metanetics successor into Telxon. (See contradiction note in "Original assignee" — the 2000 merger agreement and these 2004 recordings do not fully reconcile on the record available.)

• 2005-01-05 (recorded) — Reel not retrieved

  • Conveyance: Security interest
  • Assignor: Symbol Technologies, Inc.
  • Assignee: JPMorgan Chase Bank, N.A.
  • Correspondent: not retrieved
  • Context: Secured-lending lien on Symbol's IP; not an ownership change.

• 2005-03-15 (recorded) — Reel not retrieved

  • Conveyance: Release of security interest
  • Assignor: Foothill Capital Corporation
  • Assignee: Meta Holding Corporation
  • Correspondent: not retrieved
  • Context: Late-recorded release of the 1999 Foothill lien.

• 2010-12-03 (recorded) — Reel not retrieved

  • Conveyance: Release by secured party
  • Assignor: JPMorgan Chase Bank, N.A.
  • Assignee: Symbol Technologies, Inc.
  • Correspondent: not retrieved
  • Context: JPMorgan lien released; chain closes with Symbol Technologies, Inc. as owner.

Net ownership chain: Wang + Ju → Metanetics Corp → (rename) Meta Holding Corp → (merger) Telxon Corp → Symbol Technologies, Inc., interspersed with three lender liens and their releases.

Timeline diagram

timeline
    title Ownership of US 5521366
    1994 : Application filed Oct 31
    1995 : Inventors assign to Metanetics Corp
    1996 : Patent issued May 28
    1999 : Bank of New York security interest
         : Foothill Capital lien replaces it
    2002 : Telxon assigns to Symbol Technologies
    2004 : Metanetics renamed Meta Holding
         : Meta Holding merged into Telxon
    2005 : Symbol asserts patent v Metrologic
         : JPMorgan takes security interest
    2010 : JPMorgan lien released
    2014 : Patent expires Jul 26

NPE / troll-pattern signals

1. Shell-entity transfer — not present. No assignee in the chain carries an "IP / Patents / Licensing / Holdings / Ventures" licensing-vehicle name. The transfers are a change of name (Metanetics → Meta Holding, 2004-12-22), a merger (Meta Holding → Telxon, 2004-12-22) and an asset/stock acquisition (Telxon → Symbol Technologies, 2002-04-08). All are ordinary corporate transactions, and the terminal owner is a well-known operating manufacturer.

2. Known asserter in the chain — not present. None of Acacia, Marathon, Intellectual Ventures, IPNav, Wi-LAN, Mosaid/Conversant, Vringo, Pendrell, Innovatio, MPHJ, Lumen View, Round Rock, Document Generation Corp, or a Spangenberg entity appears as assignee. The terminal owner, Symbol Technologies, Inc., is a barcode/RFID hardware manufacturer (a competitor of the defendants it sued), not a listed NPE.

3. Repeat correspondent across the chain — unclear / not verifiable. The correspondent of record is exactly the datum this task wants, and it was not retrievable from the sources available (Google legal events omit it; the likely relevant pages surfaced the footnote form shown above, not the Assignment Center record). I therefore cannot determine whether one attorney/firm recorded multiple links. This is a genuine evidence gap, not a negative finding.

4. Cascading transfers — not present. Ownership moved through only three corporate steps over ~7 years (Metanetics → Meta Holding → Telxon → Symbol), plus three lender liens. That is a normal dissolution/acquisition cadence, not the "<24 months through chained LLCs" signature. The one tight cluster — the four 1999-09-09 records — is entirely lien releases and replacements, not ownership conveyances.

5. Pre-litigation transfer — not present. The last ownership transfer (Telxon → Symbol) was recorded 2002-04-08; the earliest identified assertion of this patent is the 2005 case (E.D. Tex., Symbol as plaintiff). That is roughly three years, well outside the 6-month window that would flag a venue/standing-manufacturing transfer. Symbol asserted a patent it had already owned for years.

6. Bankruptcy fire-sale — unclear. The 1999 security interests (Bank of New York, 1999-03-30 and 1999-07-12; Foothill, 1999-09-09) evidence financial distress at Telxon/Meta Holding, but a secured lien is not a bankruptcy sale, and I found no Chapter 7/11 sale of this portfolio in the available sources. Do not treat this as confirmed either way.

7. Privateering — not present. There is no evidence the operating owner transferred the patent to a third party to assert on its behalf. Symbol Technologies asserted the patent itself, and named defendant Metrologic Instruments was a direct competitor in the same laser-scanner/dataform-reader market. That is classic operating-company patent enforcement, not privateering.

8. Defensive aggregator — not present. The chain does not terminate at RPX, AST, LOT, Unified Patents or OIN. It terminates at Symbol Technologies, Inc. (and, per Google's current-assignee field, "Symbol Technologies LLC").

Litigation cross-reference (context for signals 2, 5, 7): Symbol Technologies, Inc. v. Metrologic Instruments, Inc., E.D. Tex. No. 2:05 CV 509 (Marshall Div.), 450 F. Supp. 2d 676 (2006) — Symbol accused Metrologic of infringing six patents including U.S. 5,521,366 (with 5,479,002; 6,631,845; 5,646,390; 5,591,952; 6,854,655). Discrepancy to flag: Google Patents' "family has litigation" field cites a Texas Eastern case 2:05-cv-00456; the case I could read is 2:05-cv-00509. These may be two separate 2005 Symbol filings (Symbol filed several dataform-reader suits that year) or a metadata error — I could not verify 2:05-cv-00456 directly, so I record both and do not resolve them.

Verdict

Operating-company assertion.

The chain runs from the inventors through the original operating assignee Metanetics Corporation (1995-02-06 assignment), a name change and merger into Telxon, and an acquisition by Symbol Technologies (recorded 2002-04-08) — with the only intervening records being three lender security interests and their releases (1999-03-30, 1999-07-12, 1999-09-09, 2005-01-05, 2005-03-15, 2010-12-03), none of which is an NPE transfer. The patent was then asserted by its owner, Symbol Technologies, Inc., against direct competitor Metrologic Instruments in E.D. Tex. (No. 2:05 CV 509, complaint alleging infringement of U.S. 5,521,366 among six patents) — enforcement by a product manufacturer against a market rival, not by a licensing shell. No shell-entity transfer, no known NPE assignee, no litigation-timed transfer, and no defensive-aggregator endpoint appear in the record; the only unresolved question is the missing correspondent/reel-frame data, which I flag rather than guess.

Verification link: USPTO Patent Assignment Search — https://assignment.uspto.gov/patent/index.html (enter patent number 5521366); the assignment records themselves (reel/frame, correspondent) should be pulled there to close the gap noted in signal 3.

Open items I could not close

1. Reel/frame numbers and correspondents for all 13 recorded events — not in the authoritative text and not returned by search. This is the single biggest gap; it is precisely what would confirm or refute a repeat-correspondent pattern.
2. Reconciliation of the merger records (2000-02-22 Merger Agreement naming "Meta Technologies Corp" vs. the 2004-12-22 recorded change-of-name/merger naming "Meta Holding Corp") — unresolved.
3. Litigation case number — 2:05-cv-00456 (Google) vs. 2:05-cv-00509 (court opinion text) — unresolved.
4. Post-2005 ownership — Google lists "Symbol Technologies LLC" as current assignee; the general-knowledge path is Symbol → Motorola (2007) → Zebra Technologies (2014), with "Symbol Technologies LLC" as the Zebra-era entity name. I did not verify this from primary sources here, so treat it as unconfirmed context, not a finding. The patent's anticipated expiration 2014-07-26 means it is long expired and non-assertable today.

I'll search for the specific patent and its cited references.

Let me look for the specific "References Cited" (prior art) section of this patent.

I need the patent's own front-page "References Cited" list. Let me target that specifically.

Prior-Art Analysis — US 5,521,366 A

Search note / sources. I could not reach USPTO PatentCenter directly from this session, so I grounded the citation list in sources that reproduce the patent's own front-page "References Cited" section: Google Patents (https://patents.google.com/patent/US5521366), Justia Patents (https://patents.justia.com/patent/5521366, which renders the "Referenced Cited — U.S. Patent Documents" block verbatim), and FreePatentsOnline class listing (https://www.freepatentsonline.com/CCL-235-462.06-p4.html). All hits matched US 5,521,366 specifically (application 08/332,592); no other number was substituted. Per the strict rule, IDs below are reproduced literally as found.

A. References cited on the face of the patent (35 U.S.C. § 102 / § 103 art of record)

The Justia rendering of the patent's "Referenced Cited — U.S. Patent Documents" block lists the following:

* "Potential § 102 target claims" is a preliminary mapping based on the technical field each reference occupies — see the caution in Section D. I did not retrieve the full text of references 1–6, 9, or 10, so those descriptions and mappings carry low confidence and are flagged accordingly.

B. The two references with the most concrete § 102 exposure

US 5,345,266 (Denyer) — "Matrix array image sensor chip" — issued Sep. 6, 1994 (confirmed in FPO's G06K 7/10 class listing, "5345266 | Matrix array image sensor chip | 1994-09-06 | Denyer et al.").
This is the most structurally on-point reference of record. Its own claims (retrieved via patents.searchlight.law/doc/US5345266) recite: a two-dimensional matrix of sensing cells each having a photodiode and a transistor (claim 1); horizontal scan means and vertical scan means; a plurality of analogue switch means each with voltage storage means and a first charge-sensing amplifier coupled by a common conductor to an output amplifier (claim 1); reset of the "read" cell using a signal from the vertical scan means (claim 2); and implementation "using a technology selected from CMOS, PMOS, NMOS, Bipolar, BiMOS and BiCMOS" (claim 10).

This maps to US 5,521,366 claims directed purely to structure:

• Claim 10 ("each of said sensor elements is a light sensitive diode element formed on a CMOS chip") — Denyer claim 1 (photodiode cell) + claim 10 (CMOS implementation) is facially anticipatory of that element.
• Claim 5 / element of claim 1 ("set to a reference potential … coupled to a ground reference potential") — Denyer's cell reset (claims 2 and 9) is the same physical operation.
• Claims 7–9 (line control register, sample-and-hold amplifiers, output switches) — Denyer's "analogue switch means"/"voltage storage means"/"common conductor to an output amplifier" are analogous but not identical; shifting-register specifics are not clearly shown, so this is more § 103 (obviousness) than clean § 102.
• Claims 16, 19–21 (CMOS-chip dependent claims) — same Denyer basis as claim 10.

Critically, Denyer does not disclose the two features that carry the independent claims: (i) an exposure control system coupled to the output point that determines a later line's exposure period from the level of image signals read from selected earlier lines, and (ii) the overlapping exposure-period sequence. So Denyer cannot anticipate independent claims 1, 12, 17, 23, or 29 — those issued precisely over this class of array-readout art.

US 5,309,243 (Tsai) — issued May 3, 1994.
The other exposure-control reference of record. It sits squarely in the "automatic exposure control for a solid-state image sensor" field (the same field as the patent's FIG. 5 look-up-table embodiment). It is the most plausible § 102/§ 103 vehicle for the exposure-period-determining dependent claims — claim 3 (average image signal level used to set an exposure period), claim 13, and claim 14 (look-up table of line exposure periods vs. average image signal levels) — but only if Tsai discloses developing an exposure period from a sampled/averaged signal level via a stored correlation. I was unable to retrieve Tsai's full text in this session, so this mapping is provisional and should be verified against the printed patent before being relied on. It would not, on its face, reach the overlapping-exposure limitations.

C. Contradictions with the earlier (previously generated) section — flagged per instructions

Three discrepancies between the prior summary and the face-of-patent list I retrieved:

1. Denyer number. The prior section reads "US 5,265,266 (Denyer)." The authoritative listing (Justia and FPO both) reads US 5,345,266 — "Matrix array image sensor chip," Sept. 6, 1994. Per the strict rule I am not silently correcting; I flag that the earlier "5,265,266" does not match the retrieved record and the retrieved value is 5,345,266.
2. Ishida number. The prior section reads "US 4,955,296 (Ishida)." The Justia rendering of the front page reads "4952966 … August 28, 1990 … Ishida et al." — i.e., US 4,952,966. Again flagged, not auto-corrected: the two sources disagree on the third and fourth digits.
3. Completeness / date conflict. The prior section lists only five references (Denyer, Tsai, Ishida, Taniguchi, JP 63-67692). The retrieved front-page block contains nine U.S. patents plus the JP publication — it omits US 4,996,413 (McDaniel), US 5,025,319 (Mutoh), US 5,262,871 (Wilder), US 5,272,538 (Homma), and US 5,352,884 (Petrick). The JP reference matches: front page lists "0067692, March 1988, JPX," corresponding to JP 63-67692.

D. Important qualifications on the § 102 mapping

• "Cited" ≠ "anticipatory." Everything in Section A is art the examiner considered; the overwhelming majority of it is § 103 background, not § 102 anticipation. For a reference to anticipate a given claim it must disclose every element of that claim. Because the independent claims 1, 12, 17, 23 and 29 each require a line-feedback exposure control system (claims 1, 12) and/or overlapping exposure periods (claims 1, 17, 23), the listed references of record appear incapable of anticipating those independent claims. At most they reach the narrower dependent claims (sensor-structure, ground-potential, sample-and-hold, look-up-table, CMOS).
• Confidence levels. I have high confidence in the identity and dates of the citations (two independent reproductions agree), high confidence in the Denyer content analysis (full claims retrieved), low-to-moderate confidence in the one-line descriptions of references 1–6, 9, and 10 (titles/content not independently retrieved this session), and low confidence in the Tsai-specific exposure-control mapping.
• Additional art worth checking beyond the face of the patent. Because the concept of overlapping/rolling exposure with per-row feedback is the crux, a complete § 102 search should extend beyond the patent's own list — e.g., the parent application Ser. No. 08/280,489 (priority Jul. 26, 1994) and family member US 5,572,006, and the incorporated-by-reference application Ser. No. 08/258,428 (filed Jun. 10, 1994). The WO 96/13799 / EP 0 737 341 B1 counterparts (identical disclosure) are § 102(a)/(b) self-art and anticipate nothing new; but the separate Metanetics publication WO 96/03708 A1 (published Feb. 8, 1996, family member EP 0 721 628, which includes US 5,521,366 in its own family annex) is a genuine same-family sibling and should be treated as non-prior art rather than as an anticipatory reference.

If you want, I can pull the full text of the individual U.S. references (especially US 5,309,243 (Tsai), US 4,952,966 (Ishida), and US 5,262,871 (Wilder)) and re-run the limitation-by-limitation § 102 chart for the dependent claims.

I'll research the prior art references of record before analyzing obviousness.

Let me verify the prior art references of record on the patent's front page and get details on the specific references.

Obviousness Analysis — US 5,521,366 under 35 U.S.C. § 103

Scope note and source discipline. This analysis is built on (a) the authoritative full patent text supplied to me, including the "Prior art keywords" block and the specification's citations, and (b) web searches I ran on the references of record. Per the operating rules, I do not auto-correct identifiers. Where my searches returned a different reference number than the previously generated summary used, I flag the discrepancy and analyze both readings rather than silently picking one.

1. Framework and level of ordinary skill

Governing law. Pre-AIA § 103(a) applies (the application was filed 1994-10-31 and the patent has since expired). The controlling test is Graham v. John Deere Co., 383 U.S. 1 (1966) — scope and content of the prior art, differences from the claims, PHOSITA level, and secondary considerations — as refined by KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007) (predictable combinations, design incentives, "obvious to try") and In re Kahn, 441 F.3d 977 (Fed. Cir. 2006) (articulated reasoning required).

Level of ordinary skill (proposed). A person with a bachelor's degree in electrical engineering or physics and 2–4 years of experience designing solid-state image sensors and/or optical dataform readers, or a master's degree with 1–2 years of such experience. On the 1994 date, this person would have been familiar with: MOS/CMOS photodiode arrays with row/column shift-register addressing; CCD and MOS interline transfer; automatic exposure control (AEC) and automatic gain control (AGC) feedback loops in video and electronic still cameras; and LED-illuminated portable bar-code readers.

Key claim constructions.

Note that claim 12 is claim 1 minus the overlap limitation. That is significant: if the art anticipates or renders obvious the feedback-AEC structure alone, claim 12 falls even if a panel were persuaded the overlap limitation is non-obvious.

2. Reference profiles — verified vs. unverified

2a. Verified by search (high confidence)

US 5,345,266 — Denyer, "Matrix Array Image Sensor Chip" (search-confirmed; used as Exhibit 1058 in IPR2015-00436). This is the single most damaging reference. Verified content:

• A two-dimensional matrix array of sensing cells, each cell = photodiode + access transistor for "reading from and writing to the photodiode" (claims 1, 8).
• Horizontal and vertical scan means (expressly "a shift register") coupled to every cell for row and column scanning.
• The write operation is described as "resetting to a high reverse-bias" — i.e., the cell is set to a reference potential to begin integration, and "the diode then is electrically isolated and exposed to light … this current is effectively integrated on the reverse-bias capacitance." That is a verbatim teaching of the '366's "set to a reference potential … then accumulate charge during an exposure period."
• Analog switch means per column, each containing voltage storage means (a sample-and-hold capacitor) plus a first charge-sensing amplifier; a second output amplifier drives an off-chip read device (claims 1, 2, 3).
• Claim 2 expressly teaches resetting the sensing cell "using a signal from the vertical scan means … whilst said sensing cell is isolated from the signal stored in the voltage storage means" — i.e., a per-row reset followed by a per-row read, with the readout signal held in the column storage element. This is the '366's FIG. 8 architecture (grounding switches 154, sample-and-hold amps 156–162, output shift register 166) in substance.
• Claim 6: the IC is fabricated in "CMOS, PMOS, NMOS, Bipolar, BiMOS, BiCMOS and amorphous silicon" — the exact technology list the '366 recites as its single-chip advantage.
• The specification also states that "when the array sensors are realised in this technology, further system functions can be designed and integrated on the same silicon chip" — the '366's stated motivation ("single chip size, weight and cost advantages … low power consumption") is already in Denyer.

US 4,835,615 — Taniguchi et al. (Minolta), verified by search through its continuation/division US 5,068,737, whose front page states it is "a division of Ser. No. 5,413, Jan. 20, 1987, Pat. No. 4,835,615." Verified disclosure: an image sensor system with a plurality of image sensor arrays, each comprising photoelectric converting elements and accumulation cells for accumulating charge; buffer memory cells that store the accumulated charge "in response to the completion of the charge accumulation"; and a shift register that receives the charges from the buffer cells and outputs them sequentially. Inventor group (Taniguchi, Karasaki, Ishida, Hamada, Norita) is the Minolta autofocus/focus-detection team — relevant to claim 17's focusing device.

2b. Not verified — flagged

Because of these gaps, the strongest § 103 grounds below rest on Denyer + Taniguchi + the specification's own admitted prior art, not on the unverified Ishida/Tsai/JP references. I say so explicitly rather than assume convenient content.

2c. The specification's own admissions (available as prior art)

The "LINE EXPOSURE ARRANGEMENTS" section is an admission of what the applicant treated as prior art, and admissions in the specification are usable as prior art. It admits:

1. "Prior sensor array scanners focus an image of a target area onto a sensor array to simultaneously expose all or half of the sensor elements."
2. "Image capture may be accomplished by simultaneous exposure of all alternate lines of a sensor array followed by sequential read out on a line-by-line basis … completed by simultaneously exposing the remaining lines in a second exposure period."
3. Continuous-frame CCD readers consume "a full watt of power."
4. Full-frame progressive-scan CCDs are "high cost, bulky … high power consumption and slow gain control response time."

Admission (2) is a subset-of-lines common-exposure technique — i.e., the "subset of Y lines" recited in claim 29 already existed in the admitted art, just without per-subset exposure determination.

Also of record: U.S. Pat. No. 5,304,787 ("Locating 2-D Bar Codes") is cited in the specification as the known way to locate a dataform image for decoding — direct evidence that claim 17's "processing unit … operative to decode the dataform" was a known element of portable readers.

3. Grounds of rejection

Ground 1 — Claim 1 obvious over Denyer in view of admitted line-exposure art and routine AEC

Gap A (per-line feedback AEC). Nothing about Gap A is novel in the art of image capture, and the '366 claims nothing about the AEC algorithm beyond "responsive to the level of image signals." Closed-loop exposure control in which the sensor's own output level is fed back to set integration time was the standard electronic-camera technique of the era (this is exactly what a video camera's AEC loop or the still-camera auto-exposure art does). The '366 itself describes its FIG. 5 AEC as accumulating image signals, converting to a gray level, and consulting a look-up table — i.e., an implementation choice, not an inventive concept. Rationale (KSR, "use of a known technique to improve a similar device in the same way"): one of ordinary skill, seeking to expose each line correctly rather than exposing all lines for an average-derived period, would predictably apply camera AEC feedback to a per-row basis in a CMOS array. The result — correctly exposed lines despite non-uniform illumination — is precisely the predictable result the '366 claims, and the '366's own background identifies that result as the problem to be solved.

Gap B (overlap). Denyer's architecture makes overlap natural: because each row is independently reset and independently read, the only design parameter needed to produce overlapping integration is to decouple the reset instant of row n+1 from the read-out instant of row n. There is a straightforward, recognized design incentive: the specification itself explains (in the admitted-art discussion) that with a single global integration started at a given time, "the exposure time for the last line is significantly longer than for the first line … the first line may be underexposed and the last line overexposed to the point of loss of image data." Staggering the resets (i.e., overlapping windows) is the direct and obvious remedy — it equalizes the effective integration time per line. Rationale (KSR, "design incentive … market forces" and "obvious to try"). A POSITA aiming to eliminate the first-line/last-line exposure skew in a line-read array would have been led directly to the use of staggered, partially overlapping integration windows.

Conclusion: Claim 1 is rendered obvious over Denyer in view of the admitted line-by-line exposure art and the routine camera-AEC art. Claim 12 — the same structure without the overlap limitation — is a fortiori obvious (Gap A alone is the only difference and Gap A is the weaker of the two gaps).

Ground 2 — Claims 1 and 23 obvious over Denyer in view of Taniguchi (4,835,615)

Taniguchi supplies what Denyer's fixed-timing scan lacks doctrinally: it expressly teaches a sensor system in which charge accumulation is initiated and completed per array, the accumulated charge is transferred out of the accumulation cells into buffer memory "in response to the completion of the charge accumulation in each array," and the buffered charges are then shifted out sequentially by a shift register. This is a direct, explicit teaching of decoupling the integration interval from the readout interval — i.e., of the architectural feature that makes independent, and therefore overlappable, per-line (per-array) exposure periods possible.

Motivation to combine: Both references sit in the same field (solid-state image sensing for camera/dataform capture) and address the same problem — how to read an array without corrupting the accumulated image signal. Denyer expressly says further system functions can be integrated on the same chip; Taniguchi teaches a division-of-labor readout (accumulate → buffer → shift out) that lends itself to on-chip integration. A POSITA combining them to obtain per-line accumulation with independent readout would predict the overlapping-exposure result of claim 1. KSR rationale: "combination of familiar elements according to known methods … yield[ing] predictable results."

Claim 23 (the method counterpart) tracks steps (a)–(h) that map onto Denyer's reset/integrate/read/output cycle plus Taniguchi's buffered sequential output, with step (f)'s overlap requirement supplied by the equalization rationale in Ground 1.

Ground 3 — Claim 29 (and dependents 30–32) obvious over the admitted interlaced-exposure art in view of AEC

This is the strongest ground in the analysis and requires no unverified reference at all.

Claim 29 requires: read image signals from a selected line; use their level to determine an exposure period; apply that period to a subset of Y lines (Y ≥ 1, Y < X); repeat for a later line and later subset. Dependent claim 31 narrows Y = 3; claim 32 narrows Y = 1.

• The admitted prior art already discloses exposing a subset of lines (all alternate lines) for a common exposure period and then reading them out line-by-line, then exposing the remaining subset. That is literally "utilizing [an] exposure period to control the duration of exposure … of a first subset of Y lines."
• The only added element is that the period for the subset is derived from the measured level of an earlier line's image signals rather than from a fixed shutter setting. That is Ground 1's Gap A, and it is standard AEC.
• Therefore claim 29 = admitted interlaced subset exposure + conventional AEC feedback. Claim 31 (Y = 3) and claim 32 (Y = 1) are mere design choices in the size of the subset — the specification itself frames them that way, calling the subset approach a trade-off offering "accuracy between that provided by a single full image exposure period and the higher accuracy possible by use of an exposure period determined for each subsequent line individually." Choosing Y = 1 (per-line) versus Y = 3 is optimization of a recognized trade-off, squarely an obvious design choice (MPEP 2144.04) and, at minimum, obvious to try with predictable results (MPEP 2144.05).

Ground 4 — Claim 17 (full handheld reader) obvious over Denyer + Taniguchi + the admitted dataform-reader art

Claim 17 adds three elements beyond the array/control/exposure-control core: (i) an exposure illuminator; (ii) a focusing device in front of the array that images reflected illumination when the target lies in a focus range; (iii) a processing unit that decodes the dataform, with overlapping exposure periods.

• (i) The specification admits LED-based perimeter/focus/exposure illuminators as conventional components ("each of the illuminators may be an appropriate form of device, such as a low cost light emitting diode") and admits prior CCD/laser bar-code scanners.
• (ii) Taniguchi's inventor group is the Minolta focus-detection team, and the '366 specification itself discloses focus sensing by lens depth-of-focus and by projection of converging spot illuminators (FIG. 4). Focus-range-limited imaging optics in a reader is the definition of a fixed-focus bar-code scanner, admitted in the art.
• (iii) Decoding a dataform from stored image data is admitted prior art — the specification expressly cites U.S. Pat. No. 5,304,787 ("Locating 2-D Bar Codes") as the known technique, and admits continuous-frame CCD readers that produce a stream of image data from which the microprocessor "selects appropriate data to decode."

Motivation: the specification's own stated objectives (single-frame capture, low power, light weight, hand-holdable) are addressed head-on by Denyer's CMOS on-chip-integration teaching. Combining a Denyer-type CMOS array with a known LED illuminator, a known fixed-focus optical train, and a known decode processor yields nothing more than the predictable assembly of known reader components. KSR: "the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results."

Ground 5 — Dependent claims: look-up tables, averaging, gain, subset feedback (claims 3, 4, 25, 26, 27, 33, 34)

These dependents are, in the main, implementation detail:

Gain control (claims arising from the AGC disclosure). The specification's AGC — feeding sampled image-signal level back to the array's adjustable-gain output amplifier — is textbook AGC, and Denyer's chip already has an output amplifier on-chip. No independent significance.

4. Motivation to combine — articulated

For each ground, the record supplies at least one KSR-recognized rationale tied to the facts of this case:

1. Known technique to improve a similar device in the same way. AEC feedback (measure sensor output, adjust integration) was standard in cameras; applying it to a CMOS line-read array improves the same property (correct exposure) in the same way. (Ground 1, 3.)
2. Design incentive / recognized problem. The '366's own admitted-art discussion identifies the first-line-vs-last-line exposure skew as a known defect of monolithic-exposure line readout. Equalizing per-line integration windows by staggering their start times is the direct remedy. (Ground 1, 2.)
3. Predictable combination of familiar elements. Denyer's CMOS matrix array (with on-chip scan, sample-and-hold, output amp, and an express invitation to integrate "further system functions") + Taniguchi's accumulate/buffer/shift-out readout division + a known LED illuminator, fixed-focus optic, and known decode processor = the claim-17 assembly, with no unexpected result. (Ground 2, 4.)
4. Obvious design choice / obvious to try. Averaging sample size, subset size (Y = 1 vs. 3), and look-up-table implementation are recognized trade-offs and finite option sets. (Ground 3, 5.)
5. Same field, same problem, no teaching away. All references are in solid-state image sensing for camera/reader applications. Nothing in Denyer, Taniguchi, or the admitted art disparages per-line or staggered integration. Criticism of the prior art in the patent's own specification is not "teaching away."

5. The strongest rebuttal arguments a patent owner could make (and how they fare)

So the analysis is balanced, here is where the patentee has a real argument, and where those arguments are weak:

Strongest patentee argument — the "feedback + overlap" combination as a whole. The patentee would argue that no single reference teaches using an earlier line's readout level to set the integration window of a later line that is already integrating, and that this creates a technically non-trivial control problem because the control loop must run ahead of the line being read. That is a genuine structural point and Ground 1's Gap A + Gap B must be combined to reach claim 1.

Why it likely fails. (i) The problem is a timing/pipelining problem, and KSR makes clear that a recognized, predictable engineering solution to a known problem is obvious even where the prior art does not spell it out. The '366's own text acknowledges the pipeline: "exposure information derived from the first line image signal level can be used for controlling the exposure period used for the third line." (ii) Claim 12 removes the overlap requirement entirely, so the "combination as a whole" argument cannot save it. (iii) Claim 29 is vulnerable to the admitted interlaced art plus AEC and is largely insulated from the overlap argument.

Secondary-considerations posture. I found no evidence in the record of objective indicia of non-obviousness — no commercial-success, licensing-nexus, copying, or long-felt-but-unmet-need evidence; none of the search results surfaced any. The specification's asserted "as low as one-tenth the power consumption of comparable CCD array components" is a stated advantage arising from the admitted CMOS-vs-CCD choice, not evidence of unexpected results attributable to the overlapping-exposure/line-AEC combination; and Denyer already teaches the CMOS on-chip integration that produces the power benefit, which undercuts any nexus argument.

6. Bottom line

The single most important prior-art finding is that the Denyer CMOS matrix-array sensor chip of record (US 5,345,266 on my search results) already discloses photodiode cells with row-reset-to-reference and per-row readout into column sample-and-hold amplifiers, output shift-register scanning, and single-chip CMOS integration — i.e., essentially the entire FIG. 8 hardware of the '366 — leaving only the control-loop timing as the point of novelty.

7. Verification gaps — read this before relying on the analysis

1. Denyer reference number discrepancy. The previously generated summary lists US 5,265,266 (Denyer); my searches returned US 5,345,266 (Denyer), "Matrix Array Image Sensor Chip." I have not auto-corrected either number and cannot confirm which appears on the '366 front page. If the record reference is 5,265,266, my Denyer characterization may not describe that document. Action: pull the '366 front page (or the USPTO PatentCenter "References Cited" list) to confirm.
2. US 5,309,243 (Tsai) — content unverified; my searches returned no matching image-sensor patent.
3. US 4,955,296 (Ishida) — content unverified; a citation list I retrieved showed 4,952,966 (Ishida et al., Aug. 28, 1990), a different number. Do not assume equivalence.
4. JP 63-67692 — content unverified.
5. Prior-art status dates. My analysis assumes Denyer qualifies under pre-AIA § 102(e) (US filing predating 1994-10-31) and Taniguchi/US 4,835,615 under § 102(b) (issued 1989). I did not verify Denyer's actual US filing/issue dates, and note that if the overlap claims are entitled to the 1994-07-26 parent priority, a Sept-1994 Denyer issue date would place it outside § 102(a) but still within § 102(e) if its filing predates the priority date. Action: confirm Denyer's filing and issue dates.
6. Common ownership (§ 103(c)). The specification incorporates Ser. No. 08/258,428 (filed Jun. 10, 1994, common assignee Metanetics). Under pre-AIA § 103(c), that application is disqualified as prior art for § 103 if commonly owned at the time of invention. It is therefore excluded from my grounds above — but note that its disclosure is largely congruent with Denyer's, so its disqualification does not weaken the analysis.
7. No litigation or PTAB record found for the '366 itself. The earlier section's 2005 E.D. Tex. case (2:05-cv-00456) is a "family has litigation" flag and — importantly for this task — the file history of that case, if the '366 was asserted, would be the best source of a real-world invalidity contention (e.g., an IPR petition or an expert declaration mapping Denyer-type art to these claims). My searches did not surface one. If a validity challenge exists in the record, it should be retrieved before finalizing this analysis.

Confidence levels: High for the Denyer CMOS-array characterization and for the claim-mapping of claim 29 to the admitted interlaced art. Moderate for the claim 1/23 combination, which depends on how narrowly the "feedback to a later, already-integrating line" limitation is construed. Low for any position resting on Tsai, Ishida, or the JP reference, whose contents I could not verify.